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projet_pololu_et5_ees

Fork of FastIO by Erik -

Devices/FastIO_STM32F4.h@23:6b6ea8ba43e3, 2018-03-09 (annotated)

Committer:
lesuperguerrier
Date:
Fri Mar 09 10:03:26 2018 +0000
Revision:
23:6b6ea8ba43e3
Parent:
14:f0a48027b2b3 
projet_pololu_et5_ees

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Sissors 13:0e21ffc6cb84 1 #if defined(TARGET_STM32F4)
Sissors 13:0e21ffc6cb84 2
Sissors 13:0e21ffc6cb84 3 #include "mbed.h"
Sissors 13:0e21ffc6cb84 4 #include "pinmap.h"
Sissors 13:0e21ffc6cb84 5
Sissors 13:0e21ffc6cb84 6 typedef struct {
Sissors 13:0e21ffc6cb84 7 uint32_t mask;
Sissors 13:0e21ffc6cb84 8 } fastio_vars;
Sissors 13:0e21ffc6cb84 9
Sissors 13:0e21ffc6cb84 10 #define PINMASK (1 << STM_PIN(pin))
Sissors 14:f0a48027b2b3 11 #define PINMASK_CLR ((1<<16) << STM_PIN(pin))
Sissors 13:0e21ffc6cb84 12 #define PORT ((GPIO_TypeDef *)(GPIOA_BASE + 0x0400 * STM_PORT(pin)))
Sissors 13:0e21ffc6cb84 13
Sissors 13:0e21ffc6cb84 14 #define INIT_PIN RCC->AHB1ENR |= (1 << STM_PORT(pin)); (PORT->MODER &= ~(GPIO_MODER_MODER0_1 << (STM_PIN(pin) * 2))); container.mask = PINMASK
Sissors 13:0e21ffc6cb84 15 #define DESTROY_PIN
Sissors 13:0e21ffc6cb84 16
Sissors 13:0e21ffc6cb84 17 #define SET_DIR_INPUT (PORT->MODER &= ~(GPIO_MODER_MODER0_0 << (STM_PIN(pin) * 2)))
Sissors 13:0e21ffc6cb84 18 #define SET_DIR_OUTPUT (PORT->MODER |= (GPIO_MODER_MODER0_0 << (STM_PIN(pin) * 2)))
Sissors 13:0e21ffc6cb84 19 #define SET_MODE(pull) pin_mode(pin, pull);
Sissors 13:0e21ffc6cb84 20
Sissors 14:f0a48027b2b3 21 #define WRITE_PIN_SET (PORT->BSRR = PINMASK)
Sissors 14:f0a48027b2b3 22 #define WRITE_PIN_CLR (PORT->BSRR = PINMASK_CLR)
Sissors 13:0e21ffc6cb84 23
Sissors 13:0e21ffc6cb84 24 #define READ_PIN ((PORT->IDR & container.mask) ? 1 : 0)
Sissors 13:0e21ffc6cb84 25
Sissors 13:0e21ffc6cb84 26 #endif