Under Cover
projet_pololu_et5_ees
Devices/FastIO_NUCLEO_F030.h@23:6b6ea8ba43e3, 2018-03-09 (annotated)
- Committer:
- lesuperguerrier
- Date:
- Fri Mar 09 10:03:26 2018 +0000
- Revision:
- 23:6b6ea8ba43e3
- Parent:
- 7:1e784ae11fba
- Child:
- 22:45b32f07e790
projet_pololu_et5_ees
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| Sissors | 6:da3730030c07 | 1 | #ifdef TARGET_NUCLEO_F030R8 |
| Sissors | 6:da3730030c07 | 2 | |
| Sissors | 6:da3730030c07 | 3 | #include "mbed.h" |
| Sissors | 6:da3730030c07 | 4 | #include "pinmap.h" |
| Sissors | 6:da3730030c07 | 5 | |
| Sissors | 6:da3730030c07 | 6 | typedef struct { |
| Sissors | 6:da3730030c07 | 7 | uint32_t mask; |
| Sissors | 6:da3730030c07 | 8 | } fastio_vars; |
| Sissors | 6:da3730030c07 | 9 | |
| Sissors | 6:da3730030c07 | 10 | #define PINMASK (1 << STM_PIN(pin)) |
| Sissors | 6:da3730030c07 | 11 | #define PORT ((GPIO_TypeDef *)(GPIOA_BASE + 0x0400 * STM_PORT(pin))) |
| Sissors | 6:da3730030c07 | 12 | |
| Sissors | 6:da3730030c07 | 13 | #define INIT_PIN RCC->AHBENR |= (1 << STM_PORT(pin)); (PORT->MODER &= ~(GPIO_MODER_MODER0_1 << (STM_PIN(pin) * 2))); container.mask = PINMASK |
| Sissors | 6:da3730030c07 | 14 | #define DESTROY_PIN |
| Sissors | 6:da3730030c07 | 15 | |
| Sissors | 7:1e784ae11fba | 16 | #define SET_DIR_INPUT (PORT->MODER &= ~(GPIO_MODER_MODER0_0 << (STM_PIN(pin) * 2))) |
| Sissors | 6:da3730030c07 | 17 | #define SET_DIR_OUTPUT (PORT->MODER |= (GPIO_MODER_MODER0_0 << (STM_PIN(pin) * 2))) |
| Sissors | 6:da3730030c07 | 18 | #define SET_MODE(pull) pin_mode(pin, pull); |
| Sissors | 6:da3730030c07 | 19 | |
| Sissors | 6:da3730030c07 | 20 | #define WRITE_PIN_SET (PORT->BSRR = PINMASK) |
| Sissors | 6:da3730030c07 | 21 | #define WRITE_PIN_CLR (PORT->BRR = PINMASK) |
| Sissors | 6:da3730030c07 | 22 | |
| Sissors | 6:da3730030c07 | 23 | #define READ_PIN ((PORT->IDR & container.mask) ? 1 : 0) |
| Sissors | 6:da3730030c07 | 24 | |
| Sissors | 6:da3730030c07 | 25 | #endif |