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arm_rms_q15.c
00001 /* ---------------------------------------------------------------------- 00002 * Copyright (C) 2010-2013 ARM Limited. All rights reserved. 00003 * 00004 * $Date: 17. January 2013 00005 * $Revision: V1.4.1 00006 * 00007 * Project: CMSIS DSP Library 00008 * Title: arm_rms_q15.c 00009 * 00010 * Description: Root Mean Square of the elements of a Q15 vector. 00011 * 00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 00013 * 00014 * Redistribution and use in source and binary forms, with or without 00015 * modification, are permitted provided that the following conditions 00016 * are met: 00017 * - Redistributions of source code must retain the above copyright 00018 * notice, this list of conditions and the following disclaimer. 00019 * - Redistributions in binary form must reproduce the above copyright 00020 * notice, this list of conditions and the following disclaimer in 00021 * the documentation and/or other materials provided with the 00022 * distribution. 00023 * - Neither the name of ARM LIMITED nor the names of its contributors 00024 * may be used to endorse or promote products derived from this 00025 * software without specific prior written permission. 00026 * 00027 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 00028 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 00029 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 00030 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 00031 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 00032 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 00033 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 00034 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00035 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 00036 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 00037 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 00038 * POSSIBILITY OF SUCH DAMAGE. 00039 * ---------------------------------------------------------------------------- */ 00040 00041 #include "arm_math.h" 00042 00043 /** 00044 * @addtogroup RMS 00045 * @{ 00046 */ 00047 00048 /** 00049 * @brief Root Mean Square of the elements of a Q15 vector. 00050 * @param[in] *pSrc points to the input vector 00051 * @param[in] blockSize length of the input vector 00052 * @param[out] *pResult rms value returned here 00053 * @return none. 00054 * 00055 * @details 00056 * <b>Scaling and Overflow Behavior:</b> 00057 * 00058 * \par 00059 * The function is implemented using a 64-bit internal accumulator. 00060 * The input is represented in 1.15 format. 00061 * Intermediate multiplication yields a 2.30 format, and this 00062 * result is added without saturation to a 64-bit accumulator in 34.30 format. 00063 * With 33 guard bits in the accumulator, there is no risk of overflow, and the 00064 * full precision of the intermediate multiplication is preserved. 00065 * Finally, the 34.30 result is truncated to 34.15 format by discarding the lower 00066 * 15 bits, and then saturated to yield a result in 1.15 format. 00067 * 00068 */ 00069 00070 void arm_rms_q15( 00071 q15_t * pSrc, 00072 uint32_t blockSize, 00073 q15_t * pResult) 00074 { 00075 q63_t sum = 0; /* accumulator */ 00076 00077 #ifndef ARM_MATH_CM0_FAMILY 00078 00079 /* Run the below code for Cortex-M4 and Cortex-M3 */ 00080 00081 q31_t in; /* temporary variable to store the input value */ 00082 q15_t in1; /* temporary variable to store the input value */ 00083 uint32_t blkCnt; /* loop counter */ 00084 00085 /* loop Unrolling */ 00086 blkCnt = blockSize >> 2u; 00087 00088 /* First part of the processing with loop unrolling. Compute 4 outputs at a time. 00089 ** a second loop below computes the remaining 1 to 3 samples. */ 00090 while(blkCnt > 0u) 00091 { 00092 /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */ 00093 /* Compute sum of the squares and then store the results in a temporary variable, sum */ 00094 in = *__SIMD32(pSrc)++; 00095 sum = __SMLALD(in, in, sum); 00096 in = *__SIMD32(pSrc)++; 00097 sum = __SMLALD(in, in, sum); 00098 00099 /* Decrement the loop counter */ 00100 blkCnt--; 00101 } 00102 00103 /* If the blockSize is not a multiple of 4, compute any remaining output samples here. 00104 ** No loop unrolling is used. */ 00105 blkCnt = blockSize % 0x4u; 00106 00107 while(blkCnt > 0u) 00108 { 00109 /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */ 00110 /* Compute sum of the squares and then store the results in a temporary variable, sum */ 00111 in1 = *pSrc++; 00112 sum = __SMLALD(in1, in1, sum); 00113 00114 /* Decrement the loop counter */ 00115 blkCnt--; 00116 } 00117 00118 /* Truncating and saturating the accumulator to 1.15 format */ 00119 in = (q31_t)(sum >> 15); 00120 00121 in1 = __SSAT(in / blockSize, 16); 00122 00123 /* Store the result in the destination */ 00124 arm_sqrt_q15(in1, pResult); 00125 00126 #else 00127 00128 /* Run the below code for Cortex-M0 */ 00129 00130 q15_t in; /* temporary variable to store the input value */ 00131 q31_t tmp; /* temporary variable to store the input value */ 00132 uint32_t blkCnt; /* loop counter */ 00133 00134 /* Loop over blockSize number of values */ 00135 blkCnt = blockSize; 00136 00137 while(blkCnt > 0u) 00138 { 00139 /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */ 00140 /* Compute sum of the squares and then store the results in a temporary variable, sum */ 00141 in = *pSrc++; 00142 sum += ((q31_t) in * in); 00143 00144 /* Decrement the loop counter */ 00145 blkCnt--; 00146 } 00147 00148 /* Truncating and saturating the accumulator to 1.15 format */ 00149 tmp = (q31_t)(sum >> 15); 00150 00151 in = __SSAT(tmp / blockSize, 16); 00152 00153 /* Store the result in the destination */ 00154 arm_sqrt_q15(in, pResult); 00155 00156 #endif /* #ifndef ARM_MATH_CM0_FAMILY */ 00157 00158 } 00159 00160 /** 00161 * @} end of RMS group 00162 */
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