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arm_pid_init_q15.c
00001 /* ---------------------------------------------------------------------- 00002 * Copyright (C) 2010-2013 ARM Limited. All rights reserved. 00003 * 00004 * $Date: 17. January 2013 00005 * $Revision: V1.4.1 00006 * 00007 * Project: CMSIS DSP Library 00008 * Title: arm_pid_init_q15.c 00009 * 00010 * Description: Q15 PID Control initialization function 00011 * 00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 00013 * 00014 * Redistribution and use in source and binary forms, with or without 00015 * modification, are permitted provided that the following conditions 00016 * are met: 00017 * - Redistributions of source code must retain the above copyright 00018 * notice, this list of conditions and the following disclaimer. 00019 * - Redistributions in binary form must reproduce the above copyright 00020 * notice, this list of conditions and the following disclaimer in 00021 * the documentation and/or other materials provided with the 00022 * distribution. 00023 * - Neither the name of ARM LIMITED nor the names of its contributors 00024 * may be used to endorse or promote products derived from this 00025 * software without specific prior written permission. 00026 * 00027 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 00028 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 00029 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 00030 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 00031 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 00032 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 00033 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 00034 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00035 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 00036 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 00037 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 00038 * POSSIBILITY OF SUCH DAMAGE. 00039 * -------------------------------------------------------------------- */ 00040 00041 #include "arm_math.h" 00042 00043 /** 00044 * @addtogroup PID 00045 * @{ 00046 */ 00047 00048 /** 00049 * @details 00050 * @param[in,out] *S points to an instance of the Q15 PID structure. 00051 * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state. 00052 * @return none. 00053 * \par Description: 00054 * \par 00055 * The <code>resetStateFlag</code> specifies whether to set state to zero or not. \n 00056 * The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code> 00057 * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd) 00058 * also sets the state variables to all zeros. 00059 */ 00060 00061 void arm_pid_init_q15( 00062 arm_pid_instance_q15 * S, 00063 int32_t resetStateFlag) 00064 { 00065 00066 #ifndef ARM_MATH_CM0_FAMILY 00067 00068 /* Run the below code for Cortex-M4 and Cortex-M3 */ 00069 00070 /* Derived coefficient A0 */ 00071 S->A0 = __QADD16(__QADD16(S->Kp, S->Ki), S->Kd); 00072 00073 /* Derived coefficients and pack into A1 */ 00074 00075 #ifndef ARM_MATH_BIG_ENDIAN 00076 00077 S->A1 = __PKHBT(-__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), S->Kd, 16); 00078 00079 #else 00080 00081 S->A1 = __PKHBT(S->Kd, -__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), 16); 00082 00083 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ 00084 00085 /* Check whether state needs reset or not */ 00086 if(resetStateFlag) 00087 { 00088 /* Clear the state buffer. The size will be always 3 samples */ 00089 memset(S->state, 0, 3u * sizeof(q15_t)); 00090 } 00091 00092 #else 00093 00094 /* Run the below code for Cortex-M0 */ 00095 00096 q31_t temp; /*to store the sum */ 00097 00098 /* Derived coefficient A0 */ 00099 temp = S->Kp + S->Ki + S->Kd; 00100 S->A0 = (q15_t) __SSAT(temp, 16); 00101 00102 /* Derived coefficients and pack into A1 */ 00103 temp = -(S->Kd + S->Kd + S->Kp); 00104 S->A1 = (q15_t) __SSAT(temp, 16); 00105 S->A2 = S->Kd; 00106 00107 00108 00109 /* Check whether state needs reset or not */ 00110 if(resetStateFlag) 00111 { 00112 /* Clear the state buffer. The size will be always 3 samples */ 00113 memset(S->state, 0, 3u * sizeof(q15_t)); 00114 } 00115 00116 #endif /* #ifndef ARM_MATH_CM0_FAMILY */ 00117 00118 } 00119 00120 /** 00121 * @} end of PID group 00122 */
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