arm_lms_norm_init_q31.c

00001 /*-----------------------------------------------------------------------------    
00002 * Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
00003 *    
00004 * $Date:        17. January 2013
00005 * $Revision:    V1.4.1
00006 *    
00007 * Project:      CMSIS DSP Library    
00008 * Title:        arm_lms_norm_init_q31.c    
00009 *    
00010 * Description:  Q31 NLMS initialization function.    
00011 *    
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *  
00014 * Redistribution and use in source and binary forms, with or without 
00015 * modification, are permitted provided that the following conditions
00016 * are met:
00017 *   - Redistributions of source code must retain the above copyright
00018 *     notice, this list of conditions and the following disclaimer.
00019 *   - Redistributions in binary form must reproduce the above copyright
00020 *     notice, this list of conditions and the following disclaimer in
00021 *     the documentation and/or other materials provided with the 
00022 *     distribution.
00023 *   - Neither the name of ARM LIMITED nor the names of its contributors
00024 *     may be used to endorse or promote products derived from this
00025 *     software without specific prior written permission.
00026 *
00027 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
00028 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00029 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00030 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
00031 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00032 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00033 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
00034 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00035 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00036 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
00037 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
00038 * POSSIBILITY OF SUCH DAMAGE.    
00039 * ---------------------------------------------------------------------------*/
00040 
00041 #include "arm_math.h"
00042 #include "arm_common_tables.h"
00043 
00044 /**    
00045  * @addtogroup LMS_NORM    
00046  * @{    
00047  */
00048 
00049   /**    
00050    * @brief Initialization function for Q31 normalized LMS filter.    
00051    * @param[in] *S points to an instance of the Q31 normalized LMS filter structure.    
00052    * @param[in] numTaps  number of filter coefficients.    
00053    * @param[in] *pCoeffs points to coefficient buffer.    
00054    * @param[in] *pState points to state buffer.    
00055    * @param[in] mu step size that controls filter coefficient updates.    
00056    * @param[in] blockSize number of samples to process.    
00057    * @param[in] postShift bit shift applied to coefficients.    
00058    * @return none.    
00059  *    
00060  * <b>Description:</b>    
00061  * \par    
00062  * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:    
00063  * <pre>    
00064  *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
00065  * </pre>    
00066  * The initial filter coefficients serve as a starting point for the adaptive filter.    
00067  * <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples,    
00068  * where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_lms_norm_q31()</code>.    
00069  */
00070 
00071 void arm_lms_norm_init_q31(
00072   arm_lms_norm_instance_q31 * S,
00073   uint16_t numTaps,
00074   q31_t * pCoeffs,
00075   q31_t * pState,
00076   q31_t mu,
00077   uint32_t blockSize,
00078   uint8_t postShift)
00079 {
00080   /* Assign filter taps */
00081   S->numTaps = numTaps;
00082 
00083   /* Assign coefficient pointer */
00084   S->pCoeffs = pCoeffs;
00085 
00086   /* Clear state buffer and size is always blockSize + numTaps - 1  */
00087   memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q31_t));
00088 
00089   /* Assign post Shift value applied to coefficients */
00090   S->postShift = postShift;
00091 
00092   /* Assign state pointer */
00093   S->pState = pState;
00094 
00095   /* Assign Step size value */
00096   S->mu = mu;
00097 
00098   /* Initialize reciprocal pointer table */
00099   S->recipTable = (q31_t *) armRecipTableQ31;
00100 
00101   /* Initialise Energy to zero */
00102   S->energy = 0;
00103 
00104   /* Initialise x0 to zero */
00105   S->x0 = 0;
00106 
00107 }
00108 
00109 /**    
00110  * @} end of LMS_NORM group    
00111  */