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arm_add_q31.c
00001 /* ---------------------------------------------------------------------- 00002 * Copyright (C) 2010-2013 ARM Limited. All rights reserved. 00003 * 00004 * $Date: 17. January 2013 00005 * $Revision: V1.4.1 00006 * 00007 * Project: CMSIS DSP Library 00008 * Title: arm_add_q31.c 00009 * 00010 * Description: Q31 vector addition. 00011 * 00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 00013 * 00014 * Redistribution and use in source and binary forms, with or without 00015 * modification, are permitted provided that the following conditions 00016 * are met: 00017 * - Redistributions of source code must retain the above copyright 00018 * notice, this list of conditions and the following disclaimer. 00019 * - Redistributions in binary form must reproduce the above copyright 00020 * notice, this list of conditions and the following disclaimer in 00021 * the documentation and/or other materials provided with the 00022 * distribution. 00023 * - Neither the name of ARM LIMITED nor the names of its contributors 00024 * may be used to endorse or promote products derived from this 00025 * software without specific prior written permission. 00026 * 00027 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 00028 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 00029 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 00030 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 00031 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 00032 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 00033 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 00034 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00035 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 00036 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 00037 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 00038 * POSSIBILITY OF SUCH DAMAGE. 00039 * -------------------------------------------------------------------- */ 00040 00041 #include "arm_math.h" 00042 00043 /** 00044 * @ingroup groupMath 00045 */ 00046 00047 /** 00048 * @addtogroup BasicAdd 00049 * @{ 00050 */ 00051 00052 00053 /** 00054 * @brief Q31 vector addition. 00055 * @param[in] *pSrcA points to the first input vector 00056 * @param[in] *pSrcB points to the second input vector 00057 * @param[out] *pDst points to the output vector 00058 * @param[in] blockSize number of samples in each vector 00059 * @return none. 00060 * 00061 * <b>Scaling and Overflow Behavior:</b> 00062 * \par 00063 * The function uses saturating arithmetic. 00064 * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated. 00065 */ 00066 00067 void arm_add_q31( 00068 q31_t * pSrcA, 00069 q31_t * pSrcB, 00070 q31_t * pDst, 00071 uint32_t blockSize) 00072 { 00073 uint32_t blkCnt; /* loop counter */ 00074 00075 #ifndef ARM_MATH_CM0_FAMILY 00076 00077 /* Run the below code for Cortex-M4 and Cortex-M3 */ 00078 q31_t inA1, inA2, inA3, inA4; 00079 q31_t inB1, inB2, inB3, inB4; 00080 00081 /*loop Unrolling */ 00082 blkCnt = blockSize >> 2u; 00083 00084 /* First part of the processing with loop unrolling. Compute 4 outputs at a time. 00085 ** a second loop below computes the remaining 1 to 3 samples. */ 00086 while(blkCnt > 0u) 00087 { 00088 /* C = A + B */ 00089 /* Add and then store the results in the destination buffer. */ 00090 inA1 = *pSrcA++; 00091 inA2 = *pSrcA++; 00092 inB1 = *pSrcB++; 00093 inB2 = *pSrcB++; 00094 00095 inA3 = *pSrcA++; 00096 inA4 = *pSrcA++; 00097 inB3 = *pSrcB++; 00098 inB4 = *pSrcB++; 00099 00100 *pDst++ = __QADD(inA1, inB1); 00101 *pDst++ = __QADD(inA2, inB2); 00102 *pDst++ = __QADD(inA3, inB3); 00103 *pDst++ = __QADD(inA4, inB4); 00104 00105 /* Decrement the loop counter */ 00106 blkCnt--; 00107 } 00108 00109 /* If the blockSize is not a multiple of 4, compute any remaining output samples here. 00110 ** No loop unrolling is used. */ 00111 blkCnt = blockSize % 0x4u; 00112 00113 while(blkCnt > 0u) 00114 { 00115 /* C = A + B */ 00116 /* Add and then store the results in the destination buffer. */ 00117 *pDst++ = __QADD(*pSrcA++, *pSrcB++); 00118 00119 /* Decrement the loop counter */ 00120 blkCnt--; 00121 } 00122 00123 #else 00124 00125 /* Run the below code for Cortex-M0 */ 00126 00127 00128 00129 /* Initialize blkCnt with number of samples */ 00130 blkCnt = blockSize; 00131 00132 while(blkCnt > 0u) 00133 { 00134 /* C = A + B */ 00135 /* Add and then store the results in the destination buffer. */ 00136 *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrcA++ + *pSrcB++); 00137 00138 /* Decrement the loop counter */ 00139 blkCnt--; 00140 } 00141 00142 #endif /* #ifndef ARM_MATH_CM0_FAMILY */ 00143 00144 } 00145 00146 /** 00147 * @} end of BasicAdd group 00148 */
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