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cmsis_dsp/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c@1:fdd22bb7aa52, 2012-11-28 (annotated)

Committer:
emilmont
Date:
Wed Nov 28 12:30:09 2012 +0000
Revision:
1:fdd22bb7aa52
Child:
2:da51fb522205
DSP library code

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
emilmont 1:fdd22bb7aa52 2 * Copyright (C) 2010 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
emilmont 1:fdd22bb7aa52 4 * $Date: 15. February 2012
emilmont 1:fdd22bb7aa52 5 * $Revision: V1.1.0
emilmont 1:fdd22bb7aa52 6 *
emilmont 1:fdd22bb7aa52 7 * Project: CMSIS DSP Library
emilmont 1:fdd22bb7aa52 8 * Title: arm_cmplx_dot_prod_q15.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 1:fdd22bb7aa52 10 * Description: Processing function for the Q15 Complex Dot product
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
emilmont 1:fdd22bb7aa52 14 * Version 1.1.0 2012/02/15
emilmont 1:fdd22bb7aa52 15 * Updated with more optimizations, bug fixes and minor API changes.
emilmont 1:fdd22bb7aa52 16 *
emilmont 1:fdd22bb7aa52 17 * Version 1.0.10 2011/7/15
emilmont 1:fdd22bb7aa52 18 * Big Endian support added and Merged M0 and M3/M4 Source code.
emilmont 1:fdd22bb7aa52 19 *
emilmont 1:fdd22bb7aa52 20 * Version 1.0.3 2010/11/29
emilmont 1:fdd22bb7aa52 21 * Re-organized the CMSIS folders and updated documentation.
emilmont 1:fdd22bb7aa52 22 *
emilmont 1:fdd22bb7aa52 23 * Version 1.0.2 2010/11/11
emilmont 1:fdd22bb7aa52 24 * Documentation updated.
emilmont 1:fdd22bb7aa52 25 *
emilmont 1:fdd22bb7aa52 26 * Version 1.0.1 2010/10/05
emilmont 1:fdd22bb7aa52 27 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 28 *
emilmont 1:fdd22bb7aa52 29 * Version 1.0.0 2010/09/20
emilmont 1:fdd22bb7aa52 30 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 31 * -------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 32
emilmont 1:fdd22bb7aa52 33 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 34
emilmont 1:fdd22bb7aa52 35 /**
emilmont 1:fdd22bb7aa52 36 * @ingroup groupCmplxMath
emilmont 1:fdd22bb7aa52 37 */
emilmont 1:fdd22bb7aa52 38
emilmont 1:fdd22bb7aa52 39 /**
emilmont 1:fdd22bb7aa52 40 * @addtogroup cmplx_dot_prod
emilmont 1:fdd22bb7aa52 41 * @{
emilmont 1:fdd22bb7aa52 42 */
emilmont 1:fdd22bb7aa52 43
emilmont 1:fdd22bb7aa52 44 /**
emilmont 1:fdd22bb7aa52 45 * @brief Q15 complex dot product
emilmont 1:fdd22bb7aa52 46 * @param *pSrcA points to the first input vector
emilmont 1:fdd22bb7aa52 47 * @param *pSrcB points to the second input vector
emilmont 1:fdd22bb7aa52 48 * @param numSamples number of complex samples in each vector
emilmont 1:fdd22bb7aa52 49 * @param *realResult real part of the result returned here
emilmont 1:fdd22bb7aa52 50 * @param *imagResult imaginary part of the result returned here
emilmont 1:fdd22bb7aa52 51 * @return none.
emilmont 1:fdd22bb7aa52 52 *
emilmont 1:fdd22bb7aa52 53 * <b>Scaling and Overflow Behavior:</b>
emilmont 1:fdd22bb7aa52 54 * \par
emilmont 1:fdd22bb7aa52 55 * The function is implemented using an internal 64-bit accumulator.
emilmont 1:fdd22bb7aa52 56 * The intermediate 1.15 by 1.15 multiplications are performed with full precision and yield a 2.30 result.
emilmont 1:fdd22bb7aa52 57 * These are accumulated in a 64-bit accumulator with 34.30 precision.
emilmont 1:fdd22bb7aa52 58 * As a final step, the accumulators are converted to 8.24 format.
emilmont 1:fdd22bb7aa52 59 * The return results <code>realResult</code> and <code>imagResult</code> are in 8.24 format.
emilmont 1:fdd22bb7aa52 60 */
emilmont 1:fdd22bb7aa52 61
emilmont 1:fdd22bb7aa52 62 void arm_cmplx_dot_prod_q15(
emilmont 1:fdd22bb7aa52 63 q15_t * pSrcA,
emilmont 1:fdd22bb7aa52 64 q15_t * pSrcB,
emilmont 1:fdd22bb7aa52 65 uint32_t numSamples,
emilmont 1:fdd22bb7aa52 66 q31_t * realResult,
emilmont 1:fdd22bb7aa52 67 q31_t * imagResult)
emilmont 1:fdd22bb7aa52 68 {
emilmont 1:fdd22bb7aa52 69 q63_t real_sum = 0, imag_sum = 0; /* Temporary result storage */
emilmont 1:fdd22bb7aa52 70
emilmont 1:fdd22bb7aa52 71 #ifndef ARM_MATH_CM0
emilmont 1:fdd22bb7aa52 72
emilmont 1:fdd22bb7aa52 73 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 74 uint32_t blkCnt; /* loop counter */
emilmont 1:fdd22bb7aa52 75
emilmont 1:fdd22bb7aa52 76
emilmont 1:fdd22bb7aa52 77 /*loop Unrolling */
emilmont 1:fdd22bb7aa52 78 blkCnt = numSamples >> 2u;
emilmont 1:fdd22bb7aa52 79
emilmont 1:fdd22bb7aa52 80 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emilmont 1:fdd22bb7aa52 81 ** a second loop below computes the remaining 1 to 3 samples. */
emilmont 1:fdd22bb7aa52 82 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 83 {
emilmont 1:fdd22bb7aa52 84 /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
emilmont 1:fdd22bb7aa52 85 real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
emilmont 1:fdd22bb7aa52 86
emilmont 1:fdd22bb7aa52 87 /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
emilmont 1:fdd22bb7aa52 88 imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
emilmont 1:fdd22bb7aa52 89
emilmont 1:fdd22bb7aa52 90 real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
emilmont 1:fdd22bb7aa52 91 imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
emilmont 1:fdd22bb7aa52 92
emilmont 1:fdd22bb7aa52 93 real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
emilmont 1:fdd22bb7aa52 94 imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
emilmont 1:fdd22bb7aa52 95
emilmont 1:fdd22bb7aa52 96 real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
emilmont 1:fdd22bb7aa52 97 imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
emilmont 1:fdd22bb7aa52 98
emilmont 1:fdd22bb7aa52 99 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 100 blkCnt--;
emilmont 1:fdd22bb7aa52 101 }
emilmont 1:fdd22bb7aa52 102
emilmont 1:fdd22bb7aa52 103 /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 104 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 105 blkCnt = numSamples % 0x4u;
emilmont 1:fdd22bb7aa52 106
emilmont 1:fdd22bb7aa52 107 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 108 {
emilmont 1:fdd22bb7aa52 109 /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
emilmont 1:fdd22bb7aa52 110 real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
emilmont 1:fdd22bb7aa52 111 /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
emilmont 1:fdd22bb7aa52 112 imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
emilmont 1:fdd22bb7aa52 113
emilmont 1:fdd22bb7aa52 114 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 115 blkCnt--;
emilmont 1:fdd22bb7aa52 116 }
emilmont 1:fdd22bb7aa52 117
emilmont 1:fdd22bb7aa52 118 #else
emilmont 1:fdd22bb7aa52 119
emilmont 1:fdd22bb7aa52 120 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 121
emilmont 1:fdd22bb7aa52 122 while(numSamples > 0u)
emilmont 1:fdd22bb7aa52 123 {
emilmont 1:fdd22bb7aa52 124 /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
emilmont 1:fdd22bb7aa52 125 real_sum += ((q31_t) * pSrcA++ * *pSrcB++);
emilmont 1:fdd22bb7aa52 126 /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
emilmont 1:fdd22bb7aa52 127 imag_sum += ((q31_t) * pSrcA++ * *pSrcB++);
emilmont 1:fdd22bb7aa52 128
emilmont 1:fdd22bb7aa52 129 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 130 numSamples--;
emilmont 1:fdd22bb7aa52 131 }
emilmont 1:fdd22bb7aa52 132
emilmont 1:fdd22bb7aa52 133 #endif /* #ifndef ARM_MATH_CM0 */
emilmont 1:fdd22bb7aa52 134
emilmont 1:fdd22bb7aa52 135 /* Store the real and imaginary results in 8.24 format */
emilmont 1:fdd22bb7aa52 136 /* Convert real data in 34.30 to 8.24 by 6 right shifts */
emilmont 1:fdd22bb7aa52 137 *realResult = (q31_t) (real_sum) >> 6;
emilmont 1:fdd22bb7aa52 138 /* Convert imaginary data in 34.30 to 8.24 by 6 right shifts */
emilmont 1:fdd22bb7aa52 139 *imagResult = (q31_t) (imag_sum) >> 6;
emilmont 1:fdd22bb7aa52 140 }
emilmont 1:fdd22bb7aa52 141
emilmont 1:fdd22bb7aa52 142 /**
emilmont 1:fdd22bb7aa52 143 * @} end of cmplx_dot_prod group
emilmont 1:fdd22bb7aa52 144 */