Forked to make it possible to include this lib in a multi target setting

Fork of SLCD by Erik -

Revision:
3:f70873bc6121
Parent:
1:1579bcd31410
Child:
6:f4773221794b
--- a/LCDconfig.h	Mon Jan 20 21:08:32 2014 +0000
+++ b/LCDconfig.h	Mon Jan 27 21:57:38 2014 +0000
@@ -1,21 +1,18 @@
-#ifndef __LCDConfig_H_
-#define __LCDConfig_H_
-
-#include "FRDM-s401.h"  //  4x7 segdisplay
+#include "FRDM-s401.h"                //  4x7 segdisplay
 
 
 #if 1  // VREF to VLL1
 /* Following configuration is used for LCD default initialization  */
-#define _LCDRVEN          (1)  //
-#define _LCDRVTRIM        (8)           // CPSEL = 1     0 -- 8000 pf 1 -- 6000 pf  2 -- 4000 pf  3 -- 2000 pf
-#define _LCDCPSEL         (1)          //  charge pump select 0 or 1 
-#define _LCDLOADADJUST    (3)           // CPSEL = 1     0 -- 8000 pf 1 -- 6000 pf  2 -- 4000 pf  3 -- 2000 pf
-#define _LCDALTDIV        (0)           // CPSEL = 1     0 -- 8000 pf 1 -- 6000 pf  2 -- 4000 pf  3 -- 2000 pf
+#define _LCDRVEN          (1)         //
+#define _LCDRVTRIM        (8)         // CPSEL = 1     0 -- 8000 pf 1 -- 6000 pf  2 -- 4000 pf  3 -- 2000 pf
+#define _LCDCPSEL         (1)         //  charge pump select 0 or 1 
+#define _LCDLOADADJUST    (3)         // CPSEL = 1     0 -- 8000 pf 1 -- 6000 pf  2 -- 4000 pf  3 -- 2000 pf
+#define _LCDALTDIV        (0)         // CPSEL = 1     0 -- 8000 pf 1 -- 6000 pf  2 -- 4000 pf  3 -- 2000 pf
 #define _LCDALRCLKSOURCE  (0)         // 0 -- External clock       1 --  Alternate clock
 
 #define _LCDCLKPSL        (0)         //  Clock divider to generate the LCD Waveforms 
 #define _LCDSUPPLY        (1) 
-#define _LCDHREF          (0)          // 0 or 1 
+#define _LCDHREF          (0)         // 0 or 1 
 #define _LCDCLKSOURCE     (1)         // 0 -- External clock       1 --  Alternate clock
 #define _LCDLCK           (1)         //Any number between 0 and 7 
 #define _LCDBLINKRATE     (3)         //Any number between 0 and 7 
@@ -25,16 +22,16 @@
 /* Following configuration is used for LCD default initialization  */
 #define _LCDCLKSOURCE     (1)         // 0 -- External clock       1 --  Alternate clock
 #define _LCDALRCLKSOURCE  (0)         // 0 -- External clock       1 --  Alternate clock
-#define _LCDCLKPSL        (0)         //  Clock divider to generate the LCD Waveforms 
+#define _LCDCLKPSL        (0)         // Clock divider to generate the LCD Waveforms 
 #define _LCDSUPPLY        (0) 
-#define _LCDLOADADJUST    (3)           // CPSEL = 1     0 -- 8000 pf 1 -- 6000 pf  2 -- 4000 pf  3 -- 2000 pf
-#define _LCDALTDIV        (0)           // CPSEL = 1     0 -- 8000 pf 1 -- 6000 pf  2 -- 4000 pf  3 -- 2000 pf
-#define _LCDRVTRIM        (0)           // CPSEL = 1     0 -- 8000 pf 1 -- 6000 pf  2 -- 4000 pf  3 -- 2000 pf
-#define _LCDHREF          (0)          // 0 or 1 
-#define _LCDCPSEL         (1)          // 0 or 1 
-#define _LCDRVEN          (0)  //
-#define _LCDBLINKRATE     (3)         //Any number between 0 and 7 
-#define _LCDLCK           (0)         //Any number between 0 and 7 
+#define _LCDLOADADJUST    (3)         // CPSEL = 1     0 -- 8000 pf 1 -- 6000 pf  2 -- 4000 pf  3 -- 2000 pf
+#define _LCDALTDIV        (0)         // CPSEL = 1     0 -- 8000 pf 1 -- 6000 pf  2 -- 4000 pf  3 -- 2000 pf
+#define _LCDRVTRIM        (0)         // CPSEL = 1     0 -- 8000 pf 1 -- 6000 pf  2 -- 4000 pf  3 -- 2000 pf
+#define _LCDHREF          (0)         // 0 or 1 
+#define _LCDCPSEL         (1)         // 0 or 1 
+#define _LCDRVEN          (0)         //
+#define _LCDBLINKRATE     (3)         // Any number between 0 and 7 
+#define _LCDLCK           (0)         // Any number between 0 and 7 
 
 #endif
 
@@ -43,43 +40,42 @@
 
 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~  LCD  Control Register 0  ~|~|~|~|~|~|~|~|~|~|~|~|~*/
 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
-#define _LCDINTENABLE         (1)    
+#define _LCDINTENABLE          (1)    
 
 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~  LCD  Control Register 1  ~|~|~|~|~|~|~|~|~|~|~|~|~|*/
 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
-#define _LCDFRAMEINTERRUPT     (0)        //0 Disable Frame Frequency Interrupt
-                                                                       //1 Enable an LCD interrupt that coincides with the LCD frame frequency
-#define _LCDFULLCPLDIRIVE      (0)        // 0 GPIO shared with the LCD. Inputs levels and internal pullup reference to VDD
-                                                                      // 1 If VSUPPLY=11and RVEN=0. Inputs levels and internal pullup reference to VLL3
-#define _LCDWAITMODE           (0)       // 0 Allows the LCD driver and charge pump to continue running during wait mode
-                                                                     //  1 Disable the LCD when the MCU goes into wait mode
+#define _LCDFRAMEINTERRUPT     (0)     //0 Disable Frame Frequency Interrupt
+                                            //1 Enable an LCD interrupt that coincides with the LCD frame frequency
+#define _LCDFULLCPLDIRIVE      (0)     // 0 GPIO shared with the LCD. Inputs levels and internal pullup reference to VDD
+                                            // 1 If VSUPPLY=11and RVEN=0. Inputs levels and internal pullup reference to VLL3
+#define _LCDWAITMODE           (0)     // 0 Allows the LCD driver and charge pump to continue running during wait mode
+                                            //  1 Disable the LCD when the MCU goes into wait mode
 #define _LCDSTOPMODE           (0)     // 0 Allows the LCD driver and charge pump to continue running during stop2 or stop3
-
-                                                                     //  1 Disable the LCD when and charge pump when the MCU goes into stop2 or stop3                                                               
+                                            //  1 Disable the LCD when and charge pump when the MCU goes into stop2 or stop3                                                               
 
 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~  LCD  Voltage Supply Register  ~|~|~|~|~|~|~|~|~|~|~|~*/
 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
-#define _LCDHIGHREF             (0)      //0 Divide input VIREG=1.0v
-                                                                    //1 Do not divide the input VIREG=1.67v
-#define _LCDBBYPASS             (0)      //Determines whether the internal LCD op amp buffer is bypassed
-                                                                      //0 Buffered mode
-                                                                      //1 Unbuffered mode
+#define _LCDHIGHREF             (0)    //0 Divide input VIREG=1.0v
+                                            //1 Do not divide the input VIREG=1.67v
+#define _LCDBBYPASS             (0)    //Determines whether the internal LCD op amp buffer is bypassed
+                                            //0 Buffered mode
+                                            //1 Unbuffered mode
                             
 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~  LCD  Regulated Voltage Control |~|~|~|~|~|~|~|~|~|~*/
 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
-#define _LCDCONTRAST                    (1)       //Contrast by software   0 -- Disable    1-- Enable
-#define _LVLCONTRAST                    (0)       //Any number between 0  and 15, if the number is bigger the glass get darker
+#define _LCDCONTRAST            (1)       //Contrast by software   0 -- Disable    1-- Enable
+#define _LVLCONTRAST            (0)       //Any number between 0  and 15, if the number is bigger the glass gets darker
 
 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~  LCD  Blink Control Register ~|~|~|~|~|~|~|~|~|~|~|~*/
 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
-#define _LCDBLINKCONTROL         (0)   //0 Disable blink mode
-                                                                       //1 Enable blink mode
-#define _LCDALTMODE              (0)   //0 Normal display 
-                                                                      //1 Alternate display for 4 backplanes or less the LCD backplane sequencer changes to otuput an alternate display
-#define _LCDBLANKDISP           (0)  //0 Do not blank display
-                                                                      //1 Blank display if you put it in 0 the text before blank is manteined     
-#define _LCDBLINKMODE           (0)  //0 Display blank during the blink period 
-                                                                     //1 Display alternate displat during blink period (Ignored if duty is 5 or greater)
+#define _LCDBLINKCONTROL        (1)     //0 Disable blink mode
+                                            //1 Enable blink mode
+#define _LCDALTMODE             (0)     //0 Normal display 
+                                            //1 Alternate display for 4 backplanes or less the LCD backplane sequencer changes to otuput an alternate display
+#define _LCDBLANKDISP           (0)     //0 Do not blank display
+                                            //1 Blank display if you put it in 0 the text before blank is manteined     
+#define _LCDBLINKMODE           (0)     //0 Display blank during the blink period 
+                                            //1 Display alternate displat during blink period (Ignored if duty is 5 or greater)
 
 
 //Calculated values
@@ -87,9 +83,7 @@
 #define _LCDDUTY       (_LCDBACKPLANES-1)         //Any number between 0 and 7 
 #define  LCD_WF_BASE    LCD->WF8B[0]
 
-// General definitions used by the LCD library
-#define  SymbolON(LCDn,bit)     *((uint8 *)&LCD_WF_BASE + LCDn)  |=  (1<<(bit))         
-#define  SymbolOFF(LCDn,bit)    *((uint8 *)&LCD_WF_BASE + LCDn)  &= ~(1<<(bit))         
+// General definitions used by the LCD library         
 #define  LCD_WF(x)              *((uint8 *)&LCD_WF_BASE + x) 
 
 /*LCD Fault Detections Consts*/
@@ -185,5 +179,5 @@
 #define    mBIT62      1073741824
 #define    mBIT63      2147483648
 
-#endif /* __LCDConfig_H_ */
 
+