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Program for testing simple spi on FPGA
Fork of SPI_HelloWorld_Mbed by
Revision 2:8b87ec0dce1b, committed 2018-09-20
- Comitter:
- korotkiy_eugene
- Date:
- Thu Sep 20 16:32:03 2018 +0000
- Parent:
- 1:cfd8aef8d053
- Commit message:
- change spi mode from 3 to 0
Changed in this revision
main.cpp | Show annotated file Show diff for this revision Revisions of this file |
diff -r cfd8aef8d053 -r 8b87ec0dce1b main.cpp --- a/main.cpp Fri Sep 07 00:28:02 2018 +0000 +++ b/main.cpp Thu Sep 20 16:32:03 2018 +0000 @@ -8,9 +8,9 @@ cs = 1; uint8_t val = 0; - // Setup the spi for 8 bit data, high steady state clock, - // second edge capture, with a 1MHz clock rate - spi.format(8,3); + // Setup the spi for 8 bit data, low steady state clock, + // first edge capture, with a 1MHz clock rate + spi.format(8,0); spi.frequency(1000000); while (1) {