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targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/drivers/fsl_qspi_edma.c@154:37f96f9d4de2, 2017-01-04 (annotated)

Committer:
<>
Date:
Wed Jan 04 16:58:05 2017 +0000
Revision:
154:37f96f9d4de2
This updates the lib to the mbed lib v133

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 154:37f96f9d4de2 1 /*
<> 154:37f96f9d4de2 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
<> 154:37f96f9d4de2 3 * All rights reserved.
<> 154:37f96f9d4de2 4 *
<> 154:37f96f9d4de2 5 * Redistribution and use in source and binary forms, with or without modification,
<> 154:37f96f9d4de2 6 * are permitted provided that the following conditions are met:
<> 154:37f96f9d4de2 7 *
<> 154:37f96f9d4de2 8 * o Redistributions of source code must retain the above copyright notice, this list
<> 154:37f96f9d4de2 9 * of conditions and the following disclaimer.
<> 154:37f96f9d4de2 10 *
<> 154:37f96f9d4de2 11 * o Redistributions in binary form must reproduce the above copyright notice, this
<> 154:37f96f9d4de2 12 * list of conditions and the following disclaimer in the documentation and/or
<> 154:37f96f9d4de2 13 * other materials provided with the distribution.
<> 154:37f96f9d4de2 14 *
<> 154:37f96f9d4de2 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
<> 154:37f96f9d4de2 16 * contributors may be used to endorse or promote products derived from this
<> 154:37f96f9d4de2 17 * software without specific prior written permission.
<> 154:37f96f9d4de2 18 *
<> 154:37f96f9d4de2 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
<> 154:37f96f9d4de2 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
<> 154:37f96f9d4de2 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 154:37f96f9d4de2 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
<> 154:37f96f9d4de2 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
<> 154:37f96f9d4de2 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
<> 154:37f96f9d4de2 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
<> 154:37f96f9d4de2 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
<> 154:37f96f9d4de2 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
<> 154:37f96f9d4de2 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 154:37f96f9d4de2 29 */
<> 154:37f96f9d4de2 30
<> 154:37f96f9d4de2 31 #include "fsl_qspi_edma.h"
<> 154:37f96f9d4de2 32
<> 154:37f96f9d4de2 33 /*******************************************************************************
<> 154:37f96f9d4de2 34 * Definitions
<> 154:37f96f9d4de2 35 ******************************************************************************/
<> 154:37f96f9d4de2 36
<> 154:37f96f9d4de2 37 /*<! Structure definition for qspi_edma_private_handle_t. The structure is private. */
<> 154:37f96f9d4de2 38 typedef struct _qspi_edma_private_handle
<> 154:37f96f9d4de2 39 {
<> 154:37f96f9d4de2 40 QuadSPI_Type *base;
<> 154:37f96f9d4de2 41 qspi_edma_handle_t *handle;
<> 154:37f96f9d4de2 42 } qspi_edma_private_handle_t;
<> 154:37f96f9d4de2 43
<> 154:37f96f9d4de2 44 /* QSPI EDMA transfer handle. */
<> 154:37f96f9d4de2 45 enum _qspi_edma_tansfer_states
<> 154:37f96f9d4de2 46 {
<> 154:37f96f9d4de2 47 kQSPI_Idle, /* TX idle. */
<> 154:37f96f9d4de2 48 kQSPI_BusBusy /* RX busy. */
<> 154:37f96f9d4de2 49 };
<> 154:37f96f9d4de2 50
<> 154:37f96f9d4de2 51 /*******************************************************************************
<> 154:37f96f9d4de2 52 * Definitions
<> 154:37f96f9d4de2 53 ******************************************************************************/
<> 154:37f96f9d4de2 54
<> 154:37f96f9d4de2 55 /*<! Private handle only used for internally. */
<> 154:37f96f9d4de2 56 static qspi_edma_private_handle_t s_edmaPrivateHandle[FSL_FEATURE_SOC_QuadSPI_COUNT][2];
<> 154:37f96f9d4de2 57
<> 154:37f96f9d4de2 58 /*******************************************************************************
<> 154:37f96f9d4de2 59 * Prototypes
<> 154:37f96f9d4de2 60 ******************************************************************************/
<> 154:37f96f9d4de2 61
<> 154:37f96f9d4de2 62 /*!
<> 154:37f96f9d4de2 63 * @brief QSPI EDMA send finished callback function.
<> 154:37f96f9d4de2 64 *
<> 154:37f96f9d4de2 65 * This function is called when QSPI EDMA send finished. It disables the QSPI
<> 154:37f96f9d4de2 66 * TX EDMA request and sends @ref kStatus_QSPI_TxIdle to QSPI callback.
<> 154:37f96f9d4de2 67 *
<> 154:37f96f9d4de2 68 * @param handle The EDMA handle.
<> 154:37f96f9d4de2 69 * @param param Callback function parameter.
<> 154:37f96f9d4de2 70 */
<> 154:37f96f9d4de2 71 static void QSPI_SendEDMACallback(edma_handle_t *handle, void *param, bool transferDone, uint32_t tcds);
<> 154:37f96f9d4de2 72
<> 154:37f96f9d4de2 73 /*!
<> 154:37f96f9d4de2 74 * @brief QSPI EDMA receive finished callback function.
<> 154:37f96f9d4de2 75 *
<> 154:37f96f9d4de2 76 * This function is called when QSPI EDMA receive finished. It disables the QSPI
<> 154:37f96f9d4de2 77 * RX EDMA request and sends @ref kStatus_QSPI_RxIdle to QSPI callback.
<> 154:37f96f9d4de2 78 *
<> 154:37f96f9d4de2 79 * @param handle The EDMA handle.
<> 154:37f96f9d4de2 80 * @param param Callback function parameter.
<> 154:37f96f9d4de2 81 */
<> 154:37f96f9d4de2 82 static void QSPI_ReceiveEDMACallback(edma_handle_t *handle, void *param, bool transferDone, uint32_t tcds);
<> 154:37f96f9d4de2 83
<> 154:37f96f9d4de2 84 /*!
<> 154:37f96f9d4de2 85 * @brief Get the QSPI instance from peripheral base address.
<> 154:37f96f9d4de2 86 *
<> 154:37f96f9d4de2 87 * @param base QSPI peripheral base address.
<> 154:37f96f9d4de2 88 * @return QSPI instance.
<> 154:37f96f9d4de2 89 */
<> 154:37f96f9d4de2 90 extern uint32_t QSPI_GetInstance(QuadSPI_Type *base);
<> 154:37f96f9d4de2 91
<> 154:37f96f9d4de2 92 /*******************************************************************************
<> 154:37f96f9d4de2 93 * Code
<> 154:37f96f9d4de2 94 ******************************************************************************/
<> 154:37f96f9d4de2 95
<> 154:37f96f9d4de2 96 static void QSPI_SendEDMACallback(edma_handle_t *handle, void *param, bool transferDone, uint32_t tcds)
<> 154:37f96f9d4de2 97 {
<> 154:37f96f9d4de2 98 qspi_edma_private_handle_t *qspiPrivateHandle = (qspi_edma_private_handle_t *)param;
<> 154:37f96f9d4de2 99
<> 154:37f96f9d4de2 100 /* Avoid the warning for unused variables. */
<> 154:37f96f9d4de2 101 handle = handle;
<> 154:37f96f9d4de2 102 tcds = tcds;
<> 154:37f96f9d4de2 103
<> 154:37f96f9d4de2 104 if (transferDone)
<> 154:37f96f9d4de2 105 {
<> 154:37f96f9d4de2 106 QSPI_TransferAbortSendEDMA(qspiPrivateHandle->base, qspiPrivateHandle->handle);
<> 154:37f96f9d4de2 107
<> 154:37f96f9d4de2 108 if (qspiPrivateHandle->handle->callback)
<> 154:37f96f9d4de2 109 {
<> 154:37f96f9d4de2 110 qspiPrivateHandle->handle->callback(qspiPrivateHandle->base, qspiPrivateHandle->handle, kStatus_QSPI_Idle,
<> 154:37f96f9d4de2 111 qspiPrivateHandle->handle->userData);
<> 154:37f96f9d4de2 112 }
<> 154:37f96f9d4de2 113 }
<> 154:37f96f9d4de2 114 }
<> 154:37f96f9d4de2 115
<> 154:37f96f9d4de2 116 static void QSPI_ReceiveEDMACallback(edma_handle_t *handle, void *param, bool transferDone, uint32_t tcds)
<> 154:37f96f9d4de2 117 {
<> 154:37f96f9d4de2 118 qspi_edma_private_handle_t *qspiPrivateHandle = (qspi_edma_private_handle_t *)param;
<> 154:37f96f9d4de2 119
<> 154:37f96f9d4de2 120 /* Avoid warning for unused parameters. */
<> 154:37f96f9d4de2 121 handle = handle;
<> 154:37f96f9d4de2 122 tcds = tcds;
<> 154:37f96f9d4de2 123
<> 154:37f96f9d4de2 124 if (transferDone)
<> 154:37f96f9d4de2 125 {
<> 154:37f96f9d4de2 126 /* Disable transfer. */
<> 154:37f96f9d4de2 127 QSPI_TransferAbortReceiveEDMA(qspiPrivateHandle->base, qspiPrivateHandle->handle);
<> 154:37f96f9d4de2 128
<> 154:37f96f9d4de2 129 if (qspiPrivateHandle->handle->callback)
<> 154:37f96f9d4de2 130 {
<> 154:37f96f9d4de2 131 qspiPrivateHandle->handle->callback(qspiPrivateHandle->base, qspiPrivateHandle->handle, kStatus_QSPI_Idle,
<> 154:37f96f9d4de2 132 qspiPrivateHandle->handle->userData);
<> 154:37f96f9d4de2 133 }
<> 154:37f96f9d4de2 134 }
<> 154:37f96f9d4de2 135 }
<> 154:37f96f9d4de2 136
<> 154:37f96f9d4de2 137 void QSPI_TransferTxCreateHandleEDMA(QuadSPI_Type *base,
<> 154:37f96f9d4de2 138 qspi_edma_handle_t *handle,
<> 154:37f96f9d4de2 139 qspi_edma_callback_t callback,
<> 154:37f96f9d4de2 140 void *userData,
<> 154:37f96f9d4de2 141 edma_handle_t *dmaHandle)
<> 154:37f96f9d4de2 142 {
<> 154:37f96f9d4de2 143 assert(handle);
<> 154:37f96f9d4de2 144
<> 154:37f96f9d4de2 145 uint32_t instance = QSPI_GetInstance(base);
<> 154:37f96f9d4de2 146
<> 154:37f96f9d4de2 147 s_edmaPrivateHandle[instance][0].base = base;
<> 154:37f96f9d4de2 148 s_edmaPrivateHandle[instance][0].handle = handle;
<> 154:37f96f9d4de2 149
<> 154:37f96f9d4de2 150 memset(handle, 0, sizeof(*handle));
<> 154:37f96f9d4de2 151
<> 154:37f96f9d4de2 152 handle->state = kQSPI_Idle;
<> 154:37f96f9d4de2 153 handle->dmaHandle = dmaHandle;
<> 154:37f96f9d4de2 154
<> 154:37f96f9d4de2 155 handle->callback = callback;
<> 154:37f96f9d4de2 156 handle->userData = userData;
<> 154:37f96f9d4de2 157
<> 154:37f96f9d4de2 158 /* Get the watermark value */
<> 154:37f96f9d4de2 159 handle->count = base->TBCT + 1;
<> 154:37f96f9d4de2 160
<> 154:37f96f9d4de2 161 /* Configure TX edma callback */
<> 154:37f96f9d4de2 162 EDMA_SetCallback(handle->dmaHandle, QSPI_SendEDMACallback, &s_edmaPrivateHandle[instance][0]);
<> 154:37f96f9d4de2 163 }
<> 154:37f96f9d4de2 164
<> 154:37f96f9d4de2 165 void QSPI_TransferRxCreateHandleEDMA(QuadSPI_Type *base,
<> 154:37f96f9d4de2 166 qspi_edma_handle_t *handle,
<> 154:37f96f9d4de2 167 qspi_edma_callback_t callback,
<> 154:37f96f9d4de2 168 void *userData,
<> 154:37f96f9d4de2 169 edma_handle_t *dmaHandle)
<> 154:37f96f9d4de2 170 {
<> 154:37f96f9d4de2 171 assert(handle);
<> 154:37f96f9d4de2 172
<> 154:37f96f9d4de2 173 uint32_t instance = QSPI_GetInstance(base);
<> 154:37f96f9d4de2 174
<> 154:37f96f9d4de2 175 s_edmaPrivateHandle[instance][1].base = base;
<> 154:37f96f9d4de2 176 s_edmaPrivateHandle[instance][1].handle = handle;
<> 154:37f96f9d4de2 177
<> 154:37f96f9d4de2 178 memset(handle, 0, sizeof(*handle));
<> 154:37f96f9d4de2 179
<> 154:37f96f9d4de2 180 handle->state = kQSPI_Idle;
<> 154:37f96f9d4de2 181 handle->dmaHandle = dmaHandle;
<> 154:37f96f9d4de2 182
<> 154:37f96f9d4de2 183 handle->callback = callback;
<> 154:37f96f9d4de2 184 handle->userData = userData;
<> 154:37f96f9d4de2 185
<> 154:37f96f9d4de2 186 /* Get the watermark value */
<> 154:37f96f9d4de2 187 handle->count = (base->RBCT & QuadSPI_RBCT_WMRK_MASK) + 1;
<> 154:37f96f9d4de2 188
<> 154:37f96f9d4de2 189 /* Configure RX edma callback */
<> 154:37f96f9d4de2 190 EDMA_SetCallback(handle->dmaHandle, QSPI_ReceiveEDMACallback, &s_edmaPrivateHandle[instance][1]);
<> 154:37f96f9d4de2 191 }
<> 154:37f96f9d4de2 192
<> 154:37f96f9d4de2 193 status_t QSPI_TransferSendEDMA(QuadSPI_Type *base, qspi_edma_handle_t *handle, qspi_transfer_t *xfer)
<> 154:37f96f9d4de2 194 {
<> 154:37f96f9d4de2 195 assert(handle && (handle->dmaHandle));
<> 154:37f96f9d4de2 196
<> 154:37f96f9d4de2 197 edma_transfer_config_t xferConfig;
<> 154:37f96f9d4de2 198 status_t status;
<> 154:37f96f9d4de2 199
<> 154:37f96f9d4de2 200 /* If previous TX not finished. */
<> 154:37f96f9d4de2 201 if (kQSPI_BusBusy == handle->state)
<> 154:37f96f9d4de2 202 {
<> 154:37f96f9d4de2 203 status = kStatus_QSPI_Busy;
<> 154:37f96f9d4de2 204 }
<> 154:37f96f9d4de2 205 else
<> 154:37f96f9d4de2 206 {
<> 154:37f96f9d4de2 207 handle->state = kQSPI_BusBusy;
<> 154:37f96f9d4de2 208
<> 154:37f96f9d4de2 209 /* Prepare transfer. */
<> 154:37f96f9d4de2 210 EDMA_PrepareTransfer(&xferConfig, xfer->data, sizeof(uint32_t), (void *)QSPI_GetTxDataRegisterAddress(base),
<> 154:37f96f9d4de2 211 sizeof(uint32_t), (sizeof(uint32_t) * handle->count), xfer->dataSize,
<> 154:37f96f9d4de2 212 kEDMA_MemoryToPeripheral);
<> 154:37f96f9d4de2 213
<> 154:37f96f9d4de2 214 /* Store the initially configured eDMA minor byte transfer count into the QSPI handle */
<> 154:37f96f9d4de2 215 handle->nbytes = (sizeof(uint32_t) * handle->count);
<> 154:37f96f9d4de2 216
<> 154:37f96f9d4de2 217 /* Submit transfer. */
<> 154:37f96f9d4de2 218 EDMA_SubmitTransfer(handle->dmaHandle, &xferConfig);
<> 154:37f96f9d4de2 219 EDMA_StartTransfer(handle->dmaHandle);
<> 154:37f96f9d4de2 220
<> 154:37f96f9d4de2 221 /* Enable QSPI TX EDMA. */
<> 154:37f96f9d4de2 222 QSPI_EnableDMA(base, kQSPI_TxBufferFillDMAEnable, true);
<> 154:37f96f9d4de2 223
<> 154:37f96f9d4de2 224 status = kStatus_Success;
<> 154:37f96f9d4de2 225 }
<> 154:37f96f9d4de2 226
<> 154:37f96f9d4de2 227 return status;
<> 154:37f96f9d4de2 228 }
<> 154:37f96f9d4de2 229
<> 154:37f96f9d4de2 230 status_t QSPI_TransferReceiveEDMA(QuadSPI_Type *base, qspi_edma_handle_t *handle, qspi_transfer_t *xfer)
<> 154:37f96f9d4de2 231 {
<> 154:37f96f9d4de2 232 assert(handle && (handle->dmaHandle));
<> 154:37f96f9d4de2 233
<> 154:37f96f9d4de2 234 edma_transfer_config_t xferConfig;
<> 154:37f96f9d4de2 235 status_t status;
<> 154:37f96f9d4de2 236
<> 154:37f96f9d4de2 237 /* If previous TX not finished. */
<> 154:37f96f9d4de2 238 if (kQSPI_BusBusy == handle->state)
<> 154:37f96f9d4de2 239 {
<> 154:37f96f9d4de2 240 status = kStatus_QSPI_Busy;
<> 154:37f96f9d4de2 241 }
<> 154:37f96f9d4de2 242 else
<> 154:37f96f9d4de2 243 {
<> 154:37f96f9d4de2 244 handle->state = kQSPI_BusBusy;
<> 154:37f96f9d4de2 245
<> 154:37f96f9d4de2 246 /* Prepare transfer. */
<> 154:37f96f9d4de2 247 EDMA_PrepareTransfer(&xferConfig, (void *)QSPI_GetRxDataRegisterAddress(base), sizeof(uint32_t), xfer->data,
<> 154:37f96f9d4de2 248 sizeof(uint32_t), (sizeof(uint32_t) * handle->count), xfer->dataSize,
<> 154:37f96f9d4de2 249 kEDMA_MemoryToMemory);
<> 154:37f96f9d4de2 250
<> 154:37f96f9d4de2 251 /* Store the initially configured eDMA minor byte transfer count into the QSPI handle */
<> 154:37f96f9d4de2 252 handle->nbytes = (sizeof(uint32_t) * handle->count);
<> 154:37f96f9d4de2 253 /* Submit transfer. */
<> 154:37f96f9d4de2 254 EDMA_SubmitTransfer(handle->dmaHandle, &xferConfig);
<> 154:37f96f9d4de2 255 handle->dmaHandle->base->TCD[handle->dmaHandle->channel].ATTR |= DMA_ATTR_SMOD(0x5U);
<> 154:37f96f9d4de2 256 EDMA_StartTransfer(handle->dmaHandle);
<> 154:37f96f9d4de2 257
<> 154:37f96f9d4de2 258 /* Enable QSPI TX EDMA. */
<> 154:37f96f9d4de2 259 QSPI_EnableDMA(base, kQSPI_RxBufferDrainDMAEnable, true);
<> 154:37f96f9d4de2 260
<> 154:37f96f9d4de2 261 status = kStatus_Success;
<> 154:37f96f9d4de2 262 }
<> 154:37f96f9d4de2 263
<> 154:37f96f9d4de2 264 return status;
<> 154:37f96f9d4de2 265 }
<> 154:37f96f9d4de2 266
<> 154:37f96f9d4de2 267 void QSPI_TransferAbortSendEDMA(QuadSPI_Type *base, qspi_edma_handle_t *handle)
<> 154:37f96f9d4de2 268 {
<> 154:37f96f9d4de2 269 assert(handle && (handle->dmaHandle));
<> 154:37f96f9d4de2 270
<> 154:37f96f9d4de2 271 /* Disable QSPI TX EDMA. */
<> 154:37f96f9d4de2 272 QSPI_EnableDMA(base, kQSPI_TxBufferFillDMAEnable, false);
<> 154:37f96f9d4de2 273
<> 154:37f96f9d4de2 274 /* Stop transfer. */
<> 154:37f96f9d4de2 275 EDMA_AbortTransfer(handle->dmaHandle);
<> 154:37f96f9d4de2 276
<> 154:37f96f9d4de2 277 handle->state = kQSPI_Idle;
<> 154:37f96f9d4de2 278 }
<> 154:37f96f9d4de2 279
<> 154:37f96f9d4de2 280 void QSPI_TransferAbortReceiveEDMA(QuadSPI_Type *base, qspi_edma_handle_t *handle)
<> 154:37f96f9d4de2 281 {
<> 154:37f96f9d4de2 282 assert(handle && (handle->dmaHandle));
<> 154:37f96f9d4de2 283
<> 154:37f96f9d4de2 284 /* Disable QSPI RX EDMA. */
<> 154:37f96f9d4de2 285 QSPI_EnableDMA(base, kQSPI_RxBufferDrainDMAEnable, false);
<> 154:37f96f9d4de2 286
<> 154:37f96f9d4de2 287 /* Stop transfer. */
<> 154:37f96f9d4de2 288 EDMA_AbortTransfer(handle->dmaHandle);
<> 154:37f96f9d4de2 289
<> 154:37f96f9d4de2 290 handle->state = kQSPI_Idle;
<> 154:37f96f9d4de2 291 }
<> 154:37f96f9d4de2 292
<> 154:37f96f9d4de2 293 status_t QSPI_TransferGetSendCountEDMA(QuadSPI_Type *base, qspi_edma_handle_t *handle, size_t *count)
<> 154:37f96f9d4de2 294 {
<> 154:37f96f9d4de2 295 assert(handle);
<> 154:37f96f9d4de2 296
<> 154:37f96f9d4de2 297 status_t status = kStatus_Success;
<> 154:37f96f9d4de2 298
<> 154:37f96f9d4de2 299 if (handle->state != kQSPI_BusBusy)
<> 154:37f96f9d4de2 300 {
<> 154:37f96f9d4de2 301 status = kStatus_NoTransferInProgress;
<> 154:37f96f9d4de2 302 }
<> 154:37f96f9d4de2 303 else
<> 154:37f96f9d4de2 304 {
<> 154:37f96f9d4de2 305 *count = (handle->transferSize -
<> 154:37f96f9d4de2 306 (uint32_t)handle->nbytes *
<> 154:37f96f9d4de2 307 EDMA_GetRemainingMajorLoopCount(handle->dmaHandle->base, handle->dmaHandle->channel));
<> 154:37f96f9d4de2 308 }
<> 154:37f96f9d4de2 309
<> 154:37f96f9d4de2 310 return status;
<> 154:37f96f9d4de2 311 }
<> 154:37f96f9d4de2 312
<> 154:37f96f9d4de2 313 status_t QSPI_TransferGetReceiveCountEDMA(QuadSPI_Type *base, qspi_edma_handle_t *handle, size_t *count)
<> 154:37f96f9d4de2 314 {
<> 154:37f96f9d4de2 315 assert(handle);
<> 154:37f96f9d4de2 316
<> 154:37f96f9d4de2 317 status_t status = kStatus_Success;
<> 154:37f96f9d4de2 318
<> 154:37f96f9d4de2 319 if (handle->state != kQSPI_BusBusy)
<> 154:37f96f9d4de2 320 {
<> 154:37f96f9d4de2 321 status = kStatus_NoTransferInProgress;
<> 154:37f96f9d4de2 322 }
<> 154:37f96f9d4de2 323 else
<> 154:37f96f9d4de2 324 {
<> 154:37f96f9d4de2 325 *count = (handle->transferSize -
<> 154:37f96f9d4de2 326 (uint32_t)handle->nbytes *
<> 154:37f96f9d4de2 327 EDMA_GetRemainingMajorLoopCount(handle->dmaHandle->base, handle->dmaHandle->channel));
<> 154:37f96f9d4de2 328 }
<> 154:37f96f9d4de2 329
<> 154:37f96f9d4de2 330 return status;
<> 154:37f96f9d4de2 331 }