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targets/TARGET_NORDIC/TARGET_NRF5/sdk/drivers_nrf/hal/nrf_clock.h@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Parent:
targets/hal/TARGET_NORDIC/TARGET_NRF5/sdk/drivers_nrf/hal/nrf_clock.h@144:ef7eb2e8f9f7 
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /*
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2015 Nordic Semiconductor ASA
<> 144:ef7eb2e8f9f7 3 * All rights reserved.
<> 144:ef7eb2e8f9f7 4 *
<> 144:ef7eb2e8f9f7 5 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 6 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * 1. Redistributions of source code must retain the above copyright notice, this list
<> 144:ef7eb2e8f9f7 9 * of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
<> 144:ef7eb2e8f9f7 12 * integrated circuit in a product or a software update for such product, must reproduce
<> 144:ef7eb2e8f9f7 13 * the above copyright notice, this list of conditions and the following disclaimer in
<> 144:ef7eb2e8f9f7 14 * the documentation and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 15 *
<> 144:ef7eb2e8f9f7 16 * 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
<> 144:ef7eb2e8f9f7 17 * used to endorse or promote products derived from this software without specific prior
<> 144:ef7eb2e8f9f7 18 * written permission.
<> 144:ef7eb2e8f9f7 19 *
<> 144:ef7eb2e8f9f7 20 * 4. This software, with or without modification, must only be used with a
<> 144:ef7eb2e8f9f7 21 * Nordic Semiconductor ASA integrated circuit.
<> 144:ef7eb2e8f9f7 22 *
<> 144:ef7eb2e8f9f7 23 * 5. Any software provided in binary or object form under this license must not be reverse
<> 144:ef7eb2e8f9f7 24 * engineered, decompiled, modified and/or disassembled.
<> 144:ef7eb2e8f9f7 25 *
<> 144:ef7eb2e8f9f7 26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
<> 144:ef7eb2e8f9f7 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
<> 144:ef7eb2e8f9f7 28 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 29 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
<> 144:ef7eb2e8f9f7 30 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
<> 144:ef7eb2e8f9f7 31 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
<> 144:ef7eb2e8f9f7 32 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
<> 144:ef7eb2e8f9f7 33 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
<> 144:ef7eb2e8f9f7 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
<> 144:ef7eb2e8f9f7 35 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 36 *
<> 144:ef7eb2e8f9f7 37 */
<> 144:ef7eb2e8f9f7 38
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 #ifndef NRF_CLOCK_H__
<> 144:ef7eb2e8f9f7 41 #define NRF_CLOCK_H__
<> 144:ef7eb2e8f9f7 42
<> 144:ef7eb2e8f9f7 43 #include <stddef.h>
<> 144:ef7eb2e8f9f7 44 #include <stdbool.h>
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 #include "nrf.h"
<> 144:ef7eb2e8f9f7 47
<> 144:ef7eb2e8f9f7 48 /**
<> 144:ef7eb2e8f9f7 49 * @defgroup nrf_clock_hal Clock HAL
<> 144:ef7eb2e8f9f7 50 * @{
<> 144:ef7eb2e8f9f7 51 * @ingroup nrf_clock
<> 144:ef7eb2e8f9f7 52 * @brief Hardware access layer for managing the low-frequency clock (LFCLK) and the high-frequency clock (HFCLK).
<> 144:ef7eb2e8f9f7 53 */
<> 144:ef7eb2e8f9f7 54
<> 144:ef7eb2e8f9f7 55 #define NRF_CLOCK_TASK_TRIGGER (1UL)
<> 144:ef7eb2e8f9f7 56 #define NRF_CLOCK_EVENT_CLEAR (0UL)
<> 144:ef7eb2e8f9f7 57
<> 144:ef7eb2e8f9f7 58 /**
<> 144:ef7eb2e8f9f7 59 * @brief Low-frequency clock sources.
<> 144:ef7eb2e8f9f7 60 * @details Used by LFCLKSRC, LFCLKSTAT, and LFCLKSRCCOPY registers.
<> 144:ef7eb2e8f9f7 61 */
<> 144:ef7eb2e8f9f7 62 typedef enum
<> 144:ef7eb2e8f9f7 63 {
<> 144:ef7eb2e8f9f7 64 NRF_CLOCK_LFCLK_RC = CLOCK_LFCLKSRC_SRC_RC, /**< Internal 32 kHz RC oscillator. */
<> 144:ef7eb2e8f9f7 65 NRF_CLOCK_LFCLK_Xtal = CLOCK_LFCLKSRC_SRC_Xtal, /**< External 32 kHz crystal. */
<> 144:ef7eb2e8f9f7 66 NRF_CLOCK_LFCLK_Synth = CLOCK_LFCLKSRC_SRC_Synth /**< Internal 32 kHz synthesizer from HFCLK system clock. */
<> 144:ef7eb2e8f9f7 67 } nrf_clock_lfclk_t;
<> 144:ef7eb2e8f9f7 68
<> 144:ef7eb2e8f9f7 69 /**
<> 144:ef7eb2e8f9f7 70 * @brief High-frequency clock sources.
<> 144:ef7eb2e8f9f7 71 */
<> 144:ef7eb2e8f9f7 72 typedef enum
<> 144:ef7eb2e8f9f7 73 {
<> 144:ef7eb2e8f9f7 74 NRF_CLOCK_HFCLK_LOW_ACCURACY = CLOCK_HFCLKSTAT_SRC_RC, /**< Internal 16 MHz RC oscillator. */
<> 144:ef7eb2e8f9f7 75 NRF_CLOCK_HFCLK_HIGH_ACCURACY = CLOCK_HFCLKSTAT_SRC_Xtal /**< External 16 MHz/32 MHz crystal oscillator. */
<> 144:ef7eb2e8f9f7 76 } nrf_clock_hfclk_t;
<> 144:ef7eb2e8f9f7 77
<> 144:ef7eb2e8f9f7 78 /**
<> 144:ef7eb2e8f9f7 79 * @brief Trigger status of task LFCLKSTART/HFCLKSTART.
<> 144:ef7eb2e8f9f7 80 * @details Used by LFCLKRUN and HFCLKRUN registers.
<> 144:ef7eb2e8f9f7 81 */
<> 144:ef7eb2e8f9f7 82 typedef enum
<> 144:ef7eb2e8f9f7 83 {
<> 144:ef7eb2e8f9f7 84 NRF_CLOCK_START_TASK_NOT_TRIGGERED = CLOCK_LFCLKRUN_STATUS_NotTriggered, /**< Task LFCLKSTART/HFCLKSTART has not been triggered. */
<> 144:ef7eb2e8f9f7 85 NRF_CLOCK_START_TASK_TRIGGERED = CLOCK_LFCLKRUN_STATUS_Triggered /**< Task LFCLKSTART/HFCLKSTART has been triggered. */
<> 144:ef7eb2e8f9f7 86 } nrf_clock_start_task_status_t;
<> 144:ef7eb2e8f9f7 87
<> 144:ef7eb2e8f9f7 88 /**
<> 144:ef7eb2e8f9f7 89 * @brief Crystal frequency selection.
<> 144:ef7eb2e8f9f7 90 */
<> 144:ef7eb2e8f9f7 91 typedef enum
<> 144:ef7eb2e8f9f7 92 {
<> 144:ef7eb2e8f9f7 93 #ifdef NRF51
<> 144:ef7eb2e8f9f7 94 NRF_CLOCK_XTALFREQ_Default = CLOCK_XTALFREQ_XTALFREQ_16MHz, /**< Default. 32 MHz. */
<> 144:ef7eb2e8f9f7 95 NRF_CLOCK_XTALFREQ_16MHz = CLOCK_XTALFREQ_XTALFREQ_16MHz, /**< 16 MHz crystal. */
<> 144:ef7eb2e8f9f7 96 NRF_CLOCK_XTALFREQ_32MHz = CLOCK_XTALFREQ_XTALFREQ_32MHz /**< 32 MHz crystal. */
<> 144:ef7eb2e8f9f7 97 #elif defined NRF52
<> 144:ef7eb2e8f9f7 98 NRF_CLOCK_XTALFREQ_Default, /**< Default. 64MHz. */
<> 144:ef7eb2e8f9f7 99 #endif
<> 144:ef7eb2e8f9f7 100 } nrf_clock_xtalfreq_t;
<> 144:ef7eb2e8f9f7 101
<> 144:ef7eb2e8f9f7 102 /**
<> 144:ef7eb2e8f9f7 103 * @brief Interrupts.
<> 144:ef7eb2e8f9f7 104 */
<> 144:ef7eb2e8f9f7 105 typedef enum
<> 144:ef7eb2e8f9f7 106 {
<> 144:ef7eb2e8f9f7 107 NRF_CLOCK_INT_HF_STARTED_MASK = CLOCK_INTENSET_HFCLKSTARTED_Msk, /**< Interrupt on HFCLKSTARTED event. */
<> 144:ef7eb2e8f9f7 108 NRF_CLOCK_INT_LF_STARTED_MASK = CLOCK_INTENSET_LFCLKSTARTED_Msk, /**< Interrupt on LFCLKSTARTED event. */
<> 144:ef7eb2e8f9f7 109 NRF_CLOCK_INT_DONE_MASK = CLOCK_INTENSET_DONE_Msk, /**< Interrupt on DONE event. */
<> 144:ef7eb2e8f9f7 110 NRF_CLOCK_INT_CTTO_MASK = CLOCK_INTENSET_CTTO_Msk /**< Interrupt on CTTO event. */
<> 144:ef7eb2e8f9f7 111 } nrf_clock_int_mask_t;
<> 144:ef7eb2e8f9f7 112
<> 144:ef7eb2e8f9f7 113 /**
<> 144:ef7eb2e8f9f7 114 * @brief Tasks.
<> 144:ef7eb2e8f9f7 115 *
<> 144:ef7eb2e8f9f7 116 * @details The NRF_CLOCK_TASK_LFCLKSTOP task cannot be set when the low-frequency clock is not running.
<> 144:ef7eb2e8f9f7 117 * The NRF_CLOCK_TASK_HFCLKSTOP task cannot be set when the high-frequency clock is not running.
<> 144:ef7eb2e8f9f7 118 */
<> 144:ef7eb2e8f9f7 119 typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
<> 144:ef7eb2e8f9f7 120 {
<> 144:ef7eb2e8f9f7 121 NRF_CLOCK_TASK_HFCLKSTART = offsetof(NRF_CLOCK_Type, TASKS_HFCLKSTART), /**< Start HFCLK clock source.*/
<> 144:ef7eb2e8f9f7 122 NRF_CLOCK_TASK_HFCLKSTOP = offsetof(NRF_CLOCK_Type, TASKS_HFCLKSTOP), /**< Stop HFCLK clock source.*/
<> 144:ef7eb2e8f9f7 123 NRF_CLOCK_TASK_LFCLKSTART = offsetof(NRF_CLOCK_Type, TASKS_LFCLKSTART), /**< Start LFCLK clock source.*/
<> 144:ef7eb2e8f9f7 124 NRF_CLOCK_TASK_LFCLKSTOP = offsetof(NRF_CLOCK_Type, TASKS_LFCLKSTOP), /**< Stop LFCLK clock source.*/
<> 144:ef7eb2e8f9f7 125 NRF_CLOCK_TASK_CAL = offsetof(NRF_CLOCK_Type, TASKS_CAL), /**< Start calibration of LFCLK RC oscillator.*/
<> 144:ef7eb2e8f9f7 126 NRF_CLOCK_TASK_CTSTART = offsetof(NRF_CLOCK_Type, TASKS_CTSTART), /**< Start calibration timer.*/
<> 144:ef7eb2e8f9f7 127 NRF_CLOCK_TASK_CTSTOP = offsetof(NRF_CLOCK_Type, TASKS_CTSTOP) /**< Stop calibration timer.*/
<> 144:ef7eb2e8f9f7 128 } nrf_clock_task_t; /*lint -restore */
<> 144:ef7eb2e8f9f7 129
<> 144:ef7eb2e8f9f7 130 /**
<> 144:ef7eb2e8f9f7 131 * @brief Events.
<> 144:ef7eb2e8f9f7 132 */
<> 144:ef7eb2e8f9f7 133 typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
<> 144:ef7eb2e8f9f7 134 {
<> 144:ef7eb2e8f9f7 135 NRF_CLOCK_EVENT_HFCLKSTARTED = offsetof(NRF_CLOCK_Type, EVENTS_HFCLKSTARTED), /**< HFCLK oscillator started.*/
<> 144:ef7eb2e8f9f7 136 NRF_CLOCK_EVENT_LFCLKSTARTED = offsetof(NRF_CLOCK_Type, EVENTS_LFCLKSTARTED), /**< LFCLK oscillator started.*/
<> 144:ef7eb2e8f9f7 137 NRF_CLOCK_EVENT_DONE = offsetof(NRF_CLOCK_Type, EVENTS_DONE), /**< Calibration of LFCLK RC oscillator completed.*/
<> 144:ef7eb2e8f9f7 138 NRF_CLOCK_EVENT_CTTO = offsetof(NRF_CLOCK_Type, EVENTS_CTTO) /**< Calibration timer time-out.*/
<> 144:ef7eb2e8f9f7 139 } nrf_clock_event_t; /*lint -restore */
<> 144:ef7eb2e8f9f7 140
<> 144:ef7eb2e8f9f7 141 /**
<> 144:ef7eb2e8f9f7 142 * @brief Function for enabling a specific interrupt.
<> 144:ef7eb2e8f9f7 143 *
<> 144:ef7eb2e8f9f7 144 * @param[in] int_mask Interrupt.
<> 144:ef7eb2e8f9f7 145 */
<> 144:ef7eb2e8f9f7 146 __STATIC_INLINE void nrf_clock_int_enable(uint32_t int_mask);
<> 144:ef7eb2e8f9f7 147
<> 144:ef7eb2e8f9f7 148 /**
<> 144:ef7eb2e8f9f7 149 * @brief Function for disabling a specific interrupt.
<> 144:ef7eb2e8f9f7 150 *
<> 144:ef7eb2e8f9f7 151 * @param[in] int_mask Interrupt.
<> 144:ef7eb2e8f9f7 152 */
<> 144:ef7eb2e8f9f7 153 __STATIC_INLINE void nrf_clock_int_disable(uint32_t int_mask);
<> 144:ef7eb2e8f9f7 154
<> 144:ef7eb2e8f9f7 155 /**
<> 144:ef7eb2e8f9f7 156 * @brief Function for retrieving the state of a specific interrupt.
<> 144:ef7eb2e8f9f7 157 *
<> 144:ef7eb2e8f9f7 158 * @param[in] int_mask Interrupt.
<> 144:ef7eb2e8f9f7 159 *
<> 144:ef7eb2e8f9f7 160 * @retval true If the interrupt is enabled.
<> 144:ef7eb2e8f9f7 161 * @retval false If the interrupt is not enabled.
<> 144:ef7eb2e8f9f7 162 */
<> 144:ef7eb2e8f9f7 163 __STATIC_INLINE bool nrf_clock_int_enable_check(nrf_clock_int_mask_t int_mask);
<> 144:ef7eb2e8f9f7 164
<> 144:ef7eb2e8f9f7 165 /**
<> 144:ef7eb2e8f9f7 166 * @brief Function for retrieving the address of a specific task.
<> 144:ef7eb2e8f9f7 167 * @details This function can be used by the PPI module.
<> 144:ef7eb2e8f9f7 168 *
<> 144:ef7eb2e8f9f7 169 * @param[in] task Task.
<> 144:ef7eb2e8f9f7 170 *
<> 144:ef7eb2e8f9f7 171 * @return Address of the requested task register.
<> 144:ef7eb2e8f9f7 172 */
<> 144:ef7eb2e8f9f7 173 __STATIC_INLINE uint32_t nrf_clock_task_address_get(nrf_clock_task_t task);
<> 144:ef7eb2e8f9f7 174
<> 144:ef7eb2e8f9f7 175 /**
<> 144:ef7eb2e8f9f7 176 * @brief Function for setting a specific task.
<> 144:ef7eb2e8f9f7 177 *
<> 144:ef7eb2e8f9f7 178 * @param[in] task Task.
<> 144:ef7eb2e8f9f7 179 */
<> 144:ef7eb2e8f9f7 180 __STATIC_INLINE void nrf_clock_task_trigger(nrf_clock_task_t task);
<> 144:ef7eb2e8f9f7 181
<> 144:ef7eb2e8f9f7 182 /**
<> 144:ef7eb2e8f9f7 183 * @brief Function for retrieving the address of a specific event.
<> 144:ef7eb2e8f9f7 184 * @details This function can be used by the PPI module.
<> 144:ef7eb2e8f9f7 185 *
<> 144:ef7eb2e8f9f7 186 * @param[in] event Event.
<> 144:ef7eb2e8f9f7 187 *
<> 144:ef7eb2e8f9f7 188 * @return Address of the requested event register.
<> 144:ef7eb2e8f9f7 189 */
<> 144:ef7eb2e8f9f7 190 __STATIC_INLINE uint32_t nrf_clock_event_address_get(nrf_clock_event_t event);
<> 144:ef7eb2e8f9f7 191
<> 144:ef7eb2e8f9f7 192 /**
<> 144:ef7eb2e8f9f7 193 * @brief Function for clearing a specific event.
<> 144:ef7eb2e8f9f7 194 *
<> 144:ef7eb2e8f9f7 195 * @param[in] event Event.
<> 144:ef7eb2e8f9f7 196 */
<> 144:ef7eb2e8f9f7 197 __STATIC_INLINE void nrf_clock_event_clear(nrf_clock_event_t event);
<> 144:ef7eb2e8f9f7 198
<> 144:ef7eb2e8f9f7 199 /**
<> 144:ef7eb2e8f9f7 200 * @brief Function for retrieving the state of a specific event.
<> 144:ef7eb2e8f9f7 201 *
<> 144:ef7eb2e8f9f7 202 * @param[in] event Event.
<> 144:ef7eb2e8f9f7 203 *
<> 144:ef7eb2e8f9f7 204 * @retval true If the event is set.
<> 144:ef7eb2e8f9f7 205 * @retval false If the event is not set.
<> 144:ef7eb2e8f9f7 206 */
<> 144:ef7eb2e8f9f7 207 __STATIC_INLINE bool nrf_clock_event_check(nrf_clock_event_t event);
<> 144:ef7eb2e8f9f7 208
<> 144:ef7eb2e8f9f7 209 /**
<> 144:ef7eb2e8f9f7 210 * @brief Function for changing the low-frequency clock source.
<> 144:ef7eb2e8f9f7 211 * @details This function cannot be called when the low-frequency clock is running.
<> 144:ef7eb2e8f9f7 212 *
<> 144:ef7eb2e8f9f7 213 * @param[in] source New low-frequency clock source.
<> 144:ef7eb2e8f9f7 214 *
<> 144:ef7eb2e8f9f7 215 */
<> 144:ef7eb2e8f9f7 216 __STATIC_INLINE void nrf_clock_lf_src_set(nrf_clock_lfclk_t source);
<> 144:ef7eb2e8f9f7 217
<> 144:ef7eb2e8f9f7 218 /**
<> 144:ef7eb2e8f9f7 219 * @brief Function for retrieving the selected source for the low-frequency clock.
<> 144:ef7eb2e8f9f7 220 *
<> 144:ef7eb2e8f9f7 221 * @retval NRF_CLOCK_LFCLK_RC If the internal 32 kHz RC oscillator is the selected source for the low-frequency clock.
<> 144:ef7eb2e8f9f7 222 * @retval NRF_CLOCK_LFCLK_Xtal If an external 32 kHz crystal oscillator is the selected source for the low-frequency clock.
<> 144:ef7eb2e8f9f7 223 * @retval NRF_CLOCK_LFCLK_Synth If the internal 32 kHz synthesizer from the HFCLK is the selected source for the low-frequency clock.
<> 144:ef7eb2e8f9f7 224 */
<> 144:ef7eb2e8f9f7 225 __STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_src_get(void);
<> 144:ef7eb2e8f9f7 226
<> 144:ef7eb2e8f9f7 227 /**
<> 144:ef7eb2e8f9f7 228 * @brief Function for retrieving the active source of the low-frequency clock.
<> 144:ef7eb2e8f9f7 229 *
<> 144:ef7eb2e8f9f7 230 * @retval NRF_CLOCK_LFCLK_RC If the internal 32 kHz RC oscillator is the active source of the low-frequency clock.
<> 144:ef7eb2e8f9f7 231 * @retval NRF_CLOCK_LFCLK_Xtal If an external 32 kHz crystal oscillator is the active source of the low-frequency clock.
<> 144:ef7eb2e8f9f7 232 * @retval NRF_CLOCK_LFCLK_Synth If the internal 32 kHz synthesizer from the HFCLK is the active source of the low-frequency clock.
<> 144:ef7eb2e8f9f7 233 */
<> 144:ef7eb2e8f9f7 234 __STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_actv_src_get(void);
<> 144:ef7eb2e8f9f7 235
<> 144:ef7eb2e8f9f7 236 /**
<> 144:ef7eb2e8f9f7 237 * @brief Function for retrieving the clock source for the LFCLK clock when the task LKCLKSTART is triggered.
<> 144:ef7eb2e8f9f7 238 *
<> 144:ef7eb2e8f9f7 239 * @retval NRF_CLOCK_LFCLK_RC If the internal 32 kHz RC oscillator is running and generating the LFCLK clock.
<> 144:ef7eb2e8f9f7 240 * @retval NRF_CLOCK_LFCLK_Xtal If an external 32 kHz crystal oscillator is running and generating the LFCLK clock.
<> 144:ef7eb2e8f9f7 241 * @retval NRF_CLOCK_LFCLK_Synth If the internal 32 kHz synthesizer from the HFCLK is running and generating the LFCLK clock.
<> 144:ef7eb2e8f9f7 242 */
<> 144:ef7eb2e8f9f7 243 __STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_srccopy_get(void);
<> 144:ef7eb2e8f9f7 244
<> 144:ef7eb2e8f9f7 245 /**
<> 144:ef7eb2e8f9f7 246 * @brief Function for retrieving the state of the LFCLK clock.
<> 144:ef7eb2e8f9f7 247 *
<> 144:ef7eb2e8f9f7 248 * @retval false If the LFCLK clock is not running.
<> 144:ef7eb2e8f9f7 249 * @retval true If the LFCLK clock is running.
<> 144:ef7eb2e8f9f7 250 */
<> 144:ef7eb2e8f9f7 251 __STATIC_INLINE bool nrf_clock_lf_is_running(void);
<> 144:ef7eb2e8f9f7 252
<> 144:ef7eb2e8f9f7 253 /**
<> 144:ef7eb2e8f9f7 254 * @brief Function for retrieving the trigger status of the task LFCLKSTART.
<> 144:ef7eb2e8f9f7 255 *
<> 144:ef7eb2e8f9f7 256 * @retval NRF_CLOCK_START_TASK_NOT_TRIGGERED If the task LFCLKSTART has not been triggered.
<> 144:ef7eb2e8f9f7 257 * @retval NRF_CLOCK_START_TASK_TRIGGERED If the task LFCLKSTART has been triggered.
<> 144:ef7eb2e8f9f7 258 */
<> 144:ef7eb2e8f9f7 259 __STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_lf_start_task_status_get(void);
<> 144:ef7eb2e8f9f7 260
<> 144:ef7eb2e8f9f7 261 /**
<> 144:ef7eb2e8f9f7 262 * @brief Function for retrieving the active source of the high-frequency clock.
<> 144:ef7eb2e8f9f7 263 *
<> 144:ef7eb2e8f9f7 264 * @retval NRF_CLOCK_HFCLK_LOW_ACCURACY If the internal 16 MHz RC oscillator is the active source of the high-frequency clock.
<> 144:ef7eb2e8f9f7 265 * @retval NRF_CLOCK_HFCLK_HIGH_ACCURACY If an external 16 MHz/32 MHz crystal oscillator is the active source of the high-frequency clock.
<> 144:ef7eb2e8f9f7 266 */
<> 144:ef7eb2e8f9f7 267 __STATIC_INLINE nrf_clock_hfclk_t nrf_clock_hf_src_get(void);
<> 144:ef7eb2e8f9f7 268
<> 144:ef7eb2e8f9f7 269 /**
<> 144:ef7eb2e8f9f7 270 * @brief Function for retrieving the state of the HFCLK clock.
<> 144:ef7eb2e8f9f7 271 *
<> 144:ef7eb2e8f9f7 272 * @param[in] clk_src Clock source to be checked.
<> 144:ef7eb2e8f9f7 273 *
<> 144:ef7eb2e8f9f7 274 * @retval false If the HFCLK clock is not running.
<> 144:ef7eb2e8f9f7 275 * @retval true If the HFCLK clock is running.
<> 144:ef7eb2e8f9f7 276 */
<> 144:ef7eb2e8f9f7 277 __STATIC_INLINE bool nrf_clock_hf_is_running(nrf_clock_hfclk_t clk_src);
<> 144:ef7eb2e8f9f7 278
<> 144:ef7eb2e8f9f7 279 /**
<> 144:ef7eb2e8f9f7 280 * @brief Function for retrieving the trigger status of the task HFCLKSTART.
<> 144:ef7eb2e8f9f7 281 *
<> 144:ef7eb2e8f9f7 282 * @retval NRF_CLOCK_START_TASK_NOT_TRIGGERED If the task HFCLKSTART has not been triggered.
<> 144:ef7eb2e8f9f7 283 * @retval NRF_CLOCK_START_TASK_TRIGGERED If the task HFCLKSTART has been triggered.
<> 144:ef7eb2e8f9f7 284 */
<> 144:ef7eb2e8f9f7 285 __STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_hf_start_task_status_get(void);
<> 144:ef7eb2e8f9f7 286
<> 144:ef7eb2e8f9f7 287 /**
<> 144:ef7eb2e8f9f7 288 * @brief Function for retrieving the frequency selection of the external crystal.
<> 144:ef7eb2e8f9f7 289 *
<> 144:ef7eb2e8f9f7 290 * @retval NRF_CLOCK_XTALFREQ_16MHz If a 16 MHz crystal is used as source for the HFCLK oscillator.
<> 144:ef7eb2e8f9f7 291 * @retval NRF_CLOCK_XTALFREQ_32MHz If a 32 MHz crystal is used as source for the HFCLK oscillator.
<> 144:ef7eb2e8f9f7 292 */
<> 144:ef7eb2e8f9f7 293 __STATIC_INLINE nrf_clock_xtalfreq_t nrf_clock_xtalfreq_get(void);
<> 144:ef7eb2e8f9f7 294
<> 144:ef7eb2e8f9f7 295 /**
<> 144:ef7eb2e8f9f7 296 * @brief Function for changing the frequency selection of the external crystal.
<> 144:ef7eb2e8f9f7 297 *
<> 144:ef7eb2e8f9f7 298 * @param[in] xtalfreq New frequency selection for the external crystal.
<> 144:ef7eb2e8f9f7 299 */
<> 144:ef7eb2e8f9f7 300 __STATIC_INLINE void nrf_clock_xtalfreq_set(nrf_clock_xtalfreq_t xtalfreq);
<> 144:ef7eb2e8f9f7 301
<> 144:ef7eb2e8f9f7 302 /**
<> 144:ef7eb2e8f9f7 303 * @brief Function for changing the calibration timer interval.
<> 144:ef7eb2e8f9f7 304 *
<> 144:ef7eb2e8f9f7 305 * @param[in] interval New calibration timer interval in 0.25 s resolution (range: 0.25 seconds to 31.75 seconds).
<> 144:ef7eb2e8f9f7 306 */
<> 144:ef7eb2e8f9f7 307 __STATIC_INLINE void nrf_clock_cal_timer_timeout_set(uint32_t interval);
<> 144:ef7eb2e8f9f7 308
<> 144:ef7eb2e8f9f7 309 #ifndef SUPPRESS_INLINE_IMPLEMENTATION
<> 144:ef7eb2e8f9f7 310
<> 144:ef7eb2e8f9f7 311 __STATIC_INLINE void nrf_clock_int_enable(uint32_t int_mask)
<> 144:ef7eb2e8f9f7 312 {
<> 144:ef7eb2e8f9f7 313 NRF_CLOCK->INTENSET = int_mask;
<> 144:ef7eb2e8f9f7 314 }
<> 144:ef7eb2e8f9f7 315
<> 144:ef7eb2e8f9f7 316 __STATIC_INLINE void nrf_clock_int_disable(uint32_t int_mask)
<> 144:ef7eb2e8f9f7 317 {
<> 144:ef7eb2e8f9f7 318 NRF_CLOCK->INTENCLR = int_mask;
<> 144:ef7eb2e8f9f7 319 }
<> 144:ef7eb2e8f9f7 320
<> 144:ef7eb2e8f9f7 321 __STATIC_INLINE bool nrf_clock_int_enable_check(nrf_clock_int_mask_t int_mask)
<> 144:ef7eb2e8f9f7 322 {
<> 144:ef7eb2e8f9f7 323 return (bool)(NRF_CLOCK->INTENCLR & int_mask);
<> 144:ef7eb2e8f9f7 324 }
<> 144:ef7eb2e8f9f7 325
<> 144:ef7eb2e8f9f7 326 __STATIC_INLINE uint32_t nrf_clock_task_address_get(nrf_clock_task_t task)
<> 144:ef7eb2e8f9f7 327 {
<> 144:ef7eb2e8f9f7 328 return ((uint32_t )NRF_CLOCK + task);
<> 144:ef7eb2e8f9f7 329 }
<> 144:ef7eb2e8f9f7 330
<> 144:ef7eb2e8f9f7 331 __STATIC_INLINE void nrf_clock_task_trigger(nrf_clock_task_t task)
<> 144:ef7eb2e8f9f7 332 {
<> 144:ef7eb2e8f9f7 333 *((volatile uint32_t *)((uint8_t *)NRF_CLOCK + task)) = NRF_CLOCK_TASK_TRIGGER;
<> 144:ef7eb2e8f9f7 334 }
<> 144:ef7eb2e8f9f7 335
<> 144:ef7eb2e8f9f7 336 __STATIC_INLINE uint32_t nrf_clock_event_address_get(nrf_clock_event_t event)
<> 144:ef7eb2e8f9f7 337 {
<> 144:ef7eb2e8f9f7 338 return ((uint32_t)NRF_CLOCK + event);
<> 144:ef7eb2e8f9f7 339 }
<> 144:ef7eb2e8f9f7 340
<> 144:ef7eb2e8f9f7 341 __STATIC_INLINE void nrf_clock_event_clear(nrf_clock_event_t event)
<> 144:ef7eb2e8f9f7 342 {
<> 144:ef7eb2e8f9f7 343 *((volatile uint32_t *)((uint8_t *)NRF_CLOCK + event)) = NRF_CLOCK_EVENT_CLEAR;
<> 144:ef7eb2e8f9f7 344 #if __CORTEX_M == 0x04
<> 144:ef7eb2e8f9f7 345 volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_CLOCK + event));
<> 144:ef7eb2e8f9f7 346 (void)dummy;
<> 144:ef7eb2e8f9f7 347 #endif
<> 144:ef7eb2e8f9f7 348 }
<> 144:ef7eb2e8f9f7 349
<> 144:ef7eb2e8f9f7 350 __STATIC_INLINE bool nrf_clock_event_check(nrf_clock_event_t event)
<> 144:ef7eb2e8f9f7 351 {
<> 144:ef7eb2e8f9f7 352 return (bool)*((volatile uint32_t *)((uint8_t *)NRF_CLOCK + event));
<> 144:ef7eb2e8f9f7 353 }
<> 144:ef7eb2e8f9f7 354
<> 144:ef7eb2e8f9f7 355 __STATIC_INLINE void nrf_clock_lf_src_set(nrf_clock_lfclk_t source)
<> 144:ef7eb2e8f9f7 356 {
<> 144:ef7eb2e8f9f7 357 NRF_CLOCK->LFCLKSRC =
<> 144:ef7eb2e8f9f7 358 (uint32_t)((source << CLOCK_LFCLKSRC_SRC_Pos) & CLOCK_LFCLKSRC_SRC_Msk);
<> 144:ef7eb2e8f9f7 359 }
<> 144:ef7eb2e8f9f7 360
<> 144:ef7eb2e8f9f7 361 __STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_src_get(void)
<> 144:ef7eb2e8f9f7 362 {
<> 144:ef7eb2e8f9f7 363 return (nrf_clock_lfclk_t)((NRF_CLOCK->LFCLKSRC &
<> 144:ef7eb2e8f9f7 364 CLOCK_LFCLKSRC_SRC_Msk) >> CLOCK_LFCLKSRC_SRC_Pos);
<> 144:ef7eb2e8f9f7 365 }
<> 144:ef7eb2e8f9f7 366
<> 144:ef7eb2e8f9f7 367 __STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_actv_src_get(void)
<> 144:ef7eb2e8f9f7 368 {
<> 144:ef7eb2e8f9f7 369 return (nrf_clock_lfclk_t)((NRF_CLOCK->LFCLKSTAT &
<> 144:ef7eb2e8f9f7 370 CLOCK_LFCLKSTAT_SRC_Msk) >> CLOCK_LFCLKSTAT_SRC_Pos);
<> 144:ef7eb2e8f9f7 371 }
<> 144:ef7eb2e8f9f7 372
<> 144:ef7eb2e8f9f7 373 __STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_srccopy_get(void)
<> 144:ef7eb2e8f9f7 374 {
<> 144:ef7eb2e8f9f7 375 return (nrf_clock_lfclk_t)((NRF_CLOCK->LFCLKSRCCOPY &
<> 144:ef7eb2e8f9f7 376 CLOCK_LFCLKSRCCOPY_SRC_Msk) >> CLOCK_LFCLKSRCCOPY_SRC_Pos);
<> 144:ef7eb2e8f9f7 377 }
<> 144:ef7eb2e8f9f7 378
<> 144:ef7eb2e8f9f7 379 __STATIC_INLINE bool nrf_clock_lf_is_running(void)
<> 144:ef7eb2e8f9f7 380 {
<> 144:ef7eb2e8f9f7 381 return ((NRF_CLOCK->LFCLKSTAT &
<> 144:ef7eb2e8f9f7 382 CLOCK_LFCLKSTAT_STATE_Msk) >> CLOCK_LFCLKSTAT_STATE_Pos);
<> 144:ef7eb2e8f9f7 383 }
<> 144:ef7eb2e8f9f7 384
<> 144:ef7eb2e8f9f7 385 __STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_lf_start_task_status_get(void)
<> 144:ef7eb2e8f9f7 386 {
<> 144:ef7eb2e8f9f7 387 return (nrf_clock_start_task_status_t)((NRF_CLOCK->LFCLKRUN &
<> 144:ef7eb2e8f9f7 388 CLOCK_LFCLKRUN_STATUS_Msk) >>
<> 144:ef7eb2e8f9f7 389 CLOCK_LFCLKRUN_STATUS_Pos);
<> 144:ef7eb2e8f9f7 390 }
<> 144:ef7eb2e8f9f7 391
<> 144:ef7eb2e8f9f7 392 __STATIC_INLINE nrf_clock_hfclk_t nrf_clock_hf_src_get(void)
<> 144:ef7eb2e8f9f7 393 {
<> 144:ef7eb2e8f9f7 394 return (nrf_clock_hfclk_t)((NRF_CLOCK->HFCLKSTAT &
<> 144:ef7eb2e8f9f7 395 CLOCK_HFCLKSTAT_SRC_Msk) >> CLOCK_HFCLKSTAT_SRC_Pos);
<> 144:ef7eb2e8f9f7 396 }
<> 144:ef7eb2e8f9f7 397
<> 144:ef7eb2e8f9f7 398 __STATIC_INLINE bool nrf_clock_hf_is_running(nrf_clock_hfclk_t clk_src)
<> 144:ef7eb2e8f9f7 399 {
<> 144:ef7eb2e8f9f7 400 return (NRF_CLOCK->HFCLKSTAT & (CLOCK_HFCLKSTAT_STATE_Msk | CLOCK_HFCLKSTAT_SRC_Msk)) ==
<> 144:ef7eb2e8f9f7 401 (CLOCK_HFCLKSTAT_STATE_Msk | (clk_src << CLOCK_HFCLKSTAT_SRC_Pos));
<> 144:ef7eb2e8f9f7 402 }
<> 144:ef7eb2e8f9f7 403
<> 144:ef7eb2e8f9f7 404 __STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_hf_start_task_status_get(void)
<> 144:ef7eb2e8f9f7 405 {
<> 144:ef7eb2e8f9f7 406 return (nrf_clock_start_task_status_t)((NRF_CLOCK->HFCLKRUN &
<> 144:ef7eb2e8f9f7 407 CLOCK_HFCLKRUN_STATUS_Msk) >>
<> 144:ef7eb2e8f9f7 408 CLOCK_HFCLKRUN_STATUS_Pos);
<> 144:ef7eb2e8f9f7 409 }
<> 144:ef7eb2e8f9f7 410
<> 144:ef7eb2e8f9f7 411 __STATIC_INLINE nrf_clock_xtalfreq_t nrf_clock_xtalfreq_get(void)
<> 144:ef7eb2e8f9f7 412 {
<> 144:ef7eb2e8f9f7 413 #ifdef NRF51
<> 144:ef7eb2e8f9f7 414 return (nrf_clock_xtalfreq_t)((NRF_CLOCK->XTALFREQ &
<> 144:ef7eb2e8f9f7 415 CLOCK_XTALFREQ_XTALFREQ_Msk) >> CLOCK_XTALFREQ_XTALFREQ_Pos);
<> 144:ef7eb2e8f9f7 416 #elif defined NRF52
<> 144:ef7eb2e8f9f7 417 return NRF_CLOCK_XTALFREQ_Default;
<> 144:ef7eb2e8f9f7 418 #endif
<> 144:ef7eb2e8f9f7 419 }
<> 144:ef7eb2e8f9f7 420
<> 144:ef7eb2e8f9f7 421 __STATIC_INLINE void nrf_clock_xtalfreq_set(nrf_clock_xtalfreq_t xtalfreq)
<> 144:ef7eb2e8f9f7 422 {
<> 144:ef7eb2e8f9f7 423 #ifdef NRF51
<> 144:ef7eb2e8f9f7 424 NRF_CLOCK->XTALFREQ =
<> 144:ef7eb2e8f9f7 425 (uint32_t)((xtalfreq << CLOCK_XTALFREQ_XTALFREQ_Pos) & CLOCK_XTALFREQ_XTALFREQ_Msk);
<> 144:ef7eb2e8f9f7 426 #elif defined NRF52
<> 144:ef7eb2e8f9f7 427 return;
<> 144:ef7eb2e8f9f7 428 #endif
<> 144:ef7eb2e8f9f7 429 }
<> 144:ef7eb2e8f9f7 430
<> 144:ef7eb2e8f9f7 431 __STATIC_INLINE void nrf_clock_cal_timer_timeout_set(uint32_t interval)
<> 144:ef7eb2e8f9f7 432 {
<> 144:ef7eb2e8f9f7 433 NRF_CLOCK->CTIV = ((interval << CLOCK_CTIV_CTIV_Pos) & CLOCK_CTIV_CTIV_Msk);
<> 144:ef7eb2e8f9f7 434 }
<> 144:ef7eb2e8f9f7 435
<> 144:ef7eb2e8f9f7 436 #endif // SUPPRESS_INLINE_IMPLEMENTATION
<> 144:ef7eb2e8f9f7 437
<> 144:ef7eb2e8f9f7 438 /**
<> 144:ef7eb2e8f9f7 439 *@}
<> 144:ef7eb2e8f9f7 440 **/
<> 144:ef7eb2e8f9f7 441 #endif // NRF_CLOCK_H__