Kevin Kadooka / mbed-dev

Fork of mbed-dev by mbed official

Committer:
<>
Date:
Fri Sep 02 15:07:44 2016 +0100
Revision:
144:ef7eb2e8f9f7
Parent:
0:9b334a45a8ff
This updates the lib to the mbed lib v125

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32l4xx_hal_lcd.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @version V1.5.1
<> 144:ef7eb2e8f9f7 6 * @date 31-May-2016
<> 144:ef7eb2e8f9f7 7 * @brief Header file of LCD Controller HAL module.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
<> 144:ef7eb2e8f9f7 36 */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 39 #ifndef __STM32L4xx_HAL_LCD_H
<> 144:ef7eb2e8f9f7 40 #define __STM32L4xx_HAL_LCD_H
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 43 extern "C" {
<> 144:ef7eb2e8f9f7 44 #endif
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 #if defined(STM32L433xx) || defined(STM32L443xx) || defined(STM32L476xx) || defined(STM32L486xx)
<> 144:ef7eb2e8f9f7 47
<> 144:ef7eb2e8f9f7 48 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 49 #include "stm32l4xx_hal_def.h"
<> 144:ef7eb2e8f9f7 50
<> 144:ef7eb2e8f9f7 51 /** @addtogroup STM32L4xx_HAL_Driver
<> 144:ef7eb2e8f9f7 52 * @{
<> 144:ef7eb2e8f9f7 53 */
<> 144:ef7eb2e8f9f7 54
<> 144:ef7eb2e8f9f7 55 /** @addtogroup LCD
<> 144:ef7eb2e8f9f7 56 * @{
<> 144:ef7eb2e8f9f7 57 */
<> 144:ef7eb2e8f9f7 58
<> 144:ef7eb2e8f9f7 59 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 60 /** @defgroup LCD_Exported_Types LCD Exported Types
<> 144:ef7eb2e8f9f7 61 * @{
<> 144:ef7eb2e8f9f7 62 */
<> 144:ef7eb2e8f9f7 63
<> 144:ef7eb2e8f9f7 64 /**
<> 144:ef7eb2e8f9f7 65 * @brief LCD Init structure definition
<> 144:ef7eb2e8f9f7 66 */
<> 144:ef7eb2e8f9f7 67
<> 144:ef7eb2e8f9f7 68 typedef struct
<> 144:ef7eb2e8f9f7 69 {
<> 144:ef7eb2e8f9f7 70 uint32_t Prescaler; /*!< Configures the LCD Prescaler.
<> 144:ef7eb2e8f9f7 71 This parameter can be one value of @ref LCD_Prescaler */
<> 144:ef7eb2e8f9f7 72 uint32_t Divider; /*!< Configures the LCD Divider.
<> 144:ef7eb2e8f9f7 73 This parameter can be one value of @ref LCD_Divider */
<> 144:ef7eb2e8f9f7 74 uint32_t Duty; /*!< Configures the LCD Duty.
<> 144:ef7eb2e8f9f7 75 This parameter can be one value of @ref LCD_Duty */
<> 144:ef7eb2e8f9f7 76 uint32_t Bias; /*!< Configures the LCD Bias.
<> 144:ef7eb2e8f9f7 77 This parameter can be one value of @ref LCD_Bias */
<> 144:ef7eb2e8f9f7 78 uint32_t VoltageSource; /*!< Selects the LCD Voltage source.
<> 144:ef7eb2e8f9f7 79 This parameter can be one value of @ref LCD_Voltage_Source */
<> 144:ef7eb2e8f9f7 80 uint32_t Contrast; /*!< Configures the LCD Contrast.
<> 144:ef7eb2e8f9f7 81 This parameter can be one value of @ref LCD_Contrast */
<> 144:ef7eb2e8f9f7 82 uint32_t DeadTime; /*!< Configures the LCD Dead Time.
<> 144:ef7eb2e8f9f7 83 This parameter can be one value of @ref LCD_DeadTime */
<> 144:ef7eb2e8f9f7 84 uint32_t PulseOnDuration; /*!< Configures the LCD Pulse On Duration.
<> 144:ef7eb2e8f9f7 85 This parameter can be one value of @ref LCD_PulseOnDuration */
<> 144:ef7eb2e8f9f7 86 uint32_t HighDrive; /*!< Enable or disable the low resistance divider.
<> 144:ef7eb2e8f9f7 87 This parameter can be one value of @ref LCD_HighDrive */
<> 144:ef7eb2e8f9f7 88 uint32_t BlinkMode; /*!< Configures the LCD Blink Mode.
<> 144:ef7eb2e8f9f7 89 This parameter can be one value of @ref LCD_BlinkMode */
<> 144:ef7eb2e8f9f7 90 uint32_t BlinkFrequency; /*!< Configures the LCD Blink frequency.
<> 144:ef7eb2e8f9f7 91 This parameter can be one value of @ref LCD_BlinkFrequency */
<> 144:ef7eb2e8f9f7 92 uint32_t MuxSegment; /*!< Enable or disable mux segment.
<> 144:ef7eb2e8f9f7 93 This parameter can be one value of @ref LCD_MuxSegment */
<> 144:ef7eb2e8f9f7 94 } LCD_InitTypeDef;
<> 144:ef7eb2e8f9f7 95
<> 144:ef7eb2e8f9f7 96 /**
<> 144:ef7eb2e8f9f7 97 * @brief HAL LCD State structures definition
<> 144:ef7eb2e8f9f7 98 */
<> 144:ef7eb2e8f9f7 99 typedef enum
<> 144:ef7eb2e8f9f7 100 {
<> 144:ef7eb2e8f9f7 101 HAL_LCD_STATE_RESET = 0x00, /*!< Peripheral is not yet Initialized */
<> 144:ef7eb2e8f9f7 102 HAL_LCD_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
<> 144:ef7eb2e8f9f7 103 HAL_LCD_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
<> 144:ef7eb2e8f9f7 104 HAL_LCD_STATE_TIMEOUT = 0x03, /*!< Timeout state */
<> 144:ef7eb2e8f9f7 105 HAL_LCD_STATE_ERROR = 0x04 /*!< Error */
<> 144:ef7eb2e8f9f7 106 } HAL_LCD_StateTypeDef;
<> 144:ef7eb2e8f9f7 107
<> 144:ef7eb2e8f9f7 108 /**
<> 144:ef7eb2e8f9f7 109 * @brief UART handle Structure definition
<> 144:ef7eb2e8f9f7 110 */
<> 144:ef7eb2e8f9f7 111 typedef struct
<> 144:ef7eb2e8f9f7 112 {
<> 144:ef7eb2e8f9f7 113 LCD_TypeDef *Instance; /* LCD registers base address */
<> 144:ef7eb2e8f9f7 114
<> 144:ef7eb2e8f9f7 115 LCD_InitTypeDef Init; /* LCD communication parameters */
<> 144:ef7eb2e8f9f7 116
<> 144:ef7eb2e8f9f7 117 HAL_LockTypeDef Lock; /* Locking object */
<> 144:ef7eb2e8f9f7 118
<> 144:ef7eb2e8f9f7 119 __IO HAL_LCD_StateTypeDef State; /* LCD communication state */
<> 144:ef7eb2e8f9f7 120
<> 144:ef7eb2e8f9f7 121 __IO uint32_t ErrorCode; /* LCD Error code */
<> 144:ef7eb2e8f9f7 122
<> 144:ef7eb2e8f9f7 123 }LCD_HandleTypeDef;
<> 144:ef7eb2e8f9f7 124 /**
<> 144:ef7eb2e8f9f7 125 * @}
<> 144:ef7eb2e8f9f7 126 */
<> 144:ef7eb2e8f9f7 127
<> 144:ef7eb2e8f9f7 128 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 129 /** @defgroup LCD_Exported_Constants LCD Exported Constants
<> 144:ef7eb2e8f9f7 130 * @{
<> 144:ef7eb2e8f9f7 131 */
<> 144:ef7eb2e8f9f7 132
<> 144:ef7eb2e8f9f7 133 /** @defgroup LCD_ErrorCode LCD Error Code
<> 144:ef7eb2e8f9f7 134 * @{
<> 144:ef7eb2e8f9f7 135 */
<> 144:ef7eb2e8f9f7 136 #define HAL_LCD_ERROR_NONE ((uint32_t)0x00) /*!< No error */
<> 144:ef7eb2e8f9f7 137 #define HAL_LCD_ERROR_FCRSF ((uint32_t)0x01) /*!< Synchro flag timeout error */
<> 144:ef7eb2e8f9f7 138 #define HAL_LCD_ERROR_UDR ((uint32_t)0x02) /*!< Update display request flag timeout error */
<> 144:ef7eb2e8f9f7 139 #define HAL_LCD_ERROR_UDD ((uint32_t)0x04) /*!< Update display done flag timeout error */
<> 144:ef7eb2e8f9f7 140 #define HAL_LCD_ERROR_ENS ((uint32_t)0x08) /*!< LCD enabled status flag timeout error */
<> 144:ef7eb2e8f9f7 141 #define HAL_LCD_ERROR_RDY ((uint32_t)0x10) /*!< LCD Booster ready timeout error */
<> 144:ef7eb2e8f9f7 142 /**
<> 144:ef7eb2e8f9f7 143 * @}
<> 144:ef7eb2e8f9f7 144 */
<> 144:ef7eb2e8f9f7 145
<> 144:ef7eb2e8f9f7 146 /** @defgroup LCD_Prescaler LCD Prescaler
<> 144:ef7eb2e8f9f7 147 * @{
<> 144:ef7eb2e8f9f7 148 */
<> 144:ef7eb2e8f9f7 149 #define LCD_PRESCALER_1 ((uint32_t)0x00000000) /*!< CLKPS = LCDCLK */
<> 144:ef7eb2e8f9f7 150 #define LCD_PRESCALER_2 ((uint32_t)0x00400000) /*!< CLKPS = LCDCLK/2 */
<> 144:ef7eb2e8f9f7 151 #define LCD_PRESCALER_4 ((uint32_t)0x00800000) /*!< CLKPS = LCDCLK/4 */
<> 144:ef7eb2e8f9f7 152 #define LCD_PRESCALER_8 ((uint32_t)0x00C00000) /*!< CLKPS = LCDCLK/8 */
<> 144:ef7eb2e8f9f7 153 #define LCD_PRESCALER_16 ((uint32_t)0x01000000) /*!< CLKPS = LCDCLK/16 */
<> 144:ef7eb2e8f9f7 154 #define LCD_PRESCALER_32 ((uint32_t)0x01400000) /*!< CLKPS = LCDCLK/32 */
<> 144:ef7eb2e8f9f7 155 #define LCD_PRESCALER_64 ((uint32_t)0x01800000) /*!< CLKPS = LCDCLK/64 */
<> 144:ef7eb2e8f9f7 156 #define LCD_PRESCALER_128 ((uint32_t)0x01C00000) /*!< CLKPS = LCDCLK/128 */
<> 144:ef7eb2e8f9f7 157 #define LCD_PRESCALER_256 ((uint32_t)0x02000000) /*!< CLKPS = LCDCLK/256 */
<> 144:ef7eb2e8f9f7 158 #define LCD_PRESCALER_512 ((uint32_t)0x02400000) /*!< CLKPS = LCDCLK/512 */
<> 144:ef7eb2e8f9f7 159 #define LCD_PRESCALER_1024 ((uint32_t)0x02800000) /*!< CLKPS = LCDCLK/1024 */
<> 144:ef7eb2e8f9f7 160 #define LCD_PRESCALER_2048 ((uint32_t)0x02C00000) /*!< CLKPS = LCDCLK/2048 */
<> 144:ef7eb2e8f9f7 161 #define LCD_PRESCALER_4096 ((uint32_t)0x03000000) /*!< CLKPS = LCDCLK/4096 */
<> 144:ef7eb2e8f9f7 162 #define LCD_PRESCALER_8192 ((uint32_t)0x03400000) /*!< CLKPS = LCDCLK/8192 */
<> 144:ef7eb2e8f9f7 163 #define LCD_PRESCALER_16384 ((uint32_t)0x03800000) /*!< CLKPS = LCDCLK/16384 */
<> 144:ef7eb2e8f9f7 164 #define LCD_PRESCALER_32768 ((uint32_t)0x03C00000) /*!< CLKPS = LCDCLK/32768 */
<> 144:ef7eb2e8f9f7 165 /**
<> 144:ef7eb2e8f9f7 166 * @}
<> 144:ef7eb2e8f9f7 167 */
<> 144:ef7eb2e8f9f7 168
<> 144:ef7eb2e8f9f7 169 /** @defgroup LCD_Divider LCD Divider
<> 144:ef7eb2e8f9f7 170 * @{
<> 144:ef7eb2e8f9f7 171 */
<> 144:ef7eb2e8f9f7 172 #define LCD_DIVIDER_16 ((uint32_t)0x00000000) /*!< LCD frequency = CLKPS/16 */
<> 144:ef7eb2e8f9f7 173 #define LCD_DIVIDER_17 ((uint32_t)0x00040000) /*!< LCD frequency = CLKPS/17 */
<> 144:ef7eb2e8f9f7 174 #define LCD_DIVIDER_18 ((uint32_t)0x00080000) /*!< LCD frequency = CLKPS/18 */
<> 144:ef7eb2e8f9f7 175 #define LCD_DIVIDER_19 ((uint32_t)0x000C0000) /*!< LCD frequency = CLKPS/19 */
<> 144:ef7eb2e8f9f7 176 #define LCD_DIVIDER_20 ((uint32_t)0x00100000) /*!< LCD frequency = CLKPS/20 */
<> 144:ef7eb2e8f9f7 177 #define LCD_DIVIDER_21 ((uint32_t)0x00140000) /*!< LCD frequency = CLKPS/21 */
<> 144:ef7eb2e8f9f7 178 #define LCD_DIVIDER_22 ((uint32_t)0x00180000) /*!< LCD frequency = CLKPS/22 */
<> 144:ef7eb2e8f9f7 179 #define LCD_DIVIDER_23 ((uint32_t)0x001C0000) /*!< LCD frequency = CLKPS/23 */
<> 144:ef7eb2e8f9f7 180 #define LCD_DIVIDER_24 ((uint32_t)0x00200000) /*!< LCD frequency = CLKPS/24 */
<> 144:ef7eb2e8f9f7 181 #define LCD_DIVIDER_25 ((uint32_t)0x00240000) /*!< LCD frequency = CLKPS/25 */
<> 144:ef7eb2e8f9f7 182 #define LCD_DIVIDER_26 ((uint32_t)0x00280000) /*!< LCD frequency = CLKPS/26 */
<> 144:ef7eb2e8f9f7 183 #define LCD_DIVIDER_27 ((uint32_t)0x002C0000) /*!< LCD frequency = CLKPS/27 */
<> 144:ef7eb2e8f9f7 184 #define LCD_DIVIDER_28 ((uint32_t)0x00300000) /*!< LCD frequency = CLKPS/28 */
<> 144:ef7eb2e8f9f7 185 #define LCD_DIVIDER_29 ((uint32_t)0x00340000) /*!< LCD frequency = CLKPS/29 */
<> 144:ef7eb2e8f9f7 186 #define LCD_DIVIDER_30 ((uint32_t)0x00380000) /*!< LCD frequency = CLKPS/30 */
<> 144:ef7eb2e8f9f7 187 #define LCD_DIVIDER_31 ((uint32_t)0x003C0000) /*!< LCD frequency = CLKPS/31 */
<> 144:ef7eb2e8f9f7 188 /**
<> 144:ef7eb2e8f9f7 189 * @}
<> 144:ef7eb2e8f9f7 190 */
<> 144:ef7eb2e8f9f7 191
<> 144:ef7eb2e8f9f7 192
<> 144:ef7eb2e8f9f7 193 /** @defgroup LCD_Duty LCD Duty
<> 144:ef7eb2e8f9f7 194 * @{
<> 144:ef7eb2e8f9f7 195 */
<> 144:ef7eb2e8f9f7 196 #define LCD_DUTY_STATIC ((uint32_t)0x00000000) /*!< Static duty */
<> 144:ef7eb2e8f9f7 197 #define LCD_DUTY_1_2 (LCD_CR_DUTY_0) /*!< 1/2 duty */
<> 144:ef7eb2e8f9f7 198 #define LCD_DUTY_1_3 (LCD_CR_DUTY_1) /*!< 1/3 duty */
<> 144:ef7eb2e8f9f7 199 #define LCD_DUTY_1_4 ((LCD_CR_DUTY_1 | LCD_CR_DUTY_0)) /*!< 1/4 duty */
<> 144:ef7eb2e8f9f7 200 #define LCD_DUTY_1_8 (LCD_CR_DUTY_2) /*!< 1/8 duty */
<> 144:ef7eb2e8f9f7 201 /**
<> 144:ef7eb2e8f9f7 202 * @}
<> 144:ef7eb2e8f9f7 203 */
<> 144:ef7eb2e8f9f7 204
<> 144:ef7eb2e8f9f7 205
<> 144:ef7eb2e8f9f7 206 /** @defgroup LCD_Bias LCD Bias
<> 144:ef7eb2e8f9f7 207 * @{
<> 144:ef7eb2e8f9f7 208 */
<> 144:ef7eb2e8f9f7 209 #define LCD_BIAS_1_4 ((uint32_t)0x00000000) /*!< 1/4 Bias */
<> 144:ef7eb2e8f9f7 210 #define LCD_BIAS_1_2 LCD_CR_BIAS_0 /*!< 1/2 Bias */
<> 144:ef7eb2e8f9f7 211 #define LCD_BIAS_1_3 LCD_CR_BIAS_1 /*!< 1/3 Bias */
<> 144:ef7eb2e8f9f7 212 /**
<> 144:ef7eb2e8f9f7 213 * @}
<> 144:ef7eb2e8f9f7 214 */
<> 144:ef7eb2e8f9f7 215
<> 144:ef7eb2e8f9f7 216 /** @defgroup LCD_Voltage_Source LCD Voltage Source
<> 144:ef7eb2e8f9f7 217 * @{
<> 144:ef7eb2e8f9f7 218 */
<> 144:ef7eb2e8f9f7 219 #define LCD_VOLTAGESOURCE_INTERNAL ((uint32_t)0x00000000) /*!< Internal voltage source for the LCD */
<> 144:ef7eb2e8f9f7 220 #define LCD_VOLTAGESOURCE_EXTERNAL LCD_CR_VSEL /*!< External voltage source for the LCD */
<> 144:ef7eb2e8f9f7 221 /**
<> 144:ef7eb2e8f9f7 222 * @}
<> 144:ef7eb2e8f9f7 223 */
<> 144:ef7eb2e8f9f7 224
<> 144:ef7eb2e8f9f7 225 /** @defgroup LCD_Interrupts LCD Interrupts
<> 144:ef7eb2e8f9f7 226 * @{
<> 144:ef7eb2e8f9f7 227 */
<> 144:ef7eb2e8f9f7 228 #define LCD_IT_SOF LCD_FCR_SOFIE
<> 144:ef7eb2e8f9f7 229 #define LCD_IT_UDD LCD_FCR_UDDIE
<> 144:ef7eb2e8f9f7 230 /**
<> 144:ef7eb2e8f9f7 231 * @}
<> 144:ef7eb2e8f9f7 232 */
<> 144:ef7eb2e8f9f7 233
<> 144:ef7eb2e8f9f7 234 /** @defgroup LCD_PulseOnDuration LCD Pulse On Duration
<> 144:ef7eb2e8f9f7 235 * @{
<> 144:ef7eb2e8f9f7 236 */
<> 144:ef7eb2e8f9f7 237 #define LCD_PULSEONDURATION_0 ((uint32_t)0x00000000) /*!< Pulse ON duration = 0 pulse */
<> 144:ef7eb2e8f9f7 238 #define LCD_PULSEONDURATION_1 (LCD_FCR_PON_0) /*!< Pulse ON duration = 1/CK_PS */
<> 144:ef7eb2e8f9f7 239 #define LCD_PULSEONDURATION_2 (LCD_FCR_PON_1) /*!< Pulse ON duration = 2/CK_PS */
<> 144:ef7eb2e8f9f7 240 #define LCD_PULSEONDURATION_3 (LCD_FCR_PON_1 | LCD_FCR_PON_0) /*!< Pulse ON duration = 3/CK_PS */
<> 144:ef7eb2e8f9f7 241 #define LCD_PULSEONDURATION_4 (LCD_FCR_PON_2) /*!< Pulse ON duration = 4/CK_PS */
<> 144:ef7eb2e8f9f7 242 #define LCD_PULSEONDURATION_5 (LCD_FCR_PON_2 | LCD_FCR_PON_0) /*!< Pulse ON duration = 5/CK_PS */
<> 144:ef7eb2e8f9f7 243 #define LCD_PULSEONDURATION_6 (LCD_FCR_PON_2 | LCD_FCR_PON_1) /*!< Pulse ON duration = 6/CK_PS */
<> 144:ef7eb2e8f9f7 244 #define LCD_PULSEONDURATION_7 (LCD_FCR_PON) /*!< Pulse ON duration = 7/CK_PS */
<> 144:ef7eb2e8f9f7 245 /**
<> 144:ef7eb2e8f9f7 246 * @}
<> 144:ef7eb2e8f9f7 247 */
<> 144:ef7eb2e8f9f7 248
<> 144:ef7eb2e8f9f7 249
<> 144:ef7eb2e8f9f7 250 /** @defgroup LCD_DeadTime LCD Dead Time
<> 144:ef7eb2e8f9f7 251 * @{
<> 144:ef7eb2e8f9f7 252 */
<> 144:ef7eb2e8f9f7 253 #define LCD_DEADTIME_0 ((uint32_t)0x00000000) /*!< No dead Time */
<> 144:ef7eb2e8f9f7 254 #define LCD_DEADTIME_1 (LCD_FCR_DEAD_0) /*!< One Phase between different couple of Frame */
<> 144:ef7eb2e8f9f7 255 #define LCD_DEADTIME_2 (LCD_FCR_DEAD_1) /*!< Two Phase between different couple of Frame */
<> 144:ef7eb2e8f9f7 256 #define LCD_DEADTIME_3 (LCD_FCR_DEAD_1 | LCD_FCR_DEAD_0) /*!< Three Phase between different couple of Frame */
<> 144:ef7eb2e8f9f7 257 #define LCD_DEADTIME_4 (LCD_FCR_DEAD_2) /*!< Four Phase between different couple of Frame */
<> 144:ef7eb2e8f9f7 258 #define LCD_DEADTIME_5 (LCD_FCR_DEAD_2 | LCD_FCR_DEAD_0) /*!< Five Phase between different couple of Frame */
<> 144:ef7eb2e8f9f7 259 #define LCD_DEADTIME_6 (LCD_FCR_DEAD_2 | LCD_FCR_DEAD_1) /*!< Six Phase between different couple of Frame */
<> 144:ef7eb2e8f9f7 260 #define LCD_DEADTIME_7 (LCD_FCR_DEAD) /*!< Seven Phase between different couple of Frame */
<> 144:ef7eb2e8f9f7 261 /**
<> 144:ef7eb2e8f9f7 262 * @}
<> 144:ef7eb2e8f9f7 263 */
<> 144:ef7eb2e8f9f7 264
<> 144:ef7eb2e8f9f7 265 /** @defgroup LCD_BlinkMode LCD Blink Mode
<> 144:ef7eb2e8f9f7 266 * @{
<> 144:ef7eb2e8f9f7 267 */
<> 144:ef7eb2e8f9f7 268 #define LCD_BLINKMODE_OFF ((uint32_t)0x00000000) /*!< Blink disabled */
<> 144:ef7eb2e8f9f7 269 #define LCD_BLINKMODE_SEG0_COM0 (LCD_FCR_BLINK_0) /*!< Blink enabled on SEG[0], COM[0] (1 pixel) */
<> 144:ef7eb2e8f9f7 270 #define LCD_BLINKMODE_SEG0_ALLCOM (LCD_FCR_BLINK_1) /*!< Blink enabled on SEG[0], all COM (up to
<> 144:ef7eb2e8f9f7 271 8 pixels according to the programmed duty) */
<> 144:ef7eb2e8f9f7 272 #define LCD_BLINKMODE_ALLSEG_ALLCOM (LCD_FCR_BLINK) /*!< Blink enabled on all SEG and all COM (all pixels) */
<> 144:ef7eb2e8f9f7 273 /**
<> 144:ef7eb2e8f9f7 274 * @}
<> 144:ef7eb2e8f9f7 275 */
<> 144:ef7eb2e8f9f7 276
<> 144:ef7eb2e8f9f7 277 /** @defgroup LCD_BlinkFrequency LCD Blink Frequency
<> 144:ef7eb2e8f9f7 278 * @{
<> 144:ef7eb2e8f9f7 279 */
<> 144:ef7eb2e8f9f7 280 #define LCD_BLINKFREQUENCY_DIV8 ((uint32_t)0x00000000) /*!< The Blink frequency = fLCD/8 */
<> 144:ef7eb2e8f9f7 281 #define LCD_BLINKFREQUENCY_DIV16 (LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/16 */
<> 144:ef7eb2e8f9f7 282 #define LCD_BLINKFREQUENCY_DIV32 (LCD_FCR_BLINKF_1) /*!< The Blink frequency = fLCD/32 */
<> 144:ef7eb2e8f9f7 283 #define LCD_BLINKFREQUENCY_DIV64 (LCD_FCR_BLINKF_1 | LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/64 */
<> 144:ef7eb2e8f9f7 284 #define LCD_BLINKFREQUENCY_DIV128 (LCD_FCR_BLINKF_2) /*!< The Blink frequency = fLCD/128 */
<> 144:ef7eb2e8f9f7 285 #define LCD_BLINKFREQUENCY_DIV256 (LCD_FCR_BLINKF_2 |LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/256 */
<> 144:ef7eb2e8f9f7 286 #define LCD_BLINKFREQUENCY_DIV512 (LCD_FCR_BLINKF_2 |LCD_FCR_BLINKF_1) /*!< The Blink frequency = fLCD/512 */
<> 144:ef7eb2e8f9f7 287 #define LCD_BLINKFREQUENCY_DIV1024 (LCD_FCR_BLINKF) /*!< The Blink frequency = fLCD/1024 */
<> 144:ef7eb2e8f9f7 288 /**
<> 144:ef7eb2e8f9f7 289 * @}
<> 144:ef7eb2e8f9f7 290 */
<> 144:ef7eb2e8f9f7 291
<> 144:ef7eb2e8f9f7 292 /** @defgroup LCD_Contrast LCD Contrast
<> 144:ef7eb2e8f9f7 293 * @{
<> 144:ef7eb2e8f9f7 294 */
<> 144:ef7eb2e8f9f7 295 #define LCD_CONTRASTLEVEL_0 ((uint32_t)0x00000000) /*!< Maximum Voltage = 2.60V */
<> 144:ef7eb2e8f9f7 296 #define LCD_CONTRASTLEVEL_1 (LCD_FCR_CC_0) /*!< Maximum Voltage = 2.73V */
<> 144:ef7eb2e8f9f7 297 #define LCD_CONTRASTLEVEL_2 (LCD_FCR_CC_1) /*!< Maximum Voltage = 2.86V */
<> 144:ef7eb2e8f9f7 298 #define LCD_CONTRASTLEVEL_3 (LCD_FCR_CC_1 | LCD_FCR_CC_0) /*!< Maximum Voltage = 2.99V */
<> 144:ef7eb2e8f9f7 299 #define LCD_CONTRASTLEVEL_4 (LCD_FCR_CC_2) /*!< Maximum Voltage = 3.12V */
<> 144:ef7eb2e8f9f7 300 #define LCD_CONTRASTLEVEL_5 (LCD_FCR_CC_2 | LCD_FCR_CC_0) /*!< Maximum Voltage = 3.26V */
<> 144:ef7eb2e8f9f7 301 #define LCD_CONTRASTLEVEL_6 (LCD_FCR_CC_2 | LCD_FCR_CC_1) /*!< Maximum Voltage = 3.40V */
<> 144:ef7eb2e8f9f7 302 #define LCD_CONTRASTLEVEL_7 (LCD_FCR_CC) /*!< Maximum Voltage = 3.55V */
<> 144:ef7eb2e8f9f7 303 /**
<> 144:ef7eb2e8f9f7 304 * @}
<> 144:ef7eb2e8f9f7 305 */
<> 144:ef7eb2e8f9f7 306
<> 144:ef7eb2e8f9f7 307 /** @defgroup LCD_RAMRegister LCD RAMRegister
<> 144:ef7eb2e8f9f7 308 * @{
<> 144:ef7eb2e8f9f7 309 */
<> 144:ef7eb2e8f9f7 310 #define LCD_RAM_REGISTER0 ((uint32_t)0x00000000) /*!< LCD RAM Register 0 */
<> 144:ef7eb2e8f9f7 311 #define LCD_RAM_REGISTER1 ((uint32_t)0x00000001) /*!< LCD RAM Register 1 */
<> 144:ef7eb2e8f9f7 312 #define LCD_RAM_REGISTER2 ((uint32_t)0x00000002) /*!< LCD RAM Register 2 */
<> 144:ef7eb2e8f9f7 313 #define LCD_RAM_REGISTER3 ((uint32_t)0x00000003) /*!< LCD RAM Register 3 */
<> 144:ef7eb2e8f9f7 314 #define LCD_RAM_REGISTER4 ((uint32_t)0x00000004) /*!< LCD RAM Register 4 */
<> 144:ef7eb2e8f9f7 315 #define LCD_RAM_REGISTER5 ((uint32_t)0x00000005) /*!< LCD RAM Register 5 */
<> 144:ef7eb2e8f9f7 316 #define LCD_RAM_REGISTER6 ((uint32_t)0x00000006) /*!< LCD RAM Register 6 */
<> 144:ef7eb2e8f9f7 317 #define LCD_RAM_REGISTER7 ((uint32_t)0x00000007) /*!< LCD RAM Register 7 */
<> 144:ef7eb2e8f9f7 318 #define LCD_RAM_REGISTER8 ((uint32_t)0x00000008) /*!< LCD RAM Register 8 */
<> 144:ef7eb2e8f9f7 319 #define LCD_RAM_REGISTER9 ((uint32_t)0x00000009) /*!< LCD RAM Register 9 */
<> 144:ef7eb2e8f9f7 320 #define LCD_RAM_REGISTER10 ((uint32_t)0x0000000A) /*!< LCD RAM Register 10 */
<> 144:ef7eb2e8f9f7 321 #define LCD_RAM_REGISTER11 ((uint32_t)0x0000000B) /*!< LCD RAM Register 11 */
<> 144:ef7eb2e8f9f7 322 #define LCD_RAM_REGISTER12 ((uint32_t)0x0000000C) /*!< LCD RAM Register 12 */
<> 144:ef7eb2e8f9f7 323 #define LCD_RAM_REGISTER13 ((uint32_t)0x0000000D) /*!< LCD RAM Register 13 */
<> 144:ef7eb2e8f9f7 324 #define LCD_RAM_REGISTER14 ((uint32_t)0x0000000E) /*!< LCD RAM Register 14 */
<> 144:ef7eb2e8f9f7 325 #define LCD_RAM_REGISTER15 ((uint32_t)0x0000000F) /*!< LCD RAM Register 15 */
<> 144:ef7eb2e8f9f7 326 /**
<> 144:ef7eb2e8f9f7 327 * @}
<> 144:ef7eb2e8f9f7 328 */
<> 144:ef7eb2e8f9f7 329
<> 144:ef7eb2e8f9f7 330 /** @defgroup LCD_HighDrive LCD High Drive
<> 144:ef7eb2e8f9f7 331 * @{
<> 144:ef7eb2e8f9f7 332 */
<> 144:ef7eb2e8f9f7 333
<> 144:ef7eb2e8f9f7 334 #define LCD_HIGHDRIVE_DISABLE ((uint32_t)0x00000000) /*!< High drive disabled */
<> 144:ef7eb2e8f9f7 335 #define LCD_HIGHDRIVE_ENABLE (LCD_FCR_HD) /*!< High drive enabled */
<> 144:ef7eb2e8f9f7 336 /**
<> 144:ef7eb2e8f9f7 337 * @}
<> 144:ef7eb2e8f9f7 338 */
<> 144:ef7eb2e8f9f7 339
<> 144:ef7eb2e8f9f7 340 /** @defgroup LCD_MuxSegment LCD Mux Segment
<> 144:ef7eb2e8f9f7 341 * @{
<> 144:ef7eb2e8f9f7 342 */
<> 144:ef7eb2e8f9f7 343
<> 144:ef7eb2e8f9f7 344 #define LCD_MUXSEGMENT_DISABLE ((uint32_t)0x00000000) /*!< SEG pin multiplexing disabled */
<> 144:ef7eb2e8f9f7 345 #define LCD_MUXSEGMENT_ENABLE (LCD_CR_MUX_SEG) /*!< SEG[31:28] are multiplexed with SEG[43:40] */
<> 144:ef7eb2e8f9f7 346 /**
<> 144:ef7eb2e8f9f7 347 * @}
<> 144:ef7eb2e8f9f7 348 */
<> 144:ef7eb2e8f9f7 349
<> 144:ef7eb2e8f9f7 350 /** @defgroup LCD_Flag_Definition LCD Flags Definition
<> 144:ef7eb2e8f9f7 351 * @{
<> 144:ef7eb2e8f9f7 352 */
<> 144:ef7eb2e8f9f7 353 #define LCD_FLAG_ENS LCD_SR_ENS /*!< LCD enabled status */
<> 144:ef7eb2e8f9f7 354 #define LCD_FLAG_SOF LCD_SR_SOF /*!< Start of frame flag */
<> 144:ef7eb2e8f9f7 355 #define LCD_FLAG_UDR LCD_SR_UDR /*!< Update display request */
<> 144:ef7eb2e8f9f7 356 #define LCD_FLAG_UDD LCD_SR_UDD /*!< Update display done */
<> 144:ef7eb2e8f9f7 357 #define LCD_FLAG_RDY LCD_SR_RDY /*!< Ready flag */
<> 144:ef7eb2e8f9f7 358 #define LCD_FLAG_FCRSF LCD_SR_FCRSR /*!< LCD Frame Control Register Synchronization flag */
<> 144:ef7eb2e8f9f7 359 /**
<> 144:ef7eb2e8f9f7 360 * @}
<> 144:ef7eb2e8f9f7 361 */
<> 144:ef7eb2e8f9f7 362
<> 144:ef7eb2e8f9f7 363 /**
<> 144:ef7eb2e8f9f7 364 * @}
<> 144:ef7eb2e8f9f7 365 */
<> 144:ef7eb2e8f9f7 366
<> 144:ef7eb2e8f9f7 367 /* Exported macros -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 368 /** @defgroup LCD_Exported_Macros LCD Exported Macros
<> 144:ef7eb2e8f9f7 369 * @{
<> 144:ef7eb2e8f9f7 370 */
<> 144:ef7eb2e8f9f7 371
<> 144:ef7eb2e8f9f7 372 /** @brief Reset LCD handle state.
<> 144:ef7eb2e8f9f7 373 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 374 * @retval None
<> 144:ef7eb2e8f9f7 375 */
<> 144:ef7eb2e8f9f7 376 #define __HAL_LCD_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LCD_STATE_RESET)
<> 144:ef7eb2e8f9f7 377
<> 144:ef7eb2e8f9f7 378 /** @brief Enable the LCD peripheral.
<> 144:ef7eb2e8f9f7 379 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 380 * @retval None
<> 144:ef7eb2e8f9f7 381 */
<> 144:ef7eb2e8f9f7 382 #define __HAL_LCD_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR, LCD_CR_LCDEN)
<> 144:ef7eb2e8f9f7 383
<> 144:ef7eb2e8f9f7 384 /** @brief Disable the LCD peripheral.
<> 144:ef7eb2e8f9f7 385 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 386 * @retval None
<> 144:ef7eb2e8f9f7 387 */
<> 144:ef7eb2e8f9f7 388 #define __HAL_LCD_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR, LCD_CR_LCDEN)
<> 144:ef7eb2e8f9f7 389
<> 144:ef7eb2e8f9f7 390 /** @brief Enable the low resistance divider.
<> 144:ef7eb2e8f9f7 391 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 392 * @note Displays with high internal resistance may need a longer drive time to
<> 144:ef7eb2e8f9f7 393 * achieve satisfactory contrast. This function is useful in this case if
<> 144:ef7eb2e8f9f7 394 * some additional power consumption can be tolerated.
<> 144:ef7eb2e8f9f7 395 * @note When this mode is enabled, the PulseOn Duration (PON) have to be
<> 144:ef7eb2e8f9f7 396 * programmed to 1/CK_PS (LCD_PULSEONDURATION_1).
<> 144:ef7eb2e8f9f7 397 * @retval None
<> 144:ef7eb2e8f9f7 398 */
<> 144:ef7eb2e8f9f7 399 #define __HAL_LCD_HIGHDRIVER_ENABLE(__HANDLE__) \
<> 144:ef7eb2e8f9f7 400 do { \
<> 144:ef7eb2e8f9f7 401 SET_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \
<> 144:ef7eb2e8f9f7 402 LCD_WaitForSynchro(__HANDLE__); \
<> 144:ef7eb2e8f9f7 403 } while(0)
<> 144:ef7eb2e8f9f7 404
<> 144:ef7eb2e8f9f7 405 /** @brief Disable the low resistance divider.
<> 144:ef7eb2e8f9f7 406 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 407 * @retval None
<> 144:ef7eb2e8f9f7 408 */
<> 144:ef7eb2e8f9f7 409 #define __HAL_LCD_HIGHDRIVER_DISABLE(__HANDLE__) \
<> 144:ef7eb2e8f9f7 410 do { \
<> 144:ef7eb2e8f9f7 411 CLEAR_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \
<> 144:ef7eb2e8f9f7 412 LCD_WaitForSynchro(__HANDLE__); \
<> 144:ef7eb2e8f9f7 413 } while(0)
<> 144:ef7eb2e8f9f7 414
<> 144:ef7eb2e8f9f7 415 /** @brief Enable the voltage output buffer for higher driving capability.
<> 144:ef7eb2e8f9f7 416 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 417 * @retval None
<> 144:ef7eb2e8f9f7 418 */
<> 144:ef7eb2e8f9f7 419 #define __HAL_LCD_VOLTAGE_BUFFER_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR, LCD_CR_BUFEN)
<> 144:ef7eb2e8f9f7 420
<> 144:ef7eb2e8f9f7 421 /** @brief Disable the voltage output buffer for higher driving capability.
<> 144:ef7eb2e8f9f7 422 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 423 * @retval None
<> 144:ef7eb2e8f9f7 424 */
<> 144:ef7eb2e8f9f7 425 #define __HAL_LCD_VOLTAGE_BUFFER_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR, LCD_CR_BUFEN)
<> 144:ef7eb2e8f9f7 426
<> 144:ef7eb2e8f9f7 427 /**
<> 144:ef7eb2e8f9f7 428 * @brief Configure the LCD pulse on duration.
<> 144:ef7eb2e8f9f7 429 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 430 * @param __DURATION__: specifies the LCD pulse on duration in terms of
<> 144:ef7eb2e8f9f7 431 * CK_PS (prescaled LCD clock period) pulses.
<> 144:ef7eb2e8f9f7 432 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 433 * @arg LCD_PULSEONDURATION_0: 0 pulse
<> 144:ef7eb2e8f9f7 434 * @arg LCD_PULSEONDURATION_1: Pulse ON duration = 1/CK_PS
<> 144:ef7eb2e8f9f7 435 * @arg LCD_PULSEONDURATION_2: Pulse ON duration = 2/CK_PS
<> 144:ef7eb2e8f9f7 436 * @arg LCD_PULSEONDURATION_3: Pulse ON duration = 3/CK_PS
<> 144:ef7eb2e8f9f7 437 * @arg LCD_PULSEONDURATION_4: Pulse ON duration = 4/CK_PS
<> 144:ef7eb2e8f9f7 438 * @arg LCD_PULSEONDURATION_5: Pulse ON duration = 5/CK_PS
<> 144:ef7eb2e8f9f7 439 * @arg LCD_PULSEONDURATION_6: Pulse ON duration = 6/CK_PS
<> 144:ef7eb2e8f9f7 440 * @arg LCD_PULSEONDURATION_7: Pulse ON duration = 7/CK_PS
<> 144:ef7eb2e8f9f7 441 * @retval None
<> 144:ef7eb2e8f9f7 442 */
<> 144:ef7eb2e8f9f7 443 #define __HAL_LCD_PULSEONDURATION_CONFIG(__HANDLE__, __DURATION__) \
<> 144:ef7eb2e8f9f7 444 do { \
<> 144:ef7eb2e8f9f7 445 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_PON, (__DURATION__)); \
<> 144:ef7eb2e8f9f7 446 LCD_WaitForSynchro(__HANDLE__); \
<> 144:ef7eb2e8f9f7 447 } while(0)
<> 144:ef7eb2e8f9f7 448
<> 144:ef7eb2e8f9f7 449 /**
<> 144:ef7eb2e8f9f7 450 * @brief Configure the LCD dead time.
<> 144:ef7eb2e8f9f7 451 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 452 * @param __DEADTIME__: specifies the LCD dead time.
<> 144:ef7eb2e8f9f7 453 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 454 * @arg LCD_DEADTIME_0: No dead Time
<> 144:ef7eb2e8f9f7 455 * @arg LCD_DEADTIME_1: One Phase between different couple of Frame
<> 144:ef7eb2e8f9f7 456 * @arg LCD_DEADTIME_2: Two Phase between different couple of Frame
<> 144:ef7eb2e8f9f7 457 * @arg LCD_DEADTIME_3: Three Phase between different couple of Frame
<> 144:ef7eb2e8f9f7 458 * @arg LCD_DEADTIME_4: Four Phase between different couple of Frame
<> 144:ef7eb2e8f9f7 459 * @arg LCD_DEADTIME_5: Five Phase between different couple of Frame
<> 144:ef7eb2e8f9f7 460 * @arg LCD_DEADTIME_6: Six Phase between different couple of Frame
<> 144:ef7eb2e8f9f7 461 * @arg LCD_DEADTIME_7: Seven Phase between different couple of Frame
<> 144:ef7eb2e8f9f7 462 * @retval None
<> 144:ef7eb2e8f9f7 463 */
<> 144:ef7eb2e8f9f7 464 #define __HAL_LCD_DEADTIME_CONFIG(__HANDLE__, __DEADTIME__) \
<> 144:ef7eb2e8f9f7 465 do { \
<> 144:ef7eb2e8f9f7 466 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_DEAD, (__DEADTIME__)); \
<> 144:ef7eb2e8f9f7 467 LCD_WaitForSynchro(__HANDLE__); \
<> 144:ef7eb2e8f9f7 468 } while(0)
<> 144:ef7eb2e8f9f7 469
<> 144:ef7eb2e8f9f7 470 /**
<> 144:ef7eb2e8f9f7 471 * @brief Configure the LCD contrast.
<> 144:ef7eb2e8f9f7 472 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 473 * @param __CONTRAST__: specifies the LCD Contrast.
<> 144:ef7eb2e8f9f7 474 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 475 * @arg LCD_CONTRASTLEVEL_0: Maximum Voltage = 2.60V
<> 144:ef7eb2e8f9f7 476 * @arg LCD_CONTRASTLEVEL_1: Maximum Voltage = 2.73V
<> 144:ef7eb2e8f9f7 477 * @arg LCD_CONTRASTLEVEL_2: Maximum Voltage = 2.86V
<> 144:ef7eb2e8f9f7 478 * @arg LCD_CONTRASTLEVEL_3: Maximum Voltage = 2.99V
<> 144:ef7eb2e8f9f7 479 * @arg LCD_CONTRASTLEVEL_4: Maximum Voltage = 3.12V
<> 144:ef7eb2e8f9f7 480 * @arg LCD_CONTRASTLEVEL_5: Maximum Voltage = 3.25V
<> 144:ef7eb2e8f9f7 481 * @arg LCD_CONTRASTLEVEL_6: Maximum Voltage = 3.38V
<> 144:ef7eb2e8f9f7 482 * @arg LCD_CONTRASTLEVEL_7: Maximum Voltage = 3.51V
<> 144:ef7eb2e8f9f7 483 * @retval None
<> 144:ef7eb2e8f9f7 484 */
<> 144:ef7eb2e8f9f7 485 #define __HAL_LCD_CONTRAST_CONFIG(__HANDLE__, __CONTRAST__) \
<> 144:ef7eb2e8f9f7 486 do { \
<> 144:ef7eb2e8f9f7 487 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_CC, (__CONTRAST__)); \
<> 144:ef7eb2e8f9f7 488 LCD_WaitForSynchro(__HANDLE__); \
<> 144:ef7eb2e8f9f7 489 } while(0)
<> 144:ef7eb2e8f9f7 490
<> 144:ef7eb2e8f9f7 491 /**
<> 144:ef7eb2e8f9f7 492 * @brief Configure the LCD Blink mode and Blink frequency.
<> 144:ef7eb2e8f9f7 493 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 494 * @param __BLINKMODE__: specifies the LCD blink mode.
<> 144:ef7eb2e8f9f7 495 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 496 * @arg LCD_BLINKMODE_OFF: Blink disabled
<> 144:ef7eb2e8f9f7 497 * @arg LCD_BLINKMODE_SEG0_COM0: Blink enabled on SEG[0], COM[0] (1 pixel)
<> 144:ef7eb2e8f9f7 498 * @arg LCD_BLINKMODE_SEG0_ALLCOM: Blink enabled on SEG[0], all COM (up to 8
<> 144:ef7eb2e8f9f7 499 * pixels according to the programmed duty)
<> 144:ef7eb2e8f9f7 500 * @arg LCD_BLINKMODE_ALLSEG_ALLCOM: Blink enabled on all SEG and all COM
<> 144:ef7eb2e8f9f7 501 * (all pixels)
<> 144:ef7eb2e8f9f7 502 * @param __BLINKFREQUENCY__: specifies the LCD blink frequency.
<> 144:ef7eb2e8f9f7 503 * @arg LCD_BLINKFREQUENCY_DIV8: The Blink frequency = fLcd/8
<> 144:ef7eb2e8f9f7 504 * @arg LCD_BLINKFREQUENCY_DIV16: The Blink frequency = fLcd/16
<> 144:ef7eb2e8f9f7 505 * @arg LCD_BLINKFREQUENCY_DIV32: The Blink frequency = fLcd/32
<> 144:ef7eb2e8f9f7 506 * @arg LCD_BLINKFREQUENCY_DIV64: The Blink frequency = fLcd/64
<> 144:ef7eb2e8f9f7 507 * @arg LCD_BLINKFREQUENCY_DIV128: The Blink frequency = fLcd/128
<> 144:ef7eb2e8f9f7 508 * @arg LCD_BLINKFREQUENCY_DIV256: The Blink frequency = fLcd/256
<> 144:ef7eb2e8f9f7 509 * @arg LCD_BLINKFREQUENCY_DIV512: The Blink frequency = fLcd/512
<> 144:ef7eb2e8f9f7 510 * @arg LCD_BLINKFREQUENCY_DIV1024: The Blink frequency = fLcd/1024
<> 144:ef7eb2e8f9f7 511 * @retval None
<> 144:ef7eb2e8f9f7 512 */
<> 144:ef7eb2e8f9f7 513 #define __HAL_LCD_BLINK_CONFIG(__HANDLE__, __BLINKMODE__, __BLINKFREQUENCY__) \
<> 144:ef7eb2e8f9f7 514 do { \
<> 144:ef7eb2e8f9f7 515 MODIFY_REG((__HANDLE__)->Instance->FCR, (LCD_FCR_BLINKF | LCD_FCR_BLINK), ((__BLINKMODE__) | (__BLINKFREQUENCY__))); \
<> 144:ef7eb2e8f9f7 516 LCD_WaitForSynchro(__HANDLE__); \
<> 144:ef7eb2e8f9f7 517 } while(0)
<> 144:ef7eb2e8f9f7 518
<> 144:ef7eb2e8f9f7 519 /** @brief Enable the specified LCD interrupt.
<> 144:ef7eb2e8f9f7 520 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 521 * @param __INTERRUPT__: specifies the LCD interrupt source to be enabled.
<> 144:ef7eb2e8f9f7 522 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 523 * @arg LCD_IT_SOF: Start of Frame Interrupt
<> 144:ef7eb2e8f9f7 524 * @arg LCD_IT_UDD: Update Display Done Interrupt
<> 144:ef7eb2e8f9f7 525 * @retval None
<> 144:ef7eb2e8f9f7 526 */
<> 144:ef7eb2e8f9f7 527 #define __HAL_LCD_ENABLE_IT(__HANDLE__, __INTERRUPT__) \
<> 144:ef7eb2e8f9f7 528 do { \
<> 144:ef7eb2e8f9f7 529 SET_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \
<> 144:ef7eb2e8f9f7 530 LCD_WaitForSynchro(__HANDLE__); \
<> 144:ef7eb2e8f9f7 531 } while(0)
<> 144:ef7eb2e8f9f7 532
<> 144:ef7eb2e8f9f7 533 /** @brief Disable the specified LCD interrupt.
<> 144:ef7eb2e8f9f7 534 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 535 * @param __INTERRUPT__: specifies the LCD interrupt source to be disabled.
<> 144:ef7eb2e8f9f7 536 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 537 * @arg LCD_IT_SOF: Start of Frame Interrupt
<> 144:ef7eb2e8f9f7 538 * @arg LCD_IT_UDD: Update Display Done Interrupt
<> 144:ef7eb2e8f9f7 539 * @retval None
<> 144:ef7eb2e8f9f7 540 */
<> 144:ef7eb2e8f9f7 541 #define __HAL_LCD_DISABLE_IT(__HANDLE__, __INTERRUPT__) \
<> 144:ef7eb2e8f9f7 542 do { \
<> 144:ef7eb2e8f9f7 543 CLEAR_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \
<> 144:ef7eb2e8f9f7 544 LCD_WaitForSynchro(__HANDLE__); \
<> 144:ef7eb2e8f9f7 545 } while(0)
<> 144:ef7eb2e8f9f7 546
<> 144:ef7eb2e8f9f7 547 /** @brief Check whether the specified LCD interrupt source is enabled or not.
<> 144:ef7eb2e8f9f7 548 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 549 * @param __IT__: specifies the LCD interrupt source to check.
<> 144:ef7eb2e8f9f7 550 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 551 * @arg LCD_IT_SOF: Start of Frame Interrupt
<> 144:ef7eb2e8f9f7 552 * @arg LCD_IT_UDD: Update Display Done Interrupt.
<> 144:ef7eb2e8f9f7 553 * @note If the device is in STOP mode (PCLK not provided) UDD will not
<> 144:ef7eb2e8f9f7 554 * generate an interrupt even if UDDIE = 1.
<> 144:ef7eb2e8f9f7 555 * If the display is not enabled the UDD interrupt will never occur.
<> 144:ef7eb2e8f9f7 556 * @retval The state of __IT__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 557 */
<> 144:ef7eb2e8f9f7 558 #define __HAL_LCD_GET_IT_SOURCE(__HANDLE__, __IT__) (((__HANDLE__)->Instance->FCR) & (__IT__))
<> 144:ef7eb2e8f9f7 559
<> 144:ef7eb2e8f9f7 560 /** @brief Check whether the specified LCD flag is set or not.
<> 144:ef7eb2e8f9f7 561 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 562 * @param __FLAG__: specifies the flag to check.
<> 144:ef7eb2e8f9f7 563 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 564 * @arg LCD_FLAG_ENS: LCD Enabled flag. It indicates the LCD controller status.
<> 144:ef7eb2e8f9f7 565 * @note The ENS bit is set immediately when the LCDEN bit in the LCD_CR
<> 144:ef7eb2e8f9f7 566 * goes from 0 to 1. On deactivation it reflects the real status of
<> 144:ef7eb2e8f9f7 567 * LCD so it becomes 0 at the end of the last displayed frame.
<> 144:ef7eb2e8f9f7 568 * @arg LCD_FLAG_SOF: Start of Frame flag. This flag is set by hardware at
<> 144:ef7eb2e8f9f7 569 * the beginning of a new frame, at the same time as the display data is
<> 144:ef7eb2e8f9f7 570 * updated.
<> 144:ef7eb2e8f9f7 571 * @arg LCD_FLAG_UDR: Update Display Request flag.
<> 144:ef7eb2e8f9f7 572 * @arg LCD_FLAG_UDD: Update Display Done flag.
<> 144:ef7eb2e8f9f7 573 * @arg LCD_FLAG_RDY: Step_up converter Ready flag. It indicates the status
<> 144:ef7eb2e8f9f7 574 * of the step-up converter.
<> 144:ef7eb2e8f9f7 575 * @arg LCD_FLAG_FCRSF: LCD Frame Control Register Synchronization Flag.
<> 144:ef7eb2e8f9f7 576 * This flag is set by hardware each time the LCD_FCR register is updated
<> 144:ef7eb2e8f9f7 577 * in the LCDCLK domain.
<> 144:ef7eb2e8f9f7 578 * @retval The new state of __FLAG__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 579 */
<> 144:ef7eb2e8f9f7 580 #define __HAL_LCD_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
<> 144:ef7eb2e8f9f7 581
<> 144:ef7eb2e8f9f7 582 /** @brief Clear the specified LCD pending flag.
<> 144:ef7eb2e8f9f7 583 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 584 * @param __FLAG__: specifies the flag to clear.
<> 144:ef7eb2e8f9f7 585 * This parameter can be any combination of the following values:
<> 144:ef7eb2e8f9f7 586 * @arg LCD_FLAG_SOF: Start of Frame Interrupt
<> 144:ef7eb2e8f9f7 587 * @arg LCD_FLAG_UDD: Update Display Done Interrupt
<> 144:ef7eb2e8f9f7 588 * @retval None
<> 144:ef7eb2e8f9f7 589 */
<> 144:ef7eb2e8f9f7 590 #define __HAL_LCD_CLEAR_FLAG(__HANDLE__, __FLAG__) WRITE_REG((__HANDLE__)->Instance->CLR, (__FLAG__))
<> 144:ef7eb2e8f9f7 591
<> 144:ef7eb2e8f9f7 592 /**
<> 144:ef7eb2e8f9f7 593 * @}
<> 144:ef7eb2e8f9f7 594 */
<> 144:ef7eb2e8f9f7 595
<> 144:ef7eb2e8f9f7 596 /* Exported functions ------------------------------------------------------- */
<> 144:ef7eb2e8f9f7 597 /** @addtogroup LCD_Exported_Functions
<> 144:ef7eb2e8f9f7 598 * @{
<> 144:ef7eb2e8f9f7 599 */
<> 144:ef7eb2e8f9f7 600
<> 144:ef7eb2e8f9f7 601 /* Initialization/de-initialization methods **********************************/
<> 144:ef7eb2e8f9f7 602 /** @addtogroup LCD_Exported_Functions_Group1
<> 144:ef7eb2e8f9f7 603 * @{
<> 144:ef7eb2e8f9f7 604 */
<> 144:ef7eb2e8f9f7 605 HAL_StatusTypeDef HAL_LCD_DeInit(LCD_HandleTypeDef *hlcd);
<> 144:ef7eb2e8f9f7 606 HAL_StatusTypeDef HAL_LCD_Init(LCD_HandleTypeDef *hlcd);
<> 144:ef7eb2e8f9f7 607 void HAL_LCD_MspInit(LCD_HandleTypeDef *hlcd);
<> 144:ef7eb2e8f9f7 608 void HAL_LCD_MspDeInit(LCD_HandleTypeDef *hlcd);
<> 144:ef7eb2e8f9f7 609 /**
<> 144:ef7eb2e8f9f7 610 * @}
<> 144:ef7eb2e8f9f7 611 */
<> 144:ef7eb2e8f9f7 612
<> 144:ef7eb2e8f9f7 613 /* IO operation methods *******************************************************/
<> 144:ef7eb2e8f9f7 614 /** @addtogroup LCD_Exported_Functions_Group2
<> 144:ef7eb2e8f9f7 615 * @{
<> 144:ef7eb2e8f9f7 616 */
<> 144:ef7eb2e8f9f7 617 HAL_StatusTypeDef HAL_LCD_Write(LCD_HandleTypeDef *hlcd, uint32_t RAMRegisterIndex, uint32_t RAMRegisterMask, uint32_t Data);
<> 144:ef7eb2e8f9f7 618 HAL_StatusTypeDef HAL_LCD_Clear(LCD_HandleTypeDef *hlcd);
<> 144:ef7eb2e8f9f7 619 HAL_StatusTypeDef HAL_LCD_UpdateDisplayRequest(LCD_HandleTypeDef *hlcd);
<> 144:ef7eb2e8f9f7 620 /**
<> 144:ef7eb2e8f9f7 621 * @}
<> 144:ef7eb2e8f9f7 622 */
<> 144:ef7eb2e8f9f7 623
<> 144:ef7eb2e8f9f7 624 /* Peripheral State methods **************************************************/
<> 144:ef7eb2e8f9f7 625 /** @addtogroup LCD_Exported_Functions_Group3
<> 144:ef7eb2e8f9f7 626 * @{
<> 144:ef7eb2e8f9f7 627 */
<> 144:ef7eb2e8f9f7 628 HAL_LCD_StateTypeDef HAL_LCD_GetState(LCD_HandleTypeDef *hlcd);
<> 144:ef7eb2e8f9f7 629 uint32_t HAL_LCD_GetError(LCD_HandleTypeDef *hlcd);
<> 144:ef7eb2e8f9f7 630 /**
<> 144:ef7eb2e8f9f7 631 * @}
<> 144:ef7eb2e8f9f7 632 */
<> 144:ef7eb2e8f9f7 633
<> 144:ef7eb2e8f9f7 634 /**
<> 144:ef7eb2e8f9f7 635 * @}
<> 144:ef7eb2e8f9f7 636 */
<> 144:ef7eb2e8f9f7 637
<> 144:ef7eb2e8f9f7 638 /* Private types -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 639 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 640 /* Private constants ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 641 /* Private macros ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 642 /** @defgroup LCD_Private_Macros LCD Private Macros
<> 144:ef7eb2e8f9f7 643 * @{
<> 144:ef7eb2e8f9f7 644 */
<> 144:ef7eb2e8f9f7 645
<> 144:ef7eb2e8f9f7 646 #define IS_LCD_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LCD_PRESCALER_1) || \
<> 144:ef7eb2e8f9f7 647 ((__PRESCALER__) == LCD_PRESCALER_2) || \
<> 144:ef7eb2e8f9f7 648 ((__PRESCALER__) == LCD_PRESCALER_4) || \
<> 144:ef7eb2e8f9f7 649 ((__PRESCALER__) == LCD_PRESCALER_8) || \
<> 144:ef7eb2e8f9f7 650 ((__PRESCALER__) == LCD_PRESCALER_16) || \
<> 144:ef7eb2e8f9f7 651 ((__PRESCALER__) == LCD_PRESCALER_32) || \
<> 144:ef7eb2e8f9f7 652 ((__PRESCALER__) == LCD_PRESCALER_64) || \
<> 144:ef7eb2e8f9f7 653 ((__PRESCALER__) == LCD_PRESCALER_128) || \
<> 144:ef7eb2e8f9f7 654 ((__PRESCALER__) == LCD_PRESCALER_256) || \
<> 144:ef7eb2e8f9f7 655 ((__PRESCALER__) == LCD_PRESCALER_512) || \
<> 144:ef7eb2e8f9f7 656 ((__PRESCALER__) == LCD_PRESCALER_1024) || \
<> 144:ef7eb2e8f9f7 657 ((__PRESCALER__) == LCD_PRESCALER_2048) || \
<> 144:ef7eb2e8f9f7 658 ((__PRESCALER__) == LCD_PRESCALER_4096) || \
<> 144:ef7eb2e8f9f7 659 ((__PRESCALER__) == LCD_PRESCALER_8192) || \
<> 144:ef7eb2e8f9f7 660 ((__PRESCALER__) == LCD_PRESCALER_16384) || \
<> 144:ef7eb2e8f9f7 661 ((__PRESCALER__) == LCD_PRESCALER_32768))
<> 144:ef7eb2e8f9f7 662
<> 144:ef7eb2e8f9f7 663 #define IS_LCD_DIVIDER(__DIVIDER__) (((__DIVIDER__) == LCD_DIVIDER_16) || \
<> 144:ef7eb2e8f9f7 664 ((__DIVIDER__) == LCD_DIVIDER_17) || \
<> 144:ef7eb2e8f9f7 665 ((__DIVIDER__) == LCD_DIVIDER_18) || \
<> 144:ef7eb2e8f9f7 666 ((__DIVIDER__) == LCD_DIVIDER_19) || \
<> 144:ef7eb2e8f9f7 667 ((__DIVIDER__) == LCD_DIVIDER_20) || \
<> 144:ef7eb2e8f9f7 668 ((__DIVIDER__) == LCD_DIVIDER_21) || \
<> 144:ef7eb2e8f9f7 669 ((__DIVIDER__) == LCD_DIVIDER_22) || \
<> 144:ef7eb2e8f9f7 670 ((__DIVIDER__) == LCD_DIVIDER_23) || \
<> 144:ef7eb2e8f9f7 671 ((__DIVIDER__) == LCD_DIVIDER_24) || \
<> 144:ef7eb2e8f9f7 672 ((__DIVIDER__) == LCD_DIVIDER_25) || \
<> 144:ef7eb2e8f9f7 673 ((__DIVIDER__) == LCD_DIVIDER_26) || \
<> 144:ef7eb2e8f9f7 674 ((__DIVIDER__) == LCD_DIVIDER_27) || \
<> 144:ef7eb2e8f9f7 675 ((__DIVIDER__) == LCD_DIVIDER_28) || \
<> 144:ef7eb2e8f9f7 676 ((__DIVIDER__) == LCD_DIVIDER_29) || \
<> 144:ef7eb2e8f9f7 677 ((__DIVIDER__) == LCD_DIVIDER_30) || \
<> 144:ef7eb2e8f9f7 678 ((__DIVIDER__) == LCD_DIVIDER_31))
<> 144:ef7eb2e8f9f7 679
<> 144:ef7eb2e8f9f7 680 #define IS_LCD_DUTY(__DUTY__) (((__DUTY__) == LCD_DUTY_STATIC) || \
<> 144:ef7eb2e8f9f7 681 ((__DUTY__) == LCD_DUTY_1_2) || \
<> 144:ef7eb2e8f9f7 682 ((__DUTY__) == LCD_DUTY_1_3) || \
<> 144:ef7eb2e8f9f7 683 ((__DUTY__) == LCD_DUTY_1_4) || \
<> 144:ef7eb2e8f9f7 684 ((__DUTY__) == LCD_DUTY_1_8))
<> 144:ef7eb2e8f9f7 685
<> 144:ef7eb2e8f9f7 686 #define IS_LCD_BIAS(__BIAS__) (((__BIAS__) == LCD_BIAS_1_4) || \
<> 144:ef7eb2e8f9f7 687 ((__BIAS__) == LCD_BIAS_1_2) || \
<> 144:ef7eb2e8f9f7 688 ((__BIAS__) == LCD_BIAS_1_3))
<> 144:ef7eb2e8f9f7 689
<> 144:ef7eb2e8f9f7 690 #define IS_LCD_VOLTAGE_SOURCE(SOURCE) (((SOURCE) == LCD_VOLTAGESOURCE_INTERNAL) || \
<> 144:ef7eb2e8f9f7 691 ((SOURCE) == LCD_VOLTAGESOURCE_EXTERNAL))
<> 144:ef7eb2e8f9f7 692
<> 144:ef7eb2e8f9f7 693
<> 144:ef7eb2e8f9f7 694 #define IS_LCD_PULSE_ON_DURATION(__DURATION__) (((__DURATION__) == LCD_PULSEONDURATION_0) || \
<> 144:ef7eb2e8f9f7 695 ((__DURATION__) == LCD_PULSEONDURATION_1) || \
<> 144:ef7eb2e8f9f7 696 ((__DURATION__) == LCD_PULSEONDURATION_2) || \
<> 144:ef7eb2e8f9f7 697 ((__DURATION__) == LCD_PULSEONDURATION_3) || \
<> 144:ef7eb2e8f9f7 698 ((__DURATION__) == LCD_PULSEONDURATION_4) || \
<> 144:ef7eb2e8f9f7 699 ((__DURATION__) == LCD_PULSEONDURATION_5) || \
<> 144:ef7eb2e8f9f7 700 ((__DURATION__) == LCD_PULSEONDURATION_6) || \
<> 144:ef7eb2e8f9f7 701 ((__DURATION__) == LCD_PULSEONDURATION_7))
<> 144:ef7eb2e8f9f7 702
<> 144:ef7eb2e8f9f7 703 #define IS_LCD_DEAD_TIME(__TIME__) (((__TIME__) == LCD_DEADTIME_0) || \
<> 144:ef7eb2e8f9f7 704 ((__TIME__) == LCD_DEADTIME_1) || \
<> 144:ef7eb2e8f9f7 705 ((__TIME__) == LCD_DEADTIME_2) || \
<> 144:ef7eb2e8f9f7 706 ((__TIME__) == LCD_DEADTIME_3) || \
<> 144:ef7eb2e8f9f7 707 ((__TIME__) == LCD_DEADTIME_4) || \
<> 144:ef7eb2e8f9f7 708 ((__TIME__) == LCD_DEADTIME_5) || \
<> 144:ef7eb2e8f9f7 709 ((__TIME__) == LCD_DEADTIME_6) || \
<> 144:ef7eb2e8f9f7 710 ((__TIME__) == LCD_DEADTIME_7))
<> 144:ef7eb2e8f9f7 711
<> 144:ef7eb2e8f9f7 712 #define IS_LCD_BLINK_MODE(__MODE__) (((__MODE__) == LCD_BLINKMODE_OFF) || \
<> 144:ef7eb2e8f9f7 713 ((__MODE__) == LCD_BLINKMODE_SEG0_COM0) || \
<> 144:ef7eb2e8f9f7 714 ((__MODE__) == LCD_BLINKMODE_SEG0_ALLCOM) || \
<> 144:ef7eb2e8f9f7 715 ((__MODE__) == LCD_BLINKMODE_ALLSEG_ALLCOM))
<> 144:ef7eb2e8f9f7 716
<> 144:ef7eb2e8f9f7 717 #define IS_LCD_BLINK_FREQUENCY(__FREQUENCY__) (((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV8) || \
<> 144:ef7eb2e8f9f7 718 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV16) || \
<> 144:ef7eb2e8f9f7 719 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV32) || \
<> 144:ef7eb2e8f9f7 720 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV64) || \
<> 144:ef7eb2e8f9f7 721 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV128) || \
<> 144:ef7eb2e8f9f7 722 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV256) || \
<> 144:ef7eb2e8f9f7 723 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV512) || \
<> 144:ef7eb2e8f9f7 724 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV1024))
<> 144:ef7eb2e8f9f7 725
<> 144:ef7eb2e8f9f7 726 #define IS_LCD_CONTRAST(__CONTRAST__) (((__CONTRAST__) == LCD_CONTRASTLEVEL_0) || \
<> 144:ef7eb2e8f9f7 727 ((__CONTRAST__) == LCD_CONTRASTLEVEL_1) || \
<> 144:ef7eb2e8f9f7 728 ((__CONTRAST__) == LCD_CONTRASTLEVEL_2) || \
<> 144:ef7eb2e8f9f7 729 ((__CONTRAST__) == LCD_CONTRASTLEVEL_3) || \
<> 144:ef7eb2e8f9f7 730 ((__CONTRAST__) == LCD_CONTRASTLEVEL_4) || \
<> 144:ef7eb2e8f9f7 731 ((__CONTRAST__) == LCD_CONTRASTLEVEL_5) || \
<> 144:ef7eb2e8f9f7 732 ((__CONTRAST__) == LCD_CONTRASTLEVEL_6) || \
<> 144:ef7eb2e8f9f7 733 ((__CONTRAST__) == LCD_CONTRASTLEVEL_7))
<> 144:ef7eb2e8f9f7 734
<> 144:ef7eb2e8f9f7 735 #define IS_LCD_RAM_REGISTER(__REGISTER__) (((__REGISTER__) == LCD_RAM_REGISTER0) || \
<> 144:ef7eb2e8f9f7 736 ((__REGISTER__) == LCD_RAM_REGISTER1) || \
<> 144:ef7eb2e8f9f7 737 ((__REGISTER__) == LCD_RAM_REGISTER2) || \
<> 144:ef7eb2e8f9f7 738 ((__REGISTER__) == LCD_RAM_REGISTER3) || \
<> 144:ef7eb2e8f9f7 739 ((__REGISTER__) == LCD_RAM_REGISTER4) || \
<> 144:ef7eb2e8f9f7 740 ((__REGISTER__) == LCD_RAM_REGISTER5) || \
<> 144:ef7eb2e8f9f7 741 ((__REGISTER__) == LCD_RAM_REGISTER6) || \
<> 144:ef7eb2e8f9f7 742 ((__REGISTER__) == LCD_RAM_REGISTER7) || \
<> 144:ef7eb2e8f9f7 743 ((__REGISTER__) == LCD_RAM_REGISTER8) || \
<> 144:ef7eb2e8f9f7 744 ((__REGISTER__) == LCD_RAM_REGISTER9) || \
<> 144:ef7eb2e8f9f7 745 ((__REGISTER__) == LCD_RAM_REGISTER10) || \
<> 144:ef7eb2e8f9f7 746 ((__REGISTER__) == LCD_RAM_REGISTER11) || \
<> 144:ef7eb2e8f9f7 747 ((__REGISTER__) == LCD_RAM_REGISTER12) || \
<> 144:ef7eb2e8f9f7 748 ((__REGISTER__) == LCD_RAM_REGISTER13) || \
<> 144:ef7eb2e8f9f7 749 ((__REGISTER__) == LCD_RAM_REGISTER14) || \
<> 144:ef7eb2e8f9f7 750 ((__REGISTER__) == LCD_RAM_REGISTER15))
<> 144:ef7eb2e8f9f7 751
<> 144:ef7eb2e8f9f7 752 #define IS_LCD_HIGH_DRIVE(__VALUE__) (((__VALUE__) == LCD_HIGHDRIVE_DISABLE) || \
<> 144:ef7eb2e8f9f7 753 ((__VALUE__) == LCD_HIGHDRIVE_ENABLE))
<> 144:ef7eb2e8f9f7 754
<> 144:ef7eb2e8f9f7 755 #define IS_LCD_MUX_SEGMENT(__VALUE__) (((__VALUE__) == LCD_MUXSEGMENT_ENABLE) || \
<> 144:ef7eb2e8f9f7 756 ((__VALUE__) == LCD_MUXSEGMENT_DISABLE))
<> 144:ef7eb2e8f9f7 757
<> 144:ef7eb2e8f9f7 758 /**
<> 144:ef7eb2e8f9f7 759 * @}
<> 144:ef7eb2e8f9f7 760 */
<> 144:ef7eb2e8f9f7 761
<> 144:ef7eb2e8f9f7 762 /* Private functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 763 /** @addtogroup LCD_Private_Functions
<> 144:ef7eb2e8f9f7 764 * @{
<> 144:ef7eb2e8f9f7 765 */
<> 144:ef7eb2e8f9f7 766
<> 144:ef7eb2e8f9f7 767 HAL_StatusTypeDef LCD_WaitForSynchro(LCD_HandleTypeDef *hlcd);
<> 144:ef7eb2e8f9f7 768
<> 144:ef7eb2e8f9f7 769 /**
<> 144:ef7eb2e8f9f7 770 * @}
<> 144:ef7eb2e8f9f7 771 */
<> 144:ef7eb2e8f9f7 772
<> 144:ef7eb2e8f9f7 773 /**
<> 144:ef7eb2e8f9f7 774 * @}
<> 144:ef7eb2e8f9f7 775 */
<> 144:ef7eb2e8f9f7 776
<> 144:ef7eb2e8f9f7 777 /**
<> 144:ef7eb2e8f9f7 778 * @}
<> 144:ef7eb2e8f9f7 779 */
<> 144:ef7eb2e8f9f7 780
<> 144:ef7eb2e8f9f7 781 #endif /* STM32L433xx || STM32L443xx || STM32L476xx || STM32L486xx */
<> 144:ef7eb2e8f9f7 782
<> 144:ef7eb2e8f9f7 783 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 784 }
<> 144:ef7eb2e8f9f7 785 #endif
<> 144:ef7eb2e8f9f7 786
<> 144:ef7eb2e8f9f7 787 #endif /* __STM32L4xx_HAL_LCD_H */
<> 144:ef7eb2e8f9f7 788
<> 144:ef7eb2e8f9f7 789 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/