Kevin Kadooka / mbed-dev

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targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_IAR/MK66FN2M0xxx18.icf@154:37f96f9d4de2, 2017-01-04 (annotated)

Committer:
<>
Date:
Wed Jan 04 16:58:05 2017 +0000
Revision:
154:37f96f9d4de2
This updates the lib to the mbed lib v133

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 154:37f96f9d4de2 1 /*
<> 154:37f96f9d4de2 2 ** ###################################################################
<> 154:37f96f9d4de2 3 ** Processors: MK66FN2M0VLQ18
<> 154:37f96f9d4de2 4 ** MK66FN2M0VMD18
<> 154:37f96f9d4de2 5 **
<> 154:37f96f9d4de2 6 ** Compiler: IAR ANSI C/C++ Compiler for ARM
<> 154:37f96f9d4de2 7 ** Reference manual: K66P144M180SF5RMV2, Rev. 1, Mar 2015
<> 154:37f96f9d4de2 8 ** Version: rev. 3.0, 2015-03-25
<> 154:37f96f9d4de2 9 ** Build: b151009
<> 154:37f96f9d4de2 10 **
<> 154:37f96f9d4de2 11 ** Abstract:
<> 154:37f96f9d4de2 12 ** Linker file for the IAR ANSI C/C++ Compiler for ARM
<> 154:37f96f9d4de2 13 **
<> 154:37f96f9d4de2 14 ** Copyright (c) 2015 Freescale Semiconductor, Inc.
<> 154:37f96f9d4de2 15 ** All rights reserved.
<> 154:37f96f9d4de2 16 **
<> 154:37f96f9d4de2 17 ** Redistribution and use in source and binary forms, with or without modification,
<> 154:37f96f9d4de2 18 ** are permitted provided that the following conditions are met:
<> 154:37f96f9d4de2 19 **
<> 154:37f96f9d4de2 20 ** o Redistributions of source code must retain the above copyright notice, this list
<> 154:37f96f9d4de2 21 ** of conditions and the following disclaimer.
<> 154:37f96f9d4de2 22 **
<> 154:37f96f9d4de2 23 ** o Redistributions in binary form must reproduce the above copyright notice, this
<> 154:37f96f9d4de2 24 ** list of conditions and the following disclaimer in the documentation and/or
<> 154:37f96f9d4de2 25 ** other materials provided with the distribution.
<> 154:37f96f9d4de2 26 **
<> 154:37f96f9d4de2 27 ** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
<> 154:37f96f9d4de2 28 ** contributors may be used to endorse or promote products derived from this
<> 154:37f96f9d4de2 29 ** software without specific prior written permission.
<> 154:37f96f9d4de2 30 **
<> 154:37f96f9d4de2 31 ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
<> 154:37f96f9d4de2 32 ** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
<> 154:37f96f9d4de2 33 ** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 154:37f96f9d4de2 34 ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
<> 154:37f96f9d4de2 35 ** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
<> 154:37f96f9d4de2 36 ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
<> 154:37f96f9d4de2 37 ** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
<> 154:37f96f9d4de2 38 ** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
<> 154:37f96f9d4de2 39 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
<> 154:37f96f9d4de2 40 ** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 154:37f96f9d4de2 41 **
<> 154:37f96f9d4de2 42 ** http: www.freescale.com
<> 154:37f96f9d4de2 43 ** mail: support@freescale.com
<> 154:37f96f9d4de2 44 **
<> 154:37f96f9d4de2 45 ** ###################################################################
<> 154:37f96f9d4de2 46 */
<> 154:37f96f9d4de2 47 define symbol __ram_vector_table__ = 1;
<> 154:37f96f9d4de2 48
<> 154:37f96f9d4de2 49 /* Heap 1/4 of ram and stack 1/8 */
<> 154:37f96f9d4de2 50 define symbol __stack_size__=0x8000;
<> 154:37f96f9d4de2 51 define symbol __heap_size__=0x10000;
<> 154:37f96f9d4de2 52
<> 154:37f96f9d4de2 53 define symbol __ram_vector_table_size__ = isdefinedsymbol(__ram_vector_table__) ? 0x00000400 : 0;
<> 154:37f96f9d4de2 54 define symbol __ram_vector_table_offset__ = isdefinedsymbol(__ram_vector_table__) ? 0x000003FF : 0;
<> 154:37f96f9d4de2 55
<> 154:37f96f9d4de2 56 define symbol m_interrupts_start = 0x00000000;
<> 154:37f96f9d4de2 57 define symbol m_interrupts_end = 0x000003FF;
<> 154:37f96f9d4de2 58
<> 154:37f96f9d4de2 59 define symbol m_flash_config_start = 0x00000400;
<> 154:37f96f9d4de2 60 define symbol m_flash_config_end = 0x0000040F;
<> 154:37f96f9d4de2 61
<> 154:37f96f9d4de2 62 define symbol m_text_start = 0x00000410;
<> 154:37f96f9d4de2 63 define symbol m_text_end = 0x001FFFFF;
<> 154:37f96f9d4de2 64
<> 154:37f96f9d4de2 65 define symbol m_interrupts_ram_start = 0x1FFF0000;
<> 154:37f96f9d4de2 66 define symbol m_interrupts_ram_end = 0x1FFF0000 + __ram_vector_table_offset__;
<> 154:37f96f9d4de2 67
<> 154:37f96f9d4de2 68 define symbol m_data_start = m_interrupts_ram_start + __ram_vector_table_size__;
<> 154:37f96f9d4de2 69 define symbol m_data_end = 0x1FFFFFFF;
<> 154:37f96f9d4de2 70
<> 154:37f96f9d4de2 71 define symbol m_data_2_start = 0x20000000;
<> 154:37f96f9d4de2 72 define symbol m_data_2_end = 0x2002FFFF;
<> 154:37f96f9d4de2 73
<> 154:37f96f9d4de2 74 /* Sizes */
<> 154:37f96f9d4de2 75 if (isdefinedsymbol(__stack_size__)) {
<> 154:37f96f9d4de2 76 define symbol __size_cstack__ = __stack_size__;
<> 154:37f96f9d4de2 77 } else {
<> 154:37f96f9d4de2 78 define symbol __size_cstack__ = 0x0400;
<> 154:37f96f9d4de2 79 }
<> 154:37f96f9d4de2 80
<> 154:37f96f9d4de2 81 if (isdefinedsymbol(__heap_size__)) {
<> 154:37f96f9d4de2 82 define symbol __size_heap__ = __heap_size__;
<> 154:37f96f9d4de2 83 } else {
<> 154:37f96f9d4de2 84 define symbol __size_heap__ = 0x0400;
<> 154:37f96f9d4de2 85 }
<> 154:37f96f9d4de2 86
<> 154:37f96f9d4de2 87 define exported symbol __VECTOR_TABLE = m_interrupts_start;
<> 154:37f96f9d4de2 88 define exported symbol __VECTOR_RAM = isdefinedsymbol(__ram_vector_table__) ? m_interrupts_ram_start : m_interrupts_start;
<> 154:37f96f9d4de2 89 define exported symbol __RAM_VECTOR_TABLE_SIZE = __ram_vector_table_size__;
<> 154:37f96f9d4de2 90
<> 154:37f96f9d4de2 91 define memory mem with size = 4G;
<> 154:37f96f9d4de2 92 define region m_flash_config_region = mem:[from m_flash_config_start to m_flash_config_end];
<> 154:37f96f9d4de2 93 define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end]
<> 154:37f96f9d4de2 94 | mem:[from m_text_start to m_text_end];
<> 154:37f96f9d4de2 95 define region DATA_region = mem:[from m_data_start to m_data_end]
<> 154:37f96f9d4de2 96 | mem:[from m_data_2_start to m_data_2_end-__size_cstack__];
<> 154:37f96f9d4de2 97 define region CSTACK_region = mem:[from m_data_2_end-__size_cstack__+1 to m_data_2_end];
<> 154:37f96f9d4de2 98 define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end];
<> 154:37f96f9d4de2 99
<> 154:37f96f9d4de2 100 define block CSTACK with alignment = 8, size = __size_cstack__ { };
<> 154:37f96f9d4de2 101 define block HEAP with alignment = 8, size = __size_heap__ { };
<> 154:37f96f9d4de2 102 define block RW { readwrite };
<> 154:37f96f9d4de2 103 define block ZI { zi };
<> 154:37f96f9d4de2 104
<> 154:37f96f9d4de2 105 initialize by copy { readwrite, section .textrw };
<> 154:37f96f9d4de2 106 do not initialize { section .noinit };
<> 154:37f96f9d4de2 107
<> 154:37f96f9d4de2 108 place at address mem: m_interrupts_start { readonly section .intvec };
<> 154:37f96f9d4de2 109 place in m_flash_config_region { section FlashConfig };
<> 154:37f96f9d4de2 110 place in TEXT_region { readonly };
<> 154:37f96f9d4de2 111 place in DATA_region { block RW };
<> 154:37f96f9d4de2 112 place in DATA_region { block ZI };
<> 154:37f96f9d4de2 113 place in DATA_region { last block HEAP };
<> 154:37f96f9d4de2 114 place in CSTACK_region { block CSTACK };
<> 154:37f96f9d4de2 115 place in m_interrupts_ram_region { section m_interrupts_ram };
<> 154:37f96f9d4de2 116