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targets/TARGET_ublox/TARGET_HI2110/gpio_irq_api.c@167:356ef919c855, 2017-06-20 (annotated)
- Committer:
- kkado
- Date:
- Tue Jun 20 11:06:37 2017 +0000
- Revision:
- 167:356ef919c855
- Parent:
- 150:02e0a0aed4ec
Build 137 with reduced HSE timeout
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 150:02e0a0aed4ec | 1 | /* mbed Microcontroller Library |
<> | 150:02e0a0aed4ec | 2 | * Copyright (c) 2016 u-blox |
<> | 150:02e0a0aed4ec | 3 | * |
<> | 150:02e0a0aed4ec | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
<> | 150:02e0a0aed4ec | 5 | * you may not use this file except in compliance with the License. |
<> | 150:02e0a0aed4ec | 6 | * You may obtain a copy of the License at |
<> | 150:02e0a0aed4ec | 7 | * |
<> | 150:02e0a0aed4ec | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
<> | 150:02e0a0aed4ec | 9 | * |
<> | 150:02e0a0aed4ec | 10 | * Unless required by applicable law or agreed to in writing, software |
<> | 150:02e0a0aed4ec | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
<> | 150:02e0a0aed4ec | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
<> | 150:02e0a0aed4ec | 13 | * See the License for the specific language governing permissions and |
<> | 150:02e0a0aed4ec | 14 | * limitations under the License. |
<> | 150:02e0a0aed4ec | 15 | */ |
<> | 150:02e0a0aed4ec | 16 | |
<> | 150:02e0a0aed4ec | 17 | /* TODO: this needs testing */ |
<> | 150:02e0a0aed4ec | 18 | |
<> | 150:02e0a0aed4ec | 19 | #include <stddef.h> |
<> | 150:02e0a0aed4ec | 20 | #include "cmsis.h" |
<> | 150:02e0a0aed4ec | 21 | |
<> | 150:02e0a0aed4ec | 22 | #include "gpio_irq_api.h" |
<> | 150:02e0a0aed4ec | 23 | #include "mbed_error.h" |
<> | 150:02e0a0aed4ec | 24 | |
<> | 150:02e0a0aed4ec | 25 | /* ---------------------------------------------------------------- |
<> | 150:02e0a0aed4ec | 26 | * MACROS |
<> | 150:02e0a0aed4ec | 27 | * ----------------------------------------------------------------*/ |
<> | 150:02e0a0aed4ec | 28 | |
<> | 150:02e0a0aed4ec | 29 | /* ---------------------------------------------------------------- |
<> | 150:02e0a0aed4ec | 30 | * TYPES |
<> | 150:02e0a0aed4ec | 31 | * ----------------------------------------------------------------*/ |
<> | 150:02e0a0aed4ec | 32 | |
<> | 150:02e0a0aed4ec | 33 | /* ---------------------------------------------------------------- |
<> | 150:02e0a0aed4ec | 34 | * GLOBAL VARIABLES |
<> | 150:02e0a0aed4ec | 35 | * ----------------------------------------------------------------*/ |
<> | 150:02e0a0aed4ec | 36 | |
<> | 150:02e0a0aed4ec | 37 | /* Each GPIO pin is given an ID, if the ID is 0 the pin can be ignored. */ |
<> | 150:02e0a0aed4ec | 38 | static uint8_t channel_ids[20] = {0}; |
<> | 150:02e0a0aed4ec | 39 | static gpio_irq_handler irq_handler; |
<> | 150:02e0a0aed4ec | 40 | |
<> | 150:02e0a0aed4ec | 41 | static bool initialised = false; |
<> | 150:02e0a0aed4ec | 42 | |
<> | 150:02e0a0aed4ec | 43 | /* ---------------------------------------------------------------- |
<> | 150:02e0a0aed4ec | 44 | * FUNCTION PROTOTYPES |
<> | 150:02e0a0aed4ec | 45 | * ----------------------------------------------------------------*/ |
<> | 150:02e0a0aed4ec | 46 | |
<> | 150:02e0a0aed4ec | 47 | /* ---------------------------------------------------------------- |
<> | 150:02e0a0aed4ec | 48 | * NON-API FUNCTIONS |
<> | 150:02e0a0aed4ec | 49 | * ----------------------------------------------------------------*/ |
<> | 150:02e0a0aed4ec | 50 | |
<> | 150:02e0a0aed4ec | 51 | void IRQ5_GPIO_Handler() |
<> | 150:02e0a0aed4ec | 52 | { |
<> | 150:02e0a0aed4ec | 53 | if (initialised) { |
<> | 150:02e0a0aed4ec | 54 | for (uint8_t i = 0; i < sizeof (channel_ids) / sizeof (channel_ids[0]); i++) { |
<> | 150:02e0a0aed4ec | 55 | uint8_t id = channel_ids[i]; |
<> | 150:02e0a0aed4ec | 56 | uint32_t mask = 1 << id; |
<> | 150:02e0a0aed4ec | 57 | |
<> | 150:02e0a0aed4ec | 58 | if (id != 0) { |
<> | 150:02e0a0aed4ec | 59 | if (GPIO_IRQ | mask) { |
<> | 150:02e0a0aed4ec | 60 | if (GPIO_INT_RISE | mask) { |
<> | 150:02e0a0aed4ec | 61 | irq_handler(id, IRQ_RISE); |
<> | 150:02e0a0aed4ec | 62 | } else if (GPIO_INT_FALL | mask) { |
<> | 150:02e0a0aed4ec | 63 | irq_handler(id, IRQ_FALL); |
<> | 150:02e0a0aed4ec | 64 | } |
<> | 150:02e0a0aed4ec | 65 | } |
<> | 150:02e0a0aed4ec | 66 | } |
<> | 150:02e0a0aed4ec | 67 | } |
<> | 150:02e0a0aed4ec | 68 | } |
<> | 150:02e0a0aed4ec | 69 | |
<> | 150:02e0a0aed4ec | 70 | /* Clear all the interrupt bits (rather than wasting time on |
<> | 150:02e0a0aed4ec | 71 | * each individual one), or we might get stuck if a spurious |
<> | 150:02e0a0aed4ec | 72 | * one should arrive. */ |
<> | 150:02e0a0aed4ec | 73 | GPIO_INT_CLR = 0xFFFFFFFF; |
<> | 150:02e0a0aed4ec | 74 | } |
<> | 150:02e0a0aed4ec | 75 | |
<> | 150:02e0a0aed4ec | 76 | /* ---------------------------------------------------------------- |
<> | 150:02e0a0aed4ec | 77 | * MBED API CALLS |
<> | 150:02e0a0aed4ec | 78 | * ----------------------------------------------------------------*/ |
<> | 150:02e0a0aed4ec | 79 | |
<> | 150:02e0a0aed4ec | 80 | int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) |
<> | 150:02e0a0aed4ec | 81 | { |
<> | 150:02e0a0aed4ec | 82 | bool return_value = -1; |
<> | 150:02e0a0aed4ec | 83 | |
<> | 150:02e0a0aed4ec | 84 | if (initialised) { |
<> | 150:02e0a0aed4ec | 85 | return_value = 0; |
<> | 150:02e0a0aed4ec | 86 | } else { |
<> | 150:02e0a0aed4ec | 87 | if (pin != NC) { |
<> | 150:02e0a0aed4ec | 88 | MBED_ASSERT (pin < NUM_PINS); |
<> | 150:02e0a0aed4ec | 89 | |
<> | 150:02e0a0aed4ec | 90 | irq_handler = handler; |
<> | 150:02e0a0aed4ec | 91 | obj->ch = pin; |
<> | 150:02e0a0aed4ec | 92 | channel_ids[pin] = id; |
<> | 150:02e0a0aed4ec | 93 | |
<> | 150:02e0a0aed4ec | 94 | uint32_t mask = 1 << obj->ch; |
<> | 150:02e0a0aed4ec | 95 | |
<> | 150:02e0a0aed4ec | 96 | /* Remove any existing setting */ |
<> | 150:02e0a0aed4ec | 97 | GPIO_INT_RISE_BITCLR &= ~mask; |
<> | 150:02e0a0aed4ec | 98 | GPIO_INT_FALL_BITCLR &= ~mask; |
<> | 150:02e0a0aed4ec | 99 | GPIO_INT_LOW_BITCLR &= ~mask; |
<> | 150:02e0a0aed4ec | 100 | GPIO_INT_HIGH_BITCLR &= ~mask; |
<> | 150:02e0a0aed4ec | 101 | |
<> | 150:02e0a0aed4ec | 102 | initialised = true; |
<> | 150:02e0a0aed4ec | 103 | NVIC_EnableIRQ (GPIO_IRQn); |
<> | 150:02e0a0aed4ec | 104 | |
<> | 150:02e0a0aed4ec | 105 | return_value = 0; |
<> | 150:02e0a0aed4ec | 106 | } |
<> | 150:02e0a0aed4ec | 107 | } |
<> | 150:02e0a0aed4ec | 108 | |
<> | 150:02e0a0aed4ec | 109 | return return_value; |
<> | 150:02e0a0aed4ec | 110 | } |
<> | 150:02e0a0aed4ec | 111 | |
<> | 150:02e0a0aed4ec | 112 | void gpio_irq_free(gpio_irq_t *obj) |
<> | 150:02e0a0aed4ec | 113 | { |
<> | 150:02e0a0aed4ec | 114 | channel_ids[obj->ch] = 0; |
<> | 150:02e0a0aed4ec | 115 | } |
<> | 150:02e0a0aed4ec | 116 | |
<> | 150:02e0a0aed4ec | 117 | void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) |
<> | 150:02e0a0aed4ec | 118 | { |
<> | 150:02e0a0aed4ec | 119 | uint32_t mask = 1 << obj->ch; |
<> | 150:02e0a0aed4ec | 120 | |
<> | 150:02e0a0aed4ec | 121 | if (enable) { |
<> | 150:02e0a0aed4ec | 122 | if (event == IRQ_RISE) { |
<> | 150:02e0a0aed4ec | 123 | GPIO_INT_RISE_BITSET |= mask; |
<> | 150:02e0a0aed4ec | 124 | } else if (event == IRQ_FALL) { |
<> | 150:02e0a0aed4ec | 125 | GPIO_INT_FALL_BITSET |= mask; |
<> | 150:02e0a0aed4ec | 126 | } |
<> | 150:02e0a0aed4ec | 127 | } |
<> | 150:02e0a0aed4ec | 128 | else |
<> | 150:02e0a0aed4ec | 129 | { |
<> | 150:02e0a0aed4ec | 130 | if (event == IRQ_RISE) { |
<> | 150:02e0a0aed4ec | 131 | GPIO_INT_RISE_BITSET &= ~mask; |
<> | 150:02e0a0aed4ec | 132 | } else if (event == IRQ_FALL) { |
<> | 150:02e0a0aed4ec | 133 | GPIO_INT_FALL_BITSET &= ~mask; |
<> | 150:02e0a0aed4ec | 134 | } |
<> | 150:02e0a0aed4ec | 135 | } |
<> | 150:02e0a0aed4ec | 136 | } |
<> | 150:02e0a0aed4ec | 137 | |
<> | 150:02e0a0aed4ec | 138 | void gpio_irq_enable(gpio_irq_t *obj) |
<> | 150:02e0a0aed4ec | 139 | { |
<> | 150:02e0a0aed4ec | 140 | (void) obj; |
<> | 150:02e0a0aed4ec | 141 | NVIC_EnableIRQ (GPIO_IRQn); |
<> | 150:02e0a0aed4ec | 142 | } |
<> | 150:02e0a0aed4ec | 143 | |
<> | 150:02e0a0aed4ec | 144 | void gpio_irq_disable(gpio_irq_t *obj) |
<> | 150:02e0a0aed4ec | 145 | { |
<> | 150:02e0a0aed4ec | 146 | (void) obj; |
<> | 150:02e0a0aed4ec | 147 | NVIC_DisableIRQ (GPIO_IRQn); |
<> | 150:02e0a0aed4ec | 148 | } |