karthick B / GR-PEACH_video

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Fork of GR-PEACH_video by Renesas

drivers/vdec/src/r_vdec_check_parameter.c@4:aeefe5171463, 2016-06-30 (annotated)

Committer:
dkato
Date:
Thu Jun 30 11:00:37 2016 +0000
Revision:
4:aeefe5171463
Parent:
0:853f5b7408a7 
Add ARGB4444 to graphics layer read format.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dkato 0:853f5b7408a7 1 /*******************************************************************************
dkato 0:853f5b7408a7 2 * DISCLAIMER
dkato 0:853f5b7408a7 3 * This software is supplied by Renesas Electronics Corporation and is only
dkato 0:853f5b7408a7 4 * intended for use with Renesas products. No other uses are authorized. This
dkato 0:853f5b7408a7 5 * software is owned by Renesas Electronics Corporation and is protected under
dkato 0:853f5b7408a7 6 * all applicable laws, including copyright laws.
dkato 0:853f5b7408a7 7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
dkato 0:853f5b7408a7 8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
dkato 0:853f5b7408a7 9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
dkato 0:853f5b7408a7 10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
dkato 0:853f5b7408a7 11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
dkato 0:853f5b7408a7 12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
dkato 0:853f5b7408a7 13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
dkato 0:853f5b7408a7 14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
dkato 0:853f5b7408a7 15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
dkato 0:853f5b7408a7 16 * Renesas reserves the right, without notice, to make changes to this software
dkato 0:853f5b7408a7 17 * and to discontinue the availability of this software. By using this software,
dkato 0:853f5b7408a7 18 * you agree to the additional terms and conditions found by accessing the
dkato 0:853f5b7408a7 19 * following link:
dkato 0:853f5b7408a7 20 * http://www.renesas.com/disclaimer
dkato 0:853f5b7408a7 21 * Copyright (C) 2012 - 2015 Renesas Electronics Corporation. All rights reserved.
dkato 0:853f5b7408a7 22 *******************************************************************************/
dkato 0:853f5b7408a7 23 /**************************************************************************//**
dkato 0:853f5b7408a7 24 * @file r_vdec_check_parameter.c
dkato 0:853f5b7408a7 25 * @version 1.00
dkato 0:853f5b7408a7 26 * $Rev: 199 $
dkato 0:853f5b7408a7 27 * $Date:: 2014-05-23 16:33:52 +0900#$
dkato 0:853f5b7408a7 28 * @brief VDEC driver parameter check processing
dkato 0:853f5b7408a7 29 ******************************************************************************/
dkato 0:853f5b7408a7 30
dkato 0:853f5b7408a7 31 /******************************************************************************
dkato 0:853f5b7408a7 32 Includes <System Includes> , "Project Includes"
dkato 0:853f5b7408a7 33 ******************************************************************************/
dkato 0:853f5b7408a7 34 #include "r_vdec.h"
dkato 0:853f5b7408a7 35 #include "r_vdec_user.h"
dkato 0:853f5b7408a7 36 #include "r_vdec_check_parameter.h"
dkato 0:853f5b7408a7 37
dkato 0:853f5b7408a7 38
dkato 0:853f5b7408a7 39 #ifdef R_VDEC_CHECK_PARAMETERS
dkato 0:853f5b7408a7 40 /******************************************************************************
dkato 0:853f5b7408a7 41 Macro definitions
dkato 0:853f5b7408a7 42 ******************************************************************************/
dkato 0:853f5b7408a7 43 /* Valid bit range */
dkato 0:853f5b7408a7 44 #define VDEC_CPARA_RANGE_0X00000001 (0x00000001u)
dkato 0:853f5b7408a7 45 #define VDEC_CPARA_RANGE_0X00000003 (0x00000003u)
dkato 0:853f5b7408a7 46 #define VDEC_CPARA_RANGE_0X00000007 (0x00000007u)
dkato 0:853f5b7408a7 47 #define VDEC_CPARA_RANGE_0X0000000F (0x0000000Fu)
dkato 0:853f5b7408a7 48 #define VDEC_CPARA_RANGE_0X0000001F (0x0000001Fu)
dkato 0:853f5b7408a7 49 #define VDEC_CPARA_RANGE_0X0000003F (0x0000003Fu)
dkato 0:853f5b7408a7 50 #define VDEC_CPARA_RANGE_0X0000007F (0x0000007Fu)
dkato 0:853f5b7408a7 51 #define VDEC_CPARA_RANGE_0X000000FF (0x000000FFu)
dkato 0:853f5b7408a7 52 #define VDEC_CPARA_RANGE_0X000001FF (0x000001FFu)
dkato 0:853f5b7408a7 53 #define VDEC_CPARA_RANGE_0X000003FF (0x000003FFu)
dkato 0:853f5b7408a7 54 #define VDEC_CPARA_RANGE_0X000007FF (0x000007FFu)
dkato 0:853f5b7408a7 55 #define VDEC_CPARA_RANGE_0X00001FFF (0x00001FFFu)
dkato 0:853f5b7408a7 56
dkato 0:853f5b7408a7 57 /******************************************************************************
dkato 0:853f5b7408a7 58 Typedef definitions
dkato 0:853f5b7408a7 59 ******************************************************************************/
dkato 0:853f5b7408a7 60
dkato 0:853f5b7408a7 61 /******************************************************************************
dkato 0:853f5b7408a7 62 Private global variables and functions
dkato 0:853f5b7408a7 63 ******************************************************************************/
dkato 0:853f5b7408a7 64 static vdec_error_t NoiseReductionLPFCheckParam(const vdec_noise_rd_lpf_t * const p_noise_rd_lpf);
dkato 0:853f5b7408a7 65 static vdec_error_t SyncSlicerCheckParam(const vdec_sync_slicer_t * const p_sync_slicer);
dkato 0:853f5b7408a7 66 static vdec_error_t HorizontalAFCCheckParam(const vdec_horizontal_afc_t * const p_horizontal_afc);
dkato 0:853f5b7408a7 67 static vdec_error_t VerticalCountdownCheckParam(const vdec_vcount_down_t * const p_vcount_down);
dkato 0:853f5b7408a7 68 static vdec_error_t AgcPgaCheckParam(const vdec_agc_t * const p_agc);
dkato 0:853f5b7408a7 69 static vdec_error_t PeakLimiterControlCheckParam(const vdec_peak_limiter_t * const p_peak_limiter);
dkato 0:853f5b7408a7 70 static vdec_error_t OverRangeControlCheckParam(const vdec_over_range_t * const p_over_range);
dkato 0:853f5b7408a7 71 static vdec_error_t YcSeparationControlCheckParam(const vdec_yc_sep_ctrl_t * const p_yc_sep_ctrl);
dkato 0:853f5b7408a7 72 static vdec_error_t FilterTAPsCoefficientCheckParam(const vdec_chrfil_tap_t * const fil2_2d);
dkato 0:853f5b7408a7 73 static vdec_error_t ChromaDecodingControlCheckParam(const vdec_chrmdec_ctrl_t * const p_chrmdec_ctrl);
dkato 0:853f5b7408a7 74 static vdec_error_t BurstLockCheckParam(const vdec_burst_lock_t * const p_burst_lock);
dkato 0:853f5b7408a7 75 static vdec_error_t AccColorKillerCheckParam(const vdec_acc_t * const p_acc);
dkato 0:853f5b7408a7 76
dkato 0:853f5b7408a7 77
dkato 0:853f5b7408a7 78 /**************************************************************************//**
dkato 0:853f5b7408a7 79 * @brief Checks on input pin control
dkato 0:853f5b7408a7 80 * @param[in] vinsel : Input pin control
dkato 0:853f5b7408a7 81 * @retval Error code
dkato 0:853f5b7408a7 82 *****************************************************************************/
dkato 0:853f5b7408a7 83 vdec_error_t VDEC_InitializeCheckParam (const vdec_adc_vinsel_t vinsel)
dkato 0:853f5b7408a7 84 {
dkato 0:853f5b7408a7 85 vdec_error_t vdec_error;
dkato 0:853f5b7408a7 86
dkato 0:853f5b7408a7 87 vdec_error = VDEC_OK;
dkato 0:853f5b7408a7 88
dkato 0:853f5b7408a7 89 if ((vinsel != VDEC_ADC_VINSEL_VIN1) && (vinsel != VDEC_ADC_VINSEL_VIN2)) {
dkato 0:853f5b7408a7 90 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 91 goto END;
dkato 0:853f5b7408a7 92 }
dkato 0:853f5b7408a7 93 END:
dkato 0:853f5b7408a7 94 return vdec_error;
dkato 0:853f5b7408a7 95 } /* End of function VDEC_InitializeCheckParam() */
dkato 0:853f5b7408a7 96
dkato 0:853f5b7408a7 97 /**************************************************************************//**
dkato 0:853f5b7408a7 98 * @brief Checks on active image period parameter
dkato 0:853f5b7408a7 99 * @param[in] param : Active image period parameter
dkato 0:853f5b7408a7 100 * @retval Error code
dkato 0:853f5b7408a7 101 *****************************************************************************/
dkato 0:853f5b7408a7 102 vdec_error_t VDEC_ActivePeriodCheckParam (const vdec_active_period_t * const param)
dkato 0:853f5b7408a7 103 {
dkato 0:853f5b7408a7 104 vdec_error_t vdec_error;
dkato 0:853f5b7408a7 105
dkato 0:853f5b7408a7 106 vdec_error = VDEC_OK;
dkato 0:853f5b7408a7 107
dkato 0:853f5b7408a7 108 if (param == NULL) {
dkato 0:853f5b7408a7 109 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 110 goto END;
dkato 0:853f5b7408a7 111 }
dkato 0:853f5b7408a7 112 /* Left end of input video signal capturing area */
dkato 0:853f5b7408a7 113 if (((uint32_t)param->srcleft & (uint32_t)(~VDEC_CPARA_RANGE_0X000001FF)) != 0u) {
dkato 0:853f5b7408a7 114 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 115 goto END;
dkato 0:853f5b7408a7 116 }
dkato 0:853f5b7408a7 117 /* Top end of input video signal capturing area */
dkato 0:853f5b7408a7 118 if (((uint32_t)param->srctop & (uint32_t)(~VDEC_CPARA_RANGE_0X0000003F)) != 0u) {
dkato 0:853f5b7408a7 119 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 120 goto END;
dkato 0:853f5b7408a7 121 }
dkato 0:853f5b7408a7 122 /* Height of input video signal capturing area */
dkato 0:853f5b7408a7 123 if (((uint32_t)param->srcheight & (uint32_t)(~VDEC_CPARA_RANGE_0X000003FF)) != 0u) {
dkato 0:853f5b7408a7 124 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 125 goto END;
dkato 0:853f5b7408a7 126 }
dkato 0:853f5b7408a7 127 /* Width of input video signal capturing area */
dkato 0:853f5b7408a7 128 if (((uint32_t)param->srcwidth & (uint32_t)(~VDEC_CPARA_RANGE_0X000007FF)) != 0u) {
dkato 0:853f5b7408a7 129 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 130 goto END;
dkato 0:853f5b7408a7 131 }
dkato 0:853f5b7408a7 132 END:
dkato 0:853f5b7408a7 133 return vdec_error;
dkato 0:853f5b7408a7 134 } /* End of function VDEC_ActivePeriodCheckParam() */
dkato 0:853f5b7408a7 135
dkato 0:853f5b7408a7 136 /**************************************************************************//**
dkato 0:853f5b7408a7 137 * @brief Checks on sync separation parameter
dkato 0:853f5b7408a7 138 * @param[in] param : Sync separation parameter
dkato 0:853f5b7408a7 139 * @retval Error code
dkato 0:853f5b7408a7 140 *****************************************************************************/
dkato 0:853f5b7408a7 141 vdec_error_t VDEC_SyncSeparationCheckParam (const vdec_sync_separation_t * const param)
dkato 0:853f5b7408a7 142 {
dkato 0:853f5b7408a7 143 vdec_error_t vdec_error;
dkato 0:853f5b7408a7 144
dkato 0:853f5b7408a7 145 vdec_error = VDEC_OK;
dkato 0:853f5b7408a7 146
dkato 0:853f5b7408a7 147 if (param == NULL) {
dkato 0:853f5b7408a7 148 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 149 goto END;
dkato 0:853f5b7408a7 150 }
dkato 0:853f5b7408a7 151 /* Noise reduction LPF */
dkato 0:853f5b7408a7 152 vdec_error = NoiseReductionLPFCheckParam(param->noise_rd_lpf);
dkato 0:853f5b7408a7 153 if (vdec_error != VDEC_OK) {
dkato 0:853f5b7408a7 154 goto END;
dkato 0:853f5b7408a7 155 }
dkato 0:853f5b7408a7 156 /* Sync slicer */
dkato 0:853f5b7408a7 157 vdec_error = SyncSlicerCheckParam(param->sync_slicer);
dkato 0:853f5b7408a7 158 if (vdec_error != VDEC_OK) {
dkato 0:853f5b7408a7 159 goto END;
dkato 0:853f5b7408a7 160 }
dkato 0:853f5b7408a7 161 /* Horizontal AFC */
dkato 0:853f5b7408a7 162 vdec_error = HorizontalAFCCheckParam(param->horizontal_afc);
dkato 0:853f5b7408a7 163 if (vdec_error != VDEC_OK) {
dkato 0:853f5b7408a7 164 goto END;
dkato 0:853f5b7408a7 165 }
dkato 0:853f5b7408a7 166 /* Vertical countdown */
dkato 0:853f5b7408a7 167 vdec_error = VerticalCountdownCheckParam(param->vcount_down);
dkato 0:853f5b7408a7 168 if (vdec_error != VDEC_OK) {
dkato 0:853f5b7408a7 169 goto END;
dkato 0:853f5b7408a7 170 }
dkato 0:853f5b7408a7 171 /* AGC / PGA */
dkato 0:853f5b7408a7 172 vdec_error = AgcPgaCheckParam(param->agc);
dkato 0:853f5b7408a7 173 if (vdec_error != VDEC_OK) {
dkato 0:853f5b7408a7 174 goto END;
dkato 0:853f5b7408a7 175 }
dkato 0:853f5b7408a7 176 /* Peak limiter control */
dkato 0:853f5b7408a7 177 vdec_error = PeakLimiterControlCheckParam(param->peak_limiter);
dkato 0:853f5b7408a7 178 if (vdec_error != VDEC_OK) {
dkato 0:853f5b7408a7 179 goto END;
dkato 0:853f5b7408a7 180 }
dkato 0:853f5b7408a7 181 END:
dkato 0:853f5b7408a7 182 return vdec_error;
dkato 0:853f5b7408a7 183 } /* End of function VDEC_SyncSeparationCheckParam() */
dkato 0:853f5b7408a7 184
dkato 0:853f5b7408a7 185 /**************************************************************************//**
dkato 0:853f5b7408a7 186 * @brief Checks on Y/C separation parameter
dkato 0:853f5b7408a7 187 * @param[in] param : Y/C separation parameter
dkato 0:853f5b7408a7 188 * @retval Error code
dkato 0:853f5b7408a7 189 *****************************************************************************/
dkato 0:853f5b7408a7 190 vdec_error_t VDEC_YcSeparationCheckParam (const vdec_yc_separation_t * const param)
dkato 0:853f5b7408a7 191 {
dkato 0:853f5b7408a7 192 vdec_error_t vdec_error;
dkato 0:853f5b7408a7 193
dkato 0:853f5b7408a7 194 vdec_error = VDEC_OK;
dkato 0:853f5b7408a7 195
dkato 0:853f5b7408a7 196 if (param == NULL) {
dkato 0:853f5b7408a7 197 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 198 goto END;
dkato 0:853f5b7408a7 199 }
dkato 0:853f5b7408a7 200 /* Over-range control */
dkato 0:853f5b7408a7 201 vdec_error = OverRangeControlCheckParam(param->over_range);
dkato 0:853f5b7408a7 202 if (vdec_error != VDEC_OK) {
dkato 0:853f5b7408a7 203 goto END;
dkato 0:853f5b7408a7 204 }
dkato 0:853f5b7408a7 205 /* Y/C separation control */
dkato 0:853f5b7408a7 206 vdec_error = YcSeparationControlCheckParam(param->yc_sep_ctrl);
dkato 0:853f5b7408a7 207 if (vdec_error != VDEC_OK) {
dkato 0:853f5b7408a7 208 goto END;
dkato 0:853f5b7408a7 209 }
dkato 0:853f5b7408a7 210 /* Two-dimensional cascade broadband (3.58/4.43/SECAM-DR)/TAKE-OFF filter TAP coefficient */
dkato 0:853f5b7408a7 211 vdec_error = FilterTAPsCoefficientCheckParam(param->fil2_2d_wa);
dkato 0:853f5b7408a7 212 if (vdec_error != VDEC_OK) {
dkato 0:853f5b7408a7 213 goto END;
dkato 0:853f5b7408a7 214 }
dkato 0:853f5b7408a7 215 /* Two-dimensional cascade broadband (SECAM-DB) filter TAP coefficient */
dkato 0:853f5b7408a7 216 vdec_error = FilterTAPsCoefficientCheckParam(param->fil2_2d_wb);
dkato 0:853f5b7408a7 217 if (vdec_error != VDEC_OK) {
dkato 0:853f5b7408a7 218 goto END;
dkato 0:853f5b7408a7 219 }
dkato 0:853f5b7408a7 220 /* Two-dimensional cascade narrowband (3.58/4.43/SECAM-DR) filter TAP coefficient */
dkato 0:853f5b7408a7 221 vdec_error = FilterTAPsCoefficientCheckParam(param->fil2_2d_na);
dkato 0:853f5b7408a7 222 if (vdec_error != VDEC_OK) {
dkato 0:853f5b7408a7 223 goto END;
dkato 0:853f5b7408a7 224 }
dkato 0:853f5b7408a7 225 /* Two-dimensional cascade narrowband (SECAMDB) filter TAP coefficient */
dkato 0:853f5b7408a7 226 vdec_error = FilterTAPsCoefficientCheckParam(param->fil2_2d_nb);
dkato 0:853f5b7408a7 227 if (vdec_error != VDEC_OK) {
dkato 0:853f5b7408a7 228 goto END;
dkato 0:853f5b7408a7 229 }
dkato 0:853f5b7408a7 230 END:
dkato 0:853f5b7408a7 231 return vdec_error;
dkato 0:853f5b7408a7 232 } /* End of function VDEC_YcSeparationCheckParam() */
dkato 0:853f5b7408a7 233
dkato 0:853f5b7408a7 234 /**************************************************************************//**
dkato 0:853f5b7408a7 235 * @brief Checks on chroma decoding parameter
dkato 0:853f5b7408a7 236 * @param[in] param : Chroma decoding parameter
dkato 0:853f5b7408a7 237 * @retval Error code
dkato 0:853f5b7408a7 238 *****************************************************************************/
dkato 0:853f5b7408a7 239 vdec_error_t VDEC_ChromaDecodingCheckParam (const vdec_chroma_decoding_t * const param)
dkato 0:853f5b7408a7 240 {
dkato 0:853f5b7408a7 241 vdec_tint_ry_t * p_tint_ry;
dkato 0:853f5b7408a7 242 vdec_error_t vdec_error;
dkato 0:853f5b7408a7 243
dkato 0:853f5b7408a7 244 vdec_error = VDEC_OK;
dkato 0:853f5b7408a7 245
dkato 0:853f5b7408a7 246 if (param == NULL) {
dkato 0:853f5b7408a7 247 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 248 goto END;
dkato 0:853f5b7408a7 249 }
dkato 0:853f5b7408a7 250 /* Chroma decoding control */
dkato 0:853f5b7408a7 251 vdec_error = ChromaDecodingControlCheckParam(param->chrmdec_ctrl);
dkato 0:853f5b7408a7 252 if (vdec_error != VDEC_OK) {
dkato 0:853f5b7408a7 253 goto END;
dkato 0:853f5b7408a7 254 }
dkato 0:853f5b7408a7 255 /* Burst lock */
dkato 0:853f5b7408a7 256 vdec_error = BurstLockCheckParam(param->burst_lock);
dkato 0:853f5b7408a7 257 if (vdec_error != VDEC_OK) {
dkato 0:853f5b7408a7 258 goto END;
dkato 0:853f5b7408a7 259 }
dkato 0:853f5b7408a7 260 /* ACC/color killer */
dkato 0:853f5b7408a7 261 vdec_error = AccColorKillerCheckParam(param->acc);
dkato 0:853f5b7408a7 262 if (vdec_error != VDEC_OK) {
dkato 0:853f5b7408a7 263 goto END;
dkato 0:853f5b7408a7 264 }
dkato 0:853f5b7408a7 265 /* TINT/R-Y axis correction (only valid for NTSC/PAL) */
dkato 0:853f5b7408a7 266 p_tint_ry = param->tint_ry;
dkato 0:853f5b7408a7 267 if (p_tint_ry != NULL) {
dkato 0:853f5b7408a7 268 /* Fine adjustment of R-Y demodulation axis and hue adjustment level */
dkato 0:853f5b7408a7 269 if ((((uint32_t)p_tint_ry->tintsub & (uint32_t)(~VDEC_CPARA_RANGE_0X0000003F)) != 0u) ||
dkato 0:853f5b7408a7 270 (((uint32_t)p_tint_ry->tintmain & (uint32_t)(~VDEC_CPARA_RANGE_0X000003FF)) != 0u)) {
dkato 0:853f5b7408a7 271 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 272 goto END;
dkato 0:853f5b7408a7 273 }
dkato 0:853f5b7408a7 274 }
dkato 0:853f5b7408a7 275 END:
dkato 0:853f5b7408a7 276 return vdec_error;
dkato 0:853f5b7408a7 277 } /* End of function VDEC_ChromaDecodingCheckParam() */
dkato 0:853f5b7408a7 278
dkato 0:853f5b7408a7 279 /**************************************************************************//**
dkato 0:853f5b7408a7 280 * @brief Checks on digital clamp parameter
dkato 0:853f5b7408a7 281 * @param[in] param : Digital clamp parameter
dkato 0:853f5b7408a7 282 * @retval Error code
dkato 0:853f5b7408a7 283 *****************************************************************************/
dkato 0:853f5b7408a7 284 vdec_error_t VDEC_DigitalClampCheckParam (const vdec_degital_clamp_t * const param)
dkato 0:853f5b7408a7 285 {
dkato 0:853f5b7408a7 286 vdec_pedestal_clamp_t * p_pedestal_clamp;
dkato 0:853f5b7408a7 287 vdec_center_clamp_t * p_center_clamp;
dkato 0:853f5b7408a7 288 vdec_noise_det_t * p_noise_det;
dkato 0:853f5b7408a7 289 vdec_error_t vdec_error;
dkato 0:853f5b7408a7 290
dkato 0:853f5b7408a7 291 vdec_error = VDEC_OK;
dkato 0:853f5b7408a7 292
dkato 0:853f5b7408a7 293 if (param == NULL) {
dkato 0:853f5b7408a7 294 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 295 goto END;
dkato 0:853f5b7408a7 296 }
dkato 0:853f5b7408a7 297 /* Digital clamp response speed */
dkato 0:853f5b7408a7 298 if (((uint32_t)param->dcpresponse & (uint32_t)(~VDEC_CPARA_RANGE_0X00000007)) != 0u) {
dkato 0:853f5b7408a7 299 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 300 goto END;
dkato 0:853f5b7408a7 301 }
dkato 0:853f5b7408a7 302 /* Digital clamp start line (in 1-line units) */
dkato 0:853f5b7408a7 303 if (((uint32_t)param->dcpstart & (uint32_t)(~VDEC_CPARA_RANGE_0X0000003F)) != 0u) {
dkato 0:853f5b7408a7 304 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 305 goto END;
dkato 0:853f5b7408a7 306 }
dkato 0:853f5b7408a7 307 /* Digital clamp end line (in 1-line units) */
dkato 0:853f5b7408a7 308 if (((uint32_t)param->dcpend & (uint32_t)(~VDEC_CPARA_RANGE_0X0000003F)) != 0u) {
dkato 0:853f5b7408a7 309 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 310 goto END;
dkato 0:853f5b7408a7 311 }
dkato 0:853f5b7408a7 312 /* Digital clamp pulse width */
dkato 0:853f5b7408a7 313 if (((uint32_t)param->dcpwidth & (uint32_t)(~VDEC_CPARA_RANGE_0X0000007F)) != 0u) {
dkato 0:853f5b7408a7 314 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 315 goto END;
dkato 0:853f5b7408a7 316 }
dkato 0:853f5b7408a7 317
dkato 0:853f5b7408a7 318 /* Pedestal clamp */
dkato 0:853f5b7408a7 319 p_pedestal_clamp = param->pedestal_clamp;
dkato 0:853f5b7408a7 320 if (p_pedestal_clamp != NULL) {
dkato 0:853f5b7408a7 321 /* Clamp offset level (Y signal) */
dkato 0:853f5b7408a7 322 if (((uint32_t)p_pedestal_clamp->blanklevel_y & (uint32_t)(~VDEC_CPARA_RANGE_0X000003FF)) != 0u) {
dkato 0:853f5b7408a7 323 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 324 goto END;
dkato 0:853f5b7408a7 325 }
dkato 0:853f5b7408a7 326 /* Digital clamp pulse horizontal start position (Y signal) */
dkato 0:853f5b7408a7 327 if (((uint32_t)p_pedestal_clamp->dcppos_y & (uint32_t)(~VDEC_CPARA_RANGE_0X000000FF)) != 0u) {
dkato 0:853f5b7408a7 328 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 329 goto END;
dkato 0:853f5b7408a7 330 }
dkato 0:853f5b7408a7 331 }
dkato 0:853f5b7408a7 332 /* Center clamp */
dkato 0:853f5b7408a7 333 p_center_clamp = param->center_clamp;
dkato 0:853f5b7408a7 334 if (p_center_clamp != NULL) {
dkato 0:853f5b7408a7 335 /* Clamp offset level (Cb signal) */
dkato 0:853f5b7408a7 336 if (((uint32_t)p_center_clamp->blanklevel_cb & (uint32_t)(~VDEC_CPARA_RANGE_0X0000003F)) != 0u) {
dkato 0:853f5b7408a7 337 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 338 goto END;
dkato 0:853f5b7408a7 339 }
dkato 0:853f5b7408a7 340 /* Clamp offset level (Cr signal) */
dkato 0:853f5b7408a7 341 if (((uint32_t)p_center_clamp->blanklevel_cr & (uint32_t)(~VDEC_CPARA_RANGE_0X0000003F)) != 0u) {
dkato 0:853f5b7408a7 342 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 343 goto END;
dkato 0:853f5b7408a7 344 }
dkato 0:853f5b7408a7 345 /* Digital clamp pulse horizontal start position (Cb/Cr signal) */
dkato 0:853f5b7408a7 346 if (((uint32_t)p_center_clamp->dcppos_c & (uint32_t)(~VDEC_CPARA_RANGE_0X000000FF)) != 0u) {
dkato 0:853f5b7408a7 347 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 348 goto END;
dkato 0:853f5b7408a7 349 }
dkato 0:853f5b7408a7 350 }
dkato 0:853f5b7408a7 351 /* Noise detection */
dkato 0:853f5b7408a7 352 p_noise_det = param->noise_det;
dkato 0:853f5b7408a7 353 if (p_noise_det != NULL) {
dkato 0:853f5b7408a7 354 /* Video signal for autocorrelation function */
dkato 0:853f5b7408a7 355 if (p_noise_det->acfinput >= VDEC_ACFINPUT_NUM) {
dkato 0:853f5b7408a7 356 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 357 goto END;
dkato 0:853f5b7408a7 358 }
dkato 0:853f5b7408a7 359 /* Delay time for autocorrelation function calculation */
dkato 0:853f5b7408a7 360 if (((uint32_t)p_noise_det->acflagtime & (uint32_t)(~VDEC_CPARA_RANGE_0X0000001F)) != 0u) {
dkato 0:853f5b7408a7 361 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 362 goto END;
dkato 0:853f5b7408a7 363 }
dkato 0:853f5b7408a7 364 /* Smoothing parameter of autocorrelation function data */
dkato 0:853f5b7408a7 365 if (((uint32_t)p_noise_det->acffilter & (uint32_t)(~VDEC_CPARA_RANGE_0X00000003)) != 0u) {
dkato 0:853f5b7408a7 366 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 367 goto END;
dkato 0:853f5b7408a7 368 }
dkato 0:853f5b7408a7 369 }
dkato 0:853f5b7408a7 370 END:
dkato 0:853f5b7408a7 371 return vdec_error;
dkato 0:853f5b7408a7 372 } /* End of function VDEC_DigitalClampCheckParam() */
dkato 0:853f5b7408a7 373
dkato 0:853f5b7408a7 374 /**************************************************************************//**
dkato 0:853f5b7408a7 375 * @brief Checks on output adjustment parameter
dkato 0:853f5b7408a7 376 * @param[in] param : Output adjustment parameter
dkato 0:853f5b7408a7 377 * @retval Error code
dkato 0:853f5b7408a7 378 *****************************************************************************/
dkato 0:853f5b7408a7 379 vdec_error_t VDEC_OutputCheckParam (const vdec_output_t * const param)
dkato 0:853f5b7408a7 380 {
dkato 0:853f5b7408a7 381 vdec_error_t vdec_error;
dkato 0:853f5b7408a7 382
dkato 0:853f5b7408a7 383 vdec_error = VDEC_OK;
dkato 0:853f5b7408a7 384
dkato 0:853f5b7408a7 385 if (param == NULL) {
dkato 0:853f5b7408a7 386 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 387 goto END;
dkato 0:853f5b7408a7 388 }
dkato 0:853f5b7408a7 389 /* Y signal gain coefficient */
dkato 0:853f5b7408a7 390 if (((uint32_t)param->y_gain2 & (uint32_t)(~VDEC_CPARA_RANGE_0X000003FF)) != 0u) {
dkato 0:853f5b7408a7 391 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 392 goto END;
dkato 0:853f5b7408a7 393 }
dkato 0:853f5b7408a7 394 /* Cb signal gain coefficient */
dkato 0:853f5b7408a7 395 if (((uint32_t)param->cb_gain2 & (uint32_t)(~VDEC_CPARA_RANGE_0X000003FF)) != 0u) {
dkato 0:853f5b7408a7 396 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 397 goto END;
dkato 0:853f5b7408a7 398 }
dkato 0:853f5b7408a7 399 /* Cr signal gain coefficient */
dkato 0:853f5b7408a7 400 if (((uint32_t)param->cr_gain2 & (uint32_t)(~VDEC_CPARA_RANGE_0X000003FF)) != 0u) {
dkato 0:853f5b7408a7 401 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 402 goto END;
dkato 0:853f5b7408a7 403 }
dkato 0:853f5b7408a7 404 END:
dkato 0:853f5b7408a7 405 return vdec_error;
dkato 0:853f5b7408a7 406 } /* End of function VDEC_OutputCheckParam() */
dkato 0:853f5b7408a7 407
dkato 0:853f5b7408a7 408 /**************************************************************************//**
dkato 0:853f5b7408a7 409 * @brief Checks on noise reduction LPF parameter
dkato 0:853f5b7408a7 410 * @param[in] p_noise_rd_lpf : Noise reduction LPF parameter
dkato 0:853f5b7408a7 411 * @retval Error code
dkato 0:853f5b7408a7 412 *****************************************************************************/
dkato 0:853f5b7408a7 413 static vdec_error_t NoiseReductionLPFCheckParam (const vdec_noise_rd_lpf_t * const p_noise_rd_lpf)
dkato 0:853f5b7408a7 414 {
dkato 0:853f5b7408a7 415 vdec_error_t vdec_error;
dkato 0:853f5b7408a7 416
dkato 0:853f5b7408a7 417 vdec_error = VDEC_OK;
dkato 0:853f5b7408a7 418
dkato 0:853f5b7408a7 419 /* Noise reduction LPF */
dkato 0:853f5b7408a7 420 if (p_noise_rd_lpf != NULL) {
dkato 0:853f5b7408a7 421 /* LPF cutoff frequency before vertical sync separation */
dkato 0:853f5b7408a7 422 if (p_noise_rd_lpf->lpfvsync >= VDEC_LPF_VSYNC_NUM) {
dkato 0:853f5b7408a7 423 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 424 goto END;
dkato 0:853f5b7408a7 425 }
dkato 0:853f5b7408a7 426 /* LPF cutoff frequency before horizontal sync separation */
dkato 0:853f5b7408a7 427 if (p_noise_rd_lpf->lpfhsync >= VDEC_LPF_HSYNC_NUM) {
dkato 0:853f5b7408a7 428 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 429 goto END;
dkato 0:853f5b7408a7 430 }
dkato 0:853f5b7408a7 431 }
dkato 0:853f5b7408a7 432 END:
dkato 0:853f5b7408a7 433 return vdec_error;
dkato 0:853f5b7408a7 434 } /* End of function NoiseReductionLPFCheckParam() */
dkato 0:853f5b7408a7 435
dkato 0:853f5b7408a7 436 /**************************************************************************//**
dkato 0:853f5b7408a7 437 * @brief Checks on auto level control sync slicer parameter
dkato 0:853f5b7408a7 438 * @param[in] p_sync_slicer : Auto level control sync slicer parameter
dkato 0:853f5b7408a7 439 * @retval Error code
dkato 0:853f5b7408a7 440 *****************************************************************************/
dkato 0:853f5b7408a7 441 static vdec_error_t SyncSlicerCheckParam (const vdec_sync_slicer_t * const p_sync_slicer)
dkato 0:853f5b7408a7 442 {
dkato 0:853f5b7408a7 443 vdec_error_t vdec_error;
dkato 0:853f5b7408a7 444
dkato 0:853f5b7408a7 445 vdec_error = VDEC_OK;
dkato 0:853f5b7408a7 446
dkato 0:853f5b7408a7 447 /* Sync slicer */
dkato 0:853f5b7408a7 448 if (p_sync_slicer != NULL) {
dkato 0:853f5b7408a7 449 /* Reference level operation speed control for composite sync separation (for Hsync signal) */
dkato 0:853f5b7408a7 450 if (p_sync_slicer->velocityshift_h >= VDEC_VELOCITY_SHIFT_NUM) {
dkato 0:853f5b7408a7 451 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 452 goto END;
dkato 0:853f5b7408a7 453 }
dkato 0:853f5b7408a7 454 /* Auto-slice level setting for composite sync separator circuit (for Hsync signal) */
dkato 0:853f5b7408a7 455 if (p_sync_slicer->slicermode_h >= VDEC_SLICE_MODE_NUM) {
dkato 0:853f5b7408a7 456 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 457 goto END;
dkato 0:853f5b7408a7 458 }
dkato 0:853f5b7408a7 459 /* Auto-slice level setting for composite sync separation circuit (for Vsync signal) */
dkato 0:853f5b7408a7 460 if (p_sync_slicer->slicermode_v >= VDEC_SLICE_MODE_NUM) {
dkato 0:853f5b7408a7 461 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 462 goto END;
dkato 0:853f5b7408a7 463 }
dkato 0:853f5b7408a7 464 /* Max ratio of horizontal cycle to horizontal sync signal pulse width
dkato 0:853f5b7408a7 465 and min ratio of horizontal cycle to horizontal sync signal pulse width (for Hsync signal) */
dkato 0:853f5b7408a7 466 if ((((uint32_t)p_sync_slicer->syncmaxduty_h & (uint32_t)(~VDEC_CPARA_RANGE_0X0000003F)) != 0u) ||
dkato 0:853f5b7408a7 467 (((uint32_t)p_sync_slicer->syncminduty_h & (uint32_t)(~VDEC_CPARA_RANGE_0X0000003F)) != 0u)) {
dkato 0:853f5b7408a7 468 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 469 goto END;
dkato 0:853f5b7408a7 470 }
dkato 0:853f5b7408a7 471 /* Clipping level */
dkato 0:853f5b7408a7 472 if (p_sync_slicer->ssclipsel >= VDEC_CLIP_LV_NUM) {
dkato 0:853f5b7408a7 473 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 474 goto END;
dkato 0:853f5b7408a7 475 }
dkato 0:853f5b7408a7 476 /* Slice level for composite sync signal separation (for Hsync signal) */
dkato 0:853f5b7408a7 477 if (((uint32_t)p_sync_slicer->csyncslice_h & (uint32_t)(~VDEC_CPARA_RANGE_0X000003FF)) != 0u) {
dkato 0:853f5b7408a7 478 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 479 goto END;
dkato 0:853f5b7408a7 480 }
dkato 0:853f5b7408a7 481 /* Max ratio of horizontal cycle to horizontal sync signal pulse width
dkato 0:853f5b7408a7 482 and min ratio of horizontal cycle to horizontal sync signal pulse width (for Vsync signal) */
dkato 0:853f5b7408a7 483 if ((((uint32_t)p_sync_slicer->syncmaxduty_v & (uint32_t)(~VDEC_CPARA_RANGE_0X0000003F)) != 0u) ||
dkato 0:853f5b7408a7 484 (((uint32_t)p_sync_slicer->syncminduty_v & (uint32_t)(~VDEC_CPARA_RANGE_0X0000003F)) != 0u)) {
dkato 0:853f5b7408a7 485 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 486 goto END;
dkato 0:853f5b7408a7 487 }
dkato 0:853f5b7408a7 488 /* Threshold for vertical sync separation */
dkato 0:853f5b7408a7 489 if (((uint32_t)p_sync_slicer->vsyncslice & (uint32_t)(~VDEC_CPARA_RANGE_0X0000001F)) != 0u) {
dkato 0:853f5b7408a7 490 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 491 goto END;
dkato 0:853f5b7408a7 492 }
dkato 0:853f5b7408a7 493 /* Slice level for composite sync signal separation (for Vsync signal) */
dkato 0:853f5b7408a7 494 if (((uint32_t)p_sync_slicer->csyncslice_v & (uint32_t)(~VDEC_CPARA_RANGE_0X000003FF)) != 0u) {
dkato 0:853f5b7408a7 495 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 496 goto END;
dkato 0:853f5b7408a7 497 }
dkato 0:853f5b7408a7 498 }
dkato 0:853f5b7408a7 499 END:
dkato 0:853f5b7408a7 500 return vdec_error;
dkato 0:853f5b7408a7 501 } /* End of function SyncSlicerCheckParam() */
dkato 0:853f5b7408a7 502
dkato 0:853f5b7408a7 503 /**************************************************************************//**
dkato 0:853f5b7408a7 504 * @brief Checks on horizontal AFC parameter
dkato 0:853f5b7408a7 505 * @param[in] p_horizontal_afc : Horizontal AFC parameter
dkato 0:853f5b7408a7 506 * @retval Error code
dkato 0:853f5b7408a7 507 *****************************************************************************/
dkato 0:853f5b7408a7 508 static vdec_error_t HorizontalAFCCheckParam (const vdec_horizontal_afc_t * const p_horizontal_afc)
dkato 0:853f5b7408a7 509 {
dkato 0:853f5b7408a7 510 vdec_error_t vdec_error;
dkato 0:853f5b7408a7 511
dkato 0:853f5b7408a7 512 vdec_error = VDEC_OK;
dkato 0:853f5b7408a7 513
dkato 0:853f5b7408a7 514 /* Horizontal AFC */
dkato 0:853f5b7408a7 515 if (p_horizontal_afc != NULL) {
dkato 0:853f5b7408a7 516 /* Horizontal AFC loop gain */
dkato 0:853f5b7408a7 517 if (((uint32_t)p_horizontal_afc->hafcgain & (uint32_t)(~VDEC_CPARA_RANGE_0X0000000F)) != 0u) {
dkato 0:853f5b7408a7 518 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 519 goto END;
dkato 0:853f5b7408a7 520 }
dkato 0:853f5b7408a7 521 /* Horizontal AFC center oscillation frequency */
dkato 0:853f5b7408a7 522 if (((uint32_t)p_horizontal_afc->hafcgain & (uint32_t)(~VDEC_CPARA_RANGE_0X000003FF)) != 0u) {
dkato 0:853f5b7408a7 523 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 524 goto END;
dkato 0:853f5b7408a7 525 }
dkato 0:853f5b7408a7 526 /* Start line of horizontal AFC normal operation */
dkato 0:853f5b7408a7 527 if (((uint32_t)p_horizontal_afc->hafcstart & (uint32_t)(~VDEC_CPARA_RANGE_0X0000000F)) != 0u) {
dkato 0:853f5b7408a7 528 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 529 goto END;
dkato 0:853f5b7408a7 530 }
dkato 0:853f5b7408a7 531 /* Maximum oscillation frequency of horizontal AFC */
dkato 0:853f5b7408a7 532 if (((uint32_t)p_horizontal_afc->hafcmax & (uint32_t)(~VDEC_CPARA_RANGE_0X000003FF)) != 0u) {
dkato 0:853f5b7408a7 533 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 534 goto END;
dkato 0:853f5b7408a7 535 }
dkato 0:853f5b7408a7 536 /* End line of horizontal AFC normal operation */
dkato 0:853f5b7408a7 537 if (((uint32_t)p_horizontal_afc->hafcend & (uint32_t)(~VDEC_CPARA_RANGE_0X0000000F)) != 0u) {
dkato 0:853f5b7408a7 538 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 539 goto END;
dkato 0:853f5b7408a7 540 }
dkato 0:853f5b7408a7 541 /* Horizontal AFC VBI period operating mode */
dkato 0:853f5b7408a7 542 if (p_horizontal_afc->hafcmode >= VDEC_HAFCMD_NUM) {
dkato 0:853f5b7408a7 543 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 544 goto END;
dkato 0:853f5b7408a7 545 }
dkato 0:853f5b7408a7 546 /* Min oscillation frequency of horizontal AFC */
dkato 0:853f5b7408a7 547 if (((uint32_t)p_horizontal_afc->hafcmin & (uint32_t)(~VDEC_CPARA_RANGE_0X000003FF)) != 0u) {
dkato 0:853f5b7408a7 548 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 549 goto END;
dkato 0:853f5b7408a7 550 }
dkato 0:853f5b7408a7 551 /* Phase comparator feedback adjust for low sync signal lock stability */
dkato 0:853f5b7408a7 552 if (p_horizontal_afc->phdet_div >= VDEC_PHDET_DIV_NUM) {
dkato 0:853f5b7408a7 553 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 554 goto END;
dkato 0:853f5b7408a7 555 }
dkato 0:853f5b7408a7 556 }
dkato 0:853f5b7408a7 557 END:
dkato 0:853f5b7408a7 558 return vdec_error;
dkato 0:853f5b7408a7 559 } /* End of function HorizontalAFCCheckParam() */
dkato 0:853f5b7408a7 560
dkato 0:853f5b7408a7 561 /**************************************************************************//**
dkato 0:853f5b7408a7 562 * @brief Checks on vertical count-down parameter
dkato 0:853f5b7408a7 563 * @param[in] p_vcount_down : Vertical count-down parameter
dkato 0:853f5b7408a7 564 * @retval Error code
dkato 0:853f5b7408a7 565 *****************************************************************************/
dkato 0:853f5b7408a7 566 static vdec_error_t VerticalCountdownCheckParam (const vdec_vcount_down_t * const p_vcount_down)
dkato 0:853f5b7408a7 567 {
dkato 0:853f5b7408a7 568 vdec_error_t vdec_error;
dkato 0:853f5b7408a7 569
dkato 0:853f5b7408a7 570 vdec_error = VDEC_OK;
dkato 0:853f5b7408a7 571
dkato 0:853f5b7408a7 572 /* Vertical countdown */
dkato 0:853f5b7408a7 573 if (p_vcount_down != NULL) {
dkato 0:853f5b7408a7 574 /* Vertical countdown center oscillation frequency */
dkato 0:853f5b7408a7 575 if (p_vcount_down->vcddefault >= VDEC_VCD_FRQ_NUM) {
dkato 0:853f5b7408a7 576 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 577 goto END;
dkato 0:853f5b7408a7 578 }
dkato 0:853f5b7408a7 579 /* Vertical countdown sync area */
dkato 0:853f5b7408a7 580 if (((uint32_t)p_vcount_down->vcdwindow & (uint32_t)(~VDEC_CPARA_RANGE_0X0000003F)) != 0u) {
dkato 0:853f5b7408a7 581 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 582 goto END;
dkato 0:853f5b7408a7 583 }
dkato 0:853f5b7408a7 584 /* Vertical countdown minimum oscillation frequency */
dkato 0:853f5b7408a7 585 if (((uint32_t)p_vcount_down->vcdoffset & (uint32_t)(~VDEC_CPARA_RANGE_0X0000001F)) != 0u) {
dkato 0:853f5b7408a7 586 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 587 goto END;
dkato 0:853f5b7408a7 588 }
dkato 0:853f5b7408a7 589 }
dkato 0:853f5b7408a7 590 END:
dkato 0:853f5b7408a7 591 return vdec_error;
dkato 0:853f5b7408a7 592 } /* End of function VerticalCountdownCheckParam() */
dkato 0:853f5b7408a7 593
dkato 0:853f5b7408a7 594 /**************************************************************************//**
dkato 0:853f5b7408a7 595 * @brief Checks on AGC/PGA parameter
dkato 0:853f5b7408a7 596 * @param[in] p_agc : AGC/PGA parameter
dkato 0:853f5b7408a7 597 * @retval Error code
dkato 0:853f5b7408a7 598 *****************************************************************************/
dkato 0:853f5b7408a7 599 static vdec_error_t AgcPgaCheckParam (const vdec_agc_t * const p_agc)
dkato 0:853f5b7408a7 600 {
dkato 0:853f5b7408a7 601 vdec_error_t vdec_error;
dkato 0:853f5b7408a7 602
dkato 0:853f5b7408a7 603 vdec_error = VDEC_OK;
dkato 0:853f5b7408a7 604
dkato 0:853f5b7408a7 605 /* AGC / PGA */
dkato 0:853f5b7408a7 606 if (p_agc != NULL) {
dkato 0:853f5b7408a7 607 /* AGC response speed */
dkato 0:853f5b7408a7 608 if (((uint32_t)p_agc->agcresponse & (uint32_t)(~VDEC_CPARA_RANGE_0X00000007)) != 0u) {
dkato 0:853f5b7408a7 609 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 610 goto END;
dkato 0:853f5b7408a7 611 }
dkato 0:853f5b7408a7 612 /* Sync signal reference amplitude */
dkato 0:853f5b7408a7 613 if (((uint32_t)p_agc->agclevel & (uint32_t)(~VDEC_CPARA_RANGE_0X000001FF)) != 0u) {
dkato 0:853f5b7408a7 614 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 615 goto END;
dkato 0:853f5b7408a7 616 }
dkato 0:853f5b7408a7 617 /* AGC gain adjustment accuracy */
dkato 0:853f5b7408a7 618 if (((uint32_t)p_agc->agcprecis & (uint32_t)(~VDEC_CPARA_RANGE_0X0000003F)) != 0u) {
dkato 0:853f5b7408a7 619 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 620 goto END;
dkato 0:853f5b7408a7 621 }
dkato 0:853f5b7408a7 622 /* PGA gain */
dkato 0:853f5b7408a7 623 if (((uint32_t)p_agc->pga_gain & (uint32_t)(~VDEC_CPARA_RANGE_0X0000003F)) != 0u) {
dkato 0:853f5b7408a7 624 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 625 goto END;
dkato 0:853f5b7408a7 626 }
dkato 0:853f5b7408a7 627 }
dkato 0:853f5b7408a7 628 END:
dkato 0:853f5b7408a7 629 return vdec_error;
dkato 0:853f5b7408a7 630 } /* End of function AgcPgaCheckParam() */
dkato 0:853f5b7408a7 631
dkato 0:853f5b7408a7 632 /**************************************************************************//**
dkato 0:853f5b7408a7 633 * @brief Checks on peak limiter control parameter
dkato 0:853f5b7408a7 634 * @param[in] p_peak_limiter : Peak limiter control parameter
dkato 0:853f5b7408a7 635 * @retval Error code
dkato 0:853f5b7408a7 636 *****************************************************************************/
dkato 0:853f5b7408a7 637 static vdec_error_t PeakLimiterControlCheckParam (const vdec_peak_limiter_t * const p_peak_limiter)
dkato 0:853f5b7408a7 638 {
dkato 0:853f5b7408a7 639 vdec_error_t vdec_error;
dkato 0:853f5b7408a7 640
dkato 0:853f5b7408a7 641 vdec_error = VDEC_OK;
dkato 0:853f5b7408a7 642
dkato 0:853f5b7408a7 643 /* Peak limiter control */
dkato 0:853f5b7408a7 644 if (p_peak_limiter != NULL) {
dkato 0:853f5b7408a7 645 /* Peak luminance value to operate peak limiter */
dkato 0:853f5b7408a7 646 if (p_peak_limiter->peaklevel >= VDEC_PEAKLV_NUM) {
dkato 0:853f5b7408a7 647 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 648 goto END;
dkato 0:853f5b7408a7 649 }
dkato 0:853f5b7408a7 650
dkato 0:853f5b7408a7 651 /* Response speed with peak limiter gain decreased */
dkato 0:853f5b7408a7 652 if (((uint32_t)p_peak_limiter->peakattack & (uint32_t)(~VDEC_CPARA_RANGE_0X00000003)) != 0u) {
dkato 0:853f5b7408a7 653 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 654 goto END;
dkato 0:853f5b7408a7 655 }
dkato 0:853f5b7408a7 656 /* Response speed with peak limiter gain increased */
dkato 0:853f5b7408a7 657 if (((uint32_t)p_peak_limiter->peakrelease & (uint32_t)(~VDEC_CPARA_RANGE_0X00000003)) != 0u) {
dkato 0:853f5b7408a7 658 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 659 goto END;
dkato 0:853f5b7408a7 660 }
dkato 0:853f5b7408a7 661 /* Maximum compression rate of peak limiter */
dkato 0:853f5b7408a7 662 if (p_peak_limiter->peakratio >= VDEC_PEAKRATIO_NUM) {
dkato 0:853f5b7408a7 663 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 664 goto END;
dkato 0:853f5b7408a7 665 }
dkato 0:853f5b7408a7 666 /* Allowable number of overflowing pixels */
dkato 0:853f5b7408a7 667 if (((uint32_t)p_peak_limiter->maxpeaksamples & (uint32_t)(~VDEC_CPARA_RANGE_0X000000FF)) != 0u) {
dkato 0:853f5b7408a7 668 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 669 goto END;
dkato 0:853f5b7408a7 670 }
dkato 0:853f5b7408a7 671 }
dkato 0:853f5b7408a7 672 END:
dkato 0:853f5b7408a7 673 return vdec_error;
dkato 0:853f5b7408a7 674 } /* End of function PeakLimiterControlCheckParam() */
dkato 0:853f5b7408a7 675
dkato 0:853f5b7408a7 676 /**************************************************************************//**
dkato 0:853f5b7408a7 677 * @brief Checks on over-range control parameter
dkato 0:853f5b7408a7 678 * @param[in] p_over_range : Over-range control parameter
dkato 0:853f5b7408a7 679 * @retval Error code
dkato 0:853f5b7408a7 680 *****************************************************************************/
dkato 0:853f5b7408a7 681 static vdec_error_t OverRangeControlCheckParam (const vdec_over_range_t * const p_over_range)
dkato 0:853f5b7408a7 682 {
dkato 0:853f5b7408a7 683 vdec_error_t vdec_error;
dkato 0:853f5b7408a7 684
dkato 0:853f5b7408a7 685 vdec_error = VDEC_OK;
dkato 0:853f5b7408a7 686
dkato 0:853f5b7408a7 687 /* Over-range control */
dkato 0:853f5b7408a7 688 if (p_over_range != NULL) {
dkato 0:853f5b7408a7 689 /* A/D over-threshold level (between levels 0 and 1) */
dkato 0:853f5b7408a7 690 if (((uint32_t)p_over_range->radj_o_level0 & (uint32_t)(~VDEC_CPARA_RANGE_0X000003FF)) != 0u) {
dkato 0:853f5b7408a7 691 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 692 goto END;
dkato 0:853f5b7408a7 693 }
dkato 0:853f5b7408a7 694 /* A/D under-threshold level (between levels 2 and 3) */
dkato 0:853f5b7408a7 695 if (((uint32_t)p_over_range->radj_u_level0 & (uint32_t)(~VDEC_CPARA_RANGE_0X000003FF)) != 0u) {
dkato 0:853f5b7408a7 696 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 697 goto END;
dkato 0:853f5b7408a7 698 }
dkato 0:853f5b7408a7 699 /* A/D over-threshold level (between levels 1 and 2) */
dkato 0:853f5b7408a7 700 if (((uint32_t)p_over_range->radj_o_level1 & (uint32_t)(~VDEC_CPARA_RANGE_0X000003FF)) != 0u) {
dkato 0:853f5b7408a7 701 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 702 goto END;
dkato 0:853f5b7408a7 703 }
dkato 0:853f5b7408a7 704 /* A/D under-threshold level (between levels 1 and 2) */
dkato 0:853f5b7408a7 705 if (((uint32_t)p_over_range->radj_u_level1 & (uint32_t)(~VDEC_CPARA_RANGE_0X000003FF)) != 0u) {
dkato 0:853f5b7408a7 706 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 707 goto END;
dkato 0:853f5b7408a7 708 }
dkato 0:853f5b7408a7 709 /* A/D over-threshold level (between levels 2 and 3) */
dkato 0:853f5b7408a7 710 if (((uint32_t)p_over_range->radj_o_level2 & (uint32_t)(~VDEC_CPARA_RANGE_0X000003FF)) != 0u) {
dkato 0:853f5b7408a7 711 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 712 goto END;
dkato 0:853f5b7408a7 713 }
dkato 0:853f5b7408a7 714 /* A/D under-threshold level (between levels 0 and 1) */
dkato 0:853f5b7408a7 715 if (((uint32_t)p_over_range->radj_u_level2 & (uint32_t)(~VDEC_CPARA_RANGE_0X000003FF)) != 0u) {
dkato 0:853f5b7408a7 716 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 717 goto END;
dkato 0:853f5b7408a7 718 }
dkato 0:853f5b7408a7 719 }
dkato 0:853f5b7408a7 720 END:
dkato 0:853f5b7408a7 721 return vdec_error;
dkato 0:853f5b7408a7 722 } /* End of function OverRangeControlCheckParam() */
dkato 0:853f5b7408a7 723
dkato 0:853f5b7408a7 724 /**************************************************************************//**
dkato 0:853f5b7408a7 725 * @brief Checks on Y/C separation control parameter
dkato 0:853f5b7408a7 726 * @param[in] p_yc_sep_ctrl : Y/C separation control parameter
dkato 0:853f5b7408a7 727 * @retval Error code
dkato 0:853f5b7408a7 728 *****************************************************************************/
dkato 0:853f5b7408a7 729 static vdec_error_t YcSeparationControlCheckParam (const vdec_yc_sep_ctrl_t * const p_yc_sep_ctrl)
dkato 0:853f5b7408a7 730 {
dkato 0:853f5b7408a7 731 vdec_error_t vdec_error;
dkato 0:853f5b7408a7 732
dkato 0:853f5b7408a7 733 vdec_error = VDEC_OK;
dkato 0:853f5b7408a7 734
dkato 0:853f5b7408a7 735 /* Y/C separation control */
dkato 0:853f5b7408a7 736 if (p_yc_sep_ctrl != NULL) {
dkato 0:853f5b7408a7 737 /* Two-dimensional Y/C separation filter select coefficient (K15, K13, and K11) */
dkato 0:853f5b7408a7 738 if ((((uint32_t)p_yc_sep_ctrl->k15 & (uint32_t)(~VDEC_CPARA_RANGE_0X0000000F)) != 0u) ||
dkato 0:853f5b7408a7 739 (((uint32_t)p_yc_sep_ctrl->k13 & (uint32_t)(~VDEC_CPARA_RANGE_0X0000003F)) != 0u) ||
dkato 0:853f5b7408a7 740 (((uint32_t)p_yc_sep_ctrl->k11 & (uint32_t)(~VDEC_CPARA_RANGE_0X0000003F)) != 0u)) {
dkato 0:853f5b7408a7 741 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 742 goto END;
dkato 0:853f5b7408a7 743 }
dkato 0:853f5b7408a7 744 /* Two-dimensional Y/C separation filter select coefficient (K16, K14, and K12) */
dkato 0:853f5b7408a7 745 if ((((uint32_t)p_yc_sep_ctrl->k16 & (uint32_t)(~VDEC_CPARA_RANGE_0X0000000F)) != 0u) ||
dkato 0:853f5b7408a7 746 (((uint32_t)p_yc_sep_ctrl->k14 & (uint32_t)(~VDEC_CPARA_RANGE_0X0000003F)) != 0u) ||
dkato 0:853f5b7408a7 747 (((uint32_t)p_yc_sep_ctrl->k12 & (uint32_t)(~VDEC_CPARA_RANGE_0X0000003F)) != 0u)) {
dkato 0:853f5b7408a7 748 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 749 goto END;
dkato 0:853f5b7408a7 750 }
dkato 0:853f5b7408a7 751 /* Two-dimensional Y/C separation filter select coefficient (K22A and K21A) */
dkato 0:853f5b7408a7 752 if ((((uint32_t)p_yc_sep_ctrl->k22a & (uint32_t)(~VDEC_CPARA_RANGE_0X000000FF)) != 0u) ||
dkato 0:853f5b7408a7 753 (((uint32_t)p_yc_sep_ctrl->k21a & (uint32_t)(~VDEC_CPARA_RANGE_0X0000003F)) != 0u)) {
dkato 0:853f5b7408a7 754 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 755 goto END;
dkato 0:853f5b7408a7 756 }
dkato 0:853f5b7408a7 757 /* Two-dimensional Y/C separation filter select coefficient (K22B and K21B) */
dkato 0:853f5b7408a7 758 if ((((uint32_t)p_yc_sep_ctrl->k22b & (uint32_t)(~VDEC_CPARA_RANGE_0X000000FF)) != 0u) ||
dkato 0:853f5b7408a7 759 (((uint32_t)p_yc_sep_ctrl->k21b & (uint32_t)(~VDEC_CPARA_RANGE_0X0000003F)) != 0u)) {
dkato 0:853f5b7408a7 760 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 761 goto END;
dkato 0:853f5b7408a7 762 }
dkato 0:853f5b7408a7 763 /* Two-dimensional Y/C separation filter select coefficient (K23B, K23A, and K24) */
dkato 0:853f5b7408a7 764 if ((((uint32_t)p_yc_sep_ctrl->k23b & (uint32_t)(~VDEC_CPARA_RANGE_0X0000000F)) != 0u) ||
dkato 0:853f5b7408a7 765 (((uint32_t)p_yc_sep_ctrl->k23a & (uint32_t)(~VDEC_CPARA_RANGE_0X0000000F)) != 0u) ||
dkato 0:853f5b7408a7 766 (((uint32_t)p_yc_sep_ctrl->k24 & (uint32_t)(~VDEC_CPARA_RANGE_0X0000001F)) != 0u)) {
dkato 0:853f5b7408a7 767 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 768 goto END;
dkato 0:853f5b7408a7 769 }
dkato 0:853f5b7408a7 770 /* Mixing ratio of signal after passing horizontal filter
dkato 0:853f5b7408a7 771 to signal after passing former-stage horizontal filter */
dkato 0:853f5b7408a7 772 if (p_yc_sep_ctrl->hsel_mix_y >= VDEC_FILMIX_RATIO_NUM) {
dkato 0:853f5b7408a7 773 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 774 goto END;
dkato 0:853f5b7408a7 775 }
dkato 0:853f5b7408a7 776 /* Mixing ratio of signal after passing vertical filter
dkato 0:853f5b7408a7 777 to signal after passing former-stage horizontal/vertical filter */
dkato 0:853f5b7408a7 778 if (p_yc_sep_ctrl->vsel_mix_y >= VDEC_FILMIX_RATIO_NUM) {
dkato 0:853f5b7408a7 779 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 780 goto END;
dkato 0:853f5b7408a7 781 }
dkato 0:853f5b7408a7 782 /* Mixing ratio of signal after passing horizontal/vertical filter
dkato 0:853f5b7408a7 783 to signal after passing former-stage horizontal/vertical filter */
dkato 0:853f5b7408a7 784 if (p_yc_sep_ctrl->hvsel_mix_y >= VDEC_FILMIX_RATIO_NUM) {
dkato 0:853f5b7408a7 785 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 786 goto END;
dkato 0:853f5b7408a7 787 }
dkato 0:853f5b7408a7 788 /* Vertical luminance detection level for correlation detection filter */
dkato 0:853f5b7408a7 789 if (((uint32_t)p_yc_sep_ctrl->v_y_level & (uint32_t)(~VDEC_CPARA_RANGE_0X000001FF)) != 0u) {
dkato 0:853f5b7408a7 790 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 791 goto END;
dkato 0:853f5b7408a7 792 }
dkato 0:853f5b7408a7 793
dkato 0:853f5b7408a7 794 /* Mixing ratio of c signal after passing horizontal/vertical adaptive filter
dkato 0:853f5b7408a7 795 to signal after passing correlation detection filter */
dkato 0:853f5b7408a7 796 if (p_yc_sep_ctrl->det2_mix_c >= VDEC_FILMIX_RATIO_NUM) {
dkato 0:853f5b7408a7 797 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 798 goto END;
dkato 0:853f5b7408a7 799 }
dkato 0:853f5b7408a7 800 /* Mixing ratio of C signal for Y generation after passing
dkato 0:853f5b7408a7 801 horizontal/vertical adaptive filter to signal after passing correlation */
dkato 0:853f5b7408a7 802 if (p_yc_sep_ctrl->det2_mix_y >= VDEC_FILMIX_RATIO_NUM) {
dkato 0:853f5b7408a7 803 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 804 goto END;
dkato 0:853f5b7408a7 805 }
dkato 0:853f5b7408a7 806 /* Two-dimensional cascade/TAKE-OFF filter mode select */
dkato 0:853f5b7408a7 807 if (p_yc_sep_ctrl->fil2_mode_2d >= VDEC_2DFIL_MDSEL_NUM) {
dkato 0:853f5b7408a7 808 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 809 goto END;
dkato 0:853f5b7408a7 810 }
dkato 0:853f5b7408a7 811 }
dkato 0:853f5b7408a7 812 END:
dkato 0:853f5b7408a7 813 return vdec_error;
dkato 0:853f5b7408a7 814 } /* End of function YcSeparationControlCheckParam() */
dkato 0:853f5b7408a7 815
dkato 0:853f5b7408a7 816 /**************************************************************************//**
dkato 0:853f5b7408a7 817 * @brief Checks on chroma filter TAP coefficient for Y/C separation
dkato 0:853f5b7408a7 818 * @param[in] fil2_2d : Chroma filter TAP coefficient for Y/C separation
dkato 0:853f5b7408a7 819 * @retval Error code
dkato 0:853f5b7408a7 820 *****************************************************************************/
dkato 0:853f5b7408a7 821 static vdec_error_t FilterTAPsCoefficientCheckParam (const vdec_chrfil_tap_t * const fil2_2d)
dkato 0:853f5b7408a7 822 {
dkato 0:853f5b7408a7 823 int32_t tap_coef;
dkato 0:853f5b7408a7 824 const uint16_t * taps;
dkato 0:853f5b7408a7 825 vdec_error_t vdec_error;
dkato 0:853f5b7408a7 826
dkato 0:853f5b7408a7 827 vdec_error = VDEC_OK;
dkato 0:853f5b7408a7 828
dkato 0:853f5b7408a7 829 if (fil2_2d != NULL) {
dkato 0:853f5b7408a7 830 taps = fil2_2d->fil2_2d_f;
dkato 0:853f5b7408a7 831 for (tap_coef = 0; tap_coef < VDEC_CHRFIL_TAPCOEF_NUM; tap_coef++) {
dkato 0:853f5b7408a7 832 if (((uint32_t)*taps & (uint32_t)(~VDEC_CPARA_RANGE_0X00001FFF)) != 0u) {
dkato 0:853f5b7408a7 833 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 834 goto END;
dkato 0:853f5b7408a7 835 }
dkato 0:853f5b7408a7 836 taps++;
dkato 0:853f5b7408a7 837 }
dkato 0:853f5b7408a7 838 }
dkato 0:853f5b7408a7 839 END:
dkato 0:853f5b7408a7 840 return vdec_error;
dkato 0:853f5b7408a7 841 } /* End of function FilterTAPsCoefficientCheckParam() */
dkato 0:853f5b7408a7 842
dkato 0:853f5b7408a7 843 /**************************************************************************//**
dkato 0:853f5b7408a7 844 * @brief Checks on color system detection parameter
dkato 0:853f5b7408a7 845 * @param[in] p_chrmdec_ctrl : Color system detection parameter
dkato 0:853f5b7408a7 846 * @retval Error code
dkato 0:853f5b7408a7 847 *****************************************************************************/
dkato 0:853f5b7408a7 848 static vdec_error_t ChromaDecodingControlCheckParam (const vdec_chrmdec_ctrl_t * const p_chrmdec_ctrl)
dkato 0:853f5b7408a7 849 {
dkato 0:853f5b7408a7 850 vdec_error_t vdec_error;
dkato 0:853f5b7408a7 851
dkato 0:853f5b7408a7 852 vdec_error = VDEC_OK;
dkato 0:853f5b7408a7 853
dkato 0:853f5b7408a7 854 /* Chroma decoding control */
dkato 0:853f5b7408a7 855 if (p_chrmdec_ctrl != NULL) {
dkato 0:853f5b7408a7 856 /* Default color system */
dkato 0:853f5b7408a7 857 if (p_chrmdec_ctrl->defaultsys >= VDEC_COL_SYS_NUM) {
dkato 0:853f5b7408a7 858 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 859 goto END;
dkato 0:853f5b7408a7 860 }
dkato 0:853f5b7408a7 861 /* Luminance signal delay adjustment */
dkato 0:853f5b7408a7 862 if (((uint32_t)p_chrmdec_ctrl->lumadelay & (uint32_t)(~VDEC_CPARA_RANGE_0X0000001F)) != 0u) {
dkato 0:853f5b7408a7 863 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 864 goto END;
dkato 0:853f5b7408a7 865 }
dkato 0:853f5b7408a7 866 /* Averaging processing for pre-demodulated line */
dkato 0:853f5b7408a7 867 if ((p_chrmdec_ctrl->demodmode != VDEC_DEMOD_MD_NO) && (p_chrmdec_ctrl->demodmode != VDEC_DEMOD_MD_PAL)) {
dkato 0:853f5b7408a7 868 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 869 goto END;
dkato 0:853f5b7408a7 870 }
dkato 0:853f5b7408a7 871 }
dkato 0:853f5b7408a7 872 END:
dkato 0:853f5b7408a7 873 return vdec_error;
dkato 0:853f5b7408a7 874 } /* End of function ChromaDecodingControlCheckParam() */
dkato 0:853f5b7408a7 875
dkato 0:853f5b7408a7 876 /**************************************************************************//**
dkato 0:853f5b7408a7 877 * @brief Checks on BCO parameter
dkato 0:853f5b7408a7 878 * @param[in] p_burst_lock : BCO parameter
dkato 0:853f5b7408a7 879 * @retval Error code
dkato 0:853f5b7408a7 880 *****************************************************************************/
dkato 0:853f5b7408a7 881 static vdec_error_t BurstLockCheckParam (const vdec_burst_lock_t * const p_burst_lock)
dkato 0:853f5b7408a7 882 {
dkato 0:853f5b7408a7 883 vdec_error_t vdec_error;
dkato 0:853f5b7408a7 884
dkato 0:853f5b7408a7 885 vdec_error = VDEC_OK;
dkato 0:853f5b7408a7 886
dkato 0:853f5b7408a7 887 /* Burst lock */
dkato 0:853f5b7408a7 888 if (p_burst_lock != NULL) {
dkato 0:853f5b7408a7 889 /* Burst lock PLL lock range */
dkato 0:853f5b7408a7 890 if (p_burst_lock->lockrange >= VDEC_LOCK_RANGE_NUM) {
dkato 0:853f5b7408a7 891 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 892 goto END;
dkato 0:853f5b7408a7 893 }
dkato 0:853f5b7408a7 894 /* Burst lock PLL loop gain */
dkato 0:853f5b7408a7 895 if (((uint32_t)p_burst_lock->loopgain & (uint32_t)(~VDEC_CPARA_RANGE_0X00000003)) != 0u) {
dkato 0:853f5b7408a7 896 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 897 goto END;
dkato 0:853f5b7408a7 898 }
dkato 0:853f5b7408a7 899 /* Level for burst lock PLL to re-search free-run frequency */
dkato 0:853f5b7408a7 900 if (((uint32_t)p_burst_lock->locklimit & (uint32_t)(~VDEC_CPARA_RANGE_0X00000003)) != 0u) {
dkato 0:853f5b7408a7 901 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 902 goto END;
dkato 0:853f5b7408a7 903 }
dkato 0:853f5b7408a7 904 /* burst gate pulse position check */
dkato 0:853f5b7408a7 905 if (((uint32_t)p_burst_lock->bgpcheck & (uint32_t)(~VDEC_CPARA_RANGE_0X00000001)) != 0u) {
dkato 0:853f5b7408a7 906 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 907 goto END;
dkato 0:853f5b7408a7 908 }
dkato 0:853f5b7408a7 909 /* burst gate pulse width */
dkato 0:853f5b7408a7 910 if (((uint32_t)p_burst_lock->bgpwidth & (uint32_t)(~VDEC_CPARA_RANGE_0X0000007F)) != 0u) {
dkato 0:853f5b7408a7 911 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 912 goto END;
dkato 0:853f5b7408a7 913 }
dkato 0:853f5b7408a7 914 /* burst gate pulse start position */
dkato 0:853f5b7408a7 915 if (((uint32_t)p_burst_lock->bgpstart & (uint32_t)(~VDEC_CPARA_RANGE_0X000000FF)) != 0u) {
dkato 0:853f5b7408a7 916 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 917 goto END;
dkato 0:853f5b7408a7 918 }
dkato 0:853f5b7408a7 919 }
dkato 0:853f5b7408a7 920 END:
dkato 0:853f5b7408a7 921 return vdec_error;
dkato 0:853f5b7408a7 922 } /* End of function BurstLockCheckParam() */
dkato 0:853f5b7408a7 923
dkato 0:853f5b7408a7 924 /**************************************************************************//**
dkato 0:853f5b7408a7 925 * @brief Checks on ACC and color killer parameter
dkato 0:853f5b7408a7 926 * @param[in] p_acc : ACC and color killer parameter
dkato 0:853f5b7408a7 927 * @retval Error code
dkato 0:853f5b7408a7 928 *****************************************************************************/
dkato 0:853f5b7408a7 929 static vdec_error_t AccColorKillerCheckParam (const vdec_acc_t * const p_acc)
dkato 0:853f5b7408a7 930 {
dkato 0:853f5b7408a7 931 vdec_error_t vdec_error;
dkato 0:853f5b7408a7 932
dkato 0:853f5b7408a7 933 vdec_error = VDEC_OK;
dkato 0:853f5b7408a7 934
dkato 0:853f5b7408a7 935 /* ACC/color killer */
dkato 0:853f5b7408a7 936 if (p_acc != NULL) {
dkato 0:853f5b7408a7 937 /* Maximum ACC Gain */
dkato 0:853f5b7408a7 938 if (p_acc->accmaxgain >= VDEC_ACC_MAX_GAIN_NUM) {
dkato 0:853f5b7408a7 939 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 940 goto END;
dkato 0:853f5b7408a7 941 }
dkato 0:853f5b7408a7 942 /* ACC reference color burst amplitude */
dkato 0:853f5b7408a7 943 if (((uint32_t)p_acc->acclevel & (uint32_t)(~VDEC_CPARA_RANGE_0X000001FF)) != 0u) {
dkato 0:853f5b7408a7 944 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 945 goto END;
dkato 0:853f5b7408a7 946 }
dkato 0:853f5b7408a7 947 /* Chroma manual gain (sub) */
dkato 0:853f5b7408a7 948 if (p_acc->chromasubgain >= VDEC_CHRM_SB_GAIN_NUM) {
dkato 0:853f5b7408a7 949 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 950 goto END;
dkato 0:853f5b7408a7 951 }
dkato 0:853f5b7408a7 952 /* Chroma manual gain (main) */
dkato 0:853f5b7408a7 953 if (((uint32_t)p_acc->chromamaingain & (uint32_t)(~VDEC_CPARA_RANGE_0X000001FF)) != 0u) {
dkato 0:853f5b7408a7 954 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 955 goto END;
dkato 0:853f5b7408a7 956 }
dkato 0:853f5b7408a7 957 /* ACC response speed */
dkato 0:853f5b7408a7 958 if (((uint32_t)p_acc->accresponse & (uint32_t)(~VDEC_CPARA_RANGE_0X00000003)) != 0u) {
dkato 0:853f5b7408a7 959 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 960 goto END;
dkato 0:853f5b7408a7 961 }
dkato 0:853f5b7408a7 962 /* ACC gain adjustment accuracy */
dkato 0:853f5b7408a7 963 if (((uint32_t)p_acc->accprecis & (uint32_t)(~VDEC_CPARA_RANGE_0X0000003F)) != 0u) {
dkato 0:853f5b7408a7 964 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 965 goto END;
dkato 0:853f5b7408a7 966 }
dkato 0:853f5b7408a7 967 /* Color killer operation start point */
dkato 0:853f5b7408a7 968 if (((uint32_t)p_acc->killerlevel & (uint32_t)(~VDEC_CPARA_RANGE_0X0000003F)) != 0u) {
dkato 0:853f5b7408a7 969 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 970 goto END;
dkato 0:853f5b7408a7 971 }
dkato 0:853f5b7408a7 972 /* The offset level to turn off the color killer */
dkato 0:853f5b7408a7 973 if (((uint32_t)p_acc->killeroffset & (uint32_t)(~VDEC_CPARA_RANGE_0X0000000F)) != 0u) {
dkato 0:853f5b7408a7 974 vdec_error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 975 goto END;
dkato 0:853f5b7408a7 976 }
dkato 0:853f5b7408a7 977 }
dkato 0:853f5b7408a7 978 END:
dkato 0:853f5b7408a7 979 return vdec_error;
dkato 0:853f5b7408a7 980 } /* End of function AccColorKillerCheckParam() */
dkato 0:853f5b7408a7 981
dkato 0:853f5b7408a7 982 #endif /* R_VDEC_CHECK_PARAMETERS */
dkato 0:853f5b7408a7 983