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TARGET_KW41Z/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_KW41Z/device/system_MKW41Z4.h@132:9baf128c2fab, 2016-12-20 (annotated)

Committer:
<>
Date:
Tue Dec 20 15:36:52 2016 +0000
Revision:
132:9baf128c2fab
Release 132 of the mbed library



Ports for Upcoming Targets



3241: Add support for FRDM-KW41 https://github.com/ARMmbed/mbed-os/pull/3241

3291: Adding mbed enabled Maker board with NINA-B1 and EVA-M8Q https://github.com/ARMmbed/mbed-os/pull/3291



Fixes and Changes



3062: TARGET_STM :USB device FS  https://github.com/ARMmbed/mbed-os/pull/3062

3213: STM32: Refactor us_ticker.c + hal_tick.c files https://github.com/ARMmbed/mbed-os/pull/3213

3288: Dev spi asynch l0l1 https://github.com/ARMmbed/mbed-os/pull/3288

3289: Bug fix of initial value of interrupt edge in "gpio_irq_init" function. https://github.com/ARMmbed/mbed-os/pull/3289

3302: STM32F4 AnalogIn - Clear VBATE and TSVREFE bits before configuring ADC channels https://github.com/ARMmbed/mbed-os/pull/3302

3320: STM32 - Add ADC_VREF label https://github.com/ARMmbed/mbed-os/pull/3320

3321: no HSE available by default for NUCLEO_L432KC https://github.com/ARMmbed/mbed-os/pull/3321

3352: ublox eva nina - fix line endings https://github.com/ARMmbed/mbed-os/pull/3352

3322: DISCO_L053C8 doesn't support LSE https://github.com/ARMmbed/mbed-os/pull/3322

3345: STM32 - Remove TIM_IT_UPDATE flag in HAL_Suspend/ResumeTick functions https://github.com/ARMmbed/mbed-os/pull/3345

3309: [NUC472/M453] Fix CI failed tests https://github.com/ARMmbed/mbed-os/pull/3309

3157: [Silicon Labs] Adding support for EFR32MG1 wireless SoC https://github.com/ARMmbed/mbed-os/pull/3157

3301: I2C - correct return values for write functions (docs) - part 1 https://github.com/ARMmbed/mbed-os/pull/3301

3303: Fix #2956 #2939 #2957 #2959 #2960: Add HAL_DeInit function in gpio_irq destructor https://github.com/ARMmbed/mbed-os/pull/3303

3304: STM32L476: no HSE is present in NUCLEO and DISCO boards https://github.com/ARMmbed/mbed-os/pull/3304

3318: Register map changes for RevG https://github.com/ARMmbed/mbed-os/pull/3318

3317: NUCLEO_F429ZI has integrated LSE https://github.com/ARMmbed/mbed-os/pull/3317

3312: K64F: SPI Asynch API implementation https://github.com/ARMmbed/mbed-os/pull/3312

3324: Dev i2c common code https://github.com/ARMmbed/mbed-os/pull/3324

3369: Add CAN2 missing pins for connector CN12 https://github.com/ARMmbed/mbed-os/pull/3369

3377: STM32 NUCLEO-L152RE Update system core clock to 32MHz https://github.com/ARMmbed/mbed-os/pull/3377

3378: K66F: Enable LWIP feature https://github.com/ARMmbed/mbed-os/pull/3378

3382: [MAX32620] Fixing serial readable function. https://github.com/ARMmbed/mbed-os/pull/3382

3399: NUCLEO_F103RB - Add SERIAL_FC feature https://github.com/ARMmbed/mbed-os/pull/3399

3409: STM32L1 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3409

3416: Renames i2c_api.c for STM32F1 targets to fix IAR exporter https://github.com/ARMmbed/mbed-os/pull/3416

3348: Fix frequency function of CAN driver. https://github.com/ARMmbed/mbed-os/pull/3348

3366: NUCLEO_F412ZG - Add new platform https://github.com/ARMmbed/mbed-os/pull/3366

3379: STM32F0 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3379

3393: ISR register never re-evaluated in HAL_DMA_PollForTransfer for STM32F4 https://github.com/ARMmbed/mbed-os/pull/3393

3408: STM32F7 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3408

3411: STM32L0 : map ST HAL assert into MBED assert https://github.com/ARMmbed/mbed-os/pull/3411

3424: STM32F4 - FIX to add the update of hdma->State variable https://github.com/ARMmbed/mbed-os/pull/3424

3427: Fix stm i2c slave https://github.com/ARMmbed/mbed-os/pull/3427

3429: Fix stm i2c fix init https://github.com/ARMmbed/mbed-os/pull/3429

3434: [NUC472/M453] Fix stuck in lp_ticker_init and other updates https://github.com/ARMmbed/mbed-os/pull/3434

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 132:9baf128c2fab 1 /*
<> 132:9baf128c2fab 2 ** ###################################################################
<> 132:9baf128c2fab 3 ** Processors: MKW41Z256VHT4
<> 132:9baf128c2fab 4 ** MKW41Z512VHT4
<> 132:9baf128c2fab 5 **
<> 132:9baf128c2fab 6 ** Compilers: Keil ARM C/C++ Compiler
<> 132:9baf128c2fab 7 ** GNU C Compiler
<> 132:9baf128c2fab 8 ** IAR ANSI C/C++ Compiler for ARM
<> 132:9baf128c2fab 9 **
<> 132:9baf128c2fab 10 ** Reference manual: MKW41Z512RM Rev. 0.1, 04/2016
<> 132:9baf128c2fab 11 ** Version: rev. 1.0, 2015-09-23
<> 132:9baf128c2fab 12 ** Build: b160720
<> 132:9baf128c2fab 13 **
<> 132:9baf128c2fab 14 ** Abstract:
<> 132:9baf128c2fab 15 ** Provides a system configuration function and a global variable that
<> 132:9baf128c2fab 16 ** contains the system frequency. It configures the device and initializes
<> 132:9baf128c2fab 17 ** the oscillator (PLL) that is part of the microcontroller device.
<> 132:9baf128c2fab 18 **
<> 132:9baf128c2fab 19 ** Copyright (c) 2016 Freescale Semiconductor, Inc.
<> 132:9baf128c2fab 20 ** All rights reserved.
<> 132:9baf128c2fab 21 **
<> 132:9baf128c2fab 22 ** Redistribution and use in source and binary forms, with or without modification,
<> 132:9baf128c2fab 23 ** are permitted provided that the following conditions are met:
<> 132:9baf128c2fab 24 **
<> 132:9baf128c2fab 25 ** o Redistributions of source code must retain the above copyright notice, this list
<> 132:9baf128c2fab 26 ** of conditions and the following disclaimer.
<> 132:9baf128c2fab 27 **
<> 132:9baf128c2fab 28 ** o Redistributions in binary form must reproduce the above copyright notice, this
<> 132:9baf128c2fab 29 ** list of conditions and the following disclaimer in the documentation and/or
<> 132:9baf128c2fab 30 ** other materials provided with the distribution.
<> 132:9baf128c2fab 31 **
<> 132:9baf128c2fab 32 ** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
<> 132:9baf128c2fab 33 ** contributors may be used to endorse or promote products derived from this
<> 132:9baf128c2fab 34 ** software without specific prior written permission.
<> 132:9baf128c2fab 35 **
<> 132:9baf128c2fab 36 ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
<> 132:9baf128c2fab 37 ** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
<> 132:9baf128c2fab 38 ** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 132:9baf128c2fab 39 ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
<> 132:9baf128c2fab 40 ** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
<> 132:9baf128c2fab 41 ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
<> 132:9baf128c2fab 42 ** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
<> 132:9baf128c2fab 43 ** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
<> 132:9baf128c2fab 44 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
<> 132:9baf128c2fab 45 ** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 132:9baf128c2fab 46 **
<> 132:9baf128c2fab 47 ** http: www.freescale.com
<> 132:9baf128c2fab 48 ** mail: support@freescale.com
<> 132:9baf128c2fab 49 **
<> 132:9baf128c2fab 50 ** Revisions:
<> 132:9baf128c2fab 51 ** - rev. 1.0 (2015-09-23)
<> 132:9baf128c2fab 52 ** Initial version.
<> 132:9baf128c2fab 53 **
<> 132:9baf128c2fab 54 ** ###################################################################
<> 132:9baf128c2fab 55 */
<> 132:9baf128c2fab 56
<> 132:9baf128c2fab 57 /*!
<> 132:9baf128c2fab 58 * @file MKW41Z4
<> 132:9baf128c2fab 59 * @version 1.0
<> 132:9baf128c2fab 60 * @date 2015-09-23
<> 132:9baf128c2fab 61 * @brief Device specific configuration file for MKW41Z4 (header file)
<> 132:9baf128c2fab 62 *
<> 132:9baf128c2fab 63 * Provides a system configuration function and a global variable that contains
<> 132:9baf128c2fab 64 * the system frequency. It configures the device and initializes the oscillator
<> 132:9baf128c2fab 65 * (PLL) that is part of the microcontroller device.
<> 132:9baf128c2fab 66 */
<> 132:9baf128c2fab 67
<> 132:9baf128c2fab 68 #ifndef _SYSTEM_MKW41Z4_H_
<> 132:9baf128c2fab 69 #define _SYSTEM_MKW41Z4_H_ /**< Symbol preventing repeated inclusion */
<> 132:9baf128c2fab 70
<> 132:9baf128c2fab 71 #ifdef __cplusplus
<> 132:9baf128c2fab 72 extern "C" {
<> 132:9baf128c2fab 73 #endif
<> 132:9baf128c2fab 74
<> 132:9baf128c2fab 75 #include <stdint.h>
<> 132:9baf128c2fab 76
<> 132:9baf128c2fab 77
<> 132:9baf128c2fab 78 #ifndef DISABLE_WDOG
<> 132:9baf128c2fab 79 #define DISABLE_WDOG 1
<> 132:9baf128c2fab 80 #endif
<> 132:9baf128c2fab 81
<> 132:9baf128c2fab 82 /* Define clock source values */
<> 132:9baf128c2fab 83
<> 132:9baf128c2fab 84 #define CPU_XTAL_CLK_HZ 32000000u /* Value of the external crystal or oscillator clock frequency in Hz */
<> 132:9baf128c2fab 85 #define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */
<> 132:9baf128c2fab 86 #define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */
<> 132:9baf128c2fab 87 #define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */
<> 132:9baf128c2fab 88
<> 132:9baf128c2fab 89 /* RF oscillator setting */
<> 132:9baf128c2fab 90 #define SYSTEM_RSIM_CONTROL_VALUE 0xC00100U /* Enable RF oscillator in Run/Wait mode */
<> 132:9baf128c2fab 91
<> 132:9baf128c2fab 92 /* Low power mode enable */
<> 132:9baf128c2fab 93
<> 132:9baf128c2fab 94 /* SMC_PMPROT: ?=0,?=0,AVLP=1,?=0,?=0,?=0,AVLLS=1,?=0 */
<> 132:9baf128c2fab 95 #define SYSTEM_SMC_PMPROT_VALUE (SMC_PMPROT_AVLP_MASK | SMC_PMPROT_ALLS_MASK | SMC_PMPROT_AVLLS_MASK) /* Mask of allowed low power modes used to initialize power modes protection register */
<> 132:9baf128c2fab 96
<> 132:9baf128c2fab 97 #define DEFAULT_SYSTEM_CLOCK 20971520U /* Default System clock value */
<> 132:9baf128c2fab 98
<> 132:9baf128c2fab 99
<> 132:9baf128c2fab 100 /**
<> 132:9baf128c2fab 101 * @brief System clock frequency (core clock)
<> 132:9baf128c2fab 102 *
<> 132:9baf128c2fab 103 * The system clock frequency supplied to the SysTick timer and the processor
<> 132:9baf128c2fab 104 * core clock. This variable can be used by the user application to setup the
<> 132:9baf128c2fab 105 * SysTick timer or configure other parameters. It may also be used by debugger to
<> 132:9baf128c2fab 106 * query the frequency of the debug timer or configure the trace clock speed
<> 132:9baf128c2fab 107 * SystemCoreClock is initialized with a correct predefined value.
<> 132:9baf128c2fab 108 */
<> 132:9baf128c2fab 109 extern uint32_t SystemCoreClock;
<> 132:9baf128c2fab 110
<> 132:9baf128c2fab 111 /**
<> 132:9baf128c2fab 112 * @brief Setup the microcontroller system.
<> 132:9baf128c2fab 113 *
<> 132:9baf128c2fab 114 * Typically this function configures the oscillator (PLL) that is part of the
<> 132:9baf128c2fab 115 * microcontroller device. For systems with variable clock speed it also updates
<> 132:9baf128c2fab 116 * the variable SystemCoreClock. SystemInit is called from startup_device file.
<> 132:9baf128c2fab 117 */
<> 132:9baf128c2fab 118 void SystemInit (void);
<> 132:9baf128c2fab 119
<> 132:9baf128c2fab 120 /**
<> 132:9baf128c2fab 121 * @brief Updates the SystemCoreClock variable.
<> 132:9baf128c2fab 122 *
<> 132:9baf128c2fab 123 * It must be called whenever the core clock is changed during program
<> 132:9baf128c2fab 124 * execution. SystemCoreClockUpdate() evaluates the clock register settings and calculates
<> 132:9baf128c2fab 125 * the current core clock.
<> 132:9baf128c2fab 126 */
<> 132:9baf128c2fab 127 void SystemCoreClockUpdate (void);
<> 132:9baf128c2fab 128
<> 132:9baf128c2fab 129 #ifdef __cplusplus
<> 132:9baf128c2fab 130 }
<> 132:9baf128c2fab 131 #endif
<> 132:9baf128c2fab 132
<> 132:9baf128c2fab 133 #endif /* _SYSTEM_MKW41Z4_H_ */