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TARGET_K22F/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/system_MK22F51212.h@129:0ab6a29f35bf, 2016-11-08 (annotated)

Committer:
<>
Date:
Tue Nov 08 17:28:34 2016 +0000
Revision:
129:0ab6a29f35bf
Parent:
TARGET_K22F/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_K22F/device/system_MK22F51212.h@128:9bcdf88f62b0 
Release 129 of the mbed library



Ports for Upcoming Targets



3011: Add u-blox Sara-N target. https://github.com/ARMmbed/mbed-os/pull/3011

3099: MAX32625 https://github.com/ARMmbed/mbed-os/pull/3099

3151: Add support for FRDM-K82F https://github.com/ARMmbed/mbed-os/pull/3151

3177: New mcu k22512 fixing pr 3136 https://github.com/ARMmbed/mbed-os/pull/3177



Fixes and Changes



3008: NUCLEO_F072RB: Fix wrong timer channel number on pwm PB_5 pin https://github.com/ARMmbed/mbed-os/pull/3008

3013: STM32xx - Change how the ADC internal pins are checked before pinmap_ https://github.com/ARMmbed/mbed-os/pull/3013

3041: [nRF5] - added implementation of API of serial port flow control configuration. https://github.com/ARMmbed/mbed-os/pull/3041

3084: [nrf5] fix in Digital I/O : a gpioe pin was uninitialized badly https://github.com/ARMmbed/mbed-os/pull/3084

3009: TRNG enabled. TRNG APIs implemented. REV A/B/C/D flags removed. Warnings removed https://github.com/ARMmbed/mbed-os/pull/3009

3074: Target stm init gcc alignement https://github.com/ARMmbed/mbed-os/pull/3074

2988: Update of can_api.c fixing #2987 https://github.com/ARMmbed/mbed-os/pull/2988

3173: [Exporters] Add a device_name to microbit entry in targets.json https://github.com/ARMmbed/mbed-os/pull/3173

2969: [nRF52] - switch irq priorities of driver handlers to the lowest level https://github.com/ARMmbed/mbed-os/pull/2969

3184: #3183 Compiler warning in trng_api.c with K64F  https://github.com/ARMmbed/mbed-os/pull/3184

3104: [NuMaker] Support CAN and fix PWM CLK error https://github.com/ARMmbed/mbed-os/pull/3104

3186: MultiTech mDot - add back SPI3 pins https://github.com/ARMmbed/mbed-os/pull/3186

3075: nsapi - Add standardized return types for size and errors https://github.com/ARMmbed/mbed-os/pull/3075

3221: u-blox odin w2 drivers update https://github.com/ARMmbed/mbed-os/pull/3221

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 128:9bcdf88f62b0 1 /*
<> 128:9bcdf88f62b0 2 ** ###################################################################
<> 128:9bcdf88f62b0 3 ** Processors: MK22FN512CAP12
<> 128:9bcdf88f62b0 4 ** MK22FN512VDC12
<> 128:9bcdf88f62b0 5 ** MK22FN512VLH12
<> 128:9bcdf88f62b0 6 ** MK22FN512VLL12
<> 128:9bcdf88f62b0 7 ** MK22FN512VMP12
<> 128:9bcdf88f62b0 8 **
<> 128:9bcdf88f62b0 9 ** Compilers: Keil ARM C/C++ Compiler
<> 128:9bcdf88f62b0 10 ** Freescale C/C++ for Embedded ARM
<> 128:9bcdf88f62b0 11 ** GNU C Compiler
<> 128:9bcdf88f62b0 12 ** IAR ANSI C/C++ Compiler for ARM
<> 128:9bcdf88f62b0 13 **
<> 128:9bcdf88f62b0 14 ** Reference manual: K22P121M120SF7RM, Rev. 1, March 24, 2014
<> 128:9bcdf88f62b0 15 ** Version: rev. 2.8, 2015-02-19
<> 128:9bcdf88f62b0 16 ** Build: b151217
<> 128:9bcdf88f62b0 17 **
<> 128:9bcdf88f62b0 18 ** Abstract:
<> 128:9bcdf88f62b0 19 ** Provides a system configuration function and a global variable that
<> 128:9bcdf88f62b0 20 ** contains the system frequency. It configures the device and initializes
<> 128:9bcdf88f62b0 21 ** the oscillator (PLL) that is part of the microcontroller device.
<> 128:9bcdf88f62b0 22 **
<> 128:9bcdf88f62b0 23 ** Copyright (c) 2015 Freescale Semiconductor, Inc.
<> 128:9bcdf88f62b0 24 ** All rights reserved.
<> 128:9bcdf88f62b0 25 **
<> 128:9bcdf88f62b0 26 ** Redistribution and use in source and binary forms, with or without modification,
<> 128:9bcdf88f62b0 27 ** are permitted provided that the following conditions are met:
<> 128:9bcdf88f62b0 28 **
<> 128:9bcdf88f62b0 29 ** o Redistributions of source code must retain the above copyright notice, this list
<> 128:9bcdf88f62b0 30 ** of conditions and the following disclaimer.
<> 128:9bcdf88f62b0 31 **
<> 128:9bcdf88f62b0 32 ** o Redistributions in binary form must reproduce the above copyright notice, this
<> 128:9bcdf88f62b0 33 ** list of conditions and the following disclaimer in the documentation and/or
<> 128:9bcdf88f62b0 34 ** other materials provided with the distribution.
<> 128:9bcdf88f62b0 35 **
<> 128:9bcdf88f62b0 36 ** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
<> 128:9bcdf88f62b0 37 ** contributors may be used to endorse or promote products derived from this
<> 128:9bcdf88f62b0 38 ** software without specific prior written permission.
<> 128:9bcdf88f62b0 39 **
<> 128:9bcdf88f62b0 40 ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
<> 128:9bcdf88f62b0 41 ** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
<> 128:9bcdf88f62b0 42 ** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 128:9bcdf88f62b0 43 ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
<> 128:9bcdf88f62b0 44 ** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
<> 128:9bcdf88f62b0 45 ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
<> 128:9bcdf88f62b0 46 ** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
<> 128:9bcdf88f62b0 47 ** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
<> 128:9bcdf88f62b0 48 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
<> 128:9bcdf88f62b0 49 ** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 128:9bcdf88f62b0 50 **
<> 128:9bcdf88f62b0 51 ** http: www.freescale.com
<> 128:9bcdf88f62b0 52 ** mail: support@freescale.com
<> 128:9bcdf88f62b0 53 **
<> 128:9bcdf88f62b0 54 ** Revisions:
<> 128:9bcdf88f62b0 55 ** - rev. 1.0 (2013-07-23)
<> 128:9bcdf88f62b0 56 ** Initial version.
<> 128:9bcdf88f62b0 57 ** - rev. 1.1 (2013-09-17)
<> 128:9bcdf88f62b0 58 ** RM rev. 0.4 update.
<> 128:9bcdf88f62b0 59 ** - rev. 2.0 (2013-10-29)
<> 128:9bcdf88f62b0 60 ** Register accessor macros added to the memory map.
<> 128:9bcdf88f62b0 61 ** Symbols for Processor Expert memory map compatibility added to the memory map.
<> 128:9bcdf88f62b0 62 ** Startup file for gcc has been updated according to CMSIS 3.2.
<> 128:9bcdf88f62b0 63 ** System initialization updated.
<> 128:9bcdf88f62b0 64 ** - rev. 2.1 (2013-10-30)
<> 128:9bcdf88f62b0 65 ** Definition of BITBAND macros updated to support peripherals with 32-bit acces disabled.
<> 128:9bcdf88f62b0 66 ** - rev. 2.2 (2013-12-20)
<> 128:9bcdf88f62b0 67 ** Update according to reference manual rev. 0.6,
<> 128:9bcdf88f62b0 68 ** - rev. 2.3 (2014-01-13)
<> 128:9bcdf88f62b0 69 ** Update according to reference manual rev. 0.61,
<> 128:9bcdf88f62b0 70 ** - rev. 2.4 (2014-02-10)
<> 128:9bcdf88f62b0 71 ** The declaration of clock configurations has been moved to separate header file system_MK22F51212.h
<> 128:9bcdf88f62b0 72 ** - rev. 2.5 (2014-05-06)
<> 128:9bcdf88f62b0 73 ** Update according to reference manual rev. 1.0,
<> 128:9bcdf88f62b0 74 ** Update of system and startup files.
<> 128:9bcdf88f62b0 75 ** Module access macro module_BASES replaced by module_BASE_PTRS.
<> 128:9bcdf88f62b0 76 ** - rev. 2.6 (2014-08-28)
<> 128:9bcdf88f62b0 77 ** Update of system files - default clock configuration changed.
<> 128:9bcdf88f62b0 78 ** Update of startup files - possibility to override DefaultISR added.
<> 128:9bcdf88f62b0 79 ** - rev. 2.7 (2014-10-14)
<> 128:9bcdf88f62b0 80 ** Interrupt INT_LPTimer renamed to INT_LPTMR0, interrupt INT_Watchdog renamed to INT_WDOG_EWM.
<> 128:9bcdf88f62b0 81 ** - rev. 2.8 (2015-02-19)
<> 128:9bcdf88f62b0 82 ** Renamed interrupt vector LLW to LLWU.
<> 128:9bcdf88f62b0 83 **
<> 128:9bcdf88f62b0 84 ** ###################################################################
<> 128:9bcdf88f62b0 85 */
<> 128:9bcdf88f62b0 86
<> 128:9bcdf88f62b0 87 /*!
<> 128:9bcdf88f62b0 88 * @file MK22F51212
<> 128:9bcdf88f62b0 89 * @version 2.8
<> 128:9bcdf88f62b0 90 * @date 2015-02-19
<> 128:9bcdf88f62b0 91 * @brief Device specific configuration file for MK22F51212 (header file)
<> 128:9bcdf88f62b0 92 *
<> 128:9bcdf88f62b0 93 * Provides a system configuration function and a global variable that contains
<> 128:9bcdf88f62b0 94 * the system frequency. It configures the device and initializes the oscillator
<> 128:9bcdf88f62b0 95 * (PLL) that is part of the microcontroller device.
<> 128:9bcdf88f62b0 96 */
<> 128:9bcdf88f62b0 97
<> 128:9bcdf88f62b0 98 #ifndef _SYSTEM_MK22F51212_H_
<> 128:9bcdf88f62b0 99 #define _SYSTEM_MK22F51212_H_ /**< Symbol preventing repeated inclusion */
<> 128:9bcdf88f62b0 100
<> 128:9bcdf88f62b0 101 #ifdef __cplusplus
<> 128:9bcdf88f62b0 102 extern "C" {
<> 128:9bcdf88f62b0 103 #endif
<> 128:9bcdf88f62b0 104
<> 128:9bcdf88f62b0 105 #include <stdint.h>
<> 128:9bcdf88f62b0 106
<> 128:9bcdf88f62b0 107
<> 128:9bcdf88f62b0 108 #ifndef DISABLE_WDOG
<> 128:9bcdf88f62b0 109 #define DISABLE_WDOG 1
<> 128:9bcdf88f62b0 110 #endif
<> 128:9bcdf88f62b0 111
<> 128:9bcdf88f62b0 112 /* Define clock source values */
<> 128:9bcdf88f62b0 113
<> 128:9bcdf88f62b0 114 #define CPU_XTAL_CLK_HZ 8000000u /* Value of the external crystal or oscillator clock frequency in Hz */
<> 128:9bcdf88f62b0 115 #define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */
<> 128:9bcdf88f62b0 116 #define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */
<> 128:9bcdf88f62b0 117 #define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */
<> 128:9bcdf88f62b0 118 #define CPU_INT_IRC_CLK_HZ 48000000u /* Value of the 48M internal oscillator clock frequency in Hz */
<> 128:9bcdf88f62b0 119
<> 128:9bcdf88f62b0 120 /* RTC oscillator setting */
<> 128:9bcdf88f62b0 121 /* RTC_CR: SC2P=0,SC4P=0,SC8P=0,SC16P=0,CLKO=1,OSCE=1,WPS=0,UM=0,SUP=0,WPE=0,SWR=0 */
<> 128:9bcdf88f62b0 122 #define SYSTEM_RTC_CR_VALUE 0x0300U /* RTC_CR */
<> 128:9bcdf88f62b0 123
<> 128:9bcdf88f62b0 124 /* Low power mode enable */
<> 128:9bcdf88f62b0 125 /* SMC_PMPROT: AHSRUN=1,AVLP=1,ALLS=1,AVLLS=1 */
<> 128:9bcdf88f62b0 126 #define SYSTEM_SMC_PMPROT_VALUE 0xAAU /* SMC_PMPROT */
<> 128:9bcdf88f62b0 127
<> 128:9bcdf88f62b0 128 #define DEFAULT_SYSTEM_CLOCK 20971520u /* Default System clock value */
<> 128:9bcdf88f62b0 129
<> 128:9bcdf88f62b0 130
<> 128:9bcdf88f62b0 131 /**
<> 128:9bcdf88f62b0 132 * @brief System clock frequency (core clock)
<> 128:9bcdf88f62b0 133 *
<> 128:9bcdf88f62b0 134 * The system clock frequency supplied to the SysTick timer and the processor
<> 128:9bcdf88f62b0 135 * core clock. This variable can be used by the user application to setup the
<> 128:9bcdf88f62b0 136 * SysTick timer or configure other parameters. It may also be used by debugger to
<> 128:9bcdf88f62b0 137 * query the frequency of the debug timer or configure the trace clock speed
<> 128:9bcdf88f62b0 138 * SystemCoreClock is initialized with a correct predefined value.
<> 128:9bcdf88f62b0 139 */
<> 128:9bcdf88f62b0 140 extern uint32_t SystemCoreClock;
<> 128:9bcdf88f62b0 141
<> 128:9bcdf88f62b0 142 /**
<> 128:9bcdf88f62b0 143 * @brief Setup the microcontroller system.
<> 128:9bcdf88f62b0 144 *
<> 128:9bcdf88f62b0 145 * Typically this function configures the oscillator (PLL) that is part of the
<> 128:9bcdf88f62b0 146 * microcontroller device. For systems with variable clock speed it also updates
<> 128:9bcdf88f62b0 147 * the variable SystemCoreClock. SystemInit is called from startup_device file.
<> 128:9bcdf88f62b0 148 */
<> 128:9bcdf88f62b0 149 void SystemInit (void);
<> 128:9bcdf88f62b0 150
<> 128:9bcdf88f62b0 151 /**
<> 128:9bcdf88f62b0 152 * @brief Updates the SystemCoreClock variable.
<> 128:9bcdf88f62b0 153 *
<> 128:9bcdf88f62b0 154 * It must be called whenever the core clock is changed during program
<> 128:9bcdf88f62b0 155 * execution. SystemCoreClockUpdate() evaluates the clock register settings and calculates
<> 128:9bcdf88f62b0 156 * the current core clock.
<> 128:9bcdf88f62b0 157 */
<> 128:9bcdf88f62b0 158 void SystemCoreClockUpdate (void);
<> 128:9bcdf88f62b0 159
<> 128:9bcdf88f62b0 160 #ifdef __cplusplus
<> 128:9bcdf88f62b0 161 }
<> 128:9bcdf88f62b0 162 #endif
<> 128:9bcdf88f62b0 163
<> 128:9bcdf88f62b0 164 #endif /* _SYSTEM_MK22F51212_H_ */