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Revision 83:8a40adfe8776, committed 2014-04-28
- Comitter:
- bogdanm
- Date:
- Mon Apr 28 17:39:05 2014 +0100
- Parent:
- 82:6473597d706e
- Child:
- 84:0b3ab51c8877
- Commit message:
- Release 83 of the mbed library
Main changes:
- updated tests
- K64F TCP/IP support
- lots of fixes in various targets
Changed in this revision
--- a/BusIn.h Mon Apr 07 18:28:36 2014 +0100 +++ b/BusIn.h Mon Apr 28 17:39:05 2014 +0100 @@ -51,7 +51,13 @@ * An integer with each bit corresponding to the value read from the associated DigitalIn pin */ int read(); - + + /** Set the input pin mode + * + * @param mode PullUp, PullDown, PullNone + */ + void mode(PinMode pull); + #ifdef MBED_OPERATORS /** A shorthand for read() */
--- a/TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_K64F/device.h Mon Apr 07 18:28:36 2014 +0100 +++ b/TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_K64F/device.h Mon Apr 28 17:39:05 2014 +0100 @@ -49,7 +49,7 @@ #define DEVICE_DEBUG_AWARENESS 0 -#define DEVICE_STDIO_MESSAGES 0 +#define DEVICE_STDIO_MESSAGES 1 #define DEVICE_ERROR_RED 1
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/common/phyksz8081/fsl_phy_driver.h Mon Apr 28 17:39:05 2014 +0100 @@ -0,0 +1,190 @@ +/* + * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * o Redistributions of source code must retain the above copyright notice, this list + * of conditions and the following disclaimer. + * + * o Redistributions in binary form must reproduce the above copyright notice, this + * list of conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. + * + * o Neither the name of Freescale Semiconductor, Inc. nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef __FSL_PHY_DRIVER_H__ +#define __FSL_PHY_DRIVER_H__ + +#include <stdint.h> +#include <stdbool.h> +#include "fsl_enet_driver.h" +/*! + * @addtogroup phy_driver + * @{ + */ + +/*! @file*/ + +/******************************************************************************* + * Definitions + ******************************************************************************/ +/*! @brief Defines the PHY return status. */ +typedef enum _phy_status +{ + kStatus_PHY_Success = 0, /*!< Success*/ + kStatus_PHY_InvaildInput = 1, /*!< Invalid PHY input parameter*/ + kStatus_PHY_TimeOut = 2, /*!< PHY timeout*/ + kStatus_PHY_Fail = 3 /*!< PHY fail*/ +} phy_status_t; + +/*! @brief Defines the ENET timeout.*/ +typedef enum _phy_timeout +{ + kPhyTimeout = 0x10000, /*!< ENET resets timeout.*/ +} phy_timeout_t; + +/*! @brief Defines the PHY register.*/ +typedef enum _enet_phy_register +{ + kEnetPhyCR = 0, /*!< PHY control register */ + kEnetPhySR = 1, /*!< PHY status register*/ + kEnetPhyId1 = 2, /*!< PHY identification register 1*/ + kEnetPhyId2 = 3, /*!< PHY identification register 2*/ + kEnetPhyCt2 = 0x1e /*!< PHY control2 register*/ +} enet_phy_register_t; + +/*! @brief Defines the control flag.*/ +typedef enum _enet_phy_control +{ + kEnetPhyAutoNeg = 0x1000,/*!< ENET PHY auto negotiation control*/ + kEnetPhySpeed = 0x2000, /*! ENET PHY speed control*/ + kEnetPhyLoop = 0x4000, /*!< ENET PHY loop control*/ + kEnetPhyReset = 0x8000, /*!< ENET PHY reset control*/ + kEnetPhy10HalfDuplex = 0x01, /*!< ENET PHY 10 M half duplex*/ + kEnetPhy100HalfDuplex = 0x02,/*!< ENET PHY 100 M half duplex*/ + kEnetPhy10FullDuplex = 0x05,/*!< ENET PHY 10 M full duplex*/ + kEnetPhy100FullDuplex = 0x06/*!< ENET PHY 100 M full duplex*/ +} enet_phy_control_t; + +/*! @brief Defines the PHY link speed. */ +typedef enum _enet_phy_speed +{ + kEnetSpeed10M = 0, /*!< ENET PHY 10 M speed*/ + kEnetSpeed100M = 1 /*!< ENET PHY 100 M speed*/ +} enet_phy_speed_t; + +/*! @brief Defines the PHY link duplex.*/ +typedef enum _enet_phy_duplex +{ + kEnetHalfDuplex = 0, /*!< ENET PHY half duplex*/ + kEnetFullDuplex = 1 /*!< ENET PHY full duplex*/ +} enet_phy_duplex_t; + +/*! @brief Defines the PHY status.*/ +typedef enum _enet_phy_status +{ + kEnetPhyLinkStatus = 0x4, /*!< ENET PHY link status bit*/ + kEnetPhyAutoNegAble = 0x08, /*!< ENET PHY auto negotiation ability*/ + kEnetPhyAutoNegComplete = 0x20, /*!< ENET PHY auto negotiation complete*/ + kEnetPhySpeedDulpexMask = 0x07 /*!< ENET PHY speed mask on status register 2*/ +} enet_phy_status_t; + +/*! @brief Defines the basic PHY application.*/ +typedef struct ENETPhyApi +{ + uint32_t (* phy_auto_discover)(enet_dev_if_t * enetIfPtr);/*!< PHY auto discover*/ + uint32_t (* phy_init)(enet_dev_if_t * enetIfPtr);/*!< PHY initialize*/ + uint32_t (* phy_get_link_speed)(enet_dev_if_t * enetIfPtr, enet_phy_speed_t *speed);/*!< Get PHY speed*/ + uint32_t (* phy_get_link_status)(enet_dev_if_t * enetIfPtr, bool *status);/*! Get PHY link status*/ + uint32_t (* phy_get_link_duplex)(enet_dev_if_t * enetIfPtr, enet_phy_duplex_t *duplex);/*!< Get PHY link duplex*/ +} enet_phy_api_t; + +/******************************************************************************* + * Global variables + ******************************************************************************/ +extern const enet_phy_api_t g_enetPhyApi; + +/******************************************************************************* + * API + ******************************************************************************/ + +#if defined(__cplusplus) +extern "C" { +#endif + +/*! + * @name PHY Driver + * @{ + */ + +/*! + * @brief Initializes PHY. + * + * @param enetIfPtr The ENET context structure. + * @return The execution status. + */ +uint32_t phy_init(enet_dev_if_t * enetIfPtr); + +/*! + * @brief PHY address auto discover. + * + * @param enetIfPtr The ENET context structure. + * @return The execution status. + */ +uint32_t phy_auto_discover(enet_dev_if_t * enetIfPtr); + +/*! + * @brief Gets the PHY link speed. + * + * @param enetIfPtr The ENET context structure. + * @param status The link speed of PHY. + * @return The execution status. + */ +uint32_t phy_get_link_speed(enet_dev_if_t * enetIfPtr, enet_phy_speed_t *status); + +/*! + * @brief Gets the PHY link status. + * + * @param enetIfPtr The ENET context structure. + * @param status The link on or down status of the PHY. + * @return The execution status. + */ +uint32_t phy_get_link_status(enet_dev_if_t * enetIfPtr, bool *status); + +/*! + * @brief Gets the PHY link duplex. + * + * @param enetIfPtr The ENET context structure. + * @param status The link duplex status of PHY. + * @return The execution status. + */ +uint32_t phy_get_link_duplex(enet_dev_if_t * enetIfPtr, enet_phy_duplex_t *status); + +/* @} */ + +#if defined(__cplusplus) +extern } +#endif + +/*! @}*/ + +#endif /* __FSL_PHY_DRIVER_H__ */ +/******************************************************************************* + * EOF + ******************************************************************************/ +
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/drivers/enet/fsl_enet_driver.h Mon Apr 28 17:39:05 2014 +0100 @@ -0,0 +1,947 @@ +/* + * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * o Redistributions of source code must retain the above copyright notice, this list + * of conditions and the following disclaimer. + * + * o Redistributions in binary form must reproduce the above copyright notice, this + * list of conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. + * + * o Neither the name of Freescale Semiconductor, Inc. nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef __FSL_ENET_DRIVER_H__ +#define __FSL_ENET_DRIVER_H__ + +#include <stdint.h> +#include <stdbool.h> +#include "fsl_enet_hal.h" +#include "fsl_os_abstraction.h" +/*! + * @addtogroup enet_driver + * @{ + */ + +/******************************************************************************* + * Definitions + + ******************************************************************************/ +/*! @brief Defines the approach: ENET interrupt handler do receive */ +#define ENET_RECEIVE_ALL_INTERRUPT 0 + +/*! @brief Defines the statistic enable macro.*/ +#define ENET_ENABLE_DETAIL_STATS 0 + +/*! @brief Defines the alignment operation.*/ +#define ENET_ALIGN(x,align) ((unsigned int)((x) + ((align)-1)) & (unsigned int)(~(unsigned int)((align)- 1))) + +#if FSL_FEATURE_ENET_SUPPORT_PTP +/*! @brief Defines the PTP IOCTL macro.*/ +typedef enum _enet_ptp_ioctl +{ + kEnetPtpGetRxTimestamp = 0, /*!< ENET PTP gets receive timestamp*/ + kEnetPtpGetTxTimestamp, /*!< ENET PTP gets transmit timestamp*/ + kEnetPtpGetCurrentTime, /*!< ENET PTP gets current time*/ + kEnetPtpSetCurrentTime, /*!< ENET PTP sets current time*/ + kEnetPtpFlushTimestamp, /*!< ENET PTP flushes timestamp*/ + kEnetPtpCorrectTime, /*!< ENET PTP time correction*/ + kEnetPtpSendEthernetPtpV2, /*!< ENET PTPv2 sends Ethernet frame*/ + kEnetPtpReceiveEthernetPtpV2 /*!< ENET PTPv2 receives with Ethernet frame*/ +} enet_ptp_ioctl_t; + +/*! @brief Defines the PTP message buffer number.*/ +typedef enum _enet_ptp_buffer_number +{ + kEnetPtpL2bufferNumber = 10, /*!< PTP layer2 frame buffer number*/ + kEnetPtpRingNumber = 25 /*!< PTP Ring buffer number*/ +} enet_ptp_buffer_number_t; + +/*! @brief Defines the ENET PTP message related constant.*/ +typedef enum _enet_ptp_event_type +{ + kEnetPtpSourcePortIdLen = 10, /*!< PTP message sequence id length*/ + kEnetPtpEventMsgType = 3, /*!< PTP event message type*/ + kEnetPtpEventPort = 319, /*!< PTP event port number*/ + kEnetPtpGnrlPort = 320 /*!< PTP general port number*/ +} enet_ptp_event_type_t; + +/*! @brief Defines all ENET PTP content offsets in the IPv4 PTP UDP/IP multicast message.*/ +typedef enum _enet_ipv4_ptp_content_offset +{ + kEnetPtpIpVersionOffset = 0xe, /*!< IPv4 PTP message IP version offset*/ + kEnetPtpUdpProtocolOffset = 0x17,/*!< IPv4 PTP message UDP protocol offset*/ + kEnetPtpUdpPortOffset = 0x24, /*!< IPv4 PTP message UDP port offset*/ + kEnetPtpUdpMsgTypeOffset = 0x2a, /*!< IPv4 PTP message UDP message type offset*/ + kEnetPtpUdpVersionoffset = 0x2b, /*!< IPv4 PTP message UDP version offset*/ + kEnetPtpUdpClockIdOffset = 0x3e, /*!< IPv4 PTP message UDP clock id offset*/ + kEnetPtpUdpSequenIdOffset = 0x48,/*!< IPv4 PTP message UDP sequence id offset*/ + kEnetPtpUdpCtlOffset = 0x4a /*!< IPv4 PTP message UDP control offset*/ +} enet_ipv4_ptp_content_offset_t; + +/*! @brief Defines all ENET PTP content offset in THE IPv6 PTP UDP/IP multicast message.*/ +typedef enum _enet_ipv6_ptp_content_offset +{ + kEnetPtpIpv6UdpProtocolOffset = 0x14, /*!< IPv6 PTP message UDP protocol offset*/ + kEnetPtpIpv6UdpPortOffset = 0x38, /*!< IPv6 PTP message UDP port offset*/ + kEnetPtpIpv6UdpMsgTypeOffset = 0x3e, /*!< IPv6 PTP message UDP message type offset*/ + kEnetPtpIpv6UdpVersionOffset = 0x3f, /*!< IPv6 PTP message UDP version offset*/ + kEnetPtpIpv6UdpClockIdOffset = 0x52, /*!< IPv6 PTP message UDP clock id offset*/ + kEnetPtpIpv6UdpSequenceIdOffset = 0x5c,/*!< IPv6 PTP message UDP sequence id offset*/ + kEnetPtpIpv6UdpCtlOffset = 0x5e /*!< IPv6 PTP message UDP control offset*/ +} enet_ipv6_ptp_content_offset_t; + +/*! @brief Defines all ENET PTP content offset in the PTP Layer2 Ethernet message.*/ +typedef enum _enet_ethernet_ptp_content_offset +{ + kEnetPtpEtherPktTypeOffset = 0x0c, /*!< PTPv2 message Ethernet packet type offset*/ + kEnetPtpEtherMsgTypeOffset = 0x0e, /*!< PTPv2 message Ethernet message type offset*/ + kEnetPtpEtherVersionOffset = 0x0f, /*!< PTPv2 message Ethernet version type offset*/ + kEnetPtpEtherClockIdOffset = 0x22, /*!< PTPv2 message Ethernet clock id offset*/ + kEnetPtpEtherSequenceIdOffset = 0x2c,/*!< PTPv2 message Ethernet sequence id offset*/ + kEnetPtpEtherCtlOffset = 0x2e /*!< PTPv2 message Ethernet control offset*/ +} enet_ethernet_ptp_content_offset_t; + +/*! @brief Defines the 1588 timer parameters.*/ +typedef enum _enet_ptp_timer_wrap_period +{ + kEnetPtpAtperVaule = 1000000000, /*!< PTP timer wrap around one second */ + kEnetBaseIncreaseUnit = 2 /*!< PTP timer adjusts clock and increases value to 2*/ +} enet_ptp_timer_wrap_period_t; +#endif + +/*! @brief Defines the interrupt source index for the interrupt vector change table.*/ +typedef enum _enet_interrupt_number +{ + kEnetTstimerInt = 0, /*!< Timestamp interrupt*/ + kEnetTsAvailInt, /*!< TS-avail interrupt*/ + kEnetWakeUpInt, /*!< Wakeup interrupt*/ + kEnetPlrInt, /*!< Plr interrupt*/ + kEnetUnInt, /*!< Un interrupt*/ + kEnetRlInt, /*!< RL interrupt*/ + kEnetLcInt, /*!< LC interrupt*/ + kEnetEberrInt, /*!< Eberr interrupt*/ + kEnetMiiInt, /*!< MII interrupt*/ + kEnetRxbInt , /*!< Receive byte interrupt*/ + kEnetRxfInt, /*!< Receive frame interrupt*/ + kEnetTxbInt, /*!< Transmit byte interrupt*/ + kEnetTxfInt, /*!< Transmit frame interrupt*/ + kEnetGraInt, /*!< Gra interrupt*/ + kEnetBabtInt, /*!< Babt interrupt*/ + kEnetBabrInt, /*!< Babr interrupt*/ + kEnetIntNum /*!< Interrupt number*/ +} enet_interrupt_number_t; + +/*! @brief Defines the ENET main constant.*/ +typedef enum _enet_frame_max +{ + kEnetMaxTimeout = 0x10000, /*!< Maximum timeout*/ + kEnetMaxFrameSize = 1518, /*!< Maximum frame size*/ + kEnetMaxFrameVlanSize = 1522, /*!< Maximum VLAN frame size*/ + kEnetMaxFrameDateSize = 1500, /*!< Maximum frame data size*/ + kEnetMaxFrameBdNumbers = 7, /*!< Maximum buffer descriptor numbers of a frame*/ + kEnetFrameFcsLen = 4, /*!< FCS length*/ + kEnetEthernetHeadLen = 14 /*!< Ethernet Frame header length*/ +} enet_frame_max_t; + +/*! @brief Defines the CRC data for a hash value calculation.*/ +typedef enum _enet_crc_parameter +{ + kEnetCrcData = 0xFFFFFFFFU, /*!< CRC-32 maximum data */ + kEnetCrcOffset = 8, /*!< CRC-32 offset2*/ + kEnetCrcMask1 = 0x3F /*!< CRC-32 mask*/ +} enet_crc_parameter_t; + +/*! @brief Defines the ENET protocol type and main parameters.*/ +typedef enum _enet_protocol_type +{ + kEnetProtocolIeee8023 = 0x88F7, /*!< Packet type Ethernet ieee802.3*/ + kEnetProtocolIpv4 = 0x0800, /*!< Packet type IPv4*/ + kEnetProtocolIpv6 = 0x86dd, /*!< Packet type IPv6*/ + kEnetProtocol8021QVlan = 0x8100, /*!< Packet type VLAN*/ + kEnetPacketUdpVersion = 0x11, /*!< UDP protocol type*/ + kEnetPacketIpv4Version = 0x4, /*!< Packet IP version IPv4*/ + kEnetPacketIpv6Version = 0x6 /*!< Packet IP version IPv6*/ +} enet_protocol_type_t; + +/*! @brief Defines the ENET MAC control Configure*/ +typedef enum _enet_mac_control_flag +{ + kEnetSleepModeEnable = 0x1, /*!< ENET control sleep mode Enable*/ + kEnetPayloadlenCheckEnable = 0x2, /*!< ENET receive payload length check Enable*/ + kEnetRxFlowControlEnable = 0x4, /*!< ENET flow control, receiver detects PAUSE frames and stops transmitting data when a PAUSE frame is detected*/ + kEnetRxCrcFwdEnable = 0x8, /*!< Received frame crc is stripped from the frame*/ + kEnetRxPauseFwdEnable = 0x10,/*!< Pause frames are forwarded to the user application*/ + kEnetRxPadRemoveEnable = 0x20, /*!< Padding is removed from received frames*/ + kEnetRxBcRejectEnable = 0x40, /*!< Broadcast frame reject*/ + kEnetRxPromiscuousEnable = 0x80, /*!< Promiscuous mode enabled*/ + kEnetRxMiiLoopback = 0x100, /*!< MAC MII loopback mode*/ +} enet_mac_control_flag_t; + +/*! @brief Defines the multicast group structure for the ENET device. */ +typedef struct ENETMulticastGroup +{ + enetMacAddr groupAdddr; /*!< Multicast group address*/ + uint32_t hash; /*!< Hash value of the multicast group address*/ + struct ENETMulticastGroup *next; /*!< Pointer of the next group structure*/ + struct ENETMulticastGroup *prv; /*!< Pointer of the previous structure*/ +} enet_multicast_group_t; + +/*! @brief Defines the receive buffer descriptor configure structure.*/ +typedef struct ENETRxBdConfig +{ + uint8_t *rxBdPtrAlign; /*!< Aligned receive buffer descriptor pointer */ + uint8_t *rxBufferAlign; /*!< Aligned receive data buffer pointer */ + uint8_t *rxLargeBufferAlign; /*!< Aligned receive large data buffer pointer*/ + uint8_t rxBdNum; /*!< Aligned receive buffer descriptor pointer*/ + uint8_t rxBufferNum; /*!< Receive buffer number*/ + uint8_t rxLargeBufferNum; /*!< Large receive buffer number*/ + uint32_t rxLargeBufferSizeAlign; /*!< Aligned large receive buffer size*/ +}enet_rxbd_config_t; + +/*! @brief Defines the transmit buffer descriptor configure structure.*/ +typedef struct ENETTxBdConfig +{ + uint8_t *txBdPtrAlign; /*!< Aligned transmit buffer descriptor pointer*/ + uint8_t *txBufferAlign; /*!< Aligned transmit buffer descriptor pointer*/ + uint8_t txBufferNum; /*!< Transmit buffer number*/ + uint32_t txBufferSizeAlign; /*!< Aligned transmit buffer size*/ +}enet_txbd_config_t; + +/*! @brief Defines the basic configuration structure for the ENET device.*/ +typedef struct ENETMacConfig +{ + uint16_t rxBufferSize; /*!< Receive buffer size*/ + uint16_t rxLargeBufferNumber; /*!< Receive large buffer number; Needed only when the BD size is smaller than the maximum frame length.*/ + uint16_t rxBdNumber; /*!< Receive buffer descriptor number*/ + uint16_t txBdNumber; /*!< Transmit buffer descriptor number*/ + enetMacAddr macAddr; /*!< MAC hardware address*/ + enet_config_rmii_t rmiiCfgMode;/*!< RMII configure mode*/ + enet_config_speed_t speed; /*!< Speed configuration*/ + enet_config_duplex_t duplex; /*!< Duplex configuration*/ + /*!< Mac control configure, it is recommended to use enet_mac_control_flag_t + it is special control set for loop mode, sleep mode, crc forward/terminate etc*/ + uint32_t macCtlConfigure; + bool isTxAccelEnabled;/*!< Switcher to enable transmit accelerator*/ + bool isRxAccelEnabled;/*!< Switcher to enable receive accelerator*/ + bool isStoreAndFwEnabled; /*!< Switcher to enable store and forward*/ + enet_config_rx_accelerator_t rxAcceler; /*!< Receive accelerator configure*/ + enet_config_tx_accelerator_t txAcceler; /*!< Transmit accelerator configure*/ + bool isVlanEnabled; /*!< Switcher to enable VLAN frame*/ + bool isPhyAutoDiscover;/*!< Switcher to use PHY auto discover*/ + uint32_t miiClock; /*!< MII speed*/ +#if FSL_FEATURE_ENET_SUPPORT_PTP + uint16_t ptpRingBufferNumber; /*!< PTP ring buffer number*/ + bool isSlaveModeEnabled; /*!< PTP timer configuration*/ +#endif +} enet_mac_config_t; + +/*! @brief Defines the basic configuration for PHY.*/ +typedef struct ENETPhyConfig +{ + uint8_t phyAddr; /*!< PHY address*/ + bool isLoopEnabled; /*!< Switcher to enable the HY loop mode*/ +} enet_phy_config_t; + +#if FSL_FEATURE_ENET_SUPPORT_PTP +/*! @brief Defines the ENET Mac PTP timestamp structure.*/ +typedef struct ENETMacPtpTime +{ + uint64_t second; /*!< Second*/ + uint32_t nanosecond; /*!< Nanosecond*/ +} enet_mac_ptp_time_t; + +/*! @brief Defines the ENET PTP timer drift structure.*/ +typedef struct ENETPtpDrift +{ + int32_t drift; /*!< Drift for the PTP timer to adjust*/ +} enet_ptp_drift_t; + +/*! @brief Defines the ENET MAC PTP time parameter.*/ +typedef struct ENETPtpMasterTimeData +{ + uint8_t masterPtpInstance;/*!< PTP master timer instance*/ + uint64_t second; /*!< PTP master timer second */ +} enet_ptp_master_time_data_t; + +/*! @brief Defines the structure for the ENET PTP message data and timestamp data.*/ +typedef struct ENETMacPtpTsData +{ + uint8_t version; /*!< PTP version*/ + uint8_t sourcePortId[kEnetPtpSourcePortIdLen];/*!< PTP source port ID*/ + uint16_t sequenceId; /*!< PTP sequence ID*/ + uint8_t messageType; /*!< PTP message type*/ + enet_mac_ptp_time_t timeStamp;/*!< PTP timestamp*/ +} enet_mac_ptp_ts_data_t; + +/*! @brief Defines the ENET PTP ring buffer structure for the PTP message timestamp store.*/ +typedef struct ENETMacPtpTsRing +{ + uint32_t front; /*!< The first index of the ring*/ + uint32_t end; /*!< The end index of the ring*/ + uint32_t size; /*!< The size of the ring*/ + enet_mac_ptp_ts_data_t *ptpTsDataPtr;/*!< PTP message data structure*/ +} enet_mac_ptp_ts_ring_t; + +/*! @brief Defines the ENET packet for the PTP version2 message using the layer2 Ethernet frame.*/ +typedef struct ENETPtpL2packet +{ + uint8_t packet[kEnetMaxFrameDateSize]; /*!< Buffer for ptpv2 message*/ + uint16_t length; /*!< PTP message length*/ +} enet_ptp_l2packet_t; + +/*! @brief Defines the ENET PTPv2 packet queue using the layer2 Ethernet frame.*/ +typedef struct ENETPtpL2queue +{ + enet_ptp_l2packet_t l2Packet[kEnetPtpL2bufferNumber]; /*!< PTP layer2 packet*/ + uint16_t writeIdex; /*!< Queue write index*/ + uint16_t readIdx; /*!< Queue read index*/ +} enet_ptp_l2queue_t; + +/*! @brief Defines the ENET PTP layer2 Ethernet frame structure.*/ +typedef struct ENETPtpL2Ethernet +{ + uint8_t *ptpMsg; /*!< PTP message*/ + uint16_t length; /*!< Length of the PTP message*/ + enetMacAddr hwAddr; /*!< Destination hardware address*/ +} enet_ptp_l2_ethernet_t; + +/*! @brief Defines the ENET PTP buffer structure for all 1588 data.*/ +typedef struct ENETPrivatePtpBuffer +{ + enet_mac_ptp_ts_ring_t rxTimeStamp;/*!< Data structure for receive message*/ + enet_mac_ptp_ts_ring_t txTimeStamp;/*!< Data structure for transmit timestamp*/ + enet_ptp_l2queue_t *l2QueuePtr; /*!< Data structure for layer2 Ethernet queue*/ + uint64_t masterSecond; /*!< PTP time second when it's master time*/ +} enet_private_ptp_buffer_t; +#endif + +/*! @brief Defines the ENET header structure. */ +typedef struct ENETEthernetHeader +{ + enetMacAddr destAddr; /*!< Destination address */ + enetMacAddr sourceAddr;/*!< Source address*/ + uint16_t type; /*!< Protocol type*/ +} enet_ethernet_header_t; + +/*! @brief Defines the ENET VLAN frame header structure. */ +typedef struct ENET8021vlanHeader +{ + enetMacAddr destAddr; /*!< Destination address */ + enetMacAddr sourceAddr;/*!< Source address*/ + uint16_t tpidtag; /*!< ENET 8021tag header tag region*/ + uint16_t othertag; /*!< ENET 8021tag header type region*/ + uint16_t type; /*!< Protocol type*/ +} enet_8021vlan_header_t; + +/*! @brief Defines the ENET MAC context structure for the buffer address, buffer descriptor address, etc.*/ +typedef struct ENETMacContext +{ + uint8_t *rxBufferPtr; /*!< Receive buffer pointer*/ + uint8_t *rxLargeBufferPtr; /*!< Receive large buffer descriptor*/ + uint8_t *txBufferPtr; /*!< Transmit buffer pointer*/ + uint8_t *rxBdBasePtr; /*!< Receive buffer descriptor base address pointer*/ + uint8_t *rxBdCurPtr; /*!< Current receive buffer descriptor pointer*/ + uint8_t *rxBdDirtyPtr; /*!< Receive dirty buffer descriptor*/ + uint8_t *txBdBasePtr; /*!< Transmit buffer descriptor base address pointer*/ + uint8_t *txBdCurPtr; /*!< Current transmit buffer descriptor pointer*/ + uint8_t *txBdDirtyPtr; /*!< Last cleaned transmit buffer descriptor pointer*/ + bool isTxFull; /*!< Transmit buffer descriptor full*/ + bool isRxFull; /*!< Receive buffer descriptor full*/ + uint32_t bufferdescSize; /*!< ENET buffer descriptor size*/ + uint16_t rxBufferSizeAligned; /*!< Receive buffer alignment size*/ +#if FSL_FEATURE_ENET_SUPPORT_PTP + enet_private_ptp_buffer_t privatePtp;/*!< PTP private buffer*/ +#endif +} enet_mac_context_t; + +/*! @brief Defines the ENET packets statistic structure.*/ +typedef struct ENETMacStats +{ + uint32_t statsRxTotal; /*!< Total number of receive packets*/ + uint32_t statsRxMissed; /*!< Total number of receive packets*/ + uint32_t statsRxDiscard; /*!< Receive discarded with error */ + uint32_t statsRxError; /*!< Receive discarded with error packets*/ + uint32_t statsTxTotal; /*!< Total number of transmit packets*/ + uint32_t statsTxMissed; /*!< Transmit missed*/ + uint32_t statsTxDiscard; /*!< Transmit discarded with error */ + uint32_t statsTxError; /*!< Transmit error*/ + uint32_t statsRxAlign; /*!< Receive non-octet alignment*/ + uint32_t statsRxFcs; /*!< Receive CRC error*/ + uint32_t statsRxTruncate;/*!< Receive truncate*/ + uint32_t statsRxLengthGreater; /*!< Receive length greater than RCR[MAX_FL] */ + uint32_t statsRxCollision; /*!< Receive collision*/ + uint32_t statsRxOverRun; /*!< Receive over run*/ + uint32_t statsTxOverFlow; /*!< Transmit overflow*/ + uint32_t statsTxLateCollision; /*!< Transmit late collision*/ + uint32_t statsTxExcessCollision;/*!< Transmit excess collision*/ + uint32_t statsTxUnderFlow; /*!< Transmit under flow*/ + uint32_t statsTxLarge; /*!< Transmit large packet*/ + uint32_t statsTxSmall; /*!< Transmit small packet*/ +} enet_stats_t; + +/*! @brief Defines the ENET MAC packet buffer structure.*/ +typedef struct ENETMacPacketBuffer +{ + uint8_t *data; + uint16_t length; +} enet_mac_packet_buffer_t; + +#if ENET_RECEIVE_ALL_INTERRUPT +typedef uint32_t (* enet_netif_callback_t)(void *enetPtr, enet_mac_packet_buffer_t *packetBuffer); +#endif + +/*! @brief Defines the ENET device data structure for the ENET.*/ +typedef struct ENETDevIf +{ + struct ENETDevIf *next; /*!< Next device structure address*/ + void *netIfPtr; /*!< Store the connected upper layer in the structure*/ +#if ENET_RECEIVE_ALL_INTERRUPT + void *enetNetifService; /*!< Service function*/ +#endif + enet_multicast_group_t *multiGroupPtr; /*!< Multicast group chain*/ + uint32_t deviceNumber; /*!< Device number*/ + bool isInitialized; /*!< Device initialized*/ + uint16_t maxFrameSize; /*!< MAC maximum frame size*/ + enet_mac_config_t *macCfgPtr;/*!< MAC configuration structure*/ + enet_phy_config_t *phyCfgPtr;/*!< PHY configuration structure*/ + const struct ENETMacApi *macApiPtr; /*!< MAC application interface structure*/ + void *phyApiPtr; /*!< PHY application interface structure*/ + enet_mac_context_t *macContextPtr; /*!< MAC context pointer*/ +#if ENET_ENABLE_DETAIL_STATS + enet_stats_t stats; /*!< Packets statistic*/ +#endif +#if ENET_RECEIVE_ALL_INTERRUPT + enet_netif_callback_t enetNetifcall; /*!< Receive callback function to the upper layer*/ +#else + event_object_t enetReceiveSync; /*!< Receive sync signal*/ +#endif + lock_object_t enetContextSync; /*!< Sync signal*/ +} enet_dev_if_t; + +/*! @brief Defines the basic application for the ENET device.*/ +typedef struct ENETMacApi +{ + uint32_t (* enet_mac_init)(enet_dev_if_t * enetIfPtr, enet_rxbd_config_t *rxbdCfg, enet_txbd_config_t *txbdCfg);/*!< MAC initialize interface*/ + uint32_t (* enet_mac_deinit)(enet_dev_if_t * enetIfPtr);/*!< MAC close interface*/ + uint32_t (* enet_mac_send)(enet_dev_if_t * enetIfPtr, uint8_t *packet, uint32_t size);/*!< MAC send packets*/ +#if !ENET_RECEIVE_ALL_INTERRUPT + uint32_t (* enet_mac_receive)(enet_dev_if_t * enetIfPtr, enet_mac_packet_buffer_t *packBuffer);/*!< MAC receive interface*/ +#endif + uint32_t (* enet_mii_read)(uint32_t instance, uint32_t phyAddr, uint32_t phyReg, uint32_t *dataPtr);/*!< MII reads PHY*/ + uint32_t (* enet_mii_write)(uint32_t instance, uint32_t phyAddr, uint32_t phyReg, uint32_t data);/*!< MII writes PHY*/ + uint32_t (* enet_add_multicast_group)(uint32_t instance, enet_multicast_group_t *multiGroupPtr, uint8_t *groupAddr);/*!< Add multicast group*/ + uint32_t (* enet_leave_multicast_group)(uint32_t instance, enet_multicast_group_t *multiGroupPtr, uint8_t *groupAddr);/*!< Leave multicast group*/ +} enet_mac_api_t; + +/******************************************************************* +* Global variables + +***********************************************************************/ +extern const enet_mac_api_t g_enetMacApi; + +/******************************************************************************* + * API + ******************************************************************************/ + +#if defined(__cplusplus) +extern "C" { +#endif + +/*! + * @name ENET Driver + * @{ + */ + + +#if FSL_FEATURE_ENET_SUPPORT_PTP +/*! + * @brief Initializes the ENET PTP context structure with the basic configuration. + * + * @param macContextPtr The pointer to the ENET MAC macContext structure. + * @return The execution status. + */ +uint32_t enet_ptp_init(enet_private_ptp_buffer_t *privatePtpPtr, uint32_t ptpRxBufferNum, enet_mac_ptp_ts_data_t *ptpTsRxDataPtr, uint32_t ptpTxBufferNum, enet_mac_ptp_ts_data_t *ptpTsTxDataPtr); + +/*! + * @brief Initializes the ENET PTP timer with the basic configuration. + * + * After the PTP starts, the 1588 timer also starts running. If the user wants the 1588 timer + * as the slave, enable the isSlaveEnabled flag. + * + * @param instance The ENET instance number. + * @param ptpCfgPtr The pointer to the basic PTP timer configuration structure. + * @return The execution status. + */ +uint32_t enet_ptp_start(uint32_t instance, bool isSlaveEnabled); + +/*! + * @brief Parses the ENET packet. + * + * Parses the ENET message and checks if it is a PTP message. If it is a PTP message, + * the message is stored in the PTP information structure. Message parsing + * decides whether timestamp processing is done after that. + * + * @param packet The ENET packet. + * @param ptpTsPtr The pointer to the PTP data structure. + * @param isPtpMsg The PTP message flag. + * @param isFastEnabled The fast operation flag. If set, only check if it is a ptp message + * and doesn't store any ptp message. + * @return The execution status. + */ +uint32_t enet_ptp_parse(uint8_t *packet, enet_mac_ptp_ts_data_t *ptpTsPtr, bool *isPtpMsg, bool isFastEnabled); + +/*! + * @brief Gets the current value of the ENET PTP time. + * + * @param ptpTimerPtr The PTP timer structure. + * @return The execution status. + */ +uint32_t enet_ptp_get_time(enet_mac_ptp_time_t *ptpTimerPtr); + +/*! + * @brief Sets the current value of the ENET PTP time. + * + * @param ptpTimerPtr The PTP timer structure. + * @return The execution status. + */ +uint32_t enet_ptp_set_time(enet_mac_ptp_time_t *ptpTimerPtr); + +/*! + * @brief Adjusts the ENET PTP time. + * + * @param instance The ENET instance number. + * @param drift The PTP timer drift value. + * @return The execution status. + */ +uint32_t enet_ptp_correction_time(uint32_t instance, int32_t drift); + + +/*! + * @brief Stores the transmit timestamp. + * + * @param ptpBuffer The PTP buffer pointer. + * @param bdPtr The current transmit buffer descriptor. + * @return The execution status. + */ +uint32_t enet_ptp_store_tx_timestamp(enet_private_ptp_buffer_t *ptpBuffer,void *bdPtr); + +/*! + * @brief Stores receive timestamp. + * + * @param ptpBuffer The PTP buffer pointer. + * @param packet The current receive packet. + * @param bdPtr The current receive buffer descriptor. + * @return The execution status. + */ +uint32_t enet_ptp_store_rx_timestamp(enet_private_ptp_buffer_t *ptpBuffer, uint8_t *packet, void *bdPtr); + +/*! + * @brief Initializes the buffer queue for the PTP layer2 Ethernet packets. + * + * @param ptpBuffer The PTP buffer pointer. + * @return The execution status. + */ +uint32_t enet_ptp_l2queue_init(enet_private_ptp_buffer_t *ptpBuffer, enet_ptp_l2queue_t *ptpL2QuePtr); + +/*! + * @brief Adds the PTP layer2 Ethernet packet to the PTP Ethernet packet queue. + * + * @param ptpQuePtr The ENET private ptp layer2 buffer queue structure pointer. + * @param packet The packet buffer pointer. + * @param length The packet length. + * @return The execution status. + */ +uint32_t enet_ptp_service_l2packet(enet_ptp_l2queue_t * ptpQuePtr, uint8_t *packet, uint16_t length); + +/*! + * @brief Sends the PTP layer2 Ethernet packet to the Net. + * + * @param enetIfPtr The ENET context structure. + * @param paramPtr The buffer from upper layer. + * @return The execution status. + */ +uint32_t enet_ptp_send_l2packet(enet_dev_if_t * enetIfPtr, void *paramPtr); + +/*! + * @brief Receives the PTP layer2 Ethernet packet from the Net. + * + * @param enetIfPtr The ENET context structure. + * @param paramPtr The buffer receive from net and will send to upper layer. + * @return The execution status. + */ +uint32_t enet_ptp_receive_l2packet(enet_dev_if_t * enetIfPtr,void *paramPtr); + +/*! + * @brief Provides the handler for the 1588 stack to do PTP IOCTL. + * + * @param enetIfPtr The ENET context structure. + * @param commandId The command id. + * @param inOutPtr The data buffer. + * @return The execution status. + */ +uint32_t enet_ptp_ioctl(enet_dev_if_t * enetIfPtr, uint32_t commandId, void *inOutPtr); + +/*! + * @brief Stops the ENET PTP timer. + * + * @param instance The ENET instance number. + * @return The execution status. + */ +uint32_t enet_ptp_stop(uint32_t instance); + +/*! + * @brief Checks whether the PTP ring buffer is full. + * + * @param ptpTsRingPtr The ENET PTP timestamp ring. + * @return True if the PTP ring buffer is full. Otherwise, false. + */ +bool enet_ptp_ring_is_full(enet_mac_ptp_ts_ring_t *ptpTsRingPtr); + +/*! + * @brief Updates the latest ring buffers. + * + * Adds the PTP message data to the PTP ring buffers and increases the + * PTP ring buffer index. + * + * @param ptpTsRingPtr The ENET PTP timestamp ring. + * @param data The PTP data buffer. + * @return The execution status. + */ +uint32_t enet_ptp_ring_update(enet_mac_ptp_ts_ring_t *ptpTsRingPtr, enet_mac_ptp_ts_data_t *data); + +/*! + * @brief Searches the element in ring buffers with the message ID and Clock ID. + * + * @param ptpTsRingPtr The ENET PTP timestamp ring. + * @param data The PTP data buffer. + * @return The execution status. + */ +uint32_t enet_ptp_ring_search(enet_mac_ptp_ts_ring_t *ptpTsRingPtr, enet_mac_ptp_ts_data_t *data); + +/*! + * @brief Calculates the ENET PTP ring buffer index. + * + * @param size The ring size. + * @param curIdx The current ring index. + * @param offset The offset index. + * @return The execution status. + */ +static inline uint32_t enet_ptp_ring_index(uint32_t size, uint32_t curIdx, uint32_t offset) +{ + return ((curIdx + offset) % size); +} + +/*! + * @brief Frees all ring buffers. + * + * @param enetContextPtr The ENET MAC context buffer. + * @return The execution status. + */ +uint32_t enet_ptp_deinit(enet_mac_context_t *enetContextPtr); + +/*! + * @brief The ENET PTP time interrupt handler. + * + * @param enetIfPtr The ENET context structure pointer. + */ +void enet_mac_ts_isr(void *enetIfPtr); +#endif +/*! + * @brief(R)MII Read function. + * + * @param instance The ENET instance number. + * @param phyAddr The PHY address. + * @param phyReg The PHY register. + * @param dataPtr The data read from MII. + * @return The execution status. + */ +uint32_t enet_mii_read(uint32_t instance, uint32_t phyAddr, uint32_t phyReg, uint32_t *dataPtr); + +/*! + * @brief(R)MII Read function. + * + * @param instance The ENET instance number. + * @param phyAddr The PHY address. + * @param phyReg The PHY register. + * @param data The data write to MII. + * @return The execution status. + */ +uint32_t enet_mii_write(uint32_t instance, uint32_t phyAddr, uint32_t phyReg, uint32_t data); + +/*! + * @brief Initializes ENET buffer descriptors. + * + * @param enetIfPtr The ENET context structure. + * @return The execution status. + */ +uint32_t enet_mac_bd_init(enet_dev_if_t * enetIfPtr); + +/*! + * @brief Initializes the ENET MAC MII(MDC/MDIO) interface. + * + * @param enetIfPtr The ENET context structure. + * @return The execution status. + */ +uint32_t enet_mac_mii_init(enet_dev_if_t * enetIfPtr); + +/*! + * @brief Initialize the ENET receive buffer descriptors. + * + * If you open ENET_RECEIVE_ALL_INTERRUPT to do receive + * data buffer numbers can be the same as the receive descriptor numbers. + * But if you close ENET_RECEIVE_ALL_INTERRUPT and choose polling receive + * frames please make sure the receive data buffers are more than + * buffer descriptor numbers to guarantee a good performance. + * + * @param enetIfPtr The ENET context structure. + * @param rxbdCfg The receive buffer descriptor configuration. + * @return The execution status. + */ +uint32_t enet_mac_rxbd_init(enet_dev_if_t * enetIfPtr, enet_rxbd_config_t *rxbdCfg); + +/*! + * @brief Deinitialize the ENET receive buffer descriptors. + * + * Deinitialize the ENET receive buffer descriptors. + * + * @param enetIfPtr The ENET context structure. + * @return The execution status. + */ + +uint32_t enet_mac_rxbd_deinit(enet_dev_if_t * enetIfPtr); + +/*! + * @brief Initialize the ENET transmit buffer descriptors. + * + * @param enetIfPtr The ENET context structure. + * @param txbdCfg The transmit buffer descriptor configuration. + * @return The execution status. + */ +uint32_t enet_mac_txbd_init(enet_dev_if_t * enetIfPtr, enet_txbd_config_t *txbdCfg); + +/*! + * @brief Deinitialize the ENET transmit buffer descriptors. + * + * Deinitialize the ENET transmit buffer descriptors. + * + * @param enetIfPtr The ENET context structure. + * @return The execution status. + */ +uint32_t enet_mac_txbd_deinit(enet_dev_if_t * enetIfPtr); + +/*! + * @brief Initializes ENET MAC FIFO and accelerator with the basic configuration. + * + * @param enetIfPtr The ENET context structure. + * @return The execution status. + */ +uint32_t enet_mac_configure_fifo_accel(enet_dev_if_t * enetIfPtr); + +/*! + * @brief the ENET controller with the basic configuration. + * + * @param enetIfPtr The ENET context structure. + * @return The execution status. + */ +uint32_t enet_mac_configure_controller(enet_dev_if_t * enetIfPtr); + +/*! + * @brief Deinit the ENET device. + * + * @param enetIfPtr The ENET context structure. + * @return The execution status. + */ +uint32_t enet_mac_deinit(enet_dev_if_t * enetIfPtr); + +#if !ENET_RECEIVE_ALL_INTERRUPT +/*! + * @brief Updates the receive buffer descriptor. + * + * This updates the used receive buffer descriptor ring to + * ensure that the used BDS is correctly used again. It cleans + * the status region and sets the control region of the used receive buffer + * descriptor. If the isBufferUpdate flag is set, the data buffer in the + * buffer descriptor is updated. + * + * @param enetIfPtr The ENET context structure. + * @param isBufferUpdate The data buffer update flag. + * @return The execution status. + */ +uint32_t enet_mac_update_rxbd(enet_dev_if_t * enetIfPtr, bool isBufferUpdate); +#else +/*! + * @brief Updates the receive buffer descriptor. + * + * Clears the status region and sets the control region of the current receive buffer + * descriptor to ensure that it is used correctly again. It increases the buffer + * descriptor index to the next buffer descriptor. + * + * @param enetIfPtr The ENET context structure. + * @return The execution status. + */ +uint32_t enet_mac_update_rxbd(enet_dev_if_t * enetIfPtr); +#endif +/*! + * @brief Processes the ENET receive frame error statistics. + * + * This interface gets the error statistics of the received frame. + * Because the error information is in the last BD of a frame, this interface + * should be called when processing the last BD of a frame. + * + * @param enetIfPtr The ENET context structure. + * @param data The current control and status data of the buffer descriptor. + * @return The frame error status. + * - True if the frame has an error. + * - False if the frame does not have an error. + */ +bool enet_mac_rx_error_stats(enet_dev_if_t * enetIfPtr, uint32_t data); + +/*! + * @brief Processes the ENET transmit frame statistics. + * + * This interface gets the error statistics of the transmit frame. + * Because the error information is in the last BD of a frame, this interface + * should be called when processing the last BD of a frame. + * + * @param enetIfPtr The ENET context structure. + * @param curBd The current buffer descriptor. + */ +void enet_mac_tx_error_stats(enet_dev_if_t * enetIfPtr,void *curBd); + +/*! + * @brief ENET transmit buffer descriptor cleanup. + * + * First, store the transmit frame error statistic and PTP timestamp of the transmitted packets. + * Second, clean up the used transmit buffer descriptors. + * If the PTP 1588 feature is open, this interface captures the 1588 timestamp. + * It is called by the transmit interrupt handler. + * + * @param enetIfPtr The ENET context structure. + * @return The execution status. + */ +uint32_t enet_mac_tx_cleanup(enet_dev_if_t * enetIfPtr); +#if !ENET_RECEIVE_ALL_INTERRUPT +/*! + * @brief Receives ENET packets. + * + * @param enetIfPtr The ENET context structure. + * @param packBuffer The received data buffer. + * @return The execution status. + */ +uint32_t enet_mac_receive(enet_dev_if_t * enetIfPtr, enet_mac_packet_buffer_t *packBuffer); +#else +/*! + * @brief Receives ENET packets. + * + * @param enetIfPtr The ENET context structure. + * @return The execution status. + */ +uint32_t enet_mac_receive(enet_dev_if_t * enetIfPtr); +#endif +/*! + * @brief Transmits ENET packets. + * + * @param enetIfPtr The ENET context structure. + * @param packet The frame to be transmitted. + * @param size The frame size. + * @return The execution status. + */ +uint32_t enet_mac_send(enet_dev_if_t * enetIfPtr, uint8_t *packet, uint32_t size); + +/*! + * @brief The ENET receive interrupt handler. + * + * @param enetIfPtr The ENET context structure pointer. + */ +void enet_mac_rx_isr(void *enetIfPtr); + +/*! + * @brief The ENET transmit interrupt handler. + * + * @param enetIfPtr The ENET context structure pointer. + */ +void enet_mac_tx_isr(void *enetIfPtr); + +/*! + * @brief Calculates the CRC hash value. + * + * @param address The ENET MAC hardware address. + * @param crcVlaue The calculated CRC value of the Mac address. + */ +void enet_mac_calculate_crc32(enetMacAddr address, uint32_t *crcValue); + +/*! + * @brief Adds the ENET device to a multicast group. + * + * @param instance The ENET instance number. + * @param multiGroupPtr The ENET multicast group structure. + * @param address The ENET MAC hardware address. + * @return The execution status. + */ +uint32_t enet_mac_add_multicast_group(uint32_t instance, enet_multicast_group_t *multiGroupPtr, enetMacAddr address); + +/*! + * @brief Moves the ENET device from a multicast group. + * + * @param instance The ENET instance number. + * @param multiGroupPtr The ENET multicast group structure. + * @param address The ENET MAC hardware address. + * @return The execution status. + */ +uint32_t enet_mac_leave_multicast_group(uint32_t instance, enet_multicast_group_t *multiGroupPtr, enetMacAddr address); + +/*! + * @brief Initializes the ENET with the basic configuration. + * + * @param enetIfPtr The pointer to the basic configuration structure. + * @return The execution status. + */ +uint32_t enet_mac_init(enet_dev_if_t * enetIfPtr, enet_rxbd_config_t *rxbdCfg, + enet_txbd_config_t *txbdCfg); + +/*! + * @brief Enqueues a data buffer to the buffer queue. + * + * @param queue The buffer queue. + * @param buffer The buffer to add to the buffer queue. + */ +void enet_mac_enqueue_buffer( void **queue, void *buffer); + +/*! + * @brief Dequeues a buffer from the buffer queue. + * + * @param queue The buffer queue. + * @return The dequeued data buffer. + */ +void *enet_mac_dequeue_buffer( void **queue); + +/* @} */ + +#if defined(__cplusplus) +extern } +#endif + +/*! @}*/ + +#endif /* __FSL_ENET_DRIVER_H__ */ +/******************************************************************************* + * EOF + ******************************************************************************/ +
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/drivers/interrupt/fsl_interrupt_features.h Mon Apr 28 17:39:05 2014 +0100 @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * o Redistributions of source code must retain the above copyright notice, this list + * of conditions and the following disclaimer. + * + * o Redistributions in binary form must reproduce the above copyright notice, this + * list of conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. + * + * o Neither the name of Freescale Semiconductor, Inc. nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef __FSL_INTERRUPT_FEATURES_H__ +#define __FSL_INTERRUPT_FEATURES_H__ + +#if (defined(CPU_MKL25Z32VFM4) || defined(CPU_MKL25Z64VFM4) || defined(CPU_MKL25Z128VFM4) || \ + defined(CPU_MKL25Z32VFT4) || defined(CPU_MKL25Z64VFT4) || defined(CPU_MKL25Z128VFT4) || \ + defined(CPU_MKL25Z32VLH4) || defined(CPU_MKL25Z64VLH4) || defined(CPU_MKL25Z128VLH4) || \ + defined(CPU_MKL25Z32VLK4) || defined(CPU_MKL25Z64VLK4) || defined(CPU_MKL25Z128VLK4)) + #define FSL_FEATURE_INTERRUPT_IRQ_MAX (31) + #define FSL_FEATURE_INTERRUPT_IRQ_MIN (-14) +#elif (defined(CPU_MK70FN1M0VMJ12) || defined(CPU_MK70FX512VMJ12) || \ + defined(CPU_MK70FN1M0VMJ15) || defined(CPU_MK70FX512VMJ15)) + #define FSL_FEATURE_INTERRUPT_IRQ_MAX (105) + #define FSL_FEATURE_INTERRUPT_IRQ_MIN (-14) +#elif (defined(CPU_MK64FX512VDC12) || defined(CPU_MK64FN1M0VDC12) || defined(CPU_MK64FX512VLL12) || \ + defined(CPU_MK64FN1M0VLL12) || defined(CPU_MK64FX512VLQ12) || defined(CPU_MK64FN1M0VLQ12) || \ + defined(CPU_MK64FX512VMD12) || defined(CPU_MK64FN1M0VMD12)) + #define FSL_FEATURE_INTERRUPT_IRQ_MAX (85) + #define FSL_FEATURE_INTERRUPT_IRQ_MIN (-14) +#elif (defined(CPU_MK22FN512VDC12)) + #define FSL_FEATURE_INTERRUPT_IRQ_MAX (85) + #define FSL_FEATURE_INTERRUPT_IRQ_MIN (-14) +#else + #error "No valid CPU defined" +#endif + +#endif /* __FSL_INTERRUPT_FEATURES_H__*/ +/******************************************************************************* + * EOF + ******************************************************************************/ +
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/drivers/interrupt/fsl_interrupt_manager.h Mon Apr 28 17:39:05 2014 +0100 @@ -0,0 +1,142 @@ +/* + * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * o Redistributions of source code must retain the above copyright notice, this list + * of conditions and the following disclaimer. + * + * o Redistributions in binary form must reproduce the above copyright notice, this + * list of conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. + * + * o Neither the name of Freescale Semiconductor, Inc. nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#if !defined(__FSL_INTERRUPT_MANAGER_H__) +#define __FSL_INTERRUPT_MANAGER_H__ + +#include <stdint.h> +#include <stdbool.h> +#include <assert.h> +#include "fsl_interrupt_features.h" +#include "device/fsl_device_registers.h" + +/*! @addtogroup interrupt_manager*/ +/*! @{*/ + +/*! @file*/ + +/******************************************************************************* + * Definitions + ******************************************************************************/ + +/******************************************************************************* + * API + ******************************************************************************/ + +#if defined(__cplusplus) +extern "C" { +#endif /* __cplusplus*/ + +/*! @name interrupt_manager APIs*/ +/*@{*/ + +/*! + * @brief Installs an interrupt handler routine for a given IRQ number. + * + * This function lets the application register/replace the interrupt + * handler for a specified IRQ number. The IRQ number is different than the vector + * number. IRQ 0 starts from the vector 16 address. See a chip-specific reference + * manual for details and the startup_MKxxxx.s file for each chip + * family to find out the default interrupt handler for each device. This + * function converts the IRQ number to the vector number by adding 16 to + * it. + * + * @param irqNumber IRQ number + * @param handler Interrupt handler routine address pointer + */ +void interrupt_register_handler(IRQn_Type irqNumber, void (*handler)(void)); + +/*! + * @brief Enables an interrupt for a given IRQ number. + * + * This function enables the individual interrupt for a specified IRQ + * number. It calls the system NVIC API to access the interrupt control + * register. The input IRQ number does not include the core interrupt, only + * the peripheral interrupt, from 0 to a maximum supported IRQ. + * + * @param irqNumber IRQ number + */ +static inline void interrupt_enable(IRQn_Type irqNumber) +{ + /* check IRQ number */ + assert(0 <= irqNumber); + assert(irqNumber <= FSL_FEATURE_INTERRUPT_IRQ_MAX); + + /* call core API to enable the IRQ*/ + NVIC_EnableIRQ(irqNumber); +} + +/*! + * @brief Disables an interrupt for a given IRQ number. + * + * This function enables the individual interrupt for a specified IRQ + * number. It calls the system NVIC API to access the interrupt control + * register. + * + * @param irqNumber IRQ number + */ +static inline void interrupt_disable(IRQn_Type irqNumber) +{ + /* check IRQ number */ + assert(0 <= irqNumber); + assert(irqNumber <= FSL_FEATURE_INTERRUPT_IRQ_MAX); + + /* call core API to disable the IRQ*/ + NVIC_DisableIRQ(irqNumber); +} + +/*! + * @brief Enables system interrupt. + * + * This function enables the global interrupt by calling the core API. + * + */ +void interrupt_enable_global(void); + +/*! + * @brief Disable system interrupt. + * + * This function disables the global interrupt by calling the core API. + * + */ +void interrupt_disable_global(void); + +/*@}*/ + +#if defined(__cplusplus) +} +#endif /* __cplusplus*/ + +/*! @}*/ + +#endif /* __FSL_INTERRUPT_MANAGER_H__*/ +/******************************************************************************* + * EOF + ******************************************************************************/ +
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/drivers/pit/fsl_pit_driver.h Mon Apr 28 17:39:05 2014 +0100 @@ -0,0 +1,240 @@ +/* + * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * o Redistributions of source code must retain the above copyright notice, this list + * of conditions and the following disclaimer. + * + * o Redistributions in binary form must reproduce the above copyright notice, this + * list of conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. + * + * o Neither the name of Freescale Semiconductor, Inc. nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef __FSL_PIT_DRIVER_H__ +#define __FSL_PIT_DRIVER_H__ + +#include <stdint.h> +#include <stdbool.h> +#include "fsl_pit_hal.h" + +/*! + * @addtogroup pit_driver + * @{ + */ + +/******************************************************************************* + * Definitions + ******************************************************************************/ + +/*! + * @brief PIT timer configuration structure + * + * Define structure PitConfig and use pit_init_channel() to make necessary + * initializations. You may also use remaining functions for PIT configuration. + * + * @note the timer chain feature is not valid in all devices, please check + * fsl_pit_features.h for accurate setting. If it's not valid, the value set here + * will be bypassed inside function pit_init_channel(). + */ +typedef struct PitUserConfig { + bool isInterruptEnabled; /*!< Timer interrupt 0-disable/1-enable*/ + bool isTimerChained; /*!< Chained with previous timer, 0-not/1-chained*/ + uint32_t periodUs; /*!< Timer period in unit of microseconds*/ +} pit_user_config_t; + +/*! @brief PIT ISR callback function typedef */ +typedef void (*pit_isr_callback_t)(void); + +/******************************************************************************* + * API + ******************************************************************************/ + +#if defined(__cplusplus) +extern "C" { +#endif + +/*! + * @name Initialize and Shutdown + * @{ + */ + +/*! + * @brief Initialize PIT module. + * + * This function must be called before calling all the other PIT driver functions. + * This function un-gates the PIT clock and enables the PIT module. The isRunInDebug + * passed into function will affect all timer channels. + * + * @param isRunInDebug Timers run or stop in debug mode. + * - true: Timers continue to run in debug mode. + * - false: Timers stop in debug mode. + */ +void pit_init_module(bool isRunInDebug); + +/*! + * @brief Initialize PIT channel. + * + * This function initialize PIT timers by channel. Pass in timer number and its + * config structure. Timers do not start counting by default after calling this + * function. Function pit_timer_start must be called to start timer counting. + * Call pit_set_timer_period_us to re-set the period. + * + * Here is an example demonstrating how to define a PIT channel config structure: + @code + pit_user_config_t pitTestInit = { + .isInterruptEnabled = true, + // Only takes effect when chain feature is available. + // Otherwise, pass in arbitrary value(true/false). + .isTimerChained = false, + // In unit of microseconds. + .periodUs = 1000, + }; + @endcode + * + * @param timer Timer channel number. + * @param config PIT channel configuration structure. + */ +void pit_init_channel(uint32_t timer, const pit_user_config_t * config); + +/*! + * @brief Disable PIT module and gate control. + * + * This function disables all PIT interrupts and PIT clock. It then gates the + * PIT clock control. pit_init_module must be called if you want to use PIT again. + */ +void pit_shutdown(void); + +/* @} */ + +/*! + * @name Timer Start and Stop + * @{ + */ + +/*! + * @brief Start timer counting. + * + * After calling this function, timers load period value, count down to 0 and + * then load the respective start value again. Each time a timer reaches 0, + * it generates a trigger pulse and sets the timeout interrupt flag. + * + * @param timer Timer channel number. + */ +void pit_timer_start(uint32_t timer); + +/*! + * @brief Stop timer counting. + * + * This function stops every timer counting. Timers reload their periods + * respectively after the next time they call pit_timer_start. + * + * @param timer Timer channel number. + */ +void pit_timer_stop(uint32_t timer); + +/* @} */ + +/*! + * @name Timer Period + * @{ + */ + +/*! + * @brief Set timer period in microsecond units. + * + * The period range depends on the frequency of PIT source clock. If the required period + * is out of range, use the lifetime timer, if applicable. + * + * @param timer Timer channel number. + * @param us Timer period in microseconds. + */ +void pit_set_timer_period_us(uint32_t timer, uint32_t us); + +/*! + * @brief Read current timer value in microsecond units. + * + * This function returns an absolute time stamp in microsecond units. + * One common use of this function is to measure the running time of a part of + * code. Call this function at both the beginning and end of code; the time + * difference between these two time stamps is the running time (Make sure the + * running time will not exceed the timer period). The time stamp returned is + * up-counting. + * + * @param timer Timer channel number. + * @return Current timer value in microseconds. + */ +uint32_t pit_read_timer_us(uint32_t timer); + +#if FSL_FEATURE_PIT_HAS_LIFETIME_TIMER +/*! + * @brief Set lifetime timer period. + * + * Timer 1 must be chained with timer 0 before using the lifetime timer. The period + * range is restricted by "period * pitSourceClock < max of an uint64_t integer", + * or it may cause an overflow and be unable to set the correct period. + * + * @param period Lifetime timer period in microseconds. + */ +void pit_set_lifetime_timer_period_us(uint64_t us); + +/*! + * @brief Read current lifetime value in microseconds. + * + * This feature returns an absolute time stamp in microsecond units. The time stamp + * value will not exceed the timer period. The timer is up-counting. + * + * @return Current lifetime timer value in microseconds. + */ +uint64_t pit_read_lifetime_timer_us(void); +#endif /*FSL_FEATURE_PIT_HAS_LIFETIME_TIMER*/ + +/* @} */ + +/*! + * @name ISR Callback Function + * @{ + */ + +/*! + * @brief Register pit isr callback function. + * + * System default ISR interfaces are already defined in fsl_pit_irq.c. Users + * can either edit these ISRs or use this function to register a callback + * function. The default ISR runs the callback function if there is one + * installed. + * + * @param timer Timer channel number. + * @param function Pointer to pit isr callback function. + */ +void pit_register_isr_callback_function(uint32_t timer, pit_isr_callback_t function); + +/* @} */ + +#if defined(__cplusplus) +} +#endif + +/*! @}*/ + +#endif /* __FSL_PIT_DRIVER_H__*/ +/******************************************************************************* + * EOF + ******************************************************************************/ +
--- a/TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/enet/fsl_enet_features.h Mon Apr 07 18:28:36 2014 +0100 +++ b/TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/enet/fsl_enet_features.h Mon Apr 28 17:39:05 2014 +0100 @@ -31,13 +31,18 @@ #define __FSL_ENET_FEATURES_H__ -#if defined(CPU_MK63FN1M0VMD12) || defined(CPU_MK63FN1M0VMD12WS) || defined(CPU_MK64FN1M0VMD12) || defined(CPU_MK64FX512VMD12) - #define FSL_FEATURE_ENET_DMA_BIG_ENDIAN_ONLY (1) +#if defined(CPU_MK63FN1M0VMD12) || defined(CPU_MK63FN1M0VMD12WS) + #define FSL_FEATURE_ENET_DMA_BIG_ENDIAN_ONLY (1) + #define FSL_FEATURE_ENET_SUPPORT_PTP (0) + #define FSL_FEATURE_ENET_INTERRUPT_COUNT (4) + #define FSL_FEATURE_ENET_PTP_TIMER_CHANNEL_INTERRUPT (0) +#elif defined(CPU_MK64FN1M0VMD12) || defined(CPU_MK64FX512VMD12) + #define FSL_FEATURE_ENET_DMA_BIG_ENDIAN_ONLY (0) #define FSL_FEATURE_ENET_SUPPORT_PTP (0) #define FSL_FEATURE_ENET_INTERRUPT_COUNT (4) #define FSL_FEATURE_ENET_PTP_TIMER_CHANNEL_INTERRUPT (0) #elif defined(CPU_MK70FN1M0VMJ12) - #define FSL_FEATURE_ENET_DMA_BIG_ENDIAN_ONLY (1) + #define FSL_FEATURE_ENET_DMA_BIG_ENDIAN_ONLY (1) #define FSL_FEATURE_ENET_SUPPORT_PTP (0) #define FSL_FEATURE_ENET_INTERRUPT_COUNT (4) #else
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/utilities/fsl_os_abstraction.h Mon Apr 28 17:39:05 2014 +0100 @@ -0,0 +1,572 @@ +/* + * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * o Redistributions of source code must retain the above copyright notice, this list + * of conditions and the following disclaimer. + * + * o Redistributions in binary form must reproduce the above copyright notice, this + * list of conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. + * + * o Neither the name of Freescale Semiconductor, Inc. nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#if !defined(__FSL_OS_ABSTRACTION_H__) +#define __FSL_OS_ABSTRACTION_H__ + +#include <stdint.h> +#include <stdbool.h> +#include <stdlib.h> + +#if defined __CC_ARM +#define inline __inline +#endif + +/*! + * @addtogroup os_abstraction + * @{ + */ + +/*! @brief Status values to be returned by functions. */ +typedef enum +{ + kSuccess = 0, /*!< Functions work correctly. */ + kError, /*!< Functions work failed. */ + kTimeout, /*!< Timeout occurs while waiting for an object. */ + kIdle /*!< Can not get the object in non-blocking mode.*/ +}fsl_rtos_status; + +/*! @brief The event flags are set or not.*/ +typedef enum +{ + kFlagNotSet = 0, /*!< The flags checked are set. */ + kFlagSet /*!< The flags checked are not set. */ +}event_status; + +/*! @brief The event flags are cleared automatically or manually.*/ +typedef enum +{ + kEventAutoClr = 0, /*!< The flags of the event will be cleared automatically. */ + kEventManualClr /*!< The flags of the event will be cleared manually. */ +}event_clear_type; + +// Temporary "fix", until the proper macros are integrated in the on-line build system +#define FSL_RTOS_MBED + +/* Include required header file based on RTOS selection */ +#if defined (FSL_RTOS_MQX) + /*! @brief Macro to set message queue copy messages to internal memory or not. */ + #define __FSL_RTOS_MSGQ_COPY_MSG__ 1 + #include "fsl_os_abstraction_mqx.h" + +#elif defined (FSL_RTOS_FREE_RTOS) + #define __FSL_RTOS_MSGQ_COPY_MSG__ 1 + #include "fsl_os_abstraction_free_rtos.h" + +#elif defined (FSL_RTOS_UCOSII) + #define __FSL_RTOS_MSGQ_COPY_MSG__ 1 + #include "fsl_os_abstraction_ucosii.h" + +#elif defined (FSL_RTOS_UCOSIII) + #define __FSL_RTOS_MSGQ_COPY_MSG__ 1 + #include "fsl_os_abstraction_ucosiii.h" + +#elif defined (FSL_RTOS_CMSIS) + #define __FSL_RTOS_MSGQ_COPY_MSG__ 0 + #include "fsl_os_abstraction_cmsis.h" + +#elif defined (FSL_RTOS_MBED) + #define __FSL_RTOS_MSGQ_COPY_MSG__ 1 + #include "fsl_os_abstraction_mbed.h" + +#else + #define __FSL_RTOS_MSGQ_COPY_MSG__ 1 + #include "fsl_os_abstraction_bm.h" +#endif + +/******************************************************************************* + * API + ******************************************************************************/ + +#if defined(__cplusplus) +extern "C" { +#endif + +/*! + * @name Synchronization + * @{ + */ + +/*! + * @brief Initialize a synchronization object to a given state. + * + * @param obj The sync object to initialize. + * @param initValue The initial value the object will be set to. + * + * @retval kSuccess The object was successfully created. + * @retval kError Invalid parameter or no more objects can be created. + */ +fsl_rtos_status sync_create(sync_object_t *obj, uint8_t initValue); + +/*! + * @brief Wait for the synchronization object. + * + * This function checks the sync object's counting value, if it is + * positive, decreases it and returns kSuccess, otherwise, timeout will be + * used for wait. + * + * @param obj Pointer to the synchronization object. + * @param timeout The maximum number of milliseconds to wait for the object to be signalled. + * Pass the #kSyncWaitForever constant to wait indefinitely for someone to signal the object. + * A value of 0 should not be passed to this function. Instead, use sync_poll for + * a non blocking check. + * + * @retval kSuccess The object was signalled. + * @retval kTimeout A timeout occurred. + * @retval kError An incorrect parameter was passed. + * @retval kIdle The object has not been signalled. + * + * @note There could be only one process waiting for the object at the same time. + */ +fsl_rtos_status sync_wait(sync_object_t *obj, uint32_t timeout); + +/*! + * @brief Checks a synchronization object's status. + * + * This function is used to poll a sync object's status. + * If the sync object's counting value is positive, decrease it and return + * kSuccess. If the object's counting value is 0, the function will + * return kIdle immediately + * + * @param obj The synchronization object. + * + * @retval kSuccess The object was signalled. + * @retval kIdle The object was not signalled. + * @retval kError An incorrect parameter was passed. + */ +fsl_rtos_status sync_poll(sync_object_t *obj); + +/*! + * @brief Signal for someone waiting on the synchronization object to wake up. + * + * This function should not be called from an ISR. + * + * @param obj The synchronization object to signal. + * + * @retval kSuccess The object was successfully signaled. + * @retval kError The object can not be signaled or invalid parameter. + */ +fsl_rtos_status sync_signal(sync_object_t *obj); + +/*! + * @brief Signal for someone waiting on the synchronization object to wake up. + * + * This function should only be called from an ISR. + * + * @param obj The synchronization object to signal. + * + * @retval kSuccess The object was successfully signaled. + * @retval kError The object can not be signaled or invalid parameter. + */ +fsl_rtos_status sync_signal_from_isr(sync_object_t *obj); + +/*! + * @brief Destroy a previously created synchronization object. + * + * @param obj The synchronization object to destroy. + * + * @retval kSuccess The object was successfully destroyed. + * @retval kError Object destruction failed. + */ +fsl_rtos_status sync_destroy(sync_object_t *obj); + +/* @} */ + +/*! + * @name Resource locking + * @{ + */ + +/*! + * @brief Initialize a locking object. + * + * @param obj The lock object to initialize. + * + * @retval kSuccess The lock is created successfully. + * @retval kError Tke lock creation failed. + */ +fsl_rtos_status lock_create(lock_object_t *obj); + +/*! + * @brief Wait for the object to be unlocked and lock it. + * + * This function will wait for some time or wait forever if could not get the lock. + * + * @param obj The locking object. + * @param timeout The maximum number of milliseconds to wait for the mutex. + * Pass the #kSyncWaitForever constant to wait indefinitely for someone to unlock the object. + * A value of 0 should not be passed to this function. Instead, use lock_poll for a non + * blocking check. + * + * @retval kSuccess The lock was obtained. + * @retval kTimeout A timeout occurred. + * @retval kError An incorrect parameter was passed. + */ +fsl_rtos_status lock_wait(lock_object_t *obj, uint32_t timeout); + +/*! + * @brief Checks if a locking object can be locked and locks it if possible. + * + * This function returns instantly if could not get the lock. + * + * @param obj The locking object. + * + * @retval kSuccess The lock was obtained. + * @retval kIdle The lock could not be obtained. + * @retval kError An incorrect parameter was passed. + * + * @note There could be only one process waiting for the object at the same time. + * For RTOSes, wait for a lock recursively by one task is not supported. + * + */ +fsl_rtos_status lock_poll(lock_object_t *obj); + +/*! + * @brief Unlock a previously locked object. + * + * @param obj The locking object to unlock. + * + * @retval kSuccess The object was successfully unlocked. + * @retval kError The object can not be unlocked or invalid parameter. + */ +fsl_rtos_status lock_release(lock_object_t *obj); + +/*! + * @brief Destroy a previously created locking object. + * + * @param obj The locking object to destroy. + * + * @retval kSuccess The object was successfully destroyed. + * @retval kError Object destruction failed. + */ +fsl_rtos_status lock_destroy(lock_object_t *obj); + +/* @} */ + +/*! + * @name Event signaling + * @{ + */ + +/*! + * @brief Initializes the event object. + * + * When the object is created, the flags is 0. + * + * @param obj Pointer to the event object to initialize. + * @param clearType The event is auto-clear or manual-clear. + * + * @retval kSuccess The object was successfully created. + * @retval kError Incorrect parameter or no more objects can be created. + */ +fsl_rtos_status event_create(event_object_t *obj, event_clear_type clearType); + +/*! + * @brief Wait for any event flags to be set. + * + * This function will wait for some time or wait forever if no flags are set. Any flags set + * will wake up the function. + * + * @param obj The event object. + * @param timeout The maximum number of milliseconds to wait for the event. + * Pass the #kSyncWaitForever constant to wait indefinitely. A value of 0 should not be passed + * to this function. + * @param setFlags Pointer to receive the flags that were set. + * + * @retval kSuccess An event was set. + * @retval kTimeout A timeout occurred. + * @retval kError An incorrect parameter was passed. + */ +fsl_rtos_status event_wait(event_object_t *obj, uint32_t timeout, event_group_t *setFlags); + +/*! + * @brief Set one or more event flags of an event object. + * + * This function should not be called from an ISR. + * + * @param obj The event object. + * @param flags Event flags to be set. + * + * @retval kSuccess The flags were successfully set. + * @retval kError An incorrect parameter was passed. + * + * @note There could be only one process waiting for the event. + * + */ +fsl_rtos_status event_set(event_object_t *obj, event_group_t flags); + +/*! + * @brief Set one or more event flags of an event object. + * + * This function should only be called from an ISR. + * + * @param obj The event object. + * @param flags Event flags to be set. + * + * @retval kSuccess The flags were successfully set. + * @retval kError An incorrect parameter was passed. + */ +fsl_rtos_status event_set_from_isr(event_object_t *obj, event_group_t flags); + +/*! + * @brief Clear one or more events of an event object. + * + * This function should not be called from an ISR. + * + * @param obj The event object. + * @param flags Event flags to be clear. + * + * @retval kSuccess The flags were successfully cleared. + * @retval kError An incorrect parameter was passed. + */ +fsl_rtos_status event_clear(event_object_t *obj, event_group_t flags); + +/*! + * @brief Check the flags are set or not. + * + * @param obj The event object. + * @param flag The flag to check. + * + * @retval kFlagsSet The flags checked are set. + * @retval kFlagsNotSet The flags checked are not set or got an error. + */ +event_status event_check_flags(event_object_t *obj, event_group_t flag); + +/*! + * @brief Destroy a previously created event object. + * + * @param obj The event object to destroy. + * + * @retval kSuccess The object was successfully destroyed. + * @retval kError Event destruction failed. + */ +fsl_rtos_status event_destroy(event_object_t *obj); +/* @} */ + +/*! + * @name Thread management + * @{ + */ + +/*! + * @brief Create a task. + * + * This function is wrapped by the macro task_create. Generally, this function is for + * internal use only, applications must use FSL_RTOS_TASK_DEFINE to define resources for + * task statically then use task_create to create task. If applications have prepare + * the resouces for task dynamically, they can use this function to create the task. + * + * @param task The task function. + * @param name The name of this task. + * @param stackSize The stack size in byte. + * @param stackMem Pointer to the stack. For bare metal, MQX and FreeRTOS, this could be NULL. + * @param priority Initial priority of the task. + * @param param Pointer to be passed to the task when it is created. + * @param usesFloat This task will use float register or not. + * @param handler Pointer to the task handler. + * + * @retval kSuccess The task was successfully created. + * @retval kError The task could not be created. + * + * @note Different tasks can not use the same task function. + */ +fsl_rtos_status __task_create(task_t task, uint8_t *name, uint16_t stackSize, + task_stack_t *stackMem, uint16_t priority, + void *param, bool usesFloat, task_handler_t *handler); + +/*! + * @brief Destroy a previously created task. + * @note Depending on the RTOS, task resources may or may not be automatically freed, + * and this function may not return if the current task is destroyed. + * + * @param handler The handler of the task to destroy. Returned by the task_create function. + * + * @retval kSuccess The task was successfully destroyed. + * @retval kError Task destruction failed or invalid parameter. + */ +fsl_rtos_status task_destroy(task_handler_t handler); +/* @} */ + +/*! + * @name Message queues + * @{ + */ + +/*! + * @brief Initialize the message queue. + * + * This function will initialize the message queue that declared previously. + * Here is an example demonstrating how to use: + @code + msg_queue_handler_t handler; + MSG_QUEUE_DECLARE(my_message, msg_num, msg_size); + handler = msg_queue_create(&my_message, msg_num, msg_size); + @endcode + * + * @param queue The queue declared through the MSG_QUEUE_DECLARE macro. + * @param number The number of elements in the queue. + * @param size Size of every elements in words. + * + * @retval Handler to access the queue for put and get operations. If message queue + * created failed, return 0. + */ +msg_queue_handler_t msg_queue_create(msg_queue_t *queue, uint16_t number, uint16_t size); + +/*! + * @brief Introduce an element at the tail of the queue. + * + * @param handler Queue handler returned by the msg_queue_create function. + * @param item Pointer to the element to be introduced in the queue. + * + * @retval kSuccess Element successfully introduced in the queue. + * @retval kError The queue was full or an invalid parameter was passed. + */ +fsl_rtos_status msg_queue_put(msg_queue_handler_t handler, msg_queue_item_t item); + +/*! + * @brief Read and remove an element at the head of the queue. + * + * @param handler Queue handler returned by the msg_queue_create function. + * @param item Pointer to store a pointer to the element of the queue. + * @param timeout In case the queue is empty, the number of milliseconds to + * wait for an element to be introduced into the queue. Use 0 to return + * immediately or #kSyncWaitForever to wait indefinitely. + * + * @retval kSuccess Element successfully obtained from the queue. + * @retval kTimeout If a timeout was specified, the queue remained empty after timeout. + * @retval kError The queue was empty or the handler was invalid. + * @retval kIdle The queue was empty and the timeout has not expired. + * + * @note There should be only one process waiting on the queue. + */ +fsl_rtos_status msg_queue_get(msg_queue_handler_t handler, + msg_queue_item_t *item, + uint32_t timeout); + +/*! + * @brief Discards all elements in the queue and leaves the queue empty. + * + * @param handler Queue handler returned by the msg_queue_create function. + * + * @retval kSuccess Queue successfully emptied. + * @retval kError Emptying queue failed. + */ +fsl_rtos_status msg_queue_flush(msg_queue_handler_t handler); + +/*! + * @brief Destroy a previously created queue. + * + * @param handler Queue handler returned by the msg_queue_create function. + * + * @retval kSuccess The queue was successfully destroyed. + * @retval kError Message queue destruction failed. + */ +fsl_rtos_status msg_queue_destroy(msg_queue_handler_t handler); + +/* @} */ + +#ifndef FSL_RTOS_MBED +/*! + * @name Memory Management + * @{ + */ + +/*! + * @brief Reserves the requested amount of memory in bytes. + * + * @param size Amount of bytes to reserve. + * + * @retval Pointer to the reserved memory. NULL if memory could not be allocated. + */ +void * mem_allocate(size_t size); + +/*! + * @brief Reserves the requested amount of memory in bytes and initializes it to 0. + * + * @param size Amount of bytes to reserve. + * + * @retval Pointer to the reserved memory. NULL if memory could not be allocated. + */ +void * mem_allocate_zero(size_t size); + +/*! + * @brief Releases the memory previously reserved. + * + * @param ptr Pointer to the start of the memory block previously reserved. + * + * @retval kSuccess Memory correctly released. + */ +fsl_rtos_status mem_free(void *ptr); +#endif + +/* @} */ + +/*! + * @name Time management + * @{ + */ + +/*! + * @brief Delays execution for a number of milliseconds. + * + * @param delay The time in milliseconds to wait. + */ +void time_delay(uint32_t delay); + +/* @} */ + +/*! + * @name Interrupt management + * @{ + */ + +/*! + * @brief Install interrupt handler. + * + * @param irqNumber IRQ number of the interrupt. + * @param handler The interrupt handler to install. + * + * @retval kSuccess Handler is installed successfully. + * @retval kSuccess Handler could not be installed. + */ +fsl_rtos_status interrupt_handler_register(int32_t irqNumber, void (*handler)(void)); + +/* @} */ + +#if defined(__cplusplus) +} +#endif + +/*! @}*/ + +#endif /* __FSL_OS_ABSTRACTION_H__ */ +/******************************************************************************* + * EOF + ******************************************************************************/ +
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/utilities/fsl_os_abstraction_mbed.h Mon Apr 28 17:39:05 2014 +0100 @@ -0,0 +1,38 @@ +/* fsl_os_mbed_abstraction.h */ +/* Copyright (C) 2012 mbed.org, MIT License + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of this software + * and associated documentation files (the "Software"), to deal in the Software without restriction, + * including without limitation the rights to use, copy, modify, merge, publish, distribute, + * sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING + * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef FSL_OS_ABSTRACTION_MBED_H_ +#define FSL_OS_ABSTRACTION_MBED_H_ + +// This is not really an "abstraction", but rather a set of quick&dirty +// defines to allow the KSDK to compile. Currently, this is relevant only +// in the context of the ENET driver (fsl_enet_driver.c) + +typedef int event_object_t; +typedef int lock_object_t; +typedef void sync_object_t; +typedef unsigned int event_group_t; +typedef int task_t; +typedef void task_stack_t; +typedef int task_handler_t; +typedef int msg_queue_handler_t; +typedef void msg_queue_t; +typedef int msg_queue_item_t; + +#endif // #ifdef FSL_OS_ABSTRACTION_MBED_H_
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/utilities/sw_timer.h Mon Apr 28 17:39:05 2014 +0100 @@ -0,0 +1,191 @@ +/* + * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * o Redistributions of source code must retain the above copyright notice, this list + * of conditions and the following disclaimer. + * + * o Redistributions in binary form must reproduce the above copyright notice, this + * list of conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. + * + * o Neither the name of Freescale Semiconductor, Inc. nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#if !defined(__SW_TIMER_H__) +#define __SW_TIMER_H__ + +#include <stdint.h> +#include <stdbool.h> + +/*! @addtogroup sw_timer Software Timer + * @brief This module is used to interface with Abstract Timer HAL to generate periodical timeouts + * required through different modules of the AOA protocol. This block will be based on 1ms + * ticks for all the timeout calculations. The HAL Interface block used to communicate with + * this must have the same 1ms timeout configured. This module can generate different + * software timer channels based on the same 1ms. + */ +/*! @{*/ + +/*! Definition of the possible status of a software channel timer. */ +typedef enum SwTimerChannelStatus +{ + kSwTimerChannelExpired = 0x00, /*!< Indicates the timer channel has counted the given ms*/ + kSwTimerChannelStillCounting = 0x01, /*!< Indicates the timeout of the channel has not expired + and the timer is still counting.*/ + kSwTimerChannelIsDisable = 0x02, /*!< Indicates the timer channel is not reserved. */ + kSwTimerChannelNotAvailable = 0xFF /*!< Indicates there are not available channels to reserve + or the requested channel is not available.*/ +}sw_timer_channel_status_t; + +/*! List of status and errors. */ +enum _sw_timer_errors +{ + kSwTimerStatusSuccess, /*!< The execution was successful.*/ + kSwTimerStatusFail, /*!< The execution failed.*/ + kSwTimerStatusInvalidChannel /*!< The given channel is not valid. Valid channels are 0 to + (SW_TIMER_NUMBER_CHANNELS - 1). */ +}; + +/*! + * Data type of the counter of each timer channel. If it is an int8_t the counter will count + * up to 127ms, int16_t up to 32767ms and int32_t up to 2147483647ms. + */ +typedef int32_t time_counter_t; + +/*! Max timeout value according to size of the time counter */ +enum sw_timer_timeouts +{ + kSwTimerMaxTimeout = 2147483647 +}; + +/*! + * Data type of the free running counter. This data type should be unsigned and will count up to + * 255ms if it is uint8_t, 65535ms for uint16_t and 4294967295ms for uint32_t. + */ +typedef uint32_t time_free_counter_t; + +#if defined(__cplusplus) +extern "C" { +#endif /* __cplusplus*/ + +/*! + * @brief Initializes the software timer module. Prepares variables and HAL layer to provide timer + * services. Starts the free running counter which will be available to get its value any + * time while the service is running; it is useful whenever a module wants to keep track of + * time, but do not wants to reserve a channel. + * + * @return status_t Returns software timer status after initialization. + * @retval kSwTimerStatusSuccess The initialization was successful and the software timer is ready + * to provide services. + * @retval kSwTimerStatusFail The initialization failed. + */ +uint32_t sw_timer_init_service(void); + +/*! + * @brief Deinitializes the software timer module. Shutdown HAL layer, so no timer service can be + * provided after the execution of this function. + * + * @return void + */ +void sw_timer_shutdown_service(void); + +/*! + * @brief Reserves a free timer channel to be used by any module and returns its identifier. + * + * @return uint8_t Returns the number of the channel that was reserved. + * @retval Any value between 0 and SW_TIMER_NUMBER_CHANNELS is a valid channel. It indicates the + * channel was reserved and can be used. + * @retval kSwTimerChannelNotAvailable If there is not any available channel, because all + * channels are already reserved. + */ +uint8_t sw_timer_reserve_channel(void); + +/*! + * @brief Returns the actual status of the given timer channel. The timer has to be previously + * started to return a valid status. + * + * @param timerChannel [in] Indicates the timer channel which status is going to be returned. + * + * @return sw_timer_channel_status_t Current status of the given timer channel. + * @retval kSwTimerChannelExpired Indicates the timer channel has counted the given ms. + * @retval kSwTimerChannelStillCounting Indicates the timeout of the channel has not expired and + the timer is still counting. + * @retval kSwTimerChannelIsDisable Indicates the timer channel is not reserved. + * @retval kSwTimerChannelNotAvailable Indicates the timer channel is invalid. + */ +sw_timer_channel_status_t sw_timer_get_channel_status(uint8_t timerChannel); + +/*! + * @brief Starts the count down of the given timer channel. The timer channel has to be previously + * reserved. + * + * @param timerChannel [in] Indicates the timer channel that is going to be started. + * @param timeout [in] Time in ms that the timer channel will count. The timeout should be + a multiple of count unit of the timer, otherwise it will be taken + the integer part of the division and the exact count will not be + achieved + * + * @return status_t Reports failures in the execution of the function. + * @retval kSwTimerStatusSuccess A channel was started successfully. + * @retval kSwTimerStatusInvalidChannel The timer channel is invalid, it does not exist. + */ +uint32_t sw_timer_start_channel(uint8_t timerChannel, time_counter_t timeout); + +/*! + * @brief Releases the given timer channel, so it can be used by someone else. + * + * @param timerChannel [in] Identifier of the timer channel. + * + * @return status_t Reports failures in the execution of the function. + * @retval kSwTimerStatusSuccess A channel was released successfully. + * @retval kSwTimerStatusInvalidChannel The timer channel is invalid, it does not exist. + */ +uint32_t sw_timer_release_channel(uint8_t timerChannel); + +/*! + * @brief Gets the current value of the free running counter. Any module can keep track of the time + * by reading this counter and calculates time difference. No reservation of timer channel + * is needed. Consider for calculations that when the counter overflows it will start from + * 0 again. + * + * @return time_free_counter_t Returns current count of the free running counter. + */ +time_free_counter_t sw_timer_get_free_counter(void); + +/*! + * @brief This function is called every 1ms by the interruption and update count down values of all + * timer channels. + * + * @return void + */ +void sw_timer_update_counters(void); + + +#if defined(__cplusplus) +} +#endif /* __cplusplus*/ +/*! @}*/ +/*Group sw_timer*/ + +#endif /* __SW_TIMER_H__ */ +/******************************************************************************* + * EOF + ******************************************************************************/ +
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--- a/TARGET_LPC11U24/TARGET_NXP/TARGET_LPC11UXX/TARGET_LPC11U24_401/PinNames.h Mon Apr 07 18:28:36 2014 +0100 +++ b/TARGET_LPC11U24/TARGET_NXP/TARGET_LPC11UXX/TARGET_LPC11U24_401/PinNames.h Mon Apr 28 17:39:05 2014 +0100 @@ -151,6 +151,9 @@ D12 = P0_8, D13 = P1_29, // P0_9 for Arch V1.0 + D14 = P0_5, + D15 = P0_4, + A0 = P0_11, A1 = P0_12, A2 = P0_13, @@ -158,6 +161,9 @@ A4 = P0_16, A5 = P0_22, + I2C_SCL = D15, + I2C_SDA = D14, + // Not connected NC = (int)0xFFFFFFFF, } PinName;
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Binary file TARGET_LPC11U35_501/TOOLCHAIN_ARM_MICRO/cmsis_nvic.o has changed
Binary file TARGET_LPC11U35_501/TOOLCHAIN_ARM_MICRO/mbed.ar has changed
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Binary file TARGET_LPC11U35_501/TOOLCHAIN_ARM_MICRO/system_LPC11Uxx.o has changed
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Binary file TARGET_LPC11U35_501/TOOLCHAIN_ARM_STD/system_LPC11Uxx.o has changed
Binary file TARGET_LPC11U35_501/TOOLCHAIN_GCC_ARM/libmbed.a has changed
Binary file TARGET_LPC11U35_501/TOOLCHAIN_GCC_CR/libmbed.a has changed
Binary file TARGET_LPC1347/TOOLCHAIN_ARM_STD/board.o has changed
Binary file TARGET_LPC1347/TOOLCHAIN_ARM_STD/cmsis_nvic.o has changed
Binary file TARGET_LPC1347/TOOLCHAIN_ARM_STD/mbed.ar has changed
Binary file TARGET_LPC1347/TOOLCHAIN_ARM_STD/retarget.o has changed
Binary file TARGET_LPC1347/TOOLCHAIN_ARM_STD/startup_LPC13xx.o has changed
Binary file TARGET_LPC1347/TOOLCHAIN_ARM_STD/sys.o has changed
Binary file TARGET_LPC1347/TOOLCHAIN_ARM_STD/system_LPC13Uxx.o has changed
Binary file TARGET_LPC1549/TOOLCHAIN_ARM_MICRO/board.o has changed
Binary file TARGET_LPC1549/TOOLCHAIN_ARM_MICRO/cmsis_nvic.o has changed
Binary file TARGET_LPC1549/TOOLCHAIN_ARM_MICRO/mbed.ar has changed
Binary file TARGET_LPC1549/TOOLCHAIN_ARM_MICRO/retarget.o has changed
Binary file TARGET_LPC1549/TOOLCHAIN_ARM_MICRO/startup_LPC15xx.o has changed
Binary file TARGET_LPC1549/TOOLCHAIN_ARM_MICRO/sys.o has changed
Binary file TARGET_LPC1549/TOOLCHAIN_ARM_MICRO/system_LPC15xx.o has changed
--- a/TARGET_LPC1768/TARGET_NXP/TARGET_LPC176X/TARGET_MBED_LPC1768/PinNames.h Mon Apr 07 18:28:36 2014 +0100 +++ b/TARGET_LPC1768/TARGET_NXP/TARGET_LPC176X/TARGET_MBED_LPC1768/PinNames.h Mon Apr 28 17:39:05 2014 +0100 @@ -106,6 +106,9 @@ A4 = P1_30, A5 = P1_31, + I2C_SCL = D15, + I2C_SDA = D14, + // Not connected NC = (int)0xFFFFFFFF } PinName;
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Binary file TARGET_LPC1768/TOOLCHAIN_ARM_STD/system_LPC17xx.o has changed
Binary file TARGET_LPC1768/TOOLCHAIN_GCC_ARM/libmbed.a has changed
Binary file TARGET_LPC1768/TOOLCHAIN_GCC_CR/libmbed.a has changed
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Binary file TARGET_LPC1768/TOOLCHAIN_IAR/cmsis_nvic.o has changed
Binary file TARGET_LPC1768/TOOLCHAIN_IAR/mbed.a has changed
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Binary file TARGET_LPC2368/TOOLCHAIN_ARM_STD/board.o has changed
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Binary file TARGET_LPC2368/TOOLCHAIN_ARM_STD/core_arm7.o has changed
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Binary file TARGET_LPC2368/TOOLCHAIN_ARM_STD/vector_functions.o has changed
Binary file TARGET_LPC2368/TOOLCHAIN_ARM_STD/vector_realmonitor.o has changed
Binary file TARGET_LPC2368/TOOLCHAIN_ARM_STD/vector_table.o has changed
Binary file TARGET_LPC4088/TOOLCHAIN_ARM_STD/board.o has changed
Binary file TARGET_LPC4088/TOOLCHAIN_ARM_STD/cmsis_nvic.o has changed
Binary file TARGET_LPC4088/TOOLCHAIN_ARM_STD/mbed.ar has changed
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Binary file TARGET_LPC4088/TOOLCHAIN_ARM_STD/startup_LPC407x_8x_177x_8x.o has changed
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Binary file TARGET_LPC4088/TOOLCHAIN_ARM_STD/system_LPC407x_8x_177x_8x.o has changed
Binary file TARGET_LPC4088/TOOLCHAIN_GCC_ARM/libmbed.a has changed
Binary file TARGET_LPC4088/TOOLCHAIN_GCC_CR/libmbed.a has changed
Binary file TARGET_LPC812/TOOLCHAIN_ARM_MICRO/board.o has changed
Binary file TARGET_LPC812/TOOLCHAIN_ARM_MICRO/cmsis_nvic.o has changed
Binary file TARGET_LPC812/TOOLCHAIN_ARM_MICRO/mbed.ar has changed
Binary file TARGET_LPC812/TOOLCHAIN_ARM_MICRO/retarget.o has changed
Binary file TARGET_LPC812/TOOLCHAIN_ARM_MICRO/startup_LPC8xx.o has changed
Binary file TARGET_LPC812/TOOLCHAIN_ARM_MICRO/sys.o has changed
Binary file TARGET_LPC812/TOOLCHAIN_ARM_MICRO/system_LPC8xx.o has changed
Binary file TARGET_NRF51822/TOOLCHAIN_ARM_STD/board.o has changed
Binary file TARGET_NRF51822/TOOLCHAIN_ARM_STD/cmsis_nvic.o has changed
Binary file TARGET_NRF51822/TOOLCHAIN_ARM_STD/mbed.ar has changed
Binary file TARGET_NRF51822/TOOLCHAIN_ARM_STD/retarget.o has changed
Binary file TARGET_NRF51822/TOOLCHAIN_ARM_STD/startup_nRF51822.o has changed
Binary file TARGET_NRF51822/TOOLCHAIN_ARM_STD/sys.o has changed
Binary file TARGET_NRF51822/TOOLCHAIN_ARM_STD/system_nrf51822.o has changed
--- a/TARGET_NUCLEO_F030R8/TARGET_STM/TARGET_NUCLEO_F030R8/PeripheralNames.h Mon Apr 07 18:28:36 2014 +0100 +++ b/TARGET_NUCLEO_F030R8/TARGET_STM/TARGET_NUCLEO_F030R8/PeripheralNames.h Mon Apr 28 17:39:05 2014 +0100 @@ -67,7 +67,9 @@ typedef enum { TIM_3 = (int)TIM3_BASE, TIM_14 = (int)TIM14_BASE, - TIM_16 = (int)TIM16_BASE + TIM_15 = (int)TIM15_BASE, + TIM_16 = (int)TIM16_BASE, + TIM_17 = (int)TIM17_BASE } PWMName; #ifdef __cplusplus
--- a/TARGET_NUCLEO_F030R8/TARGET_STM/TARGET_NUCLEO_F030R8/PinNames.h Mon Apr 07 18:28:36 2014 +0100 +++ b/TARGET_NUCLEO_F030R8/TARGET_STM/TARGET_NUCLEO_F030R8/PinNames.h Mon Apr 28 17:39:05 2014 +0100 @@ -158,7 +158,7 @@ SPI_MISO = PA_6, SPI_SCK = PA_5, SPI_CS = PB_6, - PWM_OUT = PB_3, + PWM_OUT = PC_7, // Not connected NC = (int)0xFFFFFFFF
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Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/cmsis_nvic.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/mbed.ar has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/mbed_overrides.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/retarget.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/startup_stm32f030.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/stm32f0xx_adc.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/stm32f0xx_can.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/stm32f0xx_cec.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/stm32f0xx_comp.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/stm32f0xx_crc.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/stm32f0xx_crs.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/stm32f0xx_dac.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/stm32f0xx_dbgmcu.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/stm32f0xx_dma.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/stm32f0xx_exti.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/stm32f0xx_flash.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/stm32f0xx_gpio.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/stm32f0xx_i2c.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/stm32f0xx_iwdg.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/stm32f0xx_misc.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/stm32f0xx_pwr.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/stm32f0xx_rcc.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/stm32f0xx_rtc.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/stm32f0xx_spi.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/stm32f0xx_syscfg.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/stm32f0xx_tim.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/stm32f0xx_usart.o has changed
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Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/system_stm32f0xx.o has changed
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Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_STD/cmsis_nvic.o has changed
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Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_STD/startup_stm32f030.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_STD/stm32f0xx_adc.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_STD/stm32f0xx_can.o has changed
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Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_STD/stm32f0xx_crc.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_STD/stm32f0xx_crs.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_STD/stm32f0xx_dac.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_STD/stm32f0xx_dbgmcu.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_STD/stm32f0xx_dma.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_STD/stm32f0xx_exti.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_STD/stm32f0xx_flash.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_STD/stm32f0xx_gpio.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_STD/stm32f0xx_i2c.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_STD/stm32f0xx_iwdg.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_STD/stm32f0xx_misc.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_STD/stm32f0xx_pwr.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_STD/stm32f0xx_rcc.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_STD/stm32f0xx_rtc.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_STD/stm32f0xx_spi.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_STD/stm32f0xx_syscfg.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_STD/stm32f0xx_tim.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_STD/stm32f0xx_usart.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_STD/stm32f0xx_wwdg.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_STD/sys.o has changed
Binary file TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_STD/system_stm32f0xx.o has changed
--- a/TARGET_NUCLEO_F030R8/stm32f0xx.h Mon Apr 07 18:28:36 2014 +0100 +++ b/TARGET_NUCLEO_F030R8/stm32f0xx.h Mon Apr 28 17:39:05 2014 +0100 @@ -137,7 +137,7 @@ Timeout value */ #if !defined (HSE_STARTUP_TIMEOUT) -#define HSE_STARTUP_TIMEOUT ((uint16_t)0x5000) /*!< Time out for HSE start up */ +#define HSE_STARTUP_TIMEOUT ((uint16_t)1000) /*!< Time out for HSE start up */ #endif /* HSE_STARTUP_TIMEOUT */ /**
--- a/TARGET_NUCLEO_F030R8/system_stm32f0xx.h Mon Apr 07 18:28:36 2014 +0100 +++ b/TARGET_NUCLEO_F030R8/system_stm32f0xx.h Mon Apr 28 17:39:05 2014 +0100 @@ -94,6 +94,8 @@ extern void SystemInit(void); extern void SystemCoreClockUpdate(void); +extern void SetSysClock(void); + /** * @} */
--- a/TARGET_NUCLEO_F103RB/TARGET_STM/TARGET_NUCLEO_F103RB/PeripheralNames.h Mon Apr 07 18:28:36 2014 +0100 +++ b/TARGET_NUCLEO_F103RB/TARGET_STM/TARGET_NUCLEO_F103RB/PeripheralNames.h Mon Apr 28 17:39:05 2014 +0100 @@ -37,13 +37,13 @@ #endif typedef enum { - ADC_1 = (int)ADC1_BASE, - ADC_2 = (int)ADC2_BASE + ADC_1 = (int)ADC1_BASE } ADCName; typedef enum { UART_1 = (int)USART1_BASE, - UART_2 = (int)USART2_BASE + UART_2 = (int)USART2_BASE, + UART_3 = (int)USART3_BASE } UARTName; #define STDIO_UART_TX PA_2 @@ -61,6 +61,7 @@ } I2CName; typedef enum { + PWM_1 = (int)TIM1_BASE, PWM_2 = (int)TIM2_BASE, PWM_3 = (int)TIM3_BASE, PWM_4 = (int)TIM4_BASE
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Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_MICRO/mbed.ar has changed
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Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_MICRO/misc.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_MICRO/retarget.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_MICRO/startup_stm32f10x_md.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_MICRO/stm32f10x_adc.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_MICRO/stm32f10x_bkp.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_MICRO/stm32f10x_can.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_MICRO/stm32f10x_cec.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_MICRO/stm32f10x_crc.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_MICRO/stm32f10x_dac.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_MICRO/stm32f10x_dbgmcu.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_MICRO/stm32f10x_dma.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_MICRO/stm32f10x_exti.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_MICRO/stm32f10x_flash.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_MICRO/stm32f10x_fsmc.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_MICRO/stm32f10x_gpio.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_MICRO/stm32f10x_i2c.o has changed
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Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_MICRO/stm32f10x_pwr.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_MICRO/stm32f10x_rcc.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_MICRO/stm32f10x_rtc.o has changed
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Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_MICRO/stm32f10x_spi.o has changed
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Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_MICRO/stm32f10x_usart.o has changed
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Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_MICRO/system_stm32f10x.o has changed
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Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_STD/cmsis_nvic.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_STD/mbed.ar has changed
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Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_STD/startup_stm32f10x_md.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_STD/stm32f10x_adc.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_STD/stm32f10x_bkp.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_STD/stm32f10x_can.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_STD/stm32f10x_cec.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_STD/stm32f10x_crc.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_STD/stm32f10x_dac.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_STD/stm32f10x_dbgmcu.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_STD/stm32f10x_dma.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_STD/stm32f10x_exti.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_STD/stm32f10x_flash.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_STD/stm32f10x_fsmc.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_STD/stm32f10x_gpio.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_STD/stm32f10x_i2c.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_STD/stm32f10x_iwdg.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_STD/stm32f10x_pwr.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_STD/stm32f10x_rcc.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_STD/stm32f10x_rtc.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_STD/stm32f10x_sdio.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_STD/stm32f10x_spi.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_STD/stm32f10x_tim.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_STD/stm32f10x_usart.o has changed
Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_STD/stm32f10x_wwdg.o has changed
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Binary file TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_STD/system_stm32f10x.o has changed
--- a/TARGET_NUCLEO_F103RB/system_stm32f10x.h Mon Apr 07 18:28:36 2014 +0100 +++ b/TARGET_NUCLEO_F103RB/system_stm32f10x.h Mon Apr 28 17:39:05 2014 +0100 @@ -93,6 +93,8 @@ extern void SystemInit(void); extern void SystemCoreClockUpdate(void); +extern void SetSysClock(void); + /** * @} */
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Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_MICRO/stm32f30x_adc.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_MICRO/stm32f30x_can.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_MICRO/stm32f30x_comp.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_MICRO/stm32f30x_crc.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_MICRO/stm32f30x_dac.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_MICRO/stm32f30x_dbgmcu.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_MICRO/stm32f30x_dma.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_MICRO/stm32f30x_exti.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_MICRO/stm32f30x_flash.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_MICRO/stm32f30x_gpio.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_MICRO/stm32f30x_hrtim.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_MICRO/stm32f30x_i2c.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_MICRO/stm32f30x_iwdg.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_MICRO/stm32f30x_misc.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_MICRO/stm32f30x_opamp.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_MICRO/stm32f30x_pwr.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_MICRO/stm32f30x_rcc.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_MICRO/stm32f30x_rtc.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_MICRO/stm32f30x_spi.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_MICRO/stm32f30x_syscfg.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_MICRO/stm32f30x_tim.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_MICRO/stm32f30x_usart.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_MICRO/stm32f30x_wwdg.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_MICRO/sys.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_MICRO/system_stm32f30x.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/board.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/cmsis_nvic.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/mbed.ar has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/mbed_overrides.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/retarget.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/startup_stm32f302x8.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/stm32f30x_adc.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/stm32f30x_can.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/stm32f30x_comp.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/stm32f30x_crc.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/stm32f30x_dac.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/stm32f30x_dbgmcu.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/stm32f30x_dma.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/stm32f30x_exti.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/stm32f30x_flash.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/stm32f30x_gpio.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/stm32f30x_hrtim.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/stm32f30x_i2c.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/stm32f30x_iwdg.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/stm32f30x_misc.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/stm32f30x_opamp.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/stm32f30x_pwr.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/stm32f30x_rcc.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/stm32f30x_rtc.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/stm32f30x_spi.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/stm32f30x_syscfg.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/stm32f30x_tim.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/stm32f30x_usart.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/stm32f30x_wwdg.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/sys.o has changed
Binary file TARGET_NUCLEO_F302R8/TOOLCHAIN_ARM_STD/system_stm32f30x.o has changed
--- a/TARGET_NUCLEO_F302R8/system_stm32f30x.h Mon Apr 07 18:28:36 2014 +0100 +++ b/TARGET_NUCLEO_F302R8/system_stm32f30x.h Mon Apr 28 17:39:05 2014 +0100 @@ -65,6 +65,7 @@ extern void SystemInit(void); extern void SystemCoreClockUpdate(void); +extern void SetSysClock(void); /** * @}
--- a/TARGET_NUCLEO_F401RE/TARGET_STM/TARGET_NUCLEO_F401RE/PeripheralNames.h Mon Apr 07 18:28:36 2014 +0100 +++ b/TARGET_NUCLEO_F401RE/TARGET_STM/TARGET_NUCLEO_F401RE/PeripheralNames.h Mon Apr 28 17:39:05 2014 +0100 @@ -41,7 +41,7 @@ } ADCName; typedef enum { - UART_1 = (int)USART1_BASE, + UART_1 = (int)USART1_BASE, UART_2 = (int)USART2_BASE, UART_6 = (int)USART6_BASE } UARTName;
--- a/TARGET_NUCLEO_F401RE/TARGET_STM/TARGET_NUCLEO_F401RE/gpio_object.h Mon Apr 07 18:28:36 2014 +0100 +++ b/TARGET_NUCLEO_F401RE/TARGET_STM/TARGET_NUCLEO_F401RE/gpio_object.h Mon Apr 28 17:39:05 2014 +0100 @@ -50,8 +50,7 @@ static inline void gpio_write(gpio_t *obj, int value) { if (value) { *obj->reg_set = obj->mask; - } - else { + } else { *obj->reg_clr = obj->mask; } }
--- a/TARGET_NUCLEO_F401RE/TARGET_STM/TARGET_NUCLEO_F401RE/objects.h Mon Apr 07 18:28:36 2014 +0100 +++ b/TARGET_NUCLEO_F401RE/TARGET_STM/TARGET_NUCLEO_F401RE/objects.h Mon Apr 28 17:39:05 2014 +0100 @@ -49,7 +49,7 @@ struct port_s { PortName port; uint32_t mask; - PinDirection direction; + PinDirection direction; __IO uint32_t *reg_in; __IO uint32_t *reg_out; }; @@ -65,7 +65,7 @@ uint32_t baudrate; uint32_t databits; uint32_t stopbits; - uint32_t parity; + uint32_t parity; }; struct spi_s {
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/board.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/cmsis_nvic.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/mbed.ar has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/mbed_overrides.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/retarget.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/startup_stm32f401xe.o has changed
--- a/TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f401xe.sct Mon Apr 07 18:28:36 2014 +0100 +++ b/TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f401xe.sct Mon Apr 28 17:39:05 2014 +0100 @@ -27,7 +27,8 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -LR_IROM1 0x08000000 0x80000 { ; load region size_region (512K) +; STM32F401RE: 512KB FLASH + 96KB SRAM +LR_IROM1 0x08000000 0x80000 { ; load region size_region ER_IROM1 0x08000000 0x80000 { ; load address = execution address *.o (RESET, +First)
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_adc.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_adc_ex.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_can.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_cortex.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_crc.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_cryp.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_cryp_ex.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_dac.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_dac_ex.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_dcmi.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_dma.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_dma2d.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_dma_ex.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_eth.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_flash.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_flash_ex.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_gpio.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_hash.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_hash_ex.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_hcd.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_i2c.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_i2c_ex.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_i2s.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_i2s_ex.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_irda.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_iwdg.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_ltdc.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_nand.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_nor.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_pccard.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_pcd.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_pwr.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_pwr_ex.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_rcc.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_rcc_ex.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_rng.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_rtc.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_rtc_ex.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_sai.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_sd.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_sdram.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_smartcard.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_spi.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_sram.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_tim.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_tim_ex.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_uart.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_usart.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_hal_wwdg.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_ll_fmc.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_ll_fsmc.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_ll_sdmmc.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/stm32f4xx_ll_usb.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/sys.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_MICRO/system_stm32f4xx.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/board.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/cmsis_nvic.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/mbed.ar has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/mbed_overrides.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/retarget.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/startup_stm32f401xe.o has changed
--- a/TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f401xe.sct Mon Apr 07 18:28:36 2014 +0100 +++ b/TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f401xe.sct Mon Apr 28 17:39:05 2014 +0100 @@ -27,7 +27,8 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -LR_IROM1 0x08000000 0x80000 { ; load region size_region (512K) +; STM32F401RE: 512KB FLASH + 96KB SRAM +LR_IROM1 0x08000000 0x80000 { ; load region size_region ER_IROM1 0x08000000 0x80000 { ; load address = execution address *.o (RESET, +First)
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_adc.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_adc_ex.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_can.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_cortex.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_crc.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_cryp.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_cryp_ex.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_dac.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_dac_ex.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_dcmi.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_dma.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_dma2d.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_dma_ex.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_eth.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_flash.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_flash_ex.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_gpio.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_hash.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_hash_ex.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_hcd.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_i2c.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_i2c_ex.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_i2s.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_i2s_ex.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_irda.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_iwdg.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_ltdc.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_nand.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_nor.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_pccard.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_pcd.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_pwr.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_pwr_ex.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_rcc.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_rcc_ex.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_rng.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_rtc.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_rtc_ex.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_sai.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_sd.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_sdram.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_smartcard.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_spi.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_sram.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_tim.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_tim_ex.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_uart.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_usart.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_hal_wwdg.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_ll_fmc.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_ll_fsmc.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_ll_sdmmc.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/stm32f4xx_ll_usb.o has changed
Binary file TARGET_NUCLEO_F401RE/TOOLCHAIN_ARM_STD/sys.o has changed
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--- a/TARGET_NUCLEO_F401RE/stm32f4xx.h Mon Apr 07 18:28:36 2014 +0100 +++ b/TARGET_NUCLEO_F401RE/stm32f4xx.h Mon Apr 28 17:39:05 2014 +0100 @@ -196,6 +196,10 @@ * @} */ +#if defined (USE_HAL_DRIVER) + #include "stm32f4xx_hal.h" +#endif /* USE_HAL_DRIVER */ + #ifdef __cplusplus }
--- a/TARGET_NUCLEO_F401RE/stm32f4xx_hal_conf.h Mon Apr 07 18:28:36 2014 +0100 +++ b/TARGET_NUCLEO_F401RE/stm32f4xx_hal_conf.h Mon Apr 28 17:39:05 2014 +0100 @@ -103,7 +103,7 @@ #endif /* HSE_VALUE */ #if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for HSE start up, in ms */ + #define HSE_STARTUP_TIMEOUT ((uint32_t)50) /*!< Time out for HSE start up, in ms */ #endif /* HSE_STARTUP_TIMEOUT */ /** @@ -116,6 +116,14 @@ #endif /* HSI_VALUE */ /** + * @brief External Low Speed oscillator (LSE) value. + * This value is used by the UART, RTC HAL module to compute the system frequency + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/ +#endif /* LSE_VALUE */ + +/** * @brief External clock source for I2S peripheral * This value is used by the I2S HAL module to compute the I2S clock source * frequency, this source is inserted directly through I2S_CKIN pad. @@ -131,7 +139,8 @@ /** * @brief This is the HAL system configuration section */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ +#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)3) /*!< tick interrupt priority */ #define USE_RTOS 0 #define PREFETCH_ENABLE 1 #define INSTRUCTION_CACHE_ENABLE 1
--- a/TARGET_NUCLEO_F401RE/stm32f4xx_hal_rcc.h Mon Apr 07 18:28:36 2014 +0100 +++ b/TARGET_NUCLEO_F401RE/stm32f4xx_hal_rcc.h Mon Apr 28 17:39:05 2014 +0100 @@ -190,7 +190,7 @@ #define DBP_TIMEOUT_VALUE ((uint32_t)100) -#define LSE_TIMEOUT_VALUE ((uint32_t)5000) +#define LSE_TIMEOUT_VALUE ((uint32_t)100) /** * @} */
--- a/TARGET_NUCLEO_F401RE/system_stm32f4xx.h Mon Apr 07 18:28:36 2014 +0100 +++ b/TARGET_NUCLEO_F401RE/system_stm32f4xx.h Mon Apr 28 17:39:05 2014 +0100 @@ -32,8 +32,8 @@ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - ****************************************************************************** - */ + ****************************************************************************** + */ /** @addtogroup CMSIS * @{
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--- a/mbed.h Mon Apr 07 18:28:36 2014 +0100 +++ b/mbed.h Mon Apr 28 17:39:05 2014 +0100 @@ -16,7 +16,7 @@ #ifndef MBED_H #define MBED_H -#define MBED_LIBRARY_VERSION 81 +#define MBED_LIBRARY_VERSION 83 #include "platform.h"