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cours 1
main.h@9:41207561508d, 2020-10-01 (annotated)
- Committer:
- kanope_benny
- Date:
- Thu Oct 01 12:11:56 2020 +0000
- Revision:
- 9:41207561508d
update
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
kanope_benny | 9:41207561508d | 1 | |
kanope_benny | 9:41207561508d | 2 | #include "mbed.h" |
kanope_benny | 9:41207561508d | 3 | |
kanope_benny | 9:41207561508d | 4 | |
kanope_benny | 9:41207561508d | 5 | |
kanope_benny | 9:41207561508d | 6 | void setup(void) |
kanope_benny | 9:41207561508d | 7 | { |
kanope_benny | 9:41207561508d | 8 | RCC_ClkInitTypeDef RCC_ClkInitStruct; |
kanope_benny | 9:41207561508d | 9 | RCC_OscInitTypeDef RCC_OscInitStruct; |
kanope_benny | 9:41207561508d | 10 | |
kanope_benny | 9:41207561508d | 11 | RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE; |
kanope_benny | 9:41207561508d | 12 | RCC_OscInitStruct.HSEState = RCC_HSE_ON; |
kanope_benny | 9:41207561508d | 13 | |
kanope_benny | 9:41207561508d | 14 | RCC_OscInitStruct.LSIState = RCC_LSI_ON; |
kanope_benny | 9:41207561508d | 15 | RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; |
kanope_benny | 9:41207561508d | 16 | RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; |
kanope_benny | 9:41207561508d | 17 | |
kanope_benny | 9:41207561508d | 18 | RCC_OscInitStruct.PLL.PLLM = 25; // VCO input clock = 1 MHz (25 MHz / 25) |
kanope_benny | 9:41207561508d | 19 | RCC_OscInitStruct.PLL.PLLN = 192; // VCO output clock = 192 MHz (1 MHz * 192) |
kanope_benny | 9:41207561508d | 20 | RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // PLLCLK = 96 MHz (192 MHz / 2) |
kanope_benny | 9:41207561508d | 21 | RCC_OscInitStruct.PLL.PLLQ = 4; // USB clock = 48 MHz (192 MHz / 4) --> Good for USB |
kanope_benny | 9:41207561508d | 22 | |
kanope_benny | 9:41207561508d | 23 | HAL_RCC_OscConfig(&RCC_OscInitStruct); |
kanope_benny | 9:41207561508d | 24 | |
kanope_benny | 9:41207561508d | 25 | RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK|RCC_CLOCKTYPE_PCLK1; |
kanope_benny | 9:41207561508d | 26 | RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; |
kanope_benny | 9:41207561508d | 27 | RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; |
kanope_benny | 9:41207561508d | 28 | HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2); |
kanope_benny | 9:41207561508d | 29 | |
kanope_benny | 9:41207561508d | 30 | SystemCoreClockUpdate(); |
kanope_benny | 9:41207561508d | 31 | SystemCoreClock = 96000000; |
kanope_benny | 9:41207561508d | 32 | |
kanope_benny | 9:41207561508d | 33 | //HAL_RCC_MCOConfig(RCC_MCO2, RCC_MCO2SOURCE_SYSCLK, RCC_MCODIV_1); // output SYSCLOCK to pin PC9 to monitor frequency |
kanope_benny | 9:41207561508d | 34 | } |
kanope_benny | 9:41207561508d | 35 | |
kanope_benny | 9:41207561508d | 36 |