Diff: targets/hal/TARGET_STM/TARGET_STM32L1/serial_api.c

Revision:

522:aee49fe30179

Parent:

496:543871686697

--- a/targets/hal/TARGET_STM/TARGET_STM32L1/serial_api.c	Thu Apr 23 08:30:10 2015 +0100
+++ b/targets/hal/TARGET_STM/TARGET_STM32L1/serial_api.c	Thu Apr 23 09:15:08 2015 +0100
@@ -95,15 +95,18 @@
         obj->index = 2;
     }
 
+#if defined(USART4_BASE)
     if (obj->uart == UART_4) {
         __UART4_CLK_ENABLE();
         obj->index = 3;
     }
-
+#endif
+#if defined(USART5_BASE)
     if (obj->uart == UART_5) {
         __UART5_CLK_ENABLE();
         obj->index = 4;
     }
+#endif
 
     // Configure the UART pins
     pinmap_pinout(tx, PinMap_UART_TX);
@@ -153,17 +156,20 @@
         __USART3_CLK_DISABLE();
     }
 
+#if defined(USART4_BASE)
     if (obj->uart == UART_4) {
         __UART4_FORCE_RESET();
         __UART4_RELEASE_RESET();
         __UART4_CLK_DISABLE();
     }
-
+#endif
+#if defined(USART5_BASE)
     if (obj->uart == UART_5) {
         __UART5_FORCE_RESET();
         __UART5_RELEASE_RESET();
         __UART5_CLK_DISABLE();
     }
+#endif
 
     // Configure GPIOs
     pin_function(obj->pin_tx, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
@@ -243,15 +249,19 @@
     uart_irq(UART_3, 2);
 }
 
+#if defined(USART4_BASE)
 static void uart4_irq(void)
 {
     uart_irq(UART_4, 3);
 }
+#endif
 
+#if defined(USART5_BASE)
 static void uart5_irq(void)
 {
     uart_irq(UART_5, 4);
 }
+#endif
 
 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
 {
@@ -281,15 +291,19 @@
         vector = (uint32_t)&uart3_irq;
     }
 
+#if defined(USART4_BASE)
     if (obj->uart == UART_4) {
         irq_n = UART4_IRQn;
         vector = (uint32_t)&uart4_irq;
     }
+#endif
 
+#if defined(USART5_BASE)
     if (obj->uart == UART_5) {
         irq_n = UART5_IRQn;
         vector = (uint32_t)&uart5_irq;
     }
+#endif
 
     if (enable) {