Kazuki Yamamoto / Mbed 2 deprecated uart_i2c_conv

UART to I2C master(s) converter, targetting to emulate SC18IM700(NXP) chip

Dependencies:   mbed

UART to I2C master(s) converter, targetting to emulate SC18IM700(NXP) chip

Features

up to 4x I2C master

  • for LPC824 implement, we can use up to 4 channels of I2C masters
    • 1x Fm+ and 3x Fm I2C channels
  • for LPC1768 implement, we can use up to 2 channels of I2C masters
    • 2x Fm I2C channels
  • for LPC11U35 implement, only one channel for I2C master, but program uses USB CDC class for UART communication (means no external USB-Serial converter chip)
    • 1x Fm+ I2C channels

1x SPI master

up to 2x 8bit GPIO

Tested Platforms

LPC824

LPC1768

LPC11U35

Quote:

LPC11U35 implement requires importing USBDevice library to use USBSerial class

visit https://github.com/K4zuki/tinyI2C for more information

main.cpp@76:fcbc456010e0, 2016-08-31 (annotated)

Committer:
K4zuki
Date:
Wed Aug 31 02:39:01 2016 +0900
Revision:
76:fcbc456010e0
Parent:
42:da85c17ea495 
Merge branch 'master' of https://@developer.mbed.org/users/k4zuki/code/uart_i2c_conv

Who changed what in which revision?

UserRevisionLine numberNew contents of line
K4zuki 76:fcbc456010e0 1 /** uart_i2c_conv for LPC824
K4zuki 76:fcbc456010e0 2 */
K4zuki 76:fcbc456010e0 3
K4zuki 76:fcbc456010e0 4 #include "mbed.h"
K4zuki 76:fcbc456010e0 5 #include "settings.h"
K4zuki 76:fcbc456010e0 6 //Table 3. ASCII commands supported by SC18IM700
K4zuki 76:fcbc456010e0 7 //ASCII command Hex value Command function
K4zuki 76:fcbc456010e0 8 //[X] S 0x53 I2C-bus START
K4zuki 76:fcbc456010e0 9 //[X] P 0x50 I2C/SPI-bus STOP
K4zuki 76:fcbc456010e0 10 //[X] R 0x52 read SC18IM700 internal register
K4zuki 76:fcbc456010e0 11 //[X] W 0x57 write to SC18IM700 internal register
K4zuki 76:fcbc456010e0 12 //[?] I 0x49 read GPIO port
K4zuki 76:fcbc456010e0 13 //[?] O 0x4F write to GPIO port
K4zuki 76:fcbc456010e0 14 //[_] Z 0x5A power down
K4zuki 76:fcbc456010e0 15 //[X] C 0x43 change channel
K4zuki 76:fcbc456010e0 16 //[_] E 0x45 SPI transfer start
K4zuki 76:fcbc456010e0 17 //[_] V 0x__ enable VDDIO output to chip
K4zuki 76:fcbc456010e0 18
K4zuki 76:fcbc456010e0 19 /**
K4zuki 76:fcbc456010e0 20 "C| '0'| P"
K4zuki 76:fcbc456010e0 21 "C| '1'| P"
K4zuki 76:fcbc456010e0 22 "C| '2'| P"
K4zuki 76:fcbc456010e0 23 "C| '3'| P"
K4zuki 76:fcbc456010e0 24 "S| 0x_8 _0| 0x_0 _4| 0x_D _E _A _D _B _E _A _F| P"
K4zuki 76:fcbc456010e0 25 "S| 0x_8 _0| 0x_0 _4| 0x_D _E _A _D _B _E _A _F| S| 0x_8 _1| 0x_0 _4| P"
K4zuki 76:fcbc456010e0 26 "S| 0x_8 _1| 0x_0 _4| P"
K4zuki 76:fcbc456010e0 27 "R| '0'| P"
K4zuki 76:fcbc456010e0 28 "R| '0'| '1'| ...| P"
K4zuki 76:fcbc456010e0 29 "W| '0' 0x_a _a| P"
K4zuki 76:fcbc456010e0 30 "W| '0' 0x_a _a| '1' 0x_b _b| ...| P"
K4zuki 76:fcbc456010e0 31 "I| '0'| P"
K4zuki 76:fcbc456010e0 32 "O| '0'| 0x_a _a| P"
K4zuki 76:fcbc456010e0 33 "E| 0x_0 _4| 0x_0 _0| 0x_D _E _A _D _B _E _A _F| P" //write
K4zuki 76:fcbc456010e0 34 "E| 0x_0 _4| 0x_0 _4| 0x_D _E _A _D _B _E _A _F| P" //write and read
K4zuki 76:fcbc456010e0 35 */
K4zuki 76:fcbc456010e0 36 int main()
K4zuki 76:fcbc456010e0 37 {
K4zuki 76:fcbc456010e0 38 I2C* dev = &dev1;
K4zuki 76:fcbc456010e0 39
K4zuki 76:fcbc456010e0 40 #ifdef isUART
K4zuki 76:fcbc456010e0 41 pc.baud(115200);
K4zuki 76:fcbc456010e0 42 #endif
K4zuki 76:fcbc456010e0 43 _spi.frequency(8000000);
K4zuki 76:fcbc456010e0 44
K4zuki 76:fcbc456010e0 45 bool s = false;
K4zuki 76:fcbc456010e0 46 dev1.frequency(400000);//800k; works around 940kHz with 200ohm pullups/ not work at 1M?
K4zuki 76:fcbc456010e0 47 #if defined(TARGET_SSCI824) || defined(TARGET_LP824MAX)
K4zuki 76:fcbc456010e0 48 dev1.frequency(800000);//800k; works around 940kHz with 200ohm pullups/ not work at 1M?
K4zuki 76:fcbc456010e0 49 LPC_IOCON->PIO0_11 &= ~(0x03<<8);
K4zuki 76:fcbc456010e0 50 LPC_IOCON->PIO0_11 |= (0x02<<8);
K4zuki 76:fcbc456010e0 51 LPC_IOCON->PIO0_10 &= ~(0x03<<8);
K4zuki 76:fcbc456010e0 52 LPC_IOCON->PIO0_10 |= (0x02<<8);
K4zuki 76:fcbc456010e0 53 #elif defined(TARGET_MCU_LPC11U35_501) || defined(TARGET_LPC11U35_401)
K4zuki 76:fcbc456010e0 54 dev1.frequency(800000);//800k; works around 940kHz with 200ohm pullups/ not work at 1M?
K4zuki 76:fcbc456010e0 55 LPC_IOCON->PIO0_4 &= ~(0x03<<8);
K4zuki 76:fcbc456010e0 56 LPC_IOCON->PIO0_4 |= (0x02<<8);
K4zuki 76:fcbc456010e0 57 LPC_IOCON->PIO0_5 &= ~(0x03<<8);
K4zuki 76:fcbc456010e0 58 LPC_IOCON->PIO0_5 |= (0x02<<8);
K4zuki 76:fcbc456010e0 59 #endif
K4zuki 76:fcbc456010e0 60
K4zuki 76:fcbc456010e0 61 #ifdef isI2C2
K4zuki 76:fcbc456010e0 62 dev2.frequency(400000);//400k
K4zuki 76:fcbc456010e0 63 #endif
K4zuki 76:fcbc456010e0 64 #ifdef isI2C3
K4zuki 76:fcbc456010e0 65 dev3.frequency(400000);//400k
K4zuki 76:fcbc456010e0 66 #endif
K4zuki 76:fcbc456010e0 67 #ifdef isI2C4
K4zuki 76:fcbc456010e0 68 dev4.frequency(400000);//400k
K4zuki 76:fcbc456010e0 69 #endif
K4zuki 76:fcbc456010e0 70 #ifdef isGPIO1
K4zuki 76:fcbc456010e0 71 DigitalInOut* gpio1[] = {
K4zuki 76:fcbc456010e0 72 &_GPIO10,
K4zuki 76:fcbc456010e0 73 &_GPIO11,
K4zuki 76:fcbc456010e0 74 &_GPIO12,
K4zuki 76:fcbc456010e0 75 &_GPIO13,
K4zuki 76:fcbc456010e0 76 &_GPIO14,
K4zuki 76:fcbc456010e0 77 &_GPIO15,
K4zuki 76:fcbc456010e0 78 &_GPIO16,
K4zuki 76:fcbc456010e0 79 &_GPIO17,
K4zuki 76:fcbc456010e0 80 };
K4zuki 76:fcbc456010e0 81 for(int k = 0; k < 8; k++){
K4zuki 76:fcbc456010e0 82 gpio1[k]->input();
K4zuki 76:fcbc456010e0 83 gpio1[k]->mode( PullUp );
K4zuki 76:fcbc456010e0 84 }
K4zuki 76:fcbc456010e0 85 #endif
K4zuki 76:fcbc456010e0 86
K4zuki 76:fcbc456010e0 87 DigitalInOut* gpio0[] = {
K4zuki 76:fcbc456010e0 88 &_GPIO00,
K4zuki 76:fcbc456010e0 89 &_GPIO01,
K4zuki 76:fcbc456010e0 90 &_GPIO02,
K4zuki 76:fcbc456010e0 91 &_GPIO03,
K4zuki 76:fcbc456010e0 92 &_GPIO04,
K4zuki 76:fcbc456010e0 93 &_GPIO05,
K4zuki 76:fcbc456010e0 94 &_GPIO06,
K4zuki 76:fcbc456010e0 95 &_GPIO07,
K4zuki 76:fcbc456010e0 96 };
K4zuki 76:fcbc456010e0 97 for(int k = 0; k < 8; k++){
K4zuki 76:fcbc456010e0 98 gpio0[k]->input();
K4zuki 76:fcbc456010e0 99 gpio0[k]->mode( PullUp );
K4zuki 76:fcbc456010e0 100 }
K4zuki 76:fcbc456010e0 101
K4zuki 76:fcbc456010e0 102 int ack = 0;
K4zuki 76:fcbc456010e0 103 int plength = 0;
K4zuki 76:fcbc456010e0 104 int recieve[256];
K4zuki 76:fcbc456010e0 105 char send[256];
K4zuki 76:fcbc456010e0 106 for(int k = 0; k < 256; k+=4){
K4zuki 76:fcbc456010e0 107 // cafe moca
K4zuki 76:fcbc456010e0 108 recieve[k+0] = send[k+0] = 0xC4;
K4zuki 76:fcbc456010e0 109 recieve[k+1] = send[k+1] = 0xFE;
K4zuki 76:fcbc456010e0 110 recieve[k+2] = send[k+2] = 0xE0;
K4zuki 76:fcbc456010e0 111 recieve[k+3] = send[k+3] = 0xCA;
K4zuki 76:fcbc456010e0 112 }
K4zuki 76:fcbc456010e0 113
K4zuki 76:fcbc456010e0 114 int read = 0;
K4zuki 76:fcbc456010e0 115 int address = 0;
K4zuki 76:fcbc456010e0 116 int data = 0;
K4zuki 76:fcbc456010e0 117 int _data = 0;
K4zuki 76:fcbc456010e0 118 int length = 0;
K4zuki 76:fcbc456010e0 119 int channel = 0;
K4zuki 76:fcbc456010e0 120 int format = 8;
K4zuki 76:fcbc456010e0 121 int enabled = 0;
K4zuki 76:fcbc456010e0 122 int disabled = 0;
K4zuki 76:fcbc456010e0 123 enum command_e {
K4zuki 76:fcbc456010e0 124 CMD_S='S',
K4zuki 76:fcbc456010e0 125 CMD_P='P',
K4zuki 76:fcbc456010e0 126 CMD_C='C',
K4zuki 76:fcbc456010e0 127 CMD_R='R',
K4zuki 76:fcbc456010e0 128 CMD_W='W',
K4zuki 76:fcbc456010e0 129 CMD_I='I',
K4zuki 76:fcbc456010e0 130 CMD_O='O',
K4zuki 76:fcbc456010e0 131 CMD_E='E',
K4zuki 76:fcbc456010e0 132 };
K4zuki 76:fcbc456010e0 133 enum channel_e {
K4zuki 76:fcbc456010e0 134 CH0 = '0',
K4zuki 76:fcbc456010e0 135 CH1 = '1',
K4zuki 76:fcbc456010e0 136 CH2 = '2',
K4zuki 76:fcbc456010e0 137 CH3 = '3',
K4zuki 76:fcbc456010e0 138 };
K4zuki 76:fcbc456010e0 139 enum register_e {
K4zuki 76:fcbc456010e0 140 CHIP_ID = '0',
K4zuki 76:fcbc456010e0 141 GPIO0_STAT = '1',
K4zuki 76:fcbc456010e0 142 GPIO1_STAT = '2',
K4zuki 76:fcbc456010e0 143 GPIO0_CONF = '3',
K4zuki 76:fcbc456010e0 144 GPIO1_CONF = '4',
K4zuki 76:fcbc456010e0 145 I2C_CONF = '5',
K4zuki 76:fcbc456010e0 146 SPI_CONF = '6',
K4zuki 76:fcbc456010e0 147 REG7,
K4zuki 76:fcbc456010e0 148 REG8,
K4zuki 76:fcbc456010e0 149 REG9,
K4zuki 76:fcbc456010e0 150 };
K4zuki 76:fcbc456010e0 151 // enum chipID_e {
K4zuki 76:fcbc456010e0 152 // ID_LPC824 = '0',
K4zuki 76:fcbc456010e0 153 // ID_LPC1768 = '1',
K4zuki 76:fcbc456010e0 154 // ID_LPC11UXX = '2',
K4zuki 76:fcbc456010e0 155 // };
K4zuki 76:fcbc456010e0 156 // static const uint8_t chip_id=ID_LPC824;
K4zuki 76:fcbc456010e0 157 static uint8_t registers[]={
K4zuki 76:fcbc456010e0 158 chip_id,
K4zuki 76:fcbc456010e0 159 0x00,
K4zuki 76:fcbc456010e0 160 0x00,
K4zuki 76:fcbc456010e0 161 0x00,
K4zuki 76:fcbc456010e0 162 0x00,
K4zuki 76:fcbc456010e0 163 0xFF,
K4zuki 76:fcbc456010e0 164 0x70,
K4zuki 76:fcbc456010e0 165 REG7,
K4zuki 76:fcbc456010e0 166 REG8,
K4zuki 76:fcbc456010e0 167 REG9,
K4zuki 76:fcbc456010e0 168 };
K4zuki 76:fcbc456010e0 169
K4zuki 76:fcbc456010e0 170 int i=0;
K4zuki 76:fcbc456010e0 171 while(1) {
K4zuki 76:fcbc456010e0 172 i=0;
K4zuki 76:fcbc456010e0 173 length=0;
K4zuki 76:fcbc456010e0 174 while(true) {
K4zuki 76:fcbc456010e0 175 read = pc.getc();
K4zuki 76:fcbc456010e0 176 recieve[i] = read;
K4zuki 76:fcbc456010e0 177 i++;
K4zuki 76:fcbc456010e0 178 if(read == 'P') {
K4zuki 76:fcbc456010e0 179 plength = i;
K4zuki 76:fcbc456010e0 180 break;
K4zuki 76:fcbc456010e0 181 }
K4zuki 76:fcbc456010e0 182 }
K4zuki 76:fcbc456010e0 183 i=0;
K4zuki 76:fcbc456010e0 184 while(i < plength) {
K4zuki 76:fcbc456010e0 185 switch(recieve[i]) {
K4zuki 76:fcbc456010e0 186 case CMD_C:
K4zuki 76:fcbc456010e0 187 {
K4zuki 76:fcbc456010e0 188 s = false;
K4zuki 76:fcbc456010e0 189 channel=recieve[i+1];
K4zuki 76:fcbc456010e0 190 switch(channel) {
K4zuki 76:fcbc456010e0 191 case CH0:
K4zuki 76:fcbc456010e0 192 {
K4zuki 76:fcbc456010e0 193 channel = CH0;
K4zuki 76:fcbc456010e0 194 dev = &dev1;
K4zuki 76:fcbc456010e0 195 break;
K4zuki 76:fcbc456010e0 196 }
K4zuki 76:fcbc456010e0 197 #ifdef isI2C2
K4zuki 76:fcbc456010e0 198 case CH1:
K4zuki 76:fcbc456010e0 199 {
K4zuki 76:fcbc456010e0 200 channel = CH1;
K4zuki 76:fcbc456010e0 201 dev = &dev2;
K4zuki 76:fcbc456010e0 202 break;
K4zuki 76:fcbc456010e0 203 }
K4zuki 76:fcbc456010e0 204 #endif
K4zuki 76:fcbc456010e0 205 #ifdef isI2C3
K4zuki 76:fcbc456010e0 206 case CH2:
K4zuki 76:fcbc456010e0 207 {
K4zuki 76:fcbc456010e0 208 channel = CH2;
K4zuki 76:fcbc456010e0 209 dev = &dev3;
K4zuki 76:fcbc456010e0 210 break;
K4zuki 76:fcbc456010e0 211 }
K4zuki 76:fcbc456010e0 212 #endif
K4zuki 76:fcbc456010e0 213 #ifdef isI2C4
K4zuki 76:fcbc456010e0 214 case CH3:
K4zuki 76:fcbc456010e0 215 {
K4zuki 76:fcbc456010e0 216 channel = CH3;
K4zuki 76:fcbc456010e0 217 dev = &dev4;
K4zuki 76:fcbc456010e0 218 break;
K4zuki 76:fcbc456010e0 219 }
K4zuki 76:fcbc456010e0 220 #endif
K4zuki 76:fcbc456010e0 221 default:
K4zuki 76:fcbc456010e0 222 {
K4zuki 76:fcbc456010e0 223 channel = CH0;
K4zuki 76:fcbc456010e0 224 dev = &dev1;
K4zuki 76:fcbc456010e0 225 break;
K4zuki 76:fcbc456010e0 226 }
K4zuki 76:fcbc456010e0 227 }
K4zuki 76:fcbc456010e0 228 i += 2;
K4zuki 76:fcbc456010e0 229 break;
K4zuki 76:fcbc456010e0 230 }
K4zuki 76:fcbc456010e0 231 case CMD_S:
K4zuki 76:fcbc456010e0 232 {
K4zuki 76:fcbc456010e0 233 s = true;
K4zuki 76:fcbc456010e0 234 ack = plength - 2 - (i+1) + (recieve[i+2] & 0x01);
K4zuki 76:fcbc456010e0 235 if(ack >= 4){ //valid packet
K4zuki 76:fcbc456010e0 236 address = 0xff & (recieve[i+1] << 4 | (recieve[i+2] & 0x0F));
K4zuki 76:fcbc456010e0 237 length = 0xff & (recieve[i+3] << 4 | (recieve[i+4] & 0x0F));
K4zuki 76:fcbc456010e0 238
K4zuki 76:fcbc456010e0 239 if(address & 0x01) { //read
K4zuki 76:fcbc456010e0 240 ack = dev->read(address, send, length, false); //added
K4zuki 76:fcbc456010e0 241 send[length] = ack;
K4zuki 76:fcbc456010e0 242 length += 1;
K4zuki 76:fcbc456010e0 243 i += 5;
K4zuki 76:fcbc456010e0 244 } else { // write
K4zuki 76:fcbc456010e0 245 for(int j = 0; j < (length * 2); j+=2) {
K4zuki 76:fcbc456010e0 246 ack = 0xff&((recieve[5+j] << 4) | (recieve[6+j] & 0x0F));
K4zuki 76:fcbc456010e0 247 *(send+(j/2)) = ack; //added
K4zuki 76:fcbc456010e0 248 }
K4zuki 76:fcbc456010e0 249 ack = dev->write(address, send, length, true); //added
K4zuki 76:fcbc456010e0 250 i += (5 + length * 2);
K4zuki 76:fcbc456010e0 251 send[0] = ack;
K4zuki 76:fcbc456010e0 252 length = 1;
K4zuki 76:fcbc456010e0 253 }
K4zuki 76:fcbc456010e0 254 }else{
K4zuki 76:fcbc456010e0 255 pc.printf("bad packet! %d, %d, %02X, %d\n\r",plength,i,recieve[(i+2)]&0x0F,ack);
K4zuki 76:fcbc456010e0 256 s = false;
K4zuki 76:fcbc456010e0 257 i = plength;
K4zuki 76:fcbc456010e0 258 }
K4zuki 76:fcbc456010e0 259 break;
K4zuki 76:fcbc456010e0 260 }
K4zuki 76:fcbc456010e0 261 case CMD_P:
K4zuki 76:fcbc456010e0 262 {
K4zuki 76:fcbc456010e0 263 if(s){
K4zuki 76:fcbc456010e0 264 dev->stop();
K4zuki 76:fcbc456010e0 265 s = false;
K4zuki 76:fcbc456010e0 266 if(send[length-1] == 0){
K4zuki 76:fcbc456010e0 267 pc.printf("ACK,");
K4zuki 76:fcbc456010e0 268 }else{
K4zuki 76:fcbc456010e0 269 pc.printf("NAK,");
K4zuki 76:fcbc456010e0 270 }
K4zuki 76:fcbc456010e0 271 length--;
K4zuki 76:fcbc456010e0 272 }
K4zuki 76:fcbc456010e0 273 i = plength;
K4zuki 76:fcbc456010e0 274 for(int j=0; j<length; j++) {
K4zuki 76:fcbc456010e0 275 pc.printf("%02X,",send[j]);
K4zuki 76:fcbc456010e0 276 }
K4zuki 76:fcbc456010e0 277 pc.printf("ok\n\r");
K4zuki 76:fcbc456010e0 278 break;
K4zuki 76:fcbc456010e0 279 }
K4zuki 76:fcbc456010e0 280 case CMD_R:
K4zuki 76:fcbc456010e0 281 {
K4zuki 76:fcbc456010e0 282 s = false;
K4zuki 76:fcbc456010e0 283 length = plength - 2;
K4zuki 76:fcbc456010e0 284 if(length < 1){
K4zuki 76:fcbc456010e0 285 pc.printf("bad packet! %d\n\r",length);
K4zuki 76:fcbc456010e0 286 i = plength + 1;
K4zuki 76:fcbc456010e0 287 length = 0;
K4zuki 76:fcbc456010e0 288 }else{
K4zuki 76:fcbc456010e0 289 for(int j = 0; j < length; j++){
K4zuki 76:fcbc456010e0 290 address = recieve[i+1+j];
K4zuki 76:fcbc456010e0 291 switch(address){
K4zuki 76:fcbc456010e0 292 case CHIP_ID:
K4zuki 76:fcbc456010e0 293 {
K4zuki 76:fcbc456010e0 294 data = chip_id;
K4zuki 76:fcbc456010e0 295 break;
K4zuki 76:fcbc456010e0 296 }
K4zuki 76:fcbc456010e0 297 case GPIO0_STAT:
K4zuki 76:fcbc456010e0 298 {
K4zuki 76:fcbc456010e0 299 for(int k = 0; k < 8; k++){
K4zuki 76:fcbc456010e0 300 _data = gpio0[k]->read();
K4zuki 76:fcbc456010e0 301 data |= (_data << k);
K4zuki 76:fcbc456010e0 302 }
K4zuki 76:fcbc456010e0 303 registers[GPIO0_STAT-'0'] = data;
K4zuki 76:fcbc456010e0 304 break;
K4zuki 76:fcbc456010e0 305 }
K4zuki 76:fcbc456010e0 306 case GPIO0_CONF:
K4zuki 76:fcbc456010e0 307 {
K4zuki 76:fcbc456010e0 308 data = registers[GPIO0_CONF-'0'];
K4zuki 76:fcbc456010e0 309 break;
K4zuki 76:fcbc456010e0 310 }
K4zuki 76:fcbc456010e0 311 #ifdef isGPIO1
K4zuki 76:fcbc456010e0 312 case GPIO1_STAT:
K4zuki 76:fcbc456010e0 313 {
K4zuki 76:fcbc456010e0 314 for(int k = 0; k < 8; k++){
K4zuki 76:fcbc456010e0 315 _data = gpio1[k]->read();
K4zuki 76:fcbc456010e0 316 data |= (_data << k);
K4zuki 76:fcbc456010e0 317 }
K4zuki 76:fcbc456010e0 318 registers[GPIO1_STAT-'0'] = data;
K4zuki 76:fcbc456010e0 319 break;
K4zuki 76:fcbc456010e0 320 }
K4zuki 76:fcbc456010e0 321 case GPIO1_CONF:
K4zuki 76:fcbc456010e0 322 {
K4zuki 76:fcbc456010e0 323 data = registers[GPIO1_CONF-'0'];
K4zuki 76:fcbc456010e0 324 break;
K4zuki 76:fcbc456010e0 325 }
K4zuki 76:fcbc456010e0 326 #endif
K4zuki 76:fcbc456010e0 327 case I2C_CONF:
K4zuki 76:fcbc456010e0 328 {
K4zuki 76:fcbc456010e0 329 data = registers[I2C_CONF-'0'];
K4zuki 76:fcbc456010e0 330 break;
K4zuki 76:fcbc456010e0 331 }
K4zuki 76:fcbc456010e0 332 case SPI_CONF:
K4zuki 76:fcbc456010e0 333 {
K4zuki 76:fcbc456010e0 334 data = registers[SPI_CONF-'0'];
K4zuki 76:fcbc456010e0 335 break;
K4zuki 76:fcbc456010e0 336 }
K4zuki 76:fcbc456010e0 337 default:
K4zuki 76:fcbc456010e0 338 {
K4zuki 76:fcbc456010e0 339 data = 0xAA;
K4zuki 76:fcbc456010e0 340 break;
K4zuki 76:fcbc456010e0 341 }
K4zuki 76:fcbc456010e0 342 }
K4zuki 76:fcbc456010e0 343 send[j] = (char)data;
K4zuki 76:fcbc456010e0 344 data = 0;
K4zuki 76:fcbc456010e0 345 }
K4zuki 76:fcbc456010e0 346 i += (length+1);
K4zuki 76:fcbc456010e0 347 }
K4zuki 76:fcbc456010e0 348 break;
K4zuki 76:fcbc456010e0 349 }
K4zuki 76:fcbc456010e0 350 case CMD_W:
K4zuki 76:fcbc456010e0 351 {
K4zuki 76:fcbc456010e0 352 s = false;
K4zuki 76:fcbc456010e0 353 length = plength - 2;
K4zuki 76:fcbc456010e0 354 if(length < 3){
K4zuki 76:fcbc456010e0 355 pc.printf("bad packet! %d\n\r",length);
K4zuki 76:fcbc456010e0 356 i = plength + 1;
K4zuki 76:fcbc456010e0 357 length = 0;
K4zuki 76:fcbc456010e0 358 }else{
K4zuki 76:fcbc456010e0 359 for(int j = 0; j < length; j +=3){
K4zuki 76:fcbc456010e0 360 address = recieve[i+1+j];
K4zuki 76:fcbc456010e0 361 data = 0xff & (recieve[i+2+j] << 4 | (recieve[i+3+j] & 0x0F));
K4zuki 76:fcbc456010e0 362 _data = 0;
K4zuki 76:fcbc456010e0 363 switch(address){
K4zuki 76:fcbc456010e0 364 case CHIP_ID:
K4zuki 76:fcbc456010e0 365 {
K4zuki 76:fcbc456010e0 366 //READ ONLY: do nothing
K4zuki 76:fcbc456010e0 367 data = registers[CHIP_ID-'0'];
K4zuki 76:fcbc456010e0 368 break;
K4zuki 76:fcbc456010e0 369 }
K4zuki 76:fcbc456010e0 370 case GPIO0_STAT:
K4zuki 76:fcbc456010e0 371 {
K4zuki 76:fcbc456010e0 372 _data = registers[GPIO0_CONF-'0'];
K4zuki 76:fcbc456010e0 373 for(int k=0; k<8; k++){
K4zuki 76:fcbc456010e0 374 if(_data&0x01){ // output
K4zuki 76:fcbc456010e0 375 gpio0[k]->write((data>>k)&0x01);
K4zuki 76:fcbc456010e0 376 }else{ // input
K4zuki 76:fcbc456010e0 377 ; // do nothing
K4zuki 76:fcbc456010e0 378 }
K4zuki 76:fcbc456010e0 379 _data >>= 1;
K4zuki 76:fcbc456010e0 380 }
K4zuki 76:fcbc456010e0 381 break;
K4zuki 76:fcbc456010e0 382 }
K4zuki 76:fcbc456010e0 383 case GPIO0_CONF:
K4zuki 76:fcbc456010e0 384 {
K4zuki 76:fcbc456010e0 385 registers[GPIO0_CONF-'0'] = data;
K4zuki 76:fcbc456010e0 386 for(int k = 0; k < 8; k++){
K4zuki 76:fcbc456010e0 387 if(data & 0x01){//output
K4zuki 76:fcbc456010e0 388 gpio0[k]->output();
K4zuki 76:fcbc456010e0 389 }else{//input
K4zuki 76:fcbc456010e0 390 gpio0[k]->input();
K4zuki 76:fcbc456010e0 391 gpio0[k]->mode(PullUp);
K4zuki 76:fcbc456010e0 392 }
K4zuki 76:fcbc456010e0 393 data >>= 1;
K4zuki 76:fcbc456010e0 394 }
K4zuki 76:fcbc456010e0 395 data = registers[GPIO0_CONF-'0'];
K4zuki 76:fcbc456010e0 396 break;
K4zuki 76:fcbc456010e0 397 }
K4zuki 76:fcbc456010e0 398 #ifdef isGPIO1
K4zuki 76:fcbc456010e0 399 case GPIO1_STAT:
K4zuki 76:fcbc456010e0 400 {
K4zuki 76:fcbc456010e0 401 _data = registers[GPIO1_CONF-'0'];
K4zuki 76:fcbc456010e0 402 for(int k = 0; k < 8; k++){
K4zuki 76:fcbc456010e0 403 if(_data & 0x01){ // output
K4zuki 76:fcbc456010e0 404 gpio1[k]->write((data>>k)&0x01);
K4zuki 76:fcbc456010e0 405 }else{ // input
K4zuki 76:fcbc456010e0 406 ; // do nothing
K4zuki 76:fcbc456010e0 407 }
K4zuki 76:fcbc456010e0 408 _data >>= 1;
K4zuki 76:fcbc456010e0 409 }
K4zuki 76:fcbc456010e0 410 break;
K4zuki 76:fcbc456010e0 411 }
K4zuki 76:fcbc456010e0 412 case GPIO1_CONF:
K4zuki 76:fcbc456010e0 413 {
K4zuki 76:fcbc456010e0 414 registers[GPIO1_CONF-'0'] = data;
K4zuki 76:fcbc456010e0 415 for(int k = 0; k < 6; k++){
K4zuki 76:fcbc456010e0 416 if(data & 0x01){//output
K4zuki 76:fcbc456010e0 417 gpio1[k]->output();
K4zuki 76:fcbc456010e0 418 }else{//input
K4zuki 76:fcbc456010e0 419 gpio1[k]->input();
K4zuki 76:fcbc456010e0 420 gpio1[k]->mode(PullUp);
K4zuki 76:fcbc456010e0 421 }
K4zuki 76:fcbc456010e0 422 data >>= 1;
K4zuki 76:fcbc456010e0 423 }
K4zuki 76:fcbc456010e0 424 data = registers[GPIO1_CONF-'0'];
K4zuki 76:fcbc456010e0 425 break;
K4zuki 76:fcbc456010e0 426 }
K4zuki 76:fcbc456010e0 427 #endif
K4zuki 76:fcbc456010e0 428 case I2C_CONF:
K4zuki 76:fcbc456010e0 429 {
K4zuki 76:fcbc456010e0 430 registers[I2C_CONF-'0'] = data;
K4zuki 76:fcbc456010e0 431 #if defined(TARGET_LPC1768)
K4zuki 76:fcbc456010e0 432 dev1.frequency(100000 * ((0x03 & (data >> 6)) + 1));
K4zuki 76:fcbc456010e0 433 #else
K4zuki 76:fcbc456010e0 434 dev1.frequency(200000 * ((0x03 & (data >> 6)) + 1));
K4zuki 76:fcbc456010e0 435 #endif
K4zuki 76:fcbc456010e0 436 #ifdef isI2C2
K4zuki 76:fcbc456010e0 437 dev2.frequency(100000 * ((0x03 & (data >> 4)) + 1));
K4zuki 76:fcbc456010e0 438 #endif
K4zuki 76:fcbc456010e0 439 #ifdef isI2C3
K4zuki 76:fcbc456010e0 440 dev3.frequency(100000 * ((0x03 & (data >> 2)) + 1));
K4zuki 76:fcbc456010e0 441 #endif
K4zuki 76:fcbc456010e0 442 #ifdef isI2C4
K4zuki 76:fcbc456010e0 443 dev4.frequency(100000 * ((0x03 & (data >> 0)) + 1));
K4zuki 76:fcbc456010e0 444 #endif
K4zuki 76:fcbc456010e0 445 break;
K4zuki 76:fcbc456010e0 446 }
K4zuki 76:fcbc456010e0 447 case SPI_CONF:
K4zuki 76:fcbc456010e0 448 {
K4zuki 76:fcbc456010e0 449 registers[SPI_CONF-'0'] = data;
K4zuki 76:fcbc456010e0 450 format = ((data & 0x04) + 4) << 1;
K4zuki 76:fcbc456010e0 451 _spi.format(format, 0x03 & (data));
K4zuki 76:fcbc456010e0 452 _spi.frequency(1000000 * ((0x07 & (data >> 4)) + 1));
K4zuki 76:fcbc456010e0 453 enabled = (data & 0x08) >> 3;
K4zuki 76:fcbc456010e0 454 /*
K4zuki 76:fcbc456010e0 455 7 not used
K4zuki 76:fcbc456010e0 456 6:4 frequency
K4zuki 76:fcbc456010e0 457 3 CE pol
K4zuki 76:fcbc456010e0 458 2 word size(0=8bit,1=16bit)
K4zuki 76:fcbc456010e0 459 1:0 pol(corresponds to spi.format())
K4zuki 76:fcbc456010e0 460 */
K4zuki 76:fcbc456010e0 461 disabled = ~enabled;
K4zuki 76:fcbc456010e0 462 break;
K4zuki 76:fcbc456010e0 463 }
K4zuki 76:fcbc456010e0 464 default:
K4zuki 76:fcbc456010e0 465 {
K4zuki 76:fcbc456010e0 466 break;
K4zuki 76:fcbc456010e0 467 }
K4zuki 76:fcbc456010e0 468 }
K4zuki 76:fcbc456010e0 469 send[j/3] = data;
K4zuki 76:fcbc456010e0 470 }
K4zuki 76:fcbc456010e0 471 i += (length + 1);
K4zuki 76:fcbc456010e0 472 length /= 3;
K4zuki 76:fcbc456010e0 473 }
K4zuki 76:fcbc456010e0 474 break;
K4zuki 76:fcbc456010e0 475 }
K4zuki 76:fcbc456010e0 476 case CMD_I:
K4zuki 76:fcbc456010e0 477 {
K4zuki 76:fcbc456010e0 478 s = false;
K4zuki 76:fcbc456010e0 479 length = plength - 2;
K4zuki 76:fcbc456010e0 480 if(length < 1){
K4zuki 76:fcbc456010e0 481 pc.printf("bad packet! %d\n\r",length);
K4zuki 76:fcbc456010e0 482 i = plength + 1;
K4zuki 76:fcbc456010e0 483 length = 0;
K4zuki 76:fcbc456010e0 484 }else{
K4zuki 76:fcbc456010e0 485 for(int j=0; j<length; j++){
K4zuki 76:fcbc456010e0 486 address = recieve[i+1+j];
K4zuki 76:fcbc456010e0 487 _data=0;
K4zuki 76:fcbc456010e0 488 switch(address){
K4zuki 76:fcbc456010e0 489 case GPIO0_STAT:
K4zuki 76:fcbc456010e0 490 {
K4zuki 76:fcbc456010e0 491 for(int k=0; k<8; k++){
K4zuki 76:fcbc456010e0 492 _data = gpio0[k]->read();
K4zuki 76:fcbc456010e0 493 data |= (_data << k);
K4zuki 76:fcbc456010e0 494 }
K4zuki 76:fcbc456010e0 495 registers[GPIO0_STAT-'0'] = data;
K4zuki 76:fcbc456010e0 496 break;
K4zuki 76:fcbc456010e0 497 }
K4zuki 76:fcbc456010e0 498 #ifdef isGPIO1
K4zuki 76:fcbc456010e0 499 case GPIO1_STAT:
K4zuki 76:fcbc456010e0 500 {
K4zuki 76:fcbc456010e0 501 for(int k=0; k<8; k++){
K4zuki 76:fcbc456010e0 502 _data = gpio1[k]->read();
K4zuki 76:fcbc456010e0 503 data |= (_data << k);
K4zuki 76:fcbc456010e0 504 }
K4zuki 76:fcbc456010e0 505 registers[GPIO1_STAT-'0'] = data;
K4zuki 76:fcbc456010e0 506 break;
K4zuki 76:fcbc456010e0 507 }
K4zuki 76:fcbc456010e0 508 #endif
K4zuki 76:fcbc456010e0 509 default:
K4zuki 76:fcbc456010e0 510 {
K4zuki 76:fcbc456010e0 511 data = 0xAA;
K4zuki 76:fcbc456010e0 512 break;
K4zuki 76:fcbc456010e0 513 }
K4zuki 76:fcbc456010e0 514 }
K4zuki 76:fcbc456010e0 515 send[j] = (char)data;
K4zuki 76:fcbc456010e0 516 data = 0;
K4zuki 76:fcbc456010e0 517 }
K4zuki 76:fcbc456010e0 518 i += (length+1);
K4zuki 76:fcbc456010e0 519 }
K4zuki 76:fcbc456010e0 520 break;
K4zuki 76:fcbc456010e0 521 }
K4zuki 76:fcbc456010e0 522 case CMD_O:
K4zuki 76:fcbc456010e0 523 {
K4zuki 76:fcbc456010e0 524 s = false;
K4zuki 76:fcbc456010e0 525 length = plength - 2;
K4zuki 76:fcbc456010e0 526 if(length < 3){
K4zuki 76:fcbc456010e0 527 pc.printf("bad packet! %d\n\r",length);
K4zuki 76:fcbc456010e0 528 i = plength + 1;
K4zuki 76:fcbc456010e0 529 length = 0;
K4zuki 76:fcbc456010e0 530 }else{
K4zuki 76:fcbc456010e0 531 for(int j=0; j<length; j+=3){
K4zuki 76:fcbc456010e0 532 address = recieve[i+1+j];
K4zuki 76:fcbc456010e0 533 data = 0xff & (recieve[i+2+j] << 4 | (recieve[i+3+j] & 0x0F));
K4zuki 76:fcbc456010e0 534 switch(address){
K4zuki 76:fcbc456010e0 535 case GPIO0_STAT:
K4zuki 76:fcbc456010e0 536 {
K4zuki 76:fcbc456010e0 537 _data = registers[GPIO0_CONF-'0'];
K4zuki 76:fcbc456010e0 538 for(int k=0; k<8; k++){
K4zuki 76:fcbc456010e0 539 if(_data&0x01){ // output
K4zuki 76:fcbc456010e0 540 gpio0[k]->write(data&0x01);
K4zuki 76:fcbc456010e0 541 }else{ // input
K4zuki 76:fcbc456010e0 542 ; // do nothing
K4zuki 76:fcbc456010e0 543 }
K4zuki 76:fcbc456010e0 544 data >>= 1;
K4zuki 76:fcbc456010e0 545 _data >>= 1;
K4zuki 76:fcbc456010e0 546 }
K4zuki 76:fcbc456010e0 547 break;
K4zuki 76:fcbc456010e0 548 }
K4zuki 76:fcbc456010e0 549 #ifdef isGPIO1
K4zuki 76:fcbc456010e0 550 case GPIO1_STAT:
K4zuki 76:fcbc456010e0 551 {
K4zuki 76:fcbc456010e0 552 _data = registers[GPIO1_CONF-'0'];
K4zuki 76:fcbc456010e0 553 for(int k=0; k<8; k++){
K4zuki 76:fcbc456010e0 554 if(_data&0x01){ // output
K4zuki 76:fcbc456010e0 555 gpio1[k]->write(data&0x01);
K4zuki 76:fcbc456010e0 556 }else{ // input
K4zuki 76:fcbc456010e0 557 ; // do nothing
K4zuki 76:fcbc456010e0 558 }
K4zuki 76:fcbc456010e0 559 data >>= 1;
K4zuki 76:fcbc456010e0 560 _data >>= 1;
K4zuki 76:fcbc456010e0 561 }
K4zuki 76:fcbc456010e0 562 break;
K4zuki 76:fcbc456010e0 563 }
K4zuki 76:fcbc456010e0 564 #endif
K4zuki 76:fcbc456010e0 565 default:
K4zuki 76:fcbc456010e0 566 {
K4zuki 76:fcbc456010e0 567 break;
K4zuki 76:fcbc456010e0 568 }
K4zuki 76:fcbc456010e0 569 }
K4zuki 76:fcbc456010e0 570 send[j/3] = data;
K4zuki 76:fcbc456010e0 571 }
K4zuki 76:fcbc456010e0 572 }
K4zuki 76:fcbc456010e0 573 i += (length+1);
K4zuki 76:fcbc456010e0 574 length /= 3;
K4zuki 76:fcbc456010e0 575 // pc.printf("command O is not implemented, ");
K4zuki 76:fcbc456010e0 576 break;
K4zuki 76:fcbc456010e0 577 }
K4zuki 76:fcbc456010e0 578 case CMD_E:
K4zuki 76:fcbc456010e0 579 {
K4zuki 76:fcbc456010e0 580 s = false;
K4zuki 76:fcbc456010e0 581 /*
K4zuki 76:fcbc456010e0 582 "0| 1 2| 3 4| 5 6 7 8 9 10 11 12|13" //plength=14
K4zuki 76:fcbc456010e0 583 "E| 0x_0 _1| 0x_0 _0| 0x_D _E| P" //minimum plength=8
K4zuki 76:fcbc456010e0 584 "E| 0x_0 _1| 0x_0 _0| 0x_D _E|_A _D| P" //minimum plength=10(16bit)
K4zuki 76:fcbc456010e0 585 "E| 0x_0 _4| 0x_0 _0| 0x_D _E _A _D _B _E _A _F| P" //write
K4zuki 76:fcbc456010e0 586 "E| 0x_0 _4| 0x_0 _4| 0x_D _E _A _D _B _E _A _F| P" //write and read
K4zuki 76:fcbc456010e0 587 */
K4zuki 76:fcbc456010e0 588 length = plength - 2; //6
K4zuki 76:fcbc456010e0 589 if(length < 6){
K4zuki 76:fcbc456010e0 590 pc.printf("bad packet! %d\n\r",length);
K4zuki 76:fcbc456010e0 591 i = plength + 1;
K4zuki 76:fcbc456010e0 592 length = 0;
K4zuki 76:fcbc456010e0 593 }else{
K4zuki 76:fcbc456010e0 594 length = length-4; //actual data in packet
K4zuki 76:fcbc456010e0 595 data = 0xff & ((recieve[i+1]<<4) | (recieve[i+2]&0x0F)); // write length
K4zuki 76:fcbc456010e0 596 read = 0xff & ((recieve[i+3]<<4) | (recieve[i+4]&0x0F)); // read length
K4zuki 76:fcbc456010e0 597 switch(format){
K4zuki 76:fcbc456010e0 598 case 8:
K4zuki 76:fcbc456010e0 599 {
K4zuki 76:fcbc456010e0 600 _cs.write(enabled);
K4zuki 76:fcbc456010e0 601 for(int j = 0; j < length; j += 2){
K4zuki 76:fcbc456010e0 602 _data = 0xff & ((recieve[i+5+j+0]<<4) | (recieve[i+5+j+1]&0x0F));
K4zuki 76:fcbc456010e0 603 ack = _spi.write(_data);
K4zuki 76:fcbc456010e0 604 // pc.printf("s%02X,",_data);
K4zuki 76:fcbc456010e0 605 send[j/2] = ack;
K4zuki 76:fcbc456010e0 606 }
K4zuki 76:fcbc456010e0 607 for(int j = length; j < (length+2*read); j+=2){
K4zuki 76:fcbc456010e0 608 ack = _spi.write(0xAA); //dummy data to write
K4zuki 76:fcbc456010e0 609 // pc.printf("a%02X,",ack);
K4zuki 76:fcbc456010e0 610 send[j/2] = ack;
K4zuki 76:fcbc456010e0 611 }
K4zuki 76:fcbc456010e0 612 _cs.write(disabled);
K4zuki 76:fcbc456010e0 613 break;
K4zuki 76:fcbc456010e0 614 }
K4zuki 76:fcbc456010e0 615 case 16:
K4zuki 76:fcbc456010e0 616 {
K4zuki 76:fcbc456010e0 617 if((data%2) || (read%2)){ //invalid
K4zuki 76:fcbc456010e0 618 pc.printf("bad packet! %d, %d\n\r",data,read);
K4zuki 76:fcbc456010e0 619 i = plength + 1;
K4zuki 76:fcbc456010e0 620 length = 0;
K4zuki 76:fcbc456010e0 621 }else{
K4zuki 76:fcbc456010e0 622 _cs.write(enabled);
K4zuki 76:fcbc456010e0 623 for(int j = 0; j < length; j += 4){
K4zuki 76:fcbc456010e0 624 _data = 0xffff & (((recieve[i+5+j+0] & 0x0F)<<12)|
K4zuki 76:fcbc456010e0 625 ((recieve[i+5+j+1] & 0x0F)<<8 )|
K4zuki 76:fcbc456010e0 626 ((recieve[i+5+j+2] & 0x0F)<<4 )|
K4zuki 76:fcbc456010e0 627 ((recieve[i+5+j+3] & 0x0F)<<0 )
K4zuki 76:fcbc456010e0 628 );
K4zuki 76:fcbc456010e0 629 ack = _spi.write(_data);
K4zuki 76:fcbc456010e0 630 // pc.printf("s%04X,",_data);
K4zuki 76:fcbc456010e0 631 send[(j/2)+0] = 0xFF & (ack>>8);
K4zuki 76:fcbc456010e0 632 send[(j/2)+1] = 0xFF & (ack>>0);
K4zuki 76:fcbc456010e0 633 }
K4zuki 76:fcbc456010e0 634 for(int j = length; j < (length+2*read); j += 4){
K4zuki 76:fcbc456010e0 635 ack = _spi.write(0xAAAA); //dummy data to write
K4zuki 76:fcbc456010e0 636 // pc.printf("a%04X,",ack);
K4zuki 76:fcbc456010e0 637 send[(j/2)+0] = 0xFF & (ack>>8);
K4zuki 76:fcbc456010e0 638 send[(j/2)+1] = 0xFF & (ack>>0);
K4zuki 76:fcbc456010e0 639 }
K4zuki 76:fcbc456010e0 640 _cs.write(disabled);
K4zuki 76:fcbc456010e0 641 }
K4zuki 76:fcbc456010e0 642 break;
K4zuki 76:fcbc456010e0 643 }
K4zuki 76:fcbc456010e0 644 default:
K4zuki 76:fcbc456010e0 645 {
K4zuki 76:fcbc456010e0 646 pc.printf("this shold not happen %d\n\r",format);
K4zuki 76:fcbc456010e0 647 break;
K4zuki 76:fcbc456010e0 648 }
K4zuki 76:fcbc456010e0 649
K4zuki 76:fcbc456010e0 650 }
K4zuki 76:fcbc456010e0 651 // pc.printf("command E is for SPI transmission\n\r");
K4zuki 76:fcbc456010e0 652 length = read + data;
K4zuki 76:fcbc456010e0 653 i = (plength-1);
K4zuki 76:fcbc456010e0 654 }
K4zuki 76:fcbc456010e0 655 break;
K4zuki 76:fcbc456010e0 656 }
K4zuki 76:fcbc456010e0 657 case 'Z':
K4zuki 76:fcbc456010e0 658 {
K4zuki 76:fcbc456010e0 659 s = false;
K4zuki 76:fcbc456010e0 660 pc.printf("command Z is not implemented\n\r");
K4zuki 76:fcbc456010e0 661 i=plength;
K4zuki 76:fcbc456010e0 662 break;
K4zuki 76:fcbc456010e0 663 }
K4zuki 76:fcbc456010e0 664 case 'V':
K4zuki 76:fcbc456010e0 665 {
K4zuki 76:fcbc456010e0 666 s = false;
K4zuki 76:fcbc456010e0 667 pc.printf("command V is not implemented\n\r");
K4zuki 76:fcbc456010e0 668 i=plength;
K4zuki 76:fcbc456010e0 669 break;
K4zuki 76:fcbc456010e0 670 }
K4zuki 76:fcbc456010e0 671 default:
K4zuki 76:fcbc456010e0 672 {
K4zuki 76:fcbc456010e0 673 s = false;
K4zuki 76:fcbc456010e0 674 pc.printf("command %c is not implemented\n\r", recieve[i]);
K4zuki 76:fcbc456010e0 675 i=plength;
K4zuki 76:fcbc456010e0 676 break;
K4zuki 76:fcbc456010e0 677 }
K4zuki 76:fcbc456010e0 678 }
K4zuki 76:fcbc456010e0 679 }
K4zuki 76:fcbc456010e0 680 i=0;
K4zuki 76:fcbc456010e0 681 length=0;
K4zuki 76:fcbc456010e0 682 }
K4zuki 76:fcbc456010e0 683 }