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at45db161d.h
00001 /** 00002 * @file at45db161d.h 00003 * @brief AT45DB161D module 00004 **/ 00005 #ifndef AT45DB161D_H 00006 #define AT45DB161D_H 00007 00008 #include "mbed.h" 00009 00010 extern "C" { 00011 00012 //#include <avr/pgmspace.h> 00013 #include <inttypes.h> 00014 //#include "WConstants.h" 00015 00016 }; 00017 00018 #include "at45db161d_commands.h" 00019 #include "SWSPI.h" 00020 00021 /** 00022 * @defgroup AT45DB161D AT45DB161D module 00023 * @{ 00024 **/ 00025 00026 /** 00027 * @defgroup SPI SPI pinout and transfert function 00028 * @{ 00029 **/ 00030 #ifndef SPI 00031 /** 00032 * @defgroup SPI_Pinout SPI pinout 00033 * @{ 00034 **/ 00035 /** Serial input (SI) **/ 00036 #define DATAOUT 11 00037 /** Serial output (SO) **/ 00038 #define DATAIN 12 00039 /** Serial clock (SCK) **/ 00040 #define SPICLOCK 13 00041 /** Chip select (CS) **/ 00042 #define SLAVESELECT 10 00043 /** Reset (Reset) **/ 00044 #define RESET 8 00045 /** Write protect (WP) **/ 00046 #define WP 7 00047 /** 00048 * @} 00049 **/ 00050 00051 /** 00052 * @fn inline uint8_t spi_transfer(uint8_t data) 00053 * @brief Transfer a byte via spi 00054 * @param data Data to transfer via SPI 00055 * @return The content of the SPI data register 00056 **/ 00057 /* 00058 inline uint8_t spi_transfer(uint8_t data) 00059 { 00060 SPDR = data; 00061 while(!(SPSR & (1 << SPIF))) ; 00062 return SPDR; 00063 } 00064 */ 00065 #define spi_transfer(data) _spi.write(data) 00066 00067 /** De-assert CS **/ 00068 //#define DF_CS_inactive digitalWrite(SLAVESELECT,HIGH) 00069 #define DF_CS_inactive _cs = 1 00070 /** Assert CS **/ 00071 //#define DF_CS_active digitalWrite(SLAVESELECT,LOW) 00072 #define DF_CS_active _cs = 0 00073 00074 #endif /* SPI */ 00075 /** 00076 * @} 00077 **/ 00078 00079 /** 00080 * @defgroup STATUS_REGISTER_FORMAT Status register format 00081 * @{ 00082 **/ 00083 /** 00084 * @brief Ready/busy status is indicated using bit 7 of the status register. 00085 * If bit 7 is a 1, then the device is not busy and is ready to accept 00086 * the next command. If bit 7 is a 0, then the device is in a busy 00087 * state. 00088 **/ 00089 #define READY_BUSY 0x80 00090 /** 00091 * Result of the most recent Memory Page to Buffer Compare operation. 00092 * If this bit is equal to 0, then the data in the main memory page 00093 * matches the data in the buffer. If it's 1 then at least 1 byte in 00094 * the main memory page does not match the data in the buffer. 00095 **/ 00096 #define COMPARE 0x40 00097 /** 00098 * Bit 1 in the Status Register is used to provide information to the 00099 * user whether or not the sector protection has been enabled or 00100 * disabled, either by software-controlled method or 00101 * hardware-controlled method. 1 means that the sector protection has 00102 * been enabled and 0 that it has been disabled. 00103 **/ 00104 #define PROTECT 0x02 00105 /** 00106 * Bit 0 indicates wether the page size of the main memory array is 00107 * configured for "power of 2" binary page size (512 bytes) (bit=1) or 00108 * standard DataFlash page size (528 bytes) (bit=0). 00109 **/ 00110 #define PAGE_SIZE 0x01 00111 /** 00112 * Bits 5, 4, 3 and 2 indicates the device density. The decimal value 00113 * of these four binary bits does not equate to the device density; the 00114 * four bits represent a combinational code relating to differing 00115 * densities of DataFlash devices. The device density is not the same 00116 * as the density code indicated in the JEDEC device ID information. 00117 * The device density is provided only for backward compatibility. 00118 **/ 00119 #define DEVICE_DENSITY 0x2C 00120 /** 00121 * @} 00122 **/ 00123 00124 /** 00125 * @brief at45db161d module 00126 * @todo 00127 * - TESTS! 00128 * - Protection and Security Commands 00129 * - Auto Page Rewrite through Buffer 1 00130 * - Auto Page Rewrite through Buffer 2 00131 **/ 00132 class ATD45DB161D 00133 { 00134 public: 00135 /** 00136 * @brief ID structure 00137 * This structure contains various informations about the 00138 * dataflash chip being used. 00139 **/ 00140 struct ID 00141 { 00142 uint8_t manufacturer; /**< Manufacturer id **/ 00143 uint8_t device[2]; /**< Device id **/ 00144 uint8_t extendedInfoLength; /**< Extended device information string length **/ 00145 }; 00146 00147 public: 00148 /** CTOR **/ 00149 ATD45DB161D(PinName mosi, PinName miso, PinName sclk, PinName cs); 00150 00151 /** CTOR using pointer to SWSPI instance **/ 00152 ATD45DB161D(SWSPI &spi, PinName cs); 00153 00154 /** DTOR **/ 00155 ~ATD45DB161D(); 00156 00157 /** Setup SPI and pinout **/ 00158 void Init(); 00159 00160 /** 00161 * Read status register 00162 * @return The content of the status register 00163 * **/ 00164 uint8_t ReadStatusRegister(); 00165 00166 /** 00167 * Read Manufacturer and Device ID 00168 * @note if id.extendedInfoLength is not equal to zero, 00169 * successive calls to spi_transfer(0xff) will return 00170 * the extended device information string bytes. 00171 * @param id Pointer to the ID structure to initialize 00172 **/ 00173 void ReadManufacturerAndDeviceID(struct ATD45DB161D::ID *id); 00174 00175 /** 00176 * A main memory page read allows the user to read data directly from 00177 * any one of the 4096 pages in the main memory, bypassing both of the 00178 * data buffers and leaving the contents of the buffers unchanged. 00179 * @param page Page of the main memory to read 00180 * @param offset Starting byte address within the page 00181 **/ 00182 void ReadMainMemoryPage(uint16_t page, uint16_t offset); 00183 00184 /** 00185 * Sequentially read a continuous stream of data. 00186 * @param page Page of the main memory where the sequential read will start 00187 * @param offset Starting byte address within the page 00188 * @param low If true the read operation will be performed in low speed mode (and in high speed mode if it's false). 00189 * @note The legacy mode is not currently supported 00190 * @warning UNTESTED 00191 **/ 00192 void ContinuousArrayRead(uint16_t page, uint16_t offset, uint8_t low); 00193 00194 /** 00195 * Read the content of one of the SRAM data buffers (in low or high speed mode). 00196 * @param bufferNum Buffer to read (1 or 2) 00197 * @param offset Starting byte within the buffer 00198 * @param low If true the read operation will be performed in low speed mode (and in high speed mode if it's false). 00199 **/ 00200 void BufferRead(uint8_t bufferNum, uint16_t offset, uint8_t low); 00201 00202 /** 00203 * Write data to one of the SRAM data buffers. Any further call to 00204 * spi_tranfer will return bytes contained in the data buffer until 00205 * a low-to-high transition is detected on the CS pin. If the end of 00206 * the data buffer is reached, the device will wrap around back to the 00207 * beginning of the buffer. 00208 * @param bufferNum Buffer to read (1 or 2) 00209 * @param offset Starting byte within the buffer 00210 **/ 00211 void BufferWrite(uint8_t bufferNum, uint16_t offset); 00212 00213 /** 00214 * Transfer data from buffer 1 or 2 to main memory page. 00215 * @param bufferNum Buffer to use (1 or 2) 00216 * @param page Page where the content of the buffer will transfered 00217 * @param erase If set the page will be first erased before the buffer transfer. 00218 * @note If erase is equal to zero, the page must have been previously erased using one of the erase command (Page or Block Erase). 00219 **/ 00220 void BufferToPage(uint8_t bufferNum, uint16_t page, uint8_t erase); 00221 00222 /** 00223 * Transfer a page of data from main memory to buffer 1 or 2. 00224 * @param page Main memory page to transfer 00225 * @param buffer Buffer (1 or 2) where the data will be written 00226 **/ 00227 void PageToBuffer(uint16_t page, uint8_t bufferNum); 00228 00229 /** 00230 * Erase a page in the main memory array. 00231 * @param page Page to erase 00232 * @warning UNTESTED 00233 **/ 00234 void PageErase(uint16_t page); 00235 00236 /** 00237 * Erase a block of eight pages at one time. 00238 * @param block Index of the block to erase 00239 * @warning UNTESTED 00240 **/ 00241 void BlockErase(uint16_t block); 00242 00243 /** 00244 * Erase a sector in main memory. There are 16 sector on the 00245 * at45db161d and only one can be erased at one time. 00246 * @param sector Sector to erase 00247 * @warning UNTESTED 00248 **/ 00249 void SectoreErase(uint8_t sector); 00250 00251 /** 00252 * Erase the entire chip memory. Sectors proteced or locked down will 00253 * not be erased. 00254 * @warning UNTESTED 00255 **/ 00256 void ChipErase(); 00257 00258 /** 00259 * This a combination of Buffer Write and Buffer to Page with 00260 * Built-in Erase. 00261 * @note You must call EndAndWait in order to start transfering data from buffer to page 00262 * @param page Page where the content of the buffer will transfered 00263 * @param offset Starting byte address within the buffer 00264 * @param bufferNum Buffer to use (1 or 2) 00265 * @warning UNTESTED 00266 **/ 00267 void BeginPageWriteThroughBuffer(uint16_t page, uint16_t offset, uint8_t bufferNum); 00268 00269 /** 00270 * Perform a low-to-high transition on the CS pin and then poll 00271 * the status register to check if the dataflash is busy. 00272 **/ 00273 void EndAndWait(); 00274 00275 /** 00276 * Compare a page of data in main memory to the data in buffer 1 or 2. 00277 * @param page Page to test 00278 * @param bufferNum Buffer number 00279 * @return 00280 * - 1 if the page and the buffer contains the same data 00281 * - 0 else 00282 * @warning UNTESTED 00283 **/ 00284 int8_t ComparePageToBuffer(uint16_t page, uint8_t bufferNum); 00285 00286 /** 00287 * Put the device into the lowest power consumption mode. 00288 * Once the device has entered the Deep Power-down mode, all 00289 * instructions are ignored except the Resume from Deep 00290 * Power-down command. 00291 * @warning UNTESTED 00292 **/ 00293 void DeepPowerDown(); 00294 00295 /** 00296 * Takes the device out of Deep Power-down mode. 00297 * @warning UNTESTED 00298 **/ 00299 void ResumeFromDeepPowerDown(); 00300 00301 private: 00302 /* Nothing atm but who knows... */ 00303 00304 SWSPI _spi; 00305 DigitalOut _cs; 00306 }; 00307 00308 /** 00309 * @} 00310 **/ 00311 00312 #endif /* AT45DB161D_H */
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