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l6474.h
00001 /** 00002 ****************************************************************************** 00003 * @file l6474.h 00004 * @author IPC Rennes 00005 * @version V1.5.0 00006 * @date November 12, 2014 00007 * @brief Header for L6474 driver (fully integrated microstepping motor driver) 00008 * @note (C) COPYRIGHT 2014 STMicroelectronics 00009 ****************************************************************************** 00010 * @attention 00011 * 00012 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> 00013 * 00014 * Redistribution and use in source and binary forms, with or without modification, 00015 * are permitted provided that the following conditions are met: 00016 * 1. Redistributions of source code must retain the above copyright notice, 00017 * this list of conditions and the following disclaimer. 00018 * 2. Redistributions in binary form must reproduce the above copyright notice, 00019 * this list of conditions and the following disclaimer in the documentation 00020 * and/or other materials provided with the distribution. 00021 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00022 * may be used to endorse or promote products derived from this software 00023 * without specific prior written permission. 00024 * 00025 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00026 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00027 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00028 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00029 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00030 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00031 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00032 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00033 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00034 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00035 * 00036 ****************************************************************************** 00037 */ 00038 00039 00040 /* Define to prevent recursive inclusion -------------------------------------*/ 00041 00042 #ifndef __L6474_H 00043 #define __L6474_H 00044 00045 #ifdef __cplusplus 00046 extern "C" { 00047 #endif 00048 00049 00050 /* Includes ------------------------------------------------------------------*/ 00051 00052 #include "l6474_target_config.h" 00053 #include "../Common/motor.h" 00054 00055 00056 /* Definitions ---------------------------------------------------------------*/ 00057 00058 /** @addtogroup BSP 00059 * @{ 00060 */ 00061 00062 /** @addtogroup Components 00063 * @{ 00064 */ 00065 00066 /** @addtogroup L6474 00067 * @{ 00068 */ 00069 00070 /** @defgroup L6474_Exported_Defines L6474_Exported_Defines 00071 * @{ 00072 */ 00073 00074 /// Current FW version 00075 #define L6474_FW_VERSION (5) 00076 00077 /// L6474 max number of bytes of command & arguments to set a parameter 00078 #define L6474_CMD_ARG_MAX_NB_BYTES (4) 00079 00080 /// L6474 command + argument bytes number for GET_STATUS command 00081 #define L6474_CMD_ARG_NB_BYTES_GET_STATUS (1) 00082 00083 /// L6474 response bytes number 00084 #define L6474_RSP_NB_BYTES_GET_STATUS (2) 00085 00086 /// L6474 value mask for ABS_POS register 00087 #define L6474_ABS_POS_VALUE_MASK ((uint32_t) 0x003FFFFF) 00088 00089 /// L6474 sign bit mask for ABS_POS register 00090 #define L6474_ABS_POS_SIGN_BIT_MASK ((uint32_t) 0x00200000) 00091 00092 00093 /* Types ---------------------------------------------------------------------*/ 00094 00095 /** @defgroup L6474_Exported_Types 00096 * @{ 00097 */ 00098 00099 /** @defgroup L6474_Fast_Decay_Time_Options 00100 * @{ 00101 */ 00102 ///TOFF_FAST values for T_FAST register 00103 typedef enum { 00104 L6474_TOFF_FAST_2us = ((uint8_t) 0x00 << 4), 00105 L6474_TOFF_FAST_4us = ((uint8_t) 0x01 << 4), 00106 L6474_TOFF_FAST_6us = ((uint8_t) 0x02 << 4), 00107 L6474_TOFF_FAST_8us = ((uint8_t) 0x03 << 4), 00108 L6474_TOFF_FAST_10us = ((uint8_t) 0x04 << 4), 00109 L6474_TOFF_FAST_12us = ((uint8_t) 0x05 << 4), 00110 L6474_TOFF_FAST_14us = ((uint8_t) 0x06 << 4), 00111 L6474_TOFF_FAST_16us = ((uint8_t) 0x07 << 4), 00112 L6474_TOFF_FAST_18us = ((uint8_t) 0x08 << 4), 00113 L6474_TOFF_FAST_20us = ((uint8_t) 0x09 << 4), 00114 L6474_TOFF_FAST_22us = ((uint8_t) 0x0A << 4), 00115 L6474_TOFF_FAST_24us = ((uint8_t) 0x0B << 4), 00116 L6474_TOFF_FAST_26us = ((uint8_t) 0x0C << 4), 00117 L6474_TOFF_FAST_28us = ((uint8_t) 0x0D << 4), 00118 L6474_TOFF_FAST_30us = ((uint8_t) 0x0E << 4), 00119 L6474_TOFF_FAST_32us = ((uint8_t) 0x0F << 4) 00120 } L6474_TOFF_FAST_t; 00121 /** 00122 * @} 00123 */ 00124 00125 /** @defgroup L6474_Fall_Step_Time_Options 00126 * @{ 00127 */ 00128 ///FAST_STEP values for T_FAST register 00129 typedef enum { 00130 L6474_FAST_STEP_2us = ((uint8_t) 0x00), 00131 L6474_FAST_STEP_4us = ((uint8_t) 0x01), 00132 L6474_FAST_STEP_6us = ((uint8_t) 0x02), 00133 L6474_FAST_STEP_8us = ((uint8_t) 0x03), 00134 L6474_FAST_STEP_10us = ((uint8_t) 0x04), 00135 L6474_FAST_STEP_12us = ((uint8_t) 0x05), 00136 L6474_FAST_STEP_14us = ((uint8_t) 0x06), 00137 L6474_FAST_STEP_16us = ((uint8_t) 0x07), 00138 L6474_FAST_STEP_18us = ((uint8_t) 0x08), 00139 L6474_FAST_STEP_20us = ((uint8_t) 0x09), 00140 L6474_FAST_STEP_22us = ((uint8_t) 0x0A), 00141 L6474_FAST_STEP_24us = ((uint8_t) 0x0B), 00142 L6474_FAST_STEP_26us = ((uint8_t) 0x0C), 00143 L6474_FAST_STEP_28us = ((uint8_t) 0x0D), 00144 L6474_FAST_STEP_30us = ((uint8_t) 0x0E), 00145 L6474_FAST_STEP_32us = ((uint8_t) 0x0F) 00146 } L6474_FAST_STEP_t; 00147 /** 00148 * @} 00149 */ 00150 00151 /** @defgroup L6474_Overcurrent_Threshold_options 00152 * @{ 00153 */ 00154 ///OCD_TH register 00155 typedef enum { 00156 L6474_OCD_TH_375mA = ((uint8_t) 0x00), 00157 L6474_OCD_TH_750mA = ((uint8_t) 0x01), 00158 L6474_OCD_TH_1125mA = ((uint8_t) 0x02), 00159 L6474_OCD_TH_1500mA = ((uint8_t) 0x03), 00160 L6474_OCD_TH_1875mA = ((uint8_t) 0x04), 00161 L6474_OCD_TH_2250mA = ((uint8_t) 0x05), 00162 L6474_OCD_TH_2625mA = ((uint8_t) 0x06), 00163 L6474_OCD_TH_3000mA = ((uint8_t) 0x07), 00164 L6474_OCD_TH_3375mA = ((uint8_t) 0x08), 00165 L6474_OCD_TH_3750mA = ((uint8_t) 0x09), 00166 L6474_OCD_TH_4125mA = ((uint8_t) 0x0A), 00167 L6474_OCD_TH_4500mA = ((uint8_t) 0x0B), 00168 L6474_OCD_TH_4875mA = ((uint8_t) 0x0C), 00169 L6474_OCD_TH_5250mA = ((uint8_t) 0x0D), 00170 L6474_OCD_TH_5625mA = ((uint8_t) 0x0E), 00171 L6474_OCD_TH_6000mA = ((uint8_t) 0x0F) 00172 } L6474_OCD_TH_t; 00173 /** 00174 * @} 00175 */ 00176 00177 /** @defgroup L6474_STEP_MODE_Register_Masks 00178 * @{ 00179 */ 00180 ///STEP_MODE register 00181 typedef enum { 00182 L6474_STEP_MODE_STEP_SEL = ((uint8_t) 0x07), 00183 L6474_STEP_MODE_SYNC_SEL = ((uint8_t) 0x70) 00184 } L6474_STEP_MODE_Masks_t; 00185 /** 00186 * @} 00187 */ 00188 00189 /** @defgroup L6474_STEP_SEL_Options_For_STEP_MODE_Register 00190 * @{ 00191 */ 00192 ///STEP_SEL field of STEP_MODE register 00193 typedef enum { 00194 L6474_STEP_SEL_1 = ((uint8_t) 0x08), //full step 00195 L6474_STEP_SEL_1_2 = ((uint8_t) 0x09), //half step 00196 L6474_STEP_SEL_1_4 = ((uint8_t) 0x0A), //1/4 microstep 00197 L6474_STEP_SEL_1_8 = ((uint8_t) 0x0B), //1/8 microstep 00198 L6474_STEP_SEL_1_16 = ((uint8_t) 0x0C) //1/16 microstep 00199 } L6474_STEP_SEL_t; 00200 /** 00201 * @} 00202 */ 00203 00204 /** @defgroup L6474_SYNC_SEL_Options_For_STEP_MODE_Register 00205 * @{ 00206 */ 00207 ///SYNC_SEL field of STEP_MODE register 00208 typedef enum { 00209 L6474_SYNC_SEL_1_2 = ((uint8_t) 0x80), 00210 L6474_SYNC_SEL_1 = ((uint8_t) 0x90), 00211 L6474_SYNC_SEL_2 = ((uint8_t) 0xA0), 00212 L6474_SYNC_SEL_4 = ((uint8_t) 0xB0), 00213 L6474_SYNC_SEL_8 = ((uint8_t) 0xC0), 00214 L6474_SYNC_SEL_UNUSED = ((uint8_t) 0xD0) 00215 } L6474_SYNC_SEL_t; 00216 /** 00217 * @} 00218 */ 00219 00220 /** @defgroup L6474_ALARM_EN_Register_Options 00221 * @{ 00222 */ 00223 ///ALARM_EN register 00224 typedef enum { 00225 L6474_ALARM_EN_OVERCURRENT = ((uint8_t) 0x01), 00226 L6474_ALARM_EN_THERMAL_SHUTDOWN = ((uint8_t) 0x02), 00227 L6474_ALARM_EN_THERMAL_WARNING = ((uint8_t) 0x04), 00228 L6474_ALARM_EN_UNDERVOLTAGE = ((uint8_t) 0x08), 00229 L6474_ALARM_EN_SW_TURN_ON = ((uint8_t) 0x40), 00230 L6474_ALARM_EN_WRONG_NPERF_CMD = ((uint8_t) 0x80) 00231 } L6474_ALARM_EN_t; 00232 /** 00233 * @} 00234 */ 00235 00236 /** @defgroup L6474_CONFIG_Register_Masks 00237 * @{ 00238 */ 00239 ///CONFIG register 00240 typedef enum { 00241 L6474_CONFIG_OSC_SEL = ((uint16_t) 0x0007), 00242 L6474_CONFIG_EXT_CLK = ((uint16_t) 0x0008), 00243 L6474_CONFIG_EN_TQREG = ((uint16_t) 0x0020), 00244 L6474_CONFIG_OC_SD = ((uint16_t) 0x0080), 00245 L6474_CONFIG_POW_SR = ((uint16_t) 0x0300), 00246 L6474_CONFIG_TOFF = ((uint16_t) 0x7C00) 00247 } L6474_CONFIG_Masks_t; 00248 /** 00249 * @} 00250 */ 00251 00252 /** @defgroup L6474_Clock_Source_Options_For_CONFIG_Register 00253 * @{ 00254 */ 00255 ///Clock source option for CONFIG register 00256 typedef enum { 00257 L6474_CONFIG_INT_16MHZ = ((uint16_t) 0x0000), 00258 L6474_CONFIG_INT_16MHZ_OSCOUT_2MHZ = ((uint16_t) 0x0008), 00259 L6474_CONFIG_INT_16MHZ_OSCOUT_4MHZ = ((uint16_t) 0x0009), 00260 L6474_CONFIG_INT_16MHZ_OSCOUT_8MHZ = ((uint16_t) 0x000A), 00261 L6474_CONFIG_INT_16MHZ_OSCOUT_16MHZ = ((uint16_t) 0x000B), 00262 L6474_CONFIG_EXT_8MHZ_XTAL_DRIVE = ((uint16_t) 0x0004), 00263 L6474_CONFIG_EXT_16MHZ_XTAL_DRIVE = ((uint16_t) 0x0005), 00264 L6474_CONFIG_EXT_24MHZ_XTAL_DRIVE = ((uint16_t) 0x0006), 00265 L6474_CONFIG_EXT_32MHZ_XTAL_DRIVE = ((uint16_t) 0x0007), 00266 L6474_CONFIG_EXT_8MHZ_OSCOUT_INVERT = ((uint16_t) 0x000C), 00267 L6474_CONFIG_EXT_16MHZ_OSCOUT_INVERT = ((uint16_t) 0x000D), 00268 L6474_CONFIG_EXT_24MHZ_OSCOUT_INVERT = ((uint16_t) 0x000E), 00269 L6474_CONFIG_EXT_32MHZ_OSCOUT_INVERT = ((uint16_t) 0x000F) 00270 } L6474_CONFIG_OSC_MGMT_t; 00271 /** 00272 * @} 00273 */ 00274 00275 /** @defgroup L6474_External_Torque_Regulation_Options_For_CONFIG_Register 00276 * @{ 00277 */ 00278 ///External Torque regulation options for CONFIG register 00279 typedef enum { 00280 L6474_CONFIG_EN_TQREG_TVAL_USED = ((uint16_t) 0x0000), 00281 L6474_CONFIG_EN_TQREG_ADC_OUT = ((uint16_t) 0x0020) 00282 } L6474_CONFIG_EN_TQREG_t; 00283 /** 00284 * @} 00285 */ 00286 00287 /** @defgroup L6474_Over_Current_Shutdown_Options_For_CONFIG_Register 00288 * @{ 00289 */ 00290 ///Over Current Shutdown options for CONFIG register 00291 typedef enum { 00292 L6474_CONFIG_OC_SD_DISABLE = ((uint16_t) 0x0000), 00293 L6474_CONFIG_OC_SD_ENABLE = ((uint16_t) 0x0080) 00294 } L6474_CONFIG_OC_SD_t; 00295 /** 00296 * @} 00297 */ 00298 00299 /** @defgroup L6474_Power_Bridge_Output_Slew_Rate_Options 00300 * @{ 00301 */ 00302 /// POW_SR values for CONFIG register 00303 typedef enum { 00304 L6474_CONFIG_SR_320V_us =((uint16_t)0x0000), 00305 L6474_CONFIG_SR_075V_us =((uint16_t)0x0100), 00306 L6474_CONFIG_SR_110V_us =((uint16_t)0x0200), 00307 L6474_CONFIG_SR_260V_us =((uint16_t)0x0300) 00308 } L6474_CONFIG_POW_SR_t; 00309 /** 00310 * @} 00311 */ 00312 00313 /** @defgroup L6474_Off_Time_Options 00314 * @{ 00315 */ 00316 /// TOFF values for CONFIG register 00317 typedef enum { 00318 L6474_CONFIG_TOFF_004us = (((uint16_t) 0x01) << 10), 00319 L6474_CONFIG_TOFF_008us = (((uint16_t) 0x02) << 10), 00320 L6474_CONFIG_TOFF_012us = (((uint16_t) 0x03) << 10), 00321 L6474_CONFIG_TOFF_016us = (((uint16_t) 0x04) << 10), 00322 L6474_CONFIG_TOFF_020us = (((uint16_t) 0x05) << 10), 00323 L6474_CONFIG_TOFF_024us = (((uint16_t) 0x06) << 10), 00324 L6474_CONFIG_TOFF_028us = (((uint16_t) 0x07) << 10), 00325 L6474_CONFIG_TOFF_032us = (((uint16_t) 0x08) << 10), 00326 L6474_CONFIG_TOFF_036us = (((uint16_t) 0x09) << 10), 00327 L6474_CONFIG_TOFF_040us = (((uint16_t) 0x0A) << 10), 00328 L6474_CONFIG_TOFF_044us = (((uint16_t) 0x0B) << 10), 00329 L6474_CONFIG_TOFF_048us = (((uint16_t) 0x0C) << 10), 00330 L6474_CONFIG_TOFF_052us = (((uint16_t) 0x0D) << 10), 00331 L6474_CONFIG_TOFF_056us = (((uint16_t) 0x0E) << 10), 00332 L6474_CONFIG_TOFF_060us = (((uint16_t) 0x0F) << 10), 00333 L6474_CONFIG_TOFF_064us = (((uint16_t) 0x10) << 10), 00334 L6474_CONFIG_TOFF_068us = (((uint16_t) 0x11) << 10), 00335 L6474_CONFIG_TOFF_072us = (((uint16_t) 0x12) << 10), 00336 L6474_CONFIG_TOFF_076us = (((uint16_t) 0x13) << 10), 00337 L6474_CONFIG_TOFF_080us = (((uint16_t) 0x14) << 10), 00338 L6474_CONFIG_TOFF_084us = (((uint16_t) 0x15) << 10), 00339 L6474_CONFIG_TOFF_088us = (((uint16_t) 0x16) << 10), 00340 L6474_CONFIG_TOFF_092us = (((uint16_t) 0x17) << 10), 00341 L6474_CONFIG_TOFF_096us = (((uint16_t) 0x18) << 10), 00342 L6474_CONFIG_TOFF_100us = (((uint16_t) 0x19) << 10), 00343 L6474_CONFIG_TOFF_104us = (((uint16_t) 0x1A) << 10), 00344 L6474_CONFIG_TOFF_108us = (((uint16_t) 0x1B) << 10), 00345 L6474_CONFIG_TOFF_112us = (((uint16_t) 0x1C) << 10), 00346 L6474_CONFIG_TOFF_116us = (((uint16_t) 0x1D) << 10), 00347 L6474_CONFIG_TOFF_120us = (((uint16_t) 0x1E) << 10), 00348 L6474_CONFIG_TOFF_124us = (((uint16_t) 0x1F) << 10) 00349 } L6474_CONFIG_TOFF_t; 00350 /** 00351 * @} 00352 */ 00353 00354 /** @defgroup L6474_STATUS_Register_Bit_Masks 00355 * @{ 00356 */ 00357 ///STATUS Register Bit Masks 00358 typedef enum { 00359 L6474_STATUS_HIZ = (((uint16_t) 0x0001)), 00360 L6474_STATUS_DIR = (((uint16_t) 0x0010)), 00361 L6474_STATUS_NOTPERF_CMD = (((uint16_t) 0x0080)), 00362 L6474_STATUS_WRONG_CMD = (((uint16_t) 0x0100)), 00363 L6474_STATUS_UVLO = (((uint16_t) 0x0200)), 00364 L6474_STATUS_TH_WRN = (((uint16_t) 0x0400)), 00365 L6474_STATUS_TH_SD = (((uint16_t) 0x0800)), 00366 L6474_STATUS_OCD = (((uint16_t) 0x1000)) 00367 } L6474_STATUS_Masks_t; 00368 /** 00369 * @} 00370 */ 00371 00372 /** @defgroup L6474_Direction_Field_Of_STATUS_Register 00373 * @{ 00374 */ 00375 ///Diretion field of STATUS register 00376 typedef enum { 00377 L6474_STATUS_DIR_FORWARD = (((uint16_t) 0x0001) << 4), 00378 L6474_STATUS_DIR_REVERSE = (((uint16_t) 0x0000) << 4) 00379 } L6474_STATUS_DIR_t; 00380 /** 00381 * @} 00382 */ 00383 00384 /** @defgroup L6474_Internal_Register_Addresses 00385 * @{ 00386 */ 00387 /// Internal L6474 register addresses 00388 typedef enum { 00389 L6474_ABS_POS = ((uint8_t) 0x01), 00390 L6474_EL_POS = ((uint8_t) 0x02), 00391 L6474_MARK = ((uint8_t) 0x03), 00392 L6474_RESERVED_REG01 = ((uint8_t) 0x04), 00393 L6474_RESERVED_REG02 = ((uint8_t) 0x05), 00394 L6474_RESERVED_REG03 = ((uint8_t) 0x06), 00395 L6474_RESERVED_REG04 = ((uint8_t) 0x07), 00396 L6474_RESERVED_REG05 = ((uint8_t) 0x08), 00397 L6474_RESERVED_REG06 = ((uint8_t) 0x15), 00398 L6474_TVAL = ((uint8_t) 0x09), 00399 L6474_RESERVED_REG07 = ((uint8_t) 0x0A), 00400 L6474_RESERVED_REG08 = ((uint8_t) 0x0B), 00401 L6474_RESERVED_REG09 = ((uint8_t) 0x0C), 00402 L6474_RESERVED_REG10 = ((uint8_t) 0x0D), 00403 L6474_T_FAST = ((uint8_t) 0x0E), 00404 L6474_TON_MIN = ((uint8_t) 0x0F), 00405 L6474_TOFF_MIN = ((uint8_t) 0x10), 00406 L6474_RESERVED_REG11 = ((uint8_t) 0x11), 00407 L6474_ADC_OUT = ((uint8_t) 0x12), 00408 L6474_OCD_TH = ((uint8_t) 0x13), 00409 L6474_RESERVED_REG12 = ((uint8_t) 0x14), 00410 L6474_STEP_MODE = ((uint8_t) 0x16), 00411 L6474_ALARM_EN = ((uint8_t) 0x17), 00412 L6474_CONFIG = ((uint8_t) 0x18), 00413 L6474_STATUS = ((uint8_t) 0x19), 00414 L6474_RESERVED_REG13 = ((uint8_t) 0x1A), 00415 L6474_RESERVED_REG14 = ((uint8_t) 0x1B), 00416 L6474_INEXISTENT_REG = ((uint8_t) 0x1F) 00417 } L6474_Registers_t; 00418 /** 00419 * @} 00420 */ 00421 00422 /** @defgroup L6474_Command_Set 00423 * @{ 00424 */ 00425 /// L6474 command set 00426 typedef enum { 00427 L6474_NOP = ((uint8_t) 0x00), 00428 L6474_SET_PARAM = ((uint8_t) 0x00), 00429 L6474_GET_PARAM = ((uint8_t) 0x20), 00430 L6474_ENABLE = ((uint8_t) 0xB8), 00431 L6474_DISABLE = ((uint8_t) 0xA8), 00432 L6474_GET_STATUS = ((uint8_t) 0xD0), 00433 L6474_RESERVED_CMD1 = ((uint8_t) 0xEB), 00434 L6474_RESERVED_CMD2 = ((uint8_t) 0xF8) 00435 } L6474_Commands_t; 00436 00437 /** 00438 * @brief L6474 driver initialization structure definition. 00439 */ 00440 /* ACTION --------------------------------------------------------------------* 00441 * Declare here the component's initialization structure, if any, one * 00442 * variable per line without initialization. * 00443 * * 00444 * Example: * 00445 * typedef struct * 00446 * { * 00447 * int frequency; * 00448 * int update_mode; * 00449 * } COMPONENT_Init_t; * 00450 *----------------------------------------------------------------------------*/ 00451 typedef struct 00452 { 00453 /* Acceleration rate in step/s2. Range: (0..+inf). */ 00454 int acceleration_step_s2; 00455 00456 /* Deceleration rate in step/s2. Range: (0..+inf). */ 00457 int deceleration_step_s2; 00458 00459 /* Maximum speed in step/s. Range: (30..10000]. */ 00460 int maximum_speed_step_s; 00461 00462 /* Minimum speed in step/s. Range: [30..10000). */ 00463 int minimum_speed_step_s; 00464 00465 /* Torque regulation current in mA. Range: 31.25mA to 4000mA. */ 00466 float torque_regulation_current_mA; 00467 00468 /* Overcurrent threshold (OCD_TH register). */ 00469 L6474_OCD_TH_t overcurrent_threshold; 00470 00471 /* Overcurrent shutwdown (OC_SD field of CONFIG register). */ 00472 L6474_CONFIG_OC_SD_t overcurrent_shutwdown; 00473 00474 /* Torque regulation method (EN_TQREG field of CONFIG register). */ 00475 L6474_CONFIG_EN_TQREG_t torque_regulation_method; 00476 00477 /* Step selection (STEP_SEL field of STEP_MODE register). */ 00478 L6474_STEP_SEL_t step_selection; 00479 00480 /* Sync selection (SYNC_SEL field of STEP_MODE register). */ 00481 L6474_SYNC_SEL_t sync_selection; 00482 00483 /* Fall time value (T_FAST field of T_FAST register). Range: 2us to 32us. */ 00484 L6474_FAST_STEP_t fall_time; 00485 00486 /* Maximum fast decay time (T_OFF field of T_FAST register). Range: 2us to 32us. */ 00487 L6474_TOFF_FAST_t maximum_fast_decay_time; 00488 00489 /* Minimum ON time in us (TON_MIN register). Range: 0.5us to 64us. */ 00490 float minimum_ON_time_us; 00491 00492 /* Minimum OFF time in us (TOFF_MIN register). Range: 0.5us to 64us. */ 00493 float minimum_OFF_time_us; 00494 00495 /* Target Swicthing Period (field TOFF of CONFIG register). */ 00496 L6474_CONFIG_TOFF_t target_swicthing_period; 00497 00498 /* Slew rate (POW_SR field of CONFIG register). */ 00499 L6474_CONFIG_POW_SR_t slew_rate; 00500 00501 /* Clock setting (OSC_CLK_SEL field of CONFIG register). */ 00502 L6474_CONFIG_OSC_MGMT_t clock; 00503 00504 /* Alarm (ALARM_EN register). */ 00505 int alarm; 00506 } L6474_Init_t; 00507 00508 /** 00509 * @brief L6474 driver data structure definition. 00510 */ 00511 /* ACTION --------------------------------------------------------------------* 00512 * Declare here the structure of component's data, if any, one variable per * 00513 * line without initialization. * 00514 * * 00515 * Example: * 00516 * typedef struct * 00517 * { * 00518 * int T0_out; * 00519 * int T1_out; * 00520 * float T0_degC; * 00521 * float T1_degC; * 00522 * } COMPONENT_Data_t; * 00523 *----------------------------------------------------------------------------*/ 00524 typedef struct 00525 { 00526 /// Function pointer to flag interrupt call back 00527 void (*flagInterruptCallback)(void); 00528 /// Function pointer to error handler call back 00529 void (*errorHandlerCallback)(uint16_t error); 00530 bool spiPreemtionByIsr; // = FALSE; 00531 bool isrFlag; // = FALSE; 00532 /// L6474 Device Paramaters structure 00533 deviceParams_t devicePrm; //[MAX_NUMBER_OF_DEVICES]; 00534 uint8_t number_of_devices; 00535 uint8_t device_instance; 00536 uint8_t spiTxBursts[L6474_CMD_ARG_MAX_NB_BYTES][MAX_NUMBER_OF_DEVICES]; 00537 uint8_t spiRxBursts[L6474_CMD_ARG_MAX_NB_BYTES][MAX_NUMBER_OF_DEVICES]; 00538 } L6474_Data_t; 00539 00540 00541 /* Functions -----------------------------------------------------------------*/ 00542 00543 /** @addtogroup BSP 00544 * @{ 00545 */ 00546 00547 /** @addtogroup Components 00548 * @{ 00549 */ 00550 00551 /** @addtogroup L6474 00552 * @{ 00553 */ 00554 00555 /** @defgroup L6474_Imported_Functions L6474_Imported_Functions 00556 * @{ 00557 */ 00558 00559 /* ACTION --------------------------------------------------------------------* 00560 * Declare here extern platform-dependent APIs you might need (e.g.: I/O and * 00561 * interrupt related functions), and implement them in a glue-logic file on * 00562 * the target environment, for example within the "x_nucleo_board.c" file. * 00563 * E.g.: * 00564 * extern Status_t COMPONENT_IO_Init (void *handle); * 00565 * extern Status_t COMPONENT_IO_Read (handle, buf, regadd, bytes); * 00566 * extern Status_t COMPONENT_IO_Write(handle, buf, regadd, bytes); * 00567 * extern void COMPONENT_IO_ITConfig(void); * 00568 *----------------------------------------------------------------------------*/ 00569 ///Delay of the requested number of milliseconds 00570 extern void L6474_Delay(void *handle, uint32_t delay); 00571 ///Enable Irq 00572 extern void L6474_EnableIrq(void *handle); 00573 ///Disable Irq 00574 extern void L6474_DisableIrq(void *handle); 00575 ///Set PWM1 frequency and start it 00576 extern void L6474_Pwm1SetFreq(void *handle, uint16_t newFreq); 00577 ///Set PWM2 frequency and start it 00578 extern void L6474_Pwm2SetFreq(void *handle, uint16_t newFreq); 00579 ///Set PWM3 frequency and start it 00580 extern void L6474_Pwm3SetFreq(void *handle, uint16_t newFreq); 00581 ///Init the PWM 00582 extern void L6474_PwmInit(void *handle); 00583 ///Stop the PWM 00584 extern void L6474_PwmStop(void *handle); 00585 ///Reset the L6474 reset pin 00586 extern void L6474_ReleaseReset(void *handle); 00587 ///Set the L6474 reset pin 00588 extern void L6474_Reset(void *handle); 00589 ///Set direction GPIO 00590 extern void L6474_SetDirectionGpio(void *handle, uint8_t gpioState); 00591 ///Write bytes to the L6474s via SPI 00592 extern uint8_t L6474_SpiWriteBytes(void *handle, uint8_t *pByteToTransmit, uint8_t *pReceivedByte); 00593 00594 #ifdef __cplusplus 00595 } 00596 #endif 00597 00598 #endif /* #ifndef __L6474_H */ 00599 00600 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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