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targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG_STK3600/efm32lg_i2c.h@563:9f26fcd0c9ce, 2015-06-09 (annotated)

Committer:
mbed_official
Date:
Tue Jun 09 15:30:08 2015 +0100
Revision:
563:9f26fcd0c9ce
Parent:
525:c320967f86b9 
Synchronized with git revision a140fc60a6f74003a3d46c4ce8bf8c742148b9fd



Full URL: https://github.com/mbedmicro/mbed/commit/a140fc60a6f74003a3d46c4ce8bf8c742148b9fd/

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 525:c320967f86b9 1 /**************************************************************************//**
mbed_official 525:c320967f86b9 2 * @file efm32lg_i2c.h
mbed_official 525:c320967f86b9 3 * @brief EFM32LG_I2C register and bit field definitions
mbed_official 525:c320967f86b9 4 * @version 3.20.6
mbed_official 525:c320967f86b9 5 ******************************************************************************
mbed_official 525:c320967f86b9 6 * @section License
mbed_official 525:c320967f86b9 7 * <b>(C) Copyright 2014 Silicon Laboratories, Inc. http://www.silabs.com</b>
mbed_official 525:c320967f86b9 8 ******************************************************************************
mbed_official 525:c320967f86b9 9 *
mbed_official 525:c320967f86b9 10 * Permission is granted to anyone to use this software for any purpose,
mbed_official 525:c320967f86b9 11 * including commercial applications, and to alter it and redistribute it
mbed_official 525:c320967f86b9 12 * freely, subject to the following restrictions:
mbed_official 525:c320967f86b9 13 *
mbed_official 525:c320967f86b9 14 * 1. The origin of this software must not be misrepresented; you must not
mbed_official 525:c320967f86b9 15 * claim that you wrote the original software.@n
mbed_official 525:c320967f86b9 16 * 2. Altered source versions must be plainly marked as such, and must not be
mbed_official 525:c320967f86b9 17 * misrepresented as being the original software.@n
mbed_official 525:c320967f86b9 18 * 3. This notice may not be removed or altered from any source distribution.
mbed_official 525:c320967f86b9 19 *
mbed_official 525:c320967f86b9 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc.
mbed_official 525:c320967f86b9 21 * has no obligation to support this Software. Silicon Laboratories, Inc. is
mbed_official 525:c320967f86b9 22 * providing the Software "AS IS", with no express or implied warranties of any
mbed_official 525:c320967f86b9 23 * kind, including, but not limited to, any implied warranties of
mbed_official 525:c320967f86b9 24 * merchantability or fitness for any particular purpose or warranties against
mbed_official 525:c320967f86b9 25 * infringement of any proprietary rights of a third party.
mbed_official 525:c320967f86b9 26 *
mbed_official 525:c320967f86b9 27 * Silicon Laboratories, Inc. will not be liable for any consequential,
mbed_official 525:c320967f86b9 28 * incidental, or special damages, or any other relief, or for any claim by
mbed_official 525:c320967f86b9 29 * any third party, arising from your use of this Software.
mbed_official 525:c320967f86b9 30 *
mbed_official 525:c320967f86b9 31 *****************************************************************************/
mbed_official 525:c320967f86b9 32 /**************************************************************************//**
mbed_official 525:c320967f86b9 33 * @defgroup EFM32LG_I2C
mbed_official 525:c320967f86b9 34 * @{
mbed_official 525:c320967f86b9 35 * @brief EFM32LG_I2C Register Declaration
mbed_official 525:c320967f86b9 36 *****************************************************************************/
mbed_official 525:c320967f86b9 37 typedef struct
mbed_official 525:c320967f86b9 38 {
mbed_official 525:c320967f86b9 39 __IO uint32_t CTRL; /**< Control Register */
mbed_official 525:c320967f86b9 40 __IO uint32_t CMD; /**< Command Register */
mbed_official 525:c320967f86b9 41 __I uint32_t STATE; /**< State Register */
mbed_official 525:c320967f86b9 42 __I uint32_t STATUS; /**< Status Register */
mbed_official 525:c320967f86b9 43 __IO uint32_t CLKDIV; /**< Clock Division Register */
mbed_official 525:c320967f86b9 44 __IO uint32_t SADDR; /**< Slave Address Register */
mbed_official 525:c320967f86b9 45 __IO uint32_t SADDRMASK; /**< Slave Address Mask Register */
mbed_official 525:c320967f86b9 46 __I uint32_t RXDATA; /**< Receive Buffer Data Register */
mbed_official 525:c320967f86b9 47 __I uint32_t RXDATAP; /**< Receive Buffer Data Peek Register */
mbed_official 525:c320967f86b9 48 __IO uint32_t TXDATA; /**< Transmit Buffer Data Register */
mbed_official 525:c320967f86b9 49 __I uint32_t IF; /**< Interrupt Flag Register */
mbed_official 525:c320967f86b9 50 __IO uint32_t IFS; /**< Interrupt Flag Set Register */
mbed_official 525:c320967f86b9 51 __IO uint32_t IFC; /**< Interrupt Flag Clear Register */
mbed_official 525:c320967f86b9 52 __IO uint32_t IEN; /**< Interrupt Enable Register */
mbed_official 525:c320967f86b9 53 __IO uint32_t ROUTE; /**< I/O Routing Register */
mbed_official 525:c320967f86b9 54 } I2C_TypeDef; /** @} */
mbed_official 525:c320967f86b9 55
mbed_official 525:c320967f86b9 56 /**************************************************************************//**
mbed_official 525:c320967f86b9 57 * @defgroup EFM32LG_I2C_BitFields
mbed_official 525:c320967f86b9 58 * @{
mbed_official 525:c320967f86b9 59 *****************************************************************************/
mbed_official 525:c320967f86b9 60
mbed_official 525:c320967f86b9 61 /* Bit fields for I2C CTRL */
mbed_official 525:c320967f86b9 62 #define _I2C_CTRL_RESETVALUE 0x00000000UL /**< Default value for I2C_CTRL */
mbed_official 525:c320967f86b9 63 #define _I2C_CTRL_MASK 0x0007B37FUL /**< Mask for I2C_CTRL */
mbed_official 525:c320967f86b9 64 #define I2C_CTRL_EN (0x1UL << 0) /**< I2C Enable */
mbed_official 525:c320967f86b9 65 #define _I2C_CTRL_EN_SHIFT 0 /**< Shift value for I2C_EN */
mbed_official 525:c320967f86b9 66 #define _I2C_CTRL_EN_MASK 0x1UL /**< Bit mask for I2C_EN */
mbed_official 525:c320967f86b9 67 #define _I2C_CTRL_EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CTRL */
mbed_official 525:c320967f86b9 68 #define I2C_CTRL_EN_DEFAULT (_I2C_CTRL_EN_DEFAULT << 0) /**< Shifted mode DEFAULT for I2C_CTRL */
mbed_official 525:c320967f86b9 69 #define I2C_CTRL_SLAVE (0x1UL << 1) /**< Addressable as Slave */
mbed_official 525:c320967f86b9 70 #define _I2C_CTRL_SLAVE_SHIFT 1 /**< Shift value for I2C_SLAVE */
mbed_official 525:c320967f86b9 71 #define _I2C_CTRL_SLAVE_MASK 0x2UL /**< Bit mask for I2C_SLAVE */
mbed_official 525:c320967f86b9 72 #define _I2C_CTRL_SLAVE_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CTRL */
mbed_official 525:c320967f86b9 73 #define I2C_CTRL_SLAVE_DEFAULT (_I2C_CTRL_SLAVE_DEFAULT << 1) /**< Shifted mode DEFAULT for I2C_CTRL */
mbed_official 525:c320967f86b9 74 #define I2C_CTRL_AUTOACK (0x1UL << 2) /**< Automatic Acknowledge */
mbed_official 525:c320967f86b9 75 #define _I2C_CTRL_AUTOACK_SHIFT 2 /**< Shift value for I2C_AUTOACK */
mbed_official 525:c320967f86b9 76 #define _I2C_CTRL_AUTOACK_MASK 0x4UL /**< Bit mask for I2C_AUTOACK */
mbed_official 525:c320967f86b9 77 #define _I2C_CTRL_AUTOACK_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CTRL */
mbed_official 525:c320967f86b9 78 #define I2C_CTRL_AUTOACK_DEFAULT (_I2C_CTRL_AUTOACK_DEFAULT << 2) /**< Shifted mode DEFAULT for I2C_CTRL */
mbed_official 525:c320967f86b9 79 #define I2C_CTRL_AUTOSE (0x1UL << 3) /**< Automatic STOP when Empty */
mbed_official 525:c320967f86b9 80 #define _I2C_CTRL_AUTOSE_SHIFT 3 /**< Shift value for I2C_AUTOSE */
mbed_official 525:c320967f86b9 81 #define _I2C_CTRL_AUTOSE_MASK 0x8UL /**< Bit mask for I2C_AUTOSE */
mbed_official 525:c320967f86b9 82 #define _I2C_CTRL_AUTOSE_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CTRL */
mbed_official 525:c320967f86b9 83 #define I2C_CTRL_AUTOSE_DEFAULT (_I2C_CTRL_AUTOSE_DEFAULT << 3) /**< Shifted mode DEFAULT for I2C_CTRL */
mbed_official 525:c320967f86b9 84 #define I2C_CTRL_AUTOSN (0x1UL << 4) /**< Automatic STOP on NACK */
mbed_official 525:c320967f86b9 85 #define _I2C_CTRL_AUTOSN_SHIFT 4 /**< Shift value for I2C_AUTOSN */
mbed_official 525:c320967f86b9 86 #define _I2C_CTRL_AUTOSN_MASK 0x10UL /**< Bit mask for I2C_AUTOSN */
mbed_official 525:c320967f86b9 87 #define _I2C_CTRL_AUTOSN_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CTRL */
mbed_official 525:c320967f86b9 88 #define I2C_CTRL_AUTOSN_DEFAULT (_I2C_CTRL_AUTOSN_DEFAULT << 4) /**< Shifted mode DEFAULT for I2C_CTRL */
mbed_official 525:c320967f86b9 89 #define I2C_CTRL_ARBDIS (0x1UL << 5) /**< Arbitration Disable */
mbed_official 525:c320967f86b9 90 #define _I2C_CTRL_ARBDIS_SHIFT 5 /**< Shift value for I2C_ARBDIS */
mbed_official 525:c320967f86b9 91 #define _I2C_CTRL_ARBDIS_MASK 0x20UL /**< Bit mask for I2C_ARBDIS */
mbed_official 525:c320967f86b9 92 #define _I2C_CTRL_ARBDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CTRL */
mbed_official 525:c320967f86b9 93 #define I2C_CTRL_ARBDIS_DEFAULT (_I2C_CTRL_ARBDIS_DEFAULT << 5) /**< Shifted mode DEFAULT for I2C_CTRL */
mbed_official 525:c320967f86b9 94 #define I2C_CTRL_GCAMEN (0x1UL << 6) /**< General Call Address Match Enable */
mbed_official 525:c320967f86b9 95 #define _I2C_CTRL_GCAMEN_SHIFT 6 /**< Shift value for I2C_GCAMEN */
mbed_official 525:c320967f86b9 96 #define _I2C_CTRL_GCAMEN_MASK 0x40UL /**< Bit mask for I2C_GCAMEN */
mbed_official 525:c320967f86b9 97 #define _I2C_CTRL_GCAMEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CTRL */
mbed_official 525:c320967f86b9 98 #define I2C_CTRL_GCAMEN_DEFAULT (_I2C_CTRL_GCAMEN_DEFAULT << 6) /**< Shifted mode DEFAULT for I2C_CTRL */
mbed_official 525:c320967f86b9 99 #define _I2C_CTRL_CLHR_SHIFT 8 /**< Shift value for I2C_CLHR */
mbed_official 525:c320967f86b9 100 #define _I2C_CTRL_CLHR_MASK 0x300UL /**< Bit mask for I2C_CLHR */
mbed_official 525:c320967f86b9 101 #define _I2C_CTRL_CLHR_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CTRL */
mbed_official 525:c320967f86b9 102 #define _I2C_CTRL_CLHR_STANDARD 0x00000000UL /**< Mode STANDARD for I2C_CTRL */
mbed_official 525:c320967f86b9 103 #define _I2C_CTRL_CLHR_ASYMMETRIC 0x00000001UL /**< Mode ASYMMETRIC for I2C_CTRL */
mbed_official 525:c320967f86b9 104 #define _I2C_CTRL_CLHR_FAST 0x00000002UL /**< Mode FAST for I2C_CTRL */
mbed_official 525:c320967f86b9 105 #define I2C_CTRL_CLHR_DEFAULT (_I2C_CTRL_CLHR_DEFAULT << 8) /**< Shifted mode DEFAULT for I2C_CTRL */
mbed_official 525:c320967f86b9 106 #define I2C_CTRL_CLHR_STANDARD (_I2C_CTRL_CLHR_STANDARD << 8) /**< Shifted mode STANDARD for I2C_CTRL */
mbed_official 525:c320967f86b9 107 #define I2C_CTRL_CLHR_ASYMMETRIC (_I2C_CTRL_CLHR_ASYMMETRIC << 8) /**< Shifted mode ASYMMETRIC for I2C_CTRL */
mbed_official 525:c320967f86b9 108 #define I2C_CTRL_CLHR_FAST (_I2C_CTRL_CLHR_FAST << 8) /**< Shifted mode FAST for I2C_CTRL */
mbed_official 525:c320967f86b9 109 #define _I2C_CTRL_BITO_SHIFT 12 /**< Shift value for I2C_BITO */
mbed_official 525:c320967f86b9 110 #define _I2C_CTRL_BITO_MASK 0x3000UL /**< Bit mask for I2C_BITO */
mbed_official 525:c320967f86b9 111 #define _I2C_CTRL_BITO_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CTRL */
mbed_official 525:c320967f86b9 112 #define _I2C_CTRL_BITO_OFF 0x00000000UL /**< Mode OFF for I2C_CTRL */
mbed_official 525:c320967f86b9 113 #define _I2C_CTRL_BITO_40PCC 0x00000001UL /**< Mode 40PCC for I2C_CTRL */
mbed_official 525:c320967f86b9 114 #define _I2C_CTRL_BITO_80PCC 0x00000002UL /**< Mode 80PCC for I2C_CTRL */
mbed_official 525:c320967f86b9 115 #define _I2C_CTRL_BITO_160PCC 0x00000003UL /**< Mode 160PCC for I2C_CTRL */
mbed_official 525:c320967f86b9 116 #define I2C_CTRL_BITO_DEFAULT (_I2C_CTRL_BITO_DEFAULT << 12) /**< Shifted mode DEFAULT for I2C_CTRL */
mbed_official 525:c320967f86b9 117 #define I2C_CTRL_BITO_OFF (_I2C_CTRL_BITO_OFF << 12) /**< Shifted mode OFF for I2C_CTRL */
mbed_official 525:c320967f86b9 118 #define I2C_CTRL_BITO_40PCC (_I2C_CTRL_BITO_40PCC << 12) /**< Shifted mode 40PCC for I2C_CTRL */
mbed_official 525:c320967f86b9 119 #define I2C_CTRL_BITO_80PCC (_I2C_CTRL_BITO_80PCC << 12) /**< Shifted mode 80PCC for I2C_CTRL */
mbed_official 525:c320967f86b9 120 #define I2C_CTRL_BITO_160PCC (_I2C_CTRL_BITO_160PCC << 12) /**< Shifted mode 160PCC for I2C_CTRL */
mbed_official 525:c320967f86b9 121 #define I2C_CTRL_GIBITO (0x1UL << 15) /**< Go Idle on Bus Idle Timeout */
mbed_official 525:c320967f86b9 122 #define _I2C_CTRL_GIBITO_SHIFT 15 /**< Shift value for I2C_GIBITO */
mbed_official 525:c320967f86b9 123 #define _I2C_CTRL_GIBITO_MASK 0x8000UL /**< Bit mask for I2C_GIBITO */
mbed_official 525:c320967f86b9 124 #define _I2C_CTRL_GIBITO_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CTRL */
mbed_official 525:c320967f86b9 125 #define I2C_CTRL_GIBITO_DEFAULT (_I2C_CTRL_GIBITO_DEFAULT << 15) /**< Shifted mode DEFAULT for I2C_CTRL */
mbed_official 525:c320967f86b9 126 #define _I2C_CTRL_CLTO_SHIFT 16 /**< Shift value for I2C_CLTO */
mbed_official 525:c320967f86b9 127 #define _I2C_CTRL_CLTO_MASK 0x70000UL /**< Bit mask for I2C_CLTO */
mbed_official 525:c320967f86b9 128 #define _I2C_CTRL_CLTO_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CTRL */
mbed_official 525:c320967f86b9 129 #define _I2C_CTRL_CLTO_OFF 0x00000000UL /**< Mode OFF for I2C_CTRL */
mbed_official 525:c320967f86b9 130 #define _I2C_CTRL_CLTO_40PCC 0x00000001UL /**< Mode 40PCC for I2C_CTRL */
mbed_official 525:c320967f86b9 131 #define _I2C_CTRL_CLTO_80PCC 0x00000002UL /**< Mode 80PCC for I2C_CTRL */
mbed_official 525:c320967f86b9 132 #define _I2C_CTRL_CLTO_160PCC 0x00000003UL /**< Mode 160PCC for I2C_CTRL */
mbed_official 525:c320967f86b9 133 #define _I2C_CTRL_CLTO_320PPC 0x00000004UL /**< Mode 320PPC for I2C_CTRL */
mbed_official 525:c320967f86b9 134 #define _I2C_CTRL_CLTO_1024PPC 0x00000005UL /**< Mode 1024PPC for I2C_CTRL */
mbed_official 525:c320967f86b9 135 #define I2C_CTRL_CLTO_DEFAULT (_I2C_CTRL_CLTO_DEFAULT << 16) /**< Shifted mode DEFAULT for I2C_CTRL */
mbed_official 525:c320967f86b9 136 #define I2C_CTRL_CLTO_OFF (_I2C_CTRL_CLTO_OFF << 16) /**< Shifted mode OFF for I2C_CTRL */
mbed_official 525:c320967f86b9 137 #define I2C_CTRL_CLTO_40PCC (_I2C_CTRL_CLTO_40PCC << 16) /**< Shifted mode 40PCC for I2C_CTRL */
mbed_official 525:c320967f86b9 138 #define I2C_CTRL_CLTO_80PCC (_I2C_CTRL_CLTO_80PCC << 16) /**< Shifted mode 80PCC for I2C_CTRL */
mbed_official 525:c320967f86b9 139 #define I2C_CTRL_CLTO_160PCC (_I2C_CTRL_CLTO_160PCC << 16) /**< Shifted mode 160PCC for I2C_CTRL */
mbed_official 525:c320967f86b9 140 #define I2C_CTRL_CLTO_320PPC (_I2C_CTRL_CLTO_320PPC << 16) /**< Shifted mode 320PPC for I2C_CTRL */
mbed_official 525:c320967f86b9 141 #define I2C_CTRL_CLTO_1024PPC (_I2C_CTRL_CLTO_1024PPC << 16) /**< Shifted mode 1024PPC for I2C_CTRL */
mbed_official 525:c320967f86b9 142
mbed_official 525:c320967f86b9 143 /* Bit fields for I2C CMD */
mbed_official 525:c320967f86b9 144 #define _I2C_CMD_RESETVALUE 0x00000000UL /**< Default value for I2C_CMD */
mbed_official 525:c320967f86b9 145 #define _I2C_CMD_MASK 0x000000FFUL /**< Mask for I2C_CMD */
mbed_official 525:c320967f86b9 146 #define I2C_CMD_START (0x1UL << 0) /**< Send start condition */
mbed_official 525:c320967f86b9 147 #define _I2C_CMD_START_SHIFT 0 /**< Shift value for I2C_START */
mbed_official 525:c320967f86b9 148 #define _I2C_CMD_START_MASK 0x1UL /**< Bit mask for I2C_START */
mbed_official 525:c320967f86b9 149 #define _I2C_CMD_START_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CMD */
mbed_official 525:c320967f86b9 150 #define I2C_CMD_START_DEFAULT (_I2C_CMD_START_DEFAULT << 0) /**< Shifted mode DEFAULT for I2C_CMD */
mbed_official 525:c320967f86b9 151 #define I2C_CMD_STOP (0x1UL << 1) /**< Send stop condition */
mbed_official 525:c320967f86b9 152 #define _I2C_CMD_STOP_SHIFT 1 /**< Shift value for I2C_STOP */
mbed_official 525:c320967f86b9 153 #define _I2C_CMD_STOP_MASK 0x2UL /**< Bit mask for I2C_STOP */
mbed_official 525:c320967f86b9 154 #define _I2C_CMD_STOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CMD */
mbed_official 525:c320967f86b9 155 #define I2C_CMD_STOP_DEFAULT (_I2C_CMD_STOP_DEFAULT << 1) /**< Shifted mode DEFAULT for I2C_CMD */
mbed_official 525:c320967f86b9 156 #define I2C_CMD_ACK (0x1UL << 2) /**< Send ACK */
mbed_official 525:c320967f86b9 157 #define _I2C_CMD_ACK_SHIFT 2 /**< Shift value for I2C_ACK */
mbed_official 525:c320967f86b9 158 #define _I2C_CMD_ACK_MASK 0x4UL /**< Bit mask for I2C_ACK */
mbed_official 525:c320967f86b9 159 #define _I2C_CMD_ACK_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CMD */
mbed_official 525:c320967f86b9 160 #define I2C_CMD_ACK_DEFAULT (_I2C_CMD_ACK_DEFAULT << 2) /**< Shifted mode DEFAULT for I2C_CMD */
mbed_official 525:c320967f86b9 161 #define I2C_CMD_NACK (0x1UL << 3) /**< Send NACK */
mbed_official 525:c320967f86b9 162 #define _I2C_CMD_NACK_SHIFT 3 /**< Shift value for I2C_NACK */
mbed_official 525:c320967f86b9 163 #define _I2C_CMD_NACK_MASK 0x8UL /**< Bit mask for I2C_NACK */
mbed_official 525:c320967f86b9 164 #define _I2C_CMD_NACK_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CMD */
mbed_official 525:c320967f86b9 165 #define I2C_CMD_NACK_DEFAULT (_I2C_CMD_NACK_DEFAULT << 3) /**< Shifted mode DEFAULT for I2C_CMD */
mbed_official 525:c320967f86b9 166 #define I2C_CMD_CONT (0x1UL << 4) /**< Continue transmission */
mbed_official 525:c320967f86b9 167 #define _I2C_CMD_CONT_SHIFT 4 /**< Shift value for I2C_CONT */
mbed_official 525:c320967f86b9 168 #define _I2C_CMD_CONT_MASK 0x10UL /**< Bit mask for I2C_CONT */
mbed_official 525:c320967f86b9 169 #define _I2C_CMD_CONT_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CMD */
mbed_official 525:c320967f86b9 170 #define I2C_CMD_CONT_DEFAULT (_I2C_CMD_CONT_DEFAULT << 4) /**< Shifted mode DEFAULT for I2C_CMD */
mbed_official 525:c320967f86b9 171 #define I2C_CMD_ABORT (0x1UL << 5) /**< Abort transmission */
mbed_official 525:c320967f86b9 172 #define _I2C_CMD_ABORT_SHIFT 5 /**< Shift value for I2C_ABORT */
mbed_official 525:c320967f86b9 173 #define _I2C_CMD_ABORT_MASK 0x20UL /**< Bit mask for I2C_ABORT */
mbed_official 525:c320967f86b9 174 #define _I2C_CMD_ABORT_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CMD */
mbed_official 525:c320967f86b9 175 #define I2C_CMD_ABORT_DEFAULT (_I2C_CMD_ABORT_DEFAULT << 5) /**< Shifted mode DEFAULT for I2C_CMD */
mbed_official 525:c320967f86b9 176 #define I2C_CMD_CLEARTX (0x1UL << 6) /**< Clear TX */
mbed_official 525:c320967f86b9 177 #define _I2C_CMD_CLEARTX_SHIFT 6 /**< Shift value for I2C_CLEARTX */
mbed_official 525:c320967f86b9 178 #define _I2C_CMD_CLEARTX_MASK 0x40UL /**< Bit mask for I2C_CLEARTX */
mbed_official 525:c320967f86b9 179 #define _I2C_CMD_CLEARTX_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CMD */
mbed_official 525:c320967f86b9 180 #define I2C_CMD_CLEARTX_DEFAULT (_I2C_CMD_CLEARTX_DEFAULT << 6) /**< Shifted mode DEFAULT for I2C_CMD */
mbed_official 525:c320967f86b9 181 #define I2C_CMD_CLEARPC (0x1UL << 7) /**< Clear Pending Commands */
mbed_official 525:c320967f86b9 182 #define _I2C_CMD_CLEARPC_SHIFT 7 /**< Shift value for I2C_CLEARPC */
mbed_official 525:c320967f86b9 183 #define _I2C_CMD_CLEARPC_MASK 0x80UL /**< Bit mask for I2C_CLEARPC */
mbed_official 525:c320967f86b9 184 #define _I2C_CMD_CLEARPC_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CMD */
mbed_official 525:c320967f86b9 185 #define I2C_CMD_CLEARPC_DEFAULT (_I2C_CMD_CLEARPC_DEFAULT << 7) /**< Shifted mode DEFAULT for I2C_CMD */
mbed_official 525:c320967f86b9 186
mbed_official 525:c320967f86b9 187 /* Bit fields for I2C STATE */
mbed_official 525:c320967f86b9 188 #define _I2C_STATE_RESETVALUE 0x00000001UL /**< Default value for I2C_STATE */
mbed_official 525:c320967f86b9 189 #define _I2C_STATE_MASK 0x000000FFUL /**< Mask for I2C_STATE */
mbed_official 525:c320967f86b9 190 #define I2C_STATE_BUSY (0x1UL << 0) /**< Bus Busy */
mbed_official 525:c320967f86b9 191 #define _I2C_STATE_BUSY_SHIFT 0 /**< Shift value for I2C_BUSY */
mbed_official 525:c320967f86b9 192 #define _I2C_STATE_BUSY_MASK 0x1UL /**< Bit mask for I2C_BUSY */
mbed_official 525:c320967f86b9 193 #define _I2C_STATE_BUSY_DEFAULT 0x00000001UL /**< Mode DEFAULT for I2C_STATE */
mbed_official 525:c320967f86b9 194 #define I2C_STATE_BUSY_DEFAULT (_I2C_STATE_BUSY_DEFAULT << 0) /**< Shifted mode DEFAULT for I2C_STATE */
mbed_official 525:c320967f86b9 195 #define I2C_STATE_MASTER (0x1UL << 1) /**< Master */
mbed_official 525:c320967f86b9 196 #define _I2C_STATE_MASTER_SHIFT 1 /**< Shift value for I2C_MASTER */
mbed_official 525:c320967f86b9 197 #define _I2C_STATE_MASTER_MASK 0x2UL /**< Bit mask for I2C_MASTER */
mbed_official 525:c320967f86b9 198 #define _I2C_STATE_MASTER_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_STATE */
mbed_official 525:c320967f86b9 199 #define I2C_STATE_MASTER_DEFAULT (_I2C_STATE_MASTER_DEFAULT << 1) /**< Shifted mode DEFAULT for I2C_STATE */
mbed_official 525:c320967f86b9 200 #define I2C_STATE_TRANSMITTER (0x1UL << 2) /**< Transmitter */
mbed_official 525:c320967f86b9 201 #define _I2C_STATE_TRANSMITTER_SHIFT 2 /**< Shift value for I2C_TRANSMITTER */
mbed_official 525:c320967f86b9 202 #define _I2C_STATE_TRANSMITTER_MASK 0x4UL /**< Bit mask for I2C_TRANSMITTER */
mbed_official 525:c320967f86b9 203 #define _I2C_STATE_TRANSMITTER_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_STATE */
mbed_official 525:c320967f86b9 204 #define I2C_STATE_TRANSMITTER_DEFAULT (_I2C_STATE_TRANSMITTER_DEFAULT << 2) /**< Shifted mode DEFAULT for I2C_STATE */
mbed_official 525:c320967f86b9 205 #define I2C_STATE_NACKED (0x1UL << 3) /**< Nack Received */
mbed_official 525:c320967f86b9 206 #define _I2C_STATE_NACKED_SHIFT 3 /**< Shift value for I2C_NACKED */
mbed_official 525:c320967f86b9 207 #define _I2C_STATE_NACKED_MASK 0x8UL /**< Bit mask for I2C_NACKED */
mbed_official 525:c320967f86b9 208 #define _I2C_STATE_NACKED_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_STATE */
mbed_official 525:c320967f86b9 209 #define I2C_STATE_NACKED_DEFAULT (_I2C_STATE_NACKED_DEFAULT << 3) /**< Shifted mode DEFAULT for I2C_STATE */
mbed_official 525:c320967f86b9 210 #define I2C_STATE_BUSHOLD (0x1UL << 4) /**< Bus Held */
mbed_official 525:c320967f86b9 211 #define _I2C_STATE_BUSHOLD_SHIFT 4 /**< Shift value for I2C_BUSHOLD */
mbed_official 525:c320967f86b9 212 #define _I2C_STATE_BUSHOLD_MASK 0x10UL /**< Bit mask for I2C_BUSHOLD */
mbed_official 525:c320967f86b9 213 #define _I2C_STATE_BUSHOLD_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_STATE */
mbed_official 525:c320967f86b9 214 #define I2C_STATE_BUSHOLD_DEFAULT (_I2C_STATE_BUSHOLD_DEFAULT << 4) /**< Shifted mode DEFAULT for I2C_STATE */
mbed_official 525:c320967f86b9 215 #define _I2C_STATE_STATE_SHIFT 5 /**< Shift value for I2C_STATE */
mbed_official 525:c320967f86b9 216 #define _I2C_STATE_STATE_MASK 0xE0UL /**< Bit mask for I2C_STATE */
mbed_official 525:c320967f86b9 217 #define _I2C_STATE_STATE_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_STATE */
mbed_official 525:c320967f86b9 218 #define _I2C_STATE_STATE_IDLE 0x00000000UL /**< Mode IDLE for I2C_STATE */
mbed_official 525:c320967f86b9 219 #define _I2C_STATE_STATE_WAIT 0x00000001UL /**< Mode WAIT for I2C_STATE */
mbed_official 525:c320967f86b9 220 #define _I2C_STATE_STATE_START 0x00000002UL /**< Mode START for I2C_STATE */
mbed_official 525:c320967f86b9 221 #define _I2C_STATE_STATE_ADDR 0x00000003UL /**< Mode ADDR for I2C_STATE */
mbed_official 525:c320967f86b9 222 #define _I2C_STATE_STATE_ADDRACK 0x00000004UL /**< Mode ADDRACK for I2C_STATE */
mbed_official 525:c320967f86b9 223 #define _I2C_STATE_STATE_DATA 0x00000005UL /**< Mode DATA for I2C_STATE */
mbed_official 525:c320967f86b9 224 #define _I2C_STATE_STATE_DATAACK 0x00000006UL /**< Mode DATAACK for I2C_STATE */
mbed_official 525:c320967f86b9 225 #define I2C_STATE_STATE_DEFAULT (_I2C_STATE_STATE_DEFAULT << 5) /**< Shifted mode DEFAULT for I2C_STATE */
mbed_official 525:c320967f86b9 226 #define I2C_STATE_STATE_IDLE (_I2C_STATE_STATE_IDLE << 5) /**< Shifted mode IDLE for I2C_STATE */
mbed_official 525:c320967f86b9 227 #define I2C_STATE_STATE_WAIT (_I2C_STATE_STATE_WAIT << 5) /**< Shifted mode WAIT for I2C_STATE */
mbed_official 525:c320967f86b9 228 #define I2C_STATE_STATE_START (_I2C_STATE_STATE_START << 5) /**< Shifted mode START for I2C_STATE */
mbed_official 525:c320967f86b9 229 #define I2C_STATE_STATE_ADDR (_I2C_STATE_STATE_ADDR << 5) /**< Shifted mode ADDR for I2C_STATE */
mbed_official 525:c320967f86b9 230 #define I2C_STATE_STATE_ADDRACK (_I2C_STATE_STATE_ADDRACK << 5) /**< Shifted mode ADDRACK for I2C_STATE */
mbed_official 525:c320967f86b9 231 #define I2C_STATE_STATE_DATA (_I2C_STATE_STATE_DATA << 5) /**< Shifted mode DATA for I2C_STATE */
mbed_official 525:c320967f86b9 232 #define I2C_STATE_STATE_DATAACK (_I2C_STATE_STATE_DATAACK << 5) /**< Shifted mode DATAACK for I2C_STATE */
mbed_official 525:c320967f86b9 233
mbed_official 525:c320967f86b9 234 /* Bit fields for I2C STATUS */
mbed_official 525:c320967f86b9 235 #define _I2C_STATUS_RESETVALUE 0x00000080UL /**< Default value for I2C_STATUS */
mbed_official 525:c320967f86b9 236 #define _I2C_STATUS_MASK 0x000001FFUL /**< Mask for I2C_STATUS */
mbed_official 525:c320967f86b9 237 #define I2C_STATUS_PSTART (0x1UL << 0) /**< Pending START */
mbed_official 525:c320967f86b9 238 #define _I2C_STATUS_PSTART_SHIFT 0 /**< Shift value for I2C_PSTART */
mbed_official 525:c320967f86b9 239 #define _I2C_STATUS_PSTART_MASK 0x1UL /**< Bit mask for I2C_PSTART */
mbed_official 525:c320967f86b9 240 #define _I2C_STATUS_PSTART_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_STATUS */
mbed_official 525:c320967f86b9 241 #define I2C_STATUS_PSTART_DEFAULT (_I2C_STATUS_PSTART_DEFAULT << 0) /**< Shifted mode DEFAULT for I2C_STATUS */
mbed_official 525:c320967f86b9 242 #define I2C_STATUS_PSTOP (0x1UL << 1) /**< Pending STOP */
mbed_official 525:c320967f86b9 243 #define _I2C_STATUS_PSTOP_SHIFT 1 /**< Shift value for I2C_PSTOP */
mbed_official 525:c320967f86b9 244 #define _I2C_STATUS_PSTOP_MASK 0x2UL /**< Bit mask for I2C_PSTOP */
mbed_official 525:c320967f86b9 245 #define _I2C_STATUS_PSTOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_STATUS */
mbed_official 525:c320967f86b9 246 #define I2C_STATUS_PSTOP_DEFAULT (_I2C_STATUS_PSTOP_DEFAULT << 1) /**< Shifted mode DEFAULT for I2C_STATUS */
mbed_official 525:c320967f86b9 247 #define I2C_STATUS_PACK (0x1UL << 2) /**< Pending ACK */
mbed_official 525:c320967f86b9 248 #define _I2C_STATUS_PACK_SHIFT 2 /**< Shift value for I2C_PACK */
mbed_official 525:c320967f86b9 249 #define _I2C_STATUS_PACK_MASK 0x4UL /**< Bit mask for I2C_PACK */
mbed_official 525:c320967f86b9 250 #define _I2C_STATUS_PACK_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_STATUS */
mbed_official 525:c320967f86b9 251 #define I2C_STATUS_PACK_DEFAULT (_I2C_STATUS_PACK_DEFAULT << 2) /**< Shifted mode DEFAULT for I2C_STATUS */
mbed_official 525:c320967f86b9 252 #define I2C_STATUS_PNACK (0x1UL << 3) /**< Pending NACK */
mbed_official 525:c320967f86b9 253 #define _I2C_STATUS_PNACK_SHIFT 3 /**< Shift value for I2C_PNACK */
mbed_official 525:c320967f86b9 254 #define _I2C_STATUS_PNACK_MASK 0x8UL /**< Bit mask for I2C_PNACK */
mbed_official 525:c320967f86b9 255 #define _I2C_STATUS_PNACK_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_STATUS */
mbed_official 525:c320967f86b9 256 #define I2C_STATUS_PNACK_DEFAULT (_I2C_STATUS_PNACK_DEFAULT << 3) /**< Shifted mode DEFAULT for I2C_STATUS */
mbed_official 525:c320967f86b9 257 #define I2C_STATUS_PCONT (0x1UL << 4) /**< Pending continue */
mbed_official 525:c320967f86b9 258 #define _I2C_STATUS_PCONT_SHIFT 4 /**< Shift value for I2C_PCONT */
mbed_official 525:c320967f86b9 259 #define _I2C_STATUS_PCONT_MASK 0x10UL /**< Bit mask for I2C_PCONT */
mbed_official 525:c320967f86b9 260 #define _I2C_STATUS_PCONT_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_STATUS */
mbed_official 525:c320967f86b9 261 #define I2C_STATUS_PCONT_DEFAULT (_I2C_STATUS_PCONT_DEFAULT << 4) /**< Shifted mode DEFAULT for I2C_STATUS */
mbed_official 525:c320967f86b9 262 #define I2C_STATUS_PABORT (0x1UL << 5) /**< Pending abort */
mbed_official 525:c320967f86b9 263 #define _I2C_STATUS_PABORT_SHIFT 5 /**< Shift value for I2C_PABORT */
mbed_official 525:c320967f86b9 264 #define _I2C_STATUS_PABORT_MASK 0x20UL /**< Bit mask for I2C_PABORT */
mbed_official 525:c320967f86b9 265 #define _I2C_STATUS_PABORT_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_STATUS */
mbed_official 525:c320967f86b9 266 #define I2C_STATUS_PABORT_DEFAULT (_I2C_STATUS_PABORT_DEFAULT << 5) /**< Shifted mode DEFAULT for I2C_STATUS */
mbed_official 525:c320967f86b9 267 #define I2C_STATUS_TXC (0x1UL << 6) /**< TX Complete */
mbed_official 525:c320967f86b9 268 #define _I2C_STATUS_TXC_SHIFT 6 /**< Shift value for I2C_TXC */
mbed_official 525:c320967f86b9 269 #define _I2C_STATUS_TXC_MASK 0x40UL /**< Bit mask for I2C_TXC */
mbed_official 525:c320967f86b9 270 #define _I2C_STATUS_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_STATUS */
mbed_official 525:c320967f86b9 271 #define I2C_STATUS_TXC_DEFAULT (_I2C_STATUS_TXC_DEFAULT << 6) /**< Shifted mode DEFAULT for I2C_STATUS */
mbed_official 525:c320967f86b9 272 #define I2C_STATUS_TXBL (0x1UL << 7) /**< TX Buffer Level */
mbed_official 525:c320967f86b9 273 #define _I2C_STATUS_TXBL_SHIFT 7 /**< Shift value for I2C_TXBL */
mbed_official 525:c320967f86b9 274 #define _I2C_STATUS_TXBL_MASK 0x80UL /**< Bit mask for I2C_TXBL */
mbed_official 525:c320967f86b9 275 #define _I2C_STATUS_TXBL_DEFAULT 0x00000001UL /**< Mode DEFAULT for I2C_STATUS */
mbed_official 525:c320967f86b9 276 #define I2C_STATUS_TXBL_DEFAULT (_I2C_STATUS_TXBL_DEFAULT << 7) /**< Shifted mode DEFAULT for I2C_STATUS */
mbed_official 525:c320967f86b9 277 #define I2C_STATUS_RXDATAV (0x1UL << 8) /**< RX Data Valid */
mbed_official 525:c320967f86b9 278 #define _I2C_STATUS_RXDATAV_SHIFT 8 /**< Shift value for I2C_RXDATAV */
mbed_official 525:c320967f86b9 279 #define _I2C_STATUS_RXDATAV_MASK 0x100UL /**< Bit mask for I2C_RXDATAV */
mbed_official 525:c320967f86b9 280 #define _I2C_STATUS_RXDATAV_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_STATUS */
mbed_official 525:c320967f86b9 281 #define I2C_STATUS_RXDATAV_DEFAULT (_I2C_STATUS_RXDATAV_DEFAULT << 8) /**< Shifted mode DEFAULT for I2C_STATUS */
mbed_official 525:c320967f86b9 282
mbed_official 525:c320967f86b9 283 /* Bit fields for I2C CLKDIV */
mbed_official 525:c320967f86b9 284 #define _I2C_CLKDIV_RESETVALUE 0x00000000UL /**< Default value for I2C_CLKDIV */
mbed_official 525:c320967f86b9 285 #define _I2C_CLKDIV_MASK 0x000001FFUL /**< Mask for I2C_CLKDIV */
mbed_official 525:c320967f86b9 286 #define _I2C_CLKDIV_DIV_SHIFT 0 /**< Shift value for I2C_DIV */
mbed_official 525:c320967f86b9 287 #define _I2C_CLKDIV_DIV_MASK 0x1FFUL /**< Bit mask for I2C_DIV */
mbed_official 525:c320967f86b9 288 #define _I2C_CLKDIV_DIV_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_CLKDIV */
mbed_official 525:c320967f86b9 289 #define I2C_CLKDIV_DIV_DEFAULT (_I2C_CLKDIV_DIV_DEFAULT << 0) /**< Shifted mode DEFAULT for I2C_CLKDIV */
mbed_official 525:c320967f86b9 290
mbed_official 525:c320967f86b9 291 /* Bit fields for I2C SADDR */
mbed_official 525:c320967f86b9 292 #define _I2C_SADDR_RESETVALUE 0x00000000UL /**< Default value for I2C_SADDR */
mbed_official 525:c320967f86b9 293 #define _I2C_SADDR_MASK 0x000000FEUL /**< Mask for I2C_SADDR */
mbed_official 525:c320967f86b9 294 #define _I2C_SADDR_ADDR_SHIFT 1 /**< Shift value for I2C_ADDR */
mbed_official 525:c320967f86b9 295 #define _I2C_SADDR_ADDR_MASK 0xFEUL /**< Bit mask for I2C_ADDR */
mbed_official 525:c320967f86b9 296 #define _I2C_SADDR_ADDR_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_SADDR */
mbed_official 525:c320967f86b9 297 #define I2C_SADDR_ADDR_DEFAULT (_I2C_SADDR_ADDR_DEFAULT << 1) /**< Shifted mode DEFAULT for I2C_SADDR */
mbed_official 525:c320967f86b9 298
mbed_official 525:c320967f86b9 299 /* Bit fields for I2C SADDRMASK */
mbed_official 525:c320967f86b9 300 #define _I2C_SADDRMASK_RESETVALUE 0x00000000UL /**< Default value for I2C_SADDRMASK */
mbed_official 525:c320967f86b9 301 #define _I2C_SADDRMASK_MASK 0x000000FEUL /**< Mask for I2C_SADDRMASK */
mbed_official 525:c320967f86b9 302 #define _I2C_SADDRMASK_MASK_SHIFT 1 /**< Shift value for I2C_MASK */
mbed_official 525:c320967f86b9 303 #define _I2C_SADDRMASK_MASK_MASK 0xFEUL /**< Bit mask for I2C_MASK */
mbed_official 525:c320967f86b9 304 #define _I2C_SADDRMASK_MASK_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_SADDRMASK */
mbed_official 525:c320967f86b9 305 #define I2C_SADDRMASK_MASK_DEFAULT (_I2C_SADDRMASK_MASK_DEFAULT << 1) /**< Shifted mode DEFAULT for I2C_SADDRMASK */
mbed_official 525:c320967f86b9 306
mbed_official 525:c320967f86b9 307 /* Bit fields for I2C RXDATA */
mbed_official 525:c320967f86b9 308 #define _I2C_RXDATA_RESETVALUE 0x00000000UL /**< Default value for I2C_RXDATA */
mbed_official 525:c320967f86b9 309 #define _I2C_RXDATA_MASK 0x000000FFUL /**< Mask for I2C_RXDATA */
mbed_official 525:c320967f86b9 310 #define _I2C_RXDATA_RXDATA_SHIFT 0 /**< Shift value for I2C_RXDATA */
mbed_official 525:c320967f86b9 311 #define _I2C_RXDATA_RXDATA_MASK 0xFFUL /**< Bit mask for I2C_RXDATA */
mbed_official 525:c320967f86b9 312 #define _I2C_RXDATA_RXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_RXDATA */
mbed_official 525:c320967f86b9 313 #define I2C_RXDATA_RXDATA_DEFAULT (_I2C_RXDATA_RXDATA_DEFAULT << 0) /**< Shifted mode DEFAULT for I2C_RXDATA */
mbed_official 525:c320967f86b9 314
mbed_official 525:c320967f86b9 315 /* Bit fields for I2C RXDATAP */
mbed_official 525:c320967f86b9 316 #define _I2C_RXDATAP_RESETVALUE 0x00000000UL /**< Default value for I2C_RXDATAP */
mbed_official 525:c320967f86b9 317 #define _I2C_RXDATAP_MASK 0x000000FFUL /**< Mask for I2C_RXDATAP */
mbed_official 525:c320967f86b9 318 #define _I2C_RXDATAP_RXDATAP_SHIFT 0 /**< Shift value for I2C_RXDATAP */
mbed_official 525:c320967f86b9 319 #define _I2C_RXDATAP_RXDATAP_MASK 0xFFUL /**< Bit mask for I2C_RXDATAP */
mbed_official 525:c320967f86b9 320 #define _I2C_RXDATAP_RXDATAP_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_RXDATAP */
mbed_official 525:c320967f86b9 321 #define I2C_RXDATAP_RXDATAP_DEFAULT (_I2C_RXDATAP_RXDATAP_DEFAULT << 0) /**< Shifted mode DEFAULT for I2C_RXDATAP */
mbed_official 525:c320967f86b9 322
mbed_official 525:c320967f86b9 323 /* Bit fields for I2C TXDATA */
mbed_official 525:c320967f86b9 324 #define _I2C_TXDATA_RESETVALUE 0x00000000UL /**< Default value for I2C_TXDATA */
mbed_official 525:c320967f86b9 325 #define _I2C_TXDATA_MASK 0x000000FFUL /**< Mask for I2C_TXDATA */
mbed_official 525:c320967f86b9 326 #define _I2C_TXDATA_TXDATA_SHIFT 0 /**< Shift value for I2C_TXDATA */
mbed_official 525:c320967f86b9 327 #define _I2C_TXDATA_TXDATA_MASK 0xFFUL /**< Bit mask for I2C_TXDATA */
mbed_official 525:c320967f86b9 328 #define _I2C_TXDATA_TXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_TXDATA */
mbed_official 525:c320967f86b9 329 #define I2C_TXDATA_TXDATA_DEFAULT (_I2C_TXDATA_TXDATA_DEFAULT << 0) /**< Shifted mode DEFAULT for I2C_TXDATA */
mbed_official 525:c320967f86b9 330
mbed_official 525:c320967f86b9 331 /* Bit fields for I2C IF */
mbed_official 525:c320967f86b9 332 #define _I2C_IF_RESETVALUE 0x00000010UL /**< Default value for I2C_IF */
mbed_official 525:c320967f86b9 333 #define _I2C_IF_MASK 0x0001FFFFUL /**< Mask for I2C_IF */
mbed_official 525:c320967f86b9 334 #define I2C_IF_START (0x1UL << 0) /**< START condition Interrupt Flag */
mbed_official 525:c320967f86b9 335 #define _I2C_IF_START_SHIFT 0 /**< Shift value for I2C_START */
mbed_official 525:c320967f86b9 336 #define _I2C_IF_START_MASK 0x1UL /**< Bit mask for I2C_START */
mbed_official 525:c320967f86b9 337 #define _I2C_IF_START_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 338 #define I2C_IF_START_DEFAULT (_I2C_IF_START_DEFAULT << 0) /**< Shifted mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 339 #define I2C_IF_RSTART (0x1UL << 1) /**< Repeated START condition Interrupt Flag */
mbed_official 525:c320967f86b9 340 #define _I2C_IF_RSTART_SHIFT 1 /**< Shift value for I2C_RSTART */
mbed_official 525:c320967f86b9 341 #define _I2C_IF_RSTART_MASK 0x2UL /**< Bit mask for I2C_RSTART */
mbed_official 525:c320967f86b9 342 #define _I2C_IF_RSTART_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 343 #define I2C_IF_RSTART_DEFAULT (_I2C_IF_RSTART_DEFAULT << 1) /**< Shifted mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 344 #define I2C_IF_ADDR (0x1UL << 2) /**< Address Interrupt Flag */
mbed_official 525:c320967f86b9 345 #define _I2C_IF_ADDR_SHIFT 2 /**< Shift value for I2C_ADDR */
mbed_official 525:c320967f86b9 346 #define _I2C_IF_ADDR_MASK 0x4UL /**< Bit mask for I2C_ADDR */
mbed_official 525:c320967f86b9 347 #define _I2C_IF_ADDR_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 348 #define I2C_IF_ADDR_DEFAULT (_I2C_IF_ADDR_DEFAULT << 2) /**< Shifted mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 349 #define I2C_IF_TXC (0x1UL << 3) /**< Transfer Completed Interrupt Flag */
mbed_official 525:c320967f86b9 350 #define _I2C_IF_TXC_SHIFT 3 /**< Shift value for I2C_TXC */
mbed_official 525:c320967f86b9 351 #define _I2C_IF_TXC_MASK 0x8UL /**< Bit mask for I2C_TXC */
mbed_official 525:c320967f86b9 352 #define _I2C_IF_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 353 #define I2C_IF_TXC_DEFAULT (_I2C_IF_TXC_DEFAULT << 3) /**< Shifted mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 354 #define I2C_IF_TXBL (0x1UL << 4) /**< Transmit Buffer Level Interrupt Flag */
mbed_official 525:c320967f86b9 355 #define _I2C_IF_TXBL_SHIFT 4 /**< Shift value for I2C_TXBL */
mbed_official 525:c320967f86b9 356 #define _I2C_IF_TXBL_MASK 0x10UL /**< Bit mask for I2C_TXBL */
mbed_official 525:c320967f86b9 357 #define _I2C_IF_TXBL_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 358 #define I2C_IF_TXBL_DEFAULT (_I2C_IF_TXBL_DEFAULT << 4) /**< Shifted mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 359 #define I2C_IF_RXDATAV (0x1UL << 5) /**< Receive Data Valid Interrupt Flag */
mbed_official 525:c320967f86b9 360 #define _I2C_IF_RXDATAV_SHIFT 5 /**< Shift value for I2C_RXDATAV */
mbed_official 525:c320967f86b9 361 #define _I2C_IF_RXDATAV_MASK 0x20UL /**< Bit mask for I2C_RXDATAV */
mbed_official 525:c320967f86b9 362 #define _I2C_IF_RXDATAV_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 363 #define I2C_IF_RXDATAV_DEFAULT (_I2C_IF_RXDATAV_DEFAULT << 5) /**< Shifted mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 364 #define I2C_IF_ACK (0x1UL << 6) /**< Acknowledge Received Interrupt Flag */
mbed_official 525:c320967f86b9 365 #define _I2C_IF_ACK_SHIFT 6 /**< Shift value for I2C_ACK */
mbed_official 525:c320967f86b9 366 #define _I2C_IF_ACK_MASK 0x40UL /**< Bit mask for I2C_ACK */
mbed_official 525:c320967f86b9 367 #define _I2C_IF_ACK_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 368 #define I2C_IF_ACK_DEFAULT (_I2C_IF_ACK_DEFAULT << 6) /**< Shifted mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 369 #define I2C_IF_NACK (0x1UL << 7) /**< Not Acknowledge Received Interrupt Flag */
mbed_official 525:c320967f86b9 370 #define _I2C_IF_NACK_SHIFT 7 /**< Shift value for I2C_NACK */
mbed_official 525:c320967f86b9 371 #define _I2C_IF_NACK_MASK 0x80UL /**< Bit mask for I2C_NACK */
mbed_official 525:c320967f86b9 372 #define _I2C_IF_NACK_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 373 #define I2C_IF_NACK_DEFAULT (_I2C_IF_NACK_DEFAULT << 7) /**< Shifted mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 374 #define I2C_IF_MSTOP (0x1UL << 8) /**< Master STOP Condition Interrupt Flag */
mbed_official 525:c320967f86b9 375 #define _I2C_IF_MSTOP_SHIFT 8 /**< Shift value for I2C_MSTOP */
mbed_official 525:c320967f86b9 376 #define _I2C_IF_MSTOP_MASK 0x100UL /**< Bit mask for I2C_MSTOP */
mbed_official 525:c320967f86b9 377 #define _I2C_IF_MSTOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 378 #define I2C_IF_MSTOP_DEFAULT (_I2C_IF_MSTOP_DEFAULT << 8) /**< Shifted mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 379 #define I2C_IF_ARBLOST (0x1UL << 9) /**< Arbitration Lost Interrupt Flag */
mbed_official 525:c320967f86b9 380 #define _I2C_IF_ARBLOST_SHIFT 9 /**< Shift value for I2C_ARBLOST */
mbed_official 525:c320967f86b9 381 #define _I2C_IF_ARBLOST_MASK 0x200UL /**< Bit mask for I2C_ARBLOST */
mbed_official 525:c320967f86b9 382 #define _I2C_IF_ARBLOST_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 383 #define I2C_IF_ARBLOST_DEFAULT (_I2C_IF_ARBLOST_DEFAULT << 9) /**< Shifted mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 384 #define I2C_IF_BUSERR (0x1UL << 10) /**< Bus Error Interrupt Flag */
mbed_official 525:c320967f86b9 385 #define _I2C_IF_BUSERR_SHIFT 10 /**< Shift value for I2C_BUSERR */
mbed_official 525:c320967f86b9 386 #define _I2C_IF_BUSERR_MASK 0x400UL /**< Bit mask for I2C_BUSERR */
mbed_official 525:c320967f86b9 387 #define _I2C_IF_BUSERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 388 #define I2C_IF_BUSERR_DEFAULT (_I2C_IF_BUSERR_DEFAULT << 10) /**< Shifted mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 389 #define I2C_IF_BUSHOLD (0x1UL << 11) /**< Bus Held Interrupt Flag */
mbed_official 525:c320967f86b9 390 #define _I2C_IF_BUSHOLD_SHIFT 11 /**< Shift value for I2C_BUSHOLD */
mbed_official 525:c320967f86b9 391 #define _I2C_IF_BUSHOLD_MASK 0x800UL /**< Bit mask for I2C_BUSHOLD */
mbed_official 525:c320967f86b9 392 #define _I2C_IF_BUSHOLD_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 393 #define I2C_IF_BUSHOLD_DEFAULT (_I2C_IF_BUSHOLD_DEFAULT << 11) /**< Shifted mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 394 #define I2C_IF_TXOF (0x1UL << 12) /**< Transmit Buffer Overflow Interrupt Flag */
mbed_official 525:c320967f86b9 395 #define _I2C_IF_TXOF_SHIFT 12 /**< Shift value for I2C_TXOF */
mbed_official 525:c320967f86b9 396 #define _I2C_IF_TXOF_MASK 0x1000UL /**< Bit mask for I2C_TXOF */
mbed_official 525:c320967f86b9 397 #define _I2C_IF_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 398 #define I2C_IF_TXOF_DEFAULT (_I2C_IF_TXOF_DEFAULT << 12) /**< Shifted mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 399 #define I2C_IF_RXUF (0x1UL << 13) /**< Receive Buffer Underflow Interrupt Flag */
mbed_official 525:c320967f86b9 400 #define _I2C_IF_RXUF_SHIFT 13 /**< Shift value for I2C_RXUF */
mbed_official 525:c320967f86b9 401 #define _I2C_IF_RXUF_MASK 0x2000UL /**< Bit mask for I2C_RXUF */
mbed_official 525:c320967f86b9 402 #define _I2C_IF_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 403 #define I2C_IF_RXUF_DEFAULT (_I2C_IF_RXUF_DEFAULT << 13) /**< Shifted mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 404 #define I2C_IF_BITO (0x1UL << 14) /**< Bus Idle Timeout Interrupt Flag */
mbed_official 525:c320967f86b9 405 #define _I2C_IF_BITO_SHIFT 14 /**< Shift value for I2C_BITO */
mbed_official 525:c320967f86b9 406 #define _I2C_IF_BITO_MASK 0x4000UL /**< Bit mask for I2C_BITO */
mbed_official 525:c320967f86b9 407 #define _I2C_IF_BITO_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 408 #define I2C_IF_BITO_DEFAULT (_I2C_IF_BITO_DEFAULT << 14) /**< Shifted mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 409 #define I2C_IF_CLTO (0x1UL << 15) /**< Clock Low Timeout Interrupt Flag */
mbed_official 525:c320967f86b9 410 #define _I2C_IF_CLTO_SHIFT 15 /**< Shift value for I2C_CLTO */
mbed_official 525:c320967f86b9 411 #define _I2C_IF_CLTO_MASK 0x8000UL /**< Bit mask for I2C_CLTO */
mbed_official 525:c320967f86b9 412 #define _I2C_IF_CLTO_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 413 #define I2C_IF_CLTO_DEFAULT (_I2C_IF_CLTO_DEFAULT << 15) /**< Shifted mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 414 #define I2C_IF_SSTOP (0x1UL << 16) /**< Slave STOP condition Interrupt Flag */
mbed_official 525:c320967f86b9 415 #define _I2C_IF_SSTOP_SHIFT 16 /**< Shift value for I2C_SSTOP */
mbed_official 525:c320967f86b9 416 #define _I2C_IF_SSTOP_MASK 0x10000UL /**< Bit mask for I2C_SSTOP */
mbed_official 525:c320967f86b9 417 #define _I2C_IF_SSTOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 418 #define I2C_IF_SSTOP_DEFAULT (_I2C_IF_SSTOP_DEFAULT << 16) /**< Shifted mode DEFAULT for I2C_IF */
mbed_official 525:c320967f86b9 419
mbed_official 525:c320967f86b9 420 /* Bit fields for I2C IFS */
mbed_official 525:c320967f86b9 421 #define _I2C_IFS_RESETVALUE 0x00000000UL /**< Default value for I2C_IFS */
mbed_official 525:c320967f86b9 422 #define _I2C_IFS_MASK 0x0001FFCFUL /**< Mask for I2C_IFS */
mbed_official 525:c320967f86b9 423 #define I2C_IFS_START (0x1UL << 0) /**< Set START Interrupt Flag */
mbed_official 525:c320967f86b9 424 #define _I2C_IFS_START_SHIFT 0 /**< Shift value for I2C_START */
mbed_official 525:c320967f86b9 425 #define _I2C_IFS_START_MASK 0x1UL /**< Bit mask for I2C_START */
mbed_official 525:c320967f86b9 426 #define _I2C_IFS_START_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFS */
mbed_official 525:c320967f86b9 427 #define I2C_IFS_START_DEFAULT (_I2C_IFS_START_DEFAULT << 0) /**< Shifted mode DEFAULT for I2C_IFS */
mbed_official 525:c320967f86b9 428 #define I2C_IFS_RSTART (0x1UL << 1) /**< Set Repeated START Interrupt Flag */
mbed_official 525:c320967f86b9 429 #define _I2C_IFS_RSTART_SHIFT 1 /**< Shift value for I2C_RSTART */
mbed_official 525:c320967f86b9 430 #define _I2C_IFS_RSTART_MASK 0x2UL /**< Bit mask for I2C_RSTART */
mbed_official 525:c320967f86b9 431 #define _I2C_IFS_RSTART_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFS */
mbed_official 525:c320967f86b9 432 #define I2C_IFS_RSTART_DEFAULT (_I2C_IFS_RSTART_DEFAULT << 1) /**< Shifted mode DEFAULT for I2C_IFS */
mbed_official 525:c320967f86b9 433 #define I2C_IFS_ADDR (0x1UL << 2) /**< Set Address Interrupt Flag */
mbed_official 525:c320967f86b9 434 #define _I2C_IFS_ADDR_SHIFT 2 /**< Shift value for I2C_ADDR */
mbed_official 525:c320967f86b9 435 #define _I2C_IFS_ADDR_MASK 0x4UL /**< Bit mask for I2C_ADDR */
mbed_official 525:c320967f86b9 436 #define _I2C_IFS_ADDR_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFS */
mbed_official 525:c320967f86b9 437 #define I2C_IFS_ADDR_DEFAULT (_I2C_IFS_ADDR_DEFAULT << 2) /**< Shifted mode DEFAULT for I2C_IFS */
mbed_official 525:c320967f86b9 438 #define I2C_IFS_TXC (0x1UL << 3) /**< Set Transfer Completed Interrupt Flag */
mbed_official 525:c320967f86b9 439 #define _I2C_IFS_TXC_SHIFT 3 /**< Shift value for I2C_TXC */
mbed_official 525:c320967f86b9 440 #define _I2C_IFS_TXC_MASK 0x8UL /**< Bit mask for I2C_TXC */
mbed_official 525:c320967f86b9 441 #define _I2C_IFS_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFS */
mbed_official 525:c320967f86b9 442 #define I2C_IFS_TXC_DEFAULT (_I2C_IFS_TXC_DEFAULT << 3) /**< Shifted mode DEFAULT for I2C_IFS */
mbed_official 525:c320967f86b9 443 #define I2C_IFS_ACK (0x1UL << 6) /**< Set Acknowledge Received Interrupt Flag */
mbed_official 525:c320967f86b9 444 #define _I2C_IFS_ACK_SHIFT 6 /**< Shift value for I2C_ACK */
mbed_official 525:c320967f86b9 445 #define _I2C_IFS_ACK_MASK 0x40UL /**< Bit mask for I2C_ACK */
mbed_official 525:c320967f86b9 446 #define _I2C_IFS_ACK_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFS */
mbed_official 525:c320967f86b9 447 #define I2C_IFS_ACK_DEFAULT (_I2C_IFS_ACK_DEFAULT << 6) /**< Shifted mode DEFAULT for I2C_IFS */
mbed_official 525:c320967f86b9 448 #define I2C_IFS_NACK (0x1UL << 7) /**< Set Not Acknowledge Received Interrupt Flag */
mbed_official 525:c320967f86b9 449 #define _I2C_IFS_NACK_SHIFT 7 /**< Shift value for I2C_NACK */
mbed_official 525:c320967f86b9 450 #define _I2C_IFS_NACK_MASK 0x80UL /**< Bit mask for I2C_NACK */
mbed_official 525:c320967f86b9 451 #define _I2C_IFS_NACK_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFS */
mbed_official 525:c320967f86b9 452 #define I2C_IFS_NACK_DEFAULT (_I2C_IFS_NACK_DEFAULT << 7) /**< Shifted mode DEFAULT for I2C_IFS */
mbed_official 525:c320967f86b9 453 #define I2C_IFS_MSTOP (0x1UL << 8) /**< Set MSTOP Interrupt Flag */
mbed_official 525:c320967f86b9 454 #define _I2C_IFS_MSTOP_SHIFT 8 /**< Shift value for I2C_MSTOP */
mbed_official 525:c320967f86b9 455 #define _I2C_IFS_MSTOP_MASK 0x100UL /**< Bit mask for I2C_MSTOP */
mbed_official 525:c320967f86b9 456 #define _I2C_IFS_MSTOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFS */
mbed_official 525:c320967f86b9 457 #define I2C_IFS_MSTOP_DEFAULT (_I2C_IFS_MSTOP_DEFAULT << 8) /**< Shifted mode DEFAULT for I2C_IFS */
mbed_official 525:c320967f86b9 458 #define I2C_IFS_ARBLOST (0x1UL << 9) /**< Set Arbitration Lost Interrupt Flag */
mbed_official 525:c320967f86b9 459 #define _I2C_IFS_ARBLOST_SHIFT 9 /**< Shift value for I2C_ARBLOST */
mbed_official 525:c320967f86b9 460 #define _I2C_IFS_ARBLOST_MASK 0x200UL /**< Bit mask for I2C_ARBLOST */
mbed_official 525:c320967f86b9 461 #define _I2C_IFS_ARBLOST_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFS */
mbed_official 525:c320967f86b9 462 #define I2C_IFS_ARBLOST_DEFAULT (_I2C_IFS_ARBLOST_DEFAULT << 9) /**< Shifted mode DEFAULT for I2C_IFS */
mbed_official 525:c320967f86b9 463 #define I2C_IFS_BUSERR (0x1UL << 10) /**< Set Bus Error Interrupt Flag */
mbed_official 525:c320967f86b9 464 #define _I2C_IFS_BUSERR_SHIFT 10 /**< Shift value for I2C_BUSERR */
mbed_official 525:c320967f86b9 465 #define _I2C_IFS_BUSERR_MASK 0x400UL /**< Bit mask for I2C_BUSERR */
mbed_official 525:c320967f86b9 466 #define _I2C_IFS_BUSERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFS */
mbed_official 525:c320967f86b9 467 #define I2C_IFS_BUSERR_DEFAULT (_I2C_IFS_BUSERR_DEFAULT << 10) /**< Shifted mode DEFAULT for I2C_IFS */
mbed_official 525:c320967f86b9 468 #define I2C_IFS_BUSHOLD (0x1UL << 11) /**< Set Bus Held Interrupt Flag */
mbed_official 525:c320967f86b9 469 #define _I2C_IFS_BUSHOLD_SHIFT 11 /**< Shift value for I2C_BUSHOLD */
mbed_official 525:c320967f86b9 470 #define _I2C_IFS_BUSHOLD_MASK 0x800UL /**< Bit mask for I2C_BUSHOLD */
mbed_official 525:c320967f86b9 471 #define _I2C_IFS_BUSHOLD_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFS */
mbed_official 525:c320967f86b9 472 #define I2C_IFS_BUSHOLD_DEFAULT (_I2C_IFS_BUSHOLD_DEFAULT << 11) /**< Shifted mode DEFAULT for I2C_IFS */
mbed_official 525:c320967f86b9 473 #define I2C_IFS_TXOF (0x1UL << 12) /**< Set Transmit Buffer Overflow Interrupt Flag */
mbed_official 525:c320967f86b9 474 #define _I2C_IFS_TXOF_SHIFT 12 /**< Shift value for I2C_TXOF */
mbed_official 525:c320967f86b9 475 #define _I2C_IFS_TXOF_MASK 0x1000UL /**< Bit mask for I2C_TXOF */
mbed_official 525:c320967f86b9 476 #define _I2C_IFS_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFS */
mbed_official 525:c320967f86b9 477 #define I2C_IFS_TXOF_DEFAULT (_I2C_IFS_TXOF_DEFAULT << 12) /**< Shifted mode DEFAULT for I2C_IFS */
mbed_official 525:c320967f86b9 478 #define I2C_IFS_RXUF (0x1UL << 13) /**< Set Receive Buffer Underflow Interrupt Flag */
mbed_official 525:c320967f86b9 479 #define _I2C_IFS_RXUF_SHIFT 13 /**< Shift value for I2C_RXUF */
mbed_official 525:c320967f86b9 480 #define _I2C_IFS_RXUF_MASK 0x2000UL /**< Bit mask for I2C_RXUF */
mbed_official 525:c320967f86b9 481 #define _I2C_IFS_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFS */
mbed_official 525:c320967f86b9 482 #define I2C_IFS_RXUF_DEFAULT (_I2C_IFS_RXUF_DEFAULT << 13) /**< Shifted mode DEFAULT for I2C_IFS */
mbed_official 525:c320967f86b9 483 #define I2C_IFS_BITO (0x1UL << 14) /**< Set Bus Idle Timeout Interrupt Flag */
mbed_official 525:c320967f86b9 484 #define _I2C_IFS_BITO_SHIFT 14 /**< Shift value for I2C_BITO */
mbed_official 525:c320967f86b9 485 #define _I2C_IFS_BITO_MASK 0x4000UL /**< Bit mask for I2C_BITO */
mbed_official 525:c320967f86b9 486 #define _I2C_IFS_BITO_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFS */
mbed_official 525:c320967f86b9 487 #define I2C_IFS_BITO_DEFAULT (_I2C_IFS_BITO_DEFAULT << 14) /**< Shifted mode DEFAULT for I2C_IFS */
mbed_official 525:c320967f86b9 488 #define I2C_IFS_CLTO (0x1UL << 15) /**< Set Clock Low Interrupt Flag */
mbed_official 525:c320967f86b9 489 #define _I2C_IFS_CLTO_SHIFT 15 /**< Shift value for I2C_CLTO */
mbed_official 525:c320967f86b9 490 #define _I2C_IFS_CLTO_MASK 0x8000UL /**< Bit mask for I2C_CLTO */
mbed_official 525:c320967f86b9 491 #define _I2C_IFS_CLTO_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFS */
mbed_official 525:c320967f86b9 492 #define I2C_IFS_CLTO_DEFAULT (_I2C_IFS_CLTO_DEFAULT << 15) /**< Shifted mode DEFAULT for I2C_IFS */
mbed_official 525:c320967f86b9 493 #define I2C_IFS_SSTOP (0x1UL << 16) /**< Set SSTOP Interrupt Flag */
mbed_official 525:c320967f86b9 494 #define _I2C_IFS_SSTOP_SHIFT 16 /**< Shift value for I2C_SSTOP */
mbed_official 525:c320967f86b9 495 #define _I2C_IFS_SSTOP_MASK 0x10000UL /**< Bit mask for I2C_SSTOP */
mbed_official 525:c320967f86b9 496 #define _I2C_IFS_SSTOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFS */
mbed_official 525:c320967f86b9 497 #define I2C_IFS_SSTOP_DEFAULT (_I2C_IFS_SSTOP_DEFAULT << 16) /**< Shifted mode DEFAULT for I2C_IFS */
mbed_official 525:c320967f86b9 498
mbed_official 525:c320967f86b9 499 /* Bit fields for I2C IFC */
mbed_official 525:c320967f86b9 500 #define _I2C_IFC_RESETVALUE 0x00000000UL /**< Default value for I2C_IFC */
mbed_official 525:c320967f86b9 501 #define _I2C_IFC_MASK 0x0001FFCFUL /**< Mask for I2C_IFC */
mbed_official 525:c320967f86b9 502 #define I2C_IFC_START (0x1UL << 0) /**< Clear START Interrupt Flag */
mbed_official 525:c320967f86b9 503 #define _I2C_IFC_START_SHIFT 0 /**< Shift value for I2C_START */
mbed_official 525:c320967f86b9 504 #define _I2C_IFC_START_MASK 0x1UL /**< Bit mask for I2C_START */
mbed_official 525:c320967f86b9 505 #define _I2C_IFC_START_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFC */
mbed_official 525:c320967f86b9 506 #define I2C_IFC_START_DEFAULT (_I2C_IFC_START_DEFAULT << 0) /**< Shifted mode DEFAULT for I2C_IFC */
mbed_official 525:c320967f86b9 507 #define I2C_IFC_RSTART (0x1UL << 1) /**< Clear Repeated START Interrupt Flag */
mbed_official 525:c320967f86b9 508 #define _I2C_IFC_RSTART_SHIFT 1 /**< Shift value for I2C_RSTART */
mbed_official 525:c320967f86b9 509 #define _I2C_IFC_RSTART_MASK 0x2UL /**< Bit mask for I2C_RSTART */
mbed_official 525:c320967f86b9 510 #define _I2C_IFC_RSTART_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFC */
mbed_official 525:c320967f86b9 511 #define I2C_IFC_RSTART_DEFAULT (_I2C_IFC_RSTART_DEFAULT << 1) /**< Shifted mode DEFAULT for I2C_IFC */
mbed_official 525:c320967f86b9 512 #define I2C_IFC_ADDR (0x1UL << 2) /**< Clear Address Interrupt Flag */
mbed_official 525:c320967f86b9 513 #define _I2C_IFC_ADDR_SHIFT 2 /**< Shift value for I2C_ADDR */
mbed_official 525:c320967f86b9 514 #define _I2C_IFC_ADDR_MASK 0x4UL /**< Bit mask for I2C_ADDR */
mbed_official 525:c320967f86b9 515 #define _I2C_IFC_ADDR_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFC */
mbed_official 525:c320967f86b9 516 #define I2C_IFC_ADDR_DEFAULT (_I2C_IFC_ADDR_DEFAULT << 2) /**< Shifted mode DEFAULT for I2C_IFC */
mbed_official 525:c320967f86b9 517 #define I2C_IFC_TXC (0x1UL << 3) /**< Clear Transfer Completed Interrupt Flag */
mbed_official 525:c320967f86b9 518 #define _I2C_IFC_TXC_SHIFT 3 /**< Shift value for I2C_TXC */
mbed_official 525:c320967f86b9 519 #define _I2C_IFC_TXC_MASK 0x8UL /**< Bit mask for I2C_TXC */
mbed_official 525:c320967f86b9 520 #define _I2C_IFC_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFC */
mbed_official 525:c320967f86b9 521 #define I2C_IFC_TXC_DEFAULT (_I2C_IFC_TXC_DEFAULT << 3) /**< Shifted mode DEFAULT for I2C_IFC */
mbed_official 525:c320967f86b9 522 #define I2C_IFC_ACK (0x1UL << 6) /**< Clear Acknowledge Received Interrupt Flag */
mbed_official 525:c320967f86b9 523 #define _I2C_IFC_ACK_SHIFT 6 /**< Shift value for I2C_ACK */
mbed_official 525:c320967f86b9 524 #define _I2C_IFC_ACK_MASK 0x40UL /**< Bit mask for I2C_ACK */
mbed_official 525:c320967f86b9 525 #define _I2C_IFC_ACK_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFC */
mbed_official 525:c320967f86b9 526 #define I2C_IFC_ACK_DEFAULT (_I2C_IFC_ACK_DEFAULT << 6) /**< Shifted mode DEFAULT for I2C_IFC */
mbed_official 525:c320967f86b9 527 #define I2C_IFC_NACK (0x1UL << 7) /**< Clear Not Acknowledge Received Interrupt Flag */
mbed_official 525:c320967f86b9 528 #define _I2C_IFC_NACK_SHIFT 7 /**< Shift value for I2C_NACK */
mbed_official 525:c320967f86b9 529 #define _I2C_IFC_NACK_MASK 0x80UL /**< Bit mask for I2C_NACK */
mbed_official 525:c320967f86b9 530 #define _I2C_IFC_NACK_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFC */
mbed_official 525:c320967f86b9 531 #define I2C_IFC_NACK_DEFAULT (_I2C_IFC_NACK_DEFAULT << 7) /**< Shifted mode DEFAULT for I2C_IFC */
mbed_official 525:c320967f86b9 532 #define I2C_IFC_MSTOP (0x1UL << 8) /**< Clear MSTOP Interrupt Flag */
mbed_official 525:c320967f86b9 533 #define _I2C_IFC_MSTOP_SHIFT 8 /**< Shift value for I2C_MSTOP */
mbed_official 525:c320967f86b9 534 #define _I2C_IFC_MSTOP_MASK 0x100UL /**< Bit mask for I2C_MSTOP */
mbed_official 525:c320967f86b9 535 #define _I2C_IFC_MSTOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFC */
mbed_official 525:c320967f86b9 536 #define I2C_IFC_MSTOP_DEFAULT (_I2C_IFC_MSTOP_DEFAULT << 8) /**< Shifted mode DEFAULT for I2C_IFC */
mbed_official 525:c320967f86b9 537 #define I2C_IFC_ARBLOST (0x1UL << 9) /**< Clear Arbitration Lost Interrupt Flag */
mbed_official 525:c320967f86b9 538 #define _I2C_IFC_ARBLOST_SHIFT 9 /**< Shift value for I2C_ARBLOST */
mbed_official 525:c320967f86b9 539 #define _I2C_IFC_ARBLOST_MASK 0x200UL /**< Bit mask for I2C_ARBLOST */
mbed_official 525:c320967f86b9 540 #define _I2C_IFC_ARBLOST_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFC */
mbed_official 525:c320967f86b9 541 #define I2C_IFC_ARBLOST_DEFAULT (_I2C_IFC_ARBLOST_DEFAULT << 9) /**< Shifted mode DEFAULT for I2C_IFC */
mbed_official 525:c320967f86b9 542 #define I2C_IFC_BUSERR (0x1UL << 10) /**< Clear Bus Error Interrupt Flag */
mbed_official 525:c320967f86b9 543 #define _I2C_IFC_BUSERR_SHIFT 10 /**< Shift value for I2C_BUSERR */
mbed_official 525:c320967f86b9 544 #define _I2C_IFC_BUSERR_MASK 0x400UL /**< Bit mask for I2C_BUSERR */
mbed_official 525:c320967f86b9 545 #define _I2C_IFC_BUSERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFC */
mbed_official 525:c320967f86b9 546 #define I2C_IFC_BUSERR_DEFAULT (_I2C_IFC_BUSERR_DEFAULT << 10) /**< Shifted mode DEFAULT for I2C_IFC */
mbed_official 525:c320967f86b9 547 #define I2C_IFC_BUSHOLD (0x1UL << 11) /**< Clear Bus Held Interrupt Flag */
mbed_official 525:c320967f86b9 548 #define _I2C_IFC_BUSHOLD_SHIFT 11 /**< Shift value for I2C_BUSHOLD */
mbed_official 525:c320967f86b9 549 #define _I2C_IFC_BUSHOLD_MASK 0x800UL /**< Bit mask for I2C_BUSHOLD */
mbed_official 525:c320967f86b9 550 #define _I2C_IFC_BUSHOLD_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFC */
mbed_official 525:c320967f86b9 551 #define I2C_IFC_BUSHOLD_DEFAULT (_I2C_IFC_BUSHOLD_DEFAULT << 11) /**< Shifted mode DEFAULT for I2C_IFC */
mbed_official 525:c320967f86b9 552 #define I2C_IFC_TXOF (0x1UL << 12) /**< Clear Transmit Buffer Overflow Interrupt Flag */
mbed_official 525:c320967f86b9 553 #define _I2C_IFC_TXOF_SHIFT 12 /**< Shift value for I2C_TXOF */
mbed_official 525:c320967f86b9 554 #define _I2C_IFC_TXOF_MASK 0x1000UL /**< Bit mask for I2C_TXOF */
mbed_official 525:c320967f86b9 555 #define _I2C_IFC_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFC */
mbed_official 525:c320967f86b9 556 #define I2C_IFC_TXOF_DEFAULT (_I2C_IFC_TXOF_DEFAULT << 12) /**< Shifted mode DEFAULT for I2C_IFC */
mbed_official 525:c320967f86b9 557 #define I2C_IFC_RXUF (0x1UL << 13) /**< Clear Receive Buffer Underflow Interrupt Flag */
mbed_official 525:c320967f86b9 558 #define _I2C_IFC_RXUF_SHIFT 13 /**< Shift value for I2C_RXUF */
mbed_official 525:c320967f86b9 559 #define _I2C_IFC_RXUF_MASK 0x2000UL /**< Bit mask for I2C_RXUF */
mbed_official 525:c320967f86b9 560 #define _I2C_IFC_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFC */
mbed_official 525:c320967f86b9 561 #define I2C_IFC_RXUF_DEFAULT (_I2C_IFC_RXUF_DEFAULT << 13) /**< Shifted mode DEFAULT for I2C_IFC */
mbed_official 525:c320967f86b9 562 #define I2C_IFC_BITO (0x1UL << 14) /**< Clear Bus Idle Timeout Interrupt Flag */
mbed_official 525:c320967f86b9 563 #define _I2C_IFC_BITO_SHIFT 14 /**< Shift value for I2C_BITO */
mbed_official 525:c320967f86b9 564 #define _I2C_IFC_BITO_MASK 0x4000UL /**< Bit mask for I2C_BITO */
mbed_official 525:c320967f86b9 565 #define _I2C_IFC_BITO_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFC */
mbed_official 525:c320967f86b9 566 #define I2C_IFC_BITO_DEFAULT (_I2C_IFC_BITO_DEFAULT << 14) /**< Shifted mode DEFAULT for I2C_IFC */
mbed_official 525:c320967f86b9 567 #define I2C_IFC_CLTO (0x1UL << 15) /**< Clear Clock Low Interrupt Flag */
mbed_official 525:c320967f86b9 568 #define _I2C_IFC_CLTO_SHIFT 15 /**< Shift value for I2C_CLTO */
mbed_official 525:c320967f86b9 569 #define _I2C_IFC_CLTO_MASK 0x8000UL /**< Bit mask for I2C_CLTO */
mbed_official 525:c320967f86b9 570 #define _I2C_IFC_CLTO_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFC */
mbed_official 525:c320967f86b9 571 #define I2C_IFC_CLTO_DEFAULT (_I2C_IFC_CLTO_DEFAULT << 15) /**< Shifted mode DEFAULT for I2C_IFC */
mbed_official 525:c320967f86b9 572 #define I2C_IFC_SSTOP (0x1UL << 16) /**< Clear SSTOP Interrupt Flag */
mbed_official 525:c320967f86b9 573 #define _I2C_IFC_SSTOP_SHIFT 16 /**< Shift value for I2C_SSTOP */
mbed_official 525:c320967f86b9 574 #define _I2C_IFC_SSTOP_MASK 0x10000UL /**< Bit mask for I2C_SSTOP */
mbed_official 525:c320967f86b9 575 #define _I2C_IFC_SSTOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IFC */
mbed_official 525:c320967f86b9 576 #define I2C_IFC_SSTOP_DEFAULT (_I2C_IFC_SSTOP_DEFAULT << 16) /**< Shifted mode DEFAULT for I2C_IFC */
mbed_official 525:c320967f86b9 577
mbed_official 525:c320967f86b9 578 /* Bit fields for I2C IEN */
mbed_official 525:c320967f86b9 579 #define _I2C_IEN_RESETVALUE 0x00000000UL /**< Default value for I2C_IEN */
mbed_official 525:c320967f86b9 580 #define _I2C_IEN_MASK 0x0001FFFFUL /**< Mask for I2C_IEN */
mbed_official 525:c320967f86b9 581 #define I2C_IEN_START (0x1UL << 0) /**< START Condition Interrupt Enable */
mbed_official 525:c320967f86b9 582 #define _I2C_IEN_START_SHIFT 0 /**< Shift value for I2C_START */
mbed_official 525:c320967f86b9 583 #define _I2C_IEN_START_MASK 0x1UL /**< Bit mask for I2C_START */
mbed_official 525:c320967f86b9 584 #define _I2C_IEN_START_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 585 #define I2C_IEN_START_DEFAULT (_I2C_IEN_START_DEFAULT << 0) /**< Shifted mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 586 #define I2C_IEN_RSTART (0x1UL << 1) /**< Repeated START condition Interrupt Enable */
mbed_official 525:c320967f86b9 587 #define _I2C_IEN_RSTART_SHIFT 1 /**< Shift value for I2C_RSTART */
mbed_official 525:c320967f86b9 588 #define _I2C_IEN_RSTART_MASK 0x2UL /**< Bit mask for I2C_RSTART */
mbed_official 525:c320967f86b9 589 #define _I2C_IEN_RSTART_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 590 #define I2C_IEN_RSTART_DEFAULT (_I2C_IEN_RSTART_DEFAULT << 1) /**< Shifted mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 591 #define I2C_IEN_ADDR (0x1UL << 2) /**< Address Interrupt Enable */
mbed_official 525:c320967f86b9 592 #define _I2C_IEN_ADDR_SHIFT 2 /**< Shift value for I2C_ADDR */
mbed_official 525:c320967f86b9 593 #define _I2C_IEN_ADDR_MASK 0x4UL /**< Bit mask for I2C_ADDR */
mbed_official 525:c320967f86b9 594 #define _I2C_IEN_ADDR_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 595 #define I2C_IEN_ADDR_DEFAULT (_I2C_IEN_ADDR_DEFAULT << 2) /**< Shifted mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 596 #define I2C_IEN_TXC (0x1UL << 3) /**< Transfer Completed Interrupt Enable */
mbed_official 525:c320967f86b9 597 #define _I2C_IEN_TXC_SHIFT 3 /**< Shift value for I2C_TXC */
mbed_official 525:c320967f86b9 598 #define _I2C_IEN_TXC_MASK 0x8UL /**< Bit mask for I2C_TXC */
mbed_official 525:c320967f86b9 599 #define _I2C_IEN_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 600 #define I2C_IEN_TXC_DEFAULT (_I2C_IEN_TXC_DEFAULT << 3) /**< Shifted mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 601 #define I2C_IEN_TXBL (0x1UL << 4) /**< Transmit Buffer level Interrupt Enable */
mbed_official 525:c320967f86b9 602 #define _I2C_IEN_TXBL_SHIFT 4 /**< Shift value for I2C_TXBL */
mbed_official 525:c320967f86b9 603 #define _I2C_IEN_TXBL_MASK 0x10UL /**< Bit mask for I2C_TXBL */
mbed_official 525:c320967f86b9 604 #define _I2C_IEN_TXBL_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 605 #define I2C_IEN_TXBL_DEFAULT (_I2C_IEN_TXBL_DEFAULT << 4) /**< Shifted mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 606 #define I2C_IEN_RXDATAV (0x1UL << 5) /**< Receive Data Valid Interrupt Enable */
mbed_official 525:c320967f86b9 607 #define _I2C_IEN_RXDATAV_SHIFT 5 /**< Shift value for I2C_RXDATAV */
mbed_official 525:c320967f86b9 608 #define _I2C_IEN_RXDATAV_MASK 0x20UL /**< Bit mask for I2C_RXDATAV */
mbed_official 525:c320967f86b9 609 #define _I2C_IEN_RXDATAV_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 610 #define I2C_IEN_RXDATAV_DEFAULT (_I2C_IEN_RXDATAV_DEFAULT << 5) /**< Shifted mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 611 #define I2C_IEN_ACK (0x1UL << 6) /**< Acknowledge Received Interrupt Enable */
mbed_official 525:c320967f86b9 612 #define _I2C_IEN_ACK_SHIFT 6 /**< Shift value for I2C_ACK */
mbed_official 525:c320967f86b9 613 #define _I2C_IEN_ACK_MASK 0x40UL /**< Bit mask for I2C_ACK */
mbed_official 525:c320967f86b9 614 #define _I2C_IEN_ACK_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 615 #define I2C_IEN_ACK_DEFAULT (_I2C_IEN_ACK_DEFAULT << 6) /**< Shifted mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 616 #define I2C_IEN_NACK (0x1UL << 7) /**< Not Acknowledge Received Interrupt Enable */
mbed_official 525:c320967f86b9 617 #define _I2C_IEN_NACK_SHIFT 7 /**< Shift value for I2C_NACK */
mbed_official 525:c320967f86b9 618 #define _I2C_IEN_NACK_MASK 0x80UL /**< Bit mask for I2C_NACK */
mbed_official 525:c320967f86b9 619 #define _I2C_IEN_NACK_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 620 #define I2C_IEN_NACK_DEFAULT (_I2C_IEN_NACK_DEFAULT << 7) /**< Shifted mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 621 #define I2C_IEN_MSTOP (0x1UL << 8) /**< MSTOP Interrupt Enable */
mbed_official 525:c320967f86b9 622 #define _I2C_IEN_MSTOP_SHIFT 8 /**< Shift value for I2C_MSTOP */
mbed_official 525:c320967f86b9 623 #define _I2C_IEN_MSTOP_MASK 0x100UL /**< Bit mask for I2C_MSTOP */
mbed_official 525:c320967f86b9 624 #define _I2C_IEN_MSTOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 625 #define I2C_IEN_MSTOP_DEFAULT (_I2C_IEN_MSTOP_DEFAULT << 8) /**< Shifted mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 626 #define I2C_IEN_ARBLOST (0x1UL << 9) /**< Arbitration Lost Interrupt Enable */
mbed_official 525:c320967f86b9 627 #define _I2C_IEN_ARBLOST_SHIFT 9 /**< Shift value for I2C_ARBLOST */
mbed_official 525:c320967f86b9 628 #define _I2C_IEN_ARBLOST_MASK 0x200UL /**< Bit mask for I2C_ARBLOST */
mbed_official 525:c320967f86b9 629 #define _I2C_IEN_ARBLOST_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 630 #define I2C_IEN_ARBLOST_DEFAULT (_I2C_IEN_ARBLOST_DEFAULT << 9) /**< Shifted mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 631 #define I2C_IEN_BUSERR (0x1UL << 10) /**< Bus Error Interrupt Enable */
mbed_official 525:c320967f86b9 632 #define _I2C_IEN_BUSERR_SHIFT 10 /**< Shift value for I2C_BUSERR */
mbed_official 525:c320967f86b9 633 #define _I2C_IEN_BUSERR_MASK 0x400UL /**< Bit mask for I2C_BUSERR */
mbed_official 525:c320967f86b9 634 #define _I2C_IEN_BUSERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 635 #define I2C_IEN_BUSERR_DEFAULT (_I2C_IEN_BUSERR_DEFAULT << 10) /**< Shifted mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 636 #define I2C_IEN_BUSHOLD (0x1UL << 11) /**< Bus Held Interrupt Enable */
mbed_official 525:c320967f86b9 637 #define _I2C_IEN_BUSHOLD_SHIFT 11 /**< Shift value for I2C_BUSHOLD */
mbed_official 525:c320967f86b9 638 #define _I2C_IEN_BUSHOLD_MASK 0x800UL /**< Bit mask for I2C_BUSHOLD */
mbed_official 525:c320967f86b9 639 #define _I2C_IEN_BUSHOLD_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 640 #define I2C_IEN_BUSHOLD_DEFAULT (_I2C_IEN_BUSHOLD_DEFAULT << 11) /**< Shifted mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 641 #define I2C_IEN_TXOF (0x1UL << 12) /**< Transmit Buffer Overflow Interrupt Enable */
mbed_official 525:c320967f86b9 642 #define _I2C_IEN_TXOF_SHIFT 12 /**< Shift value for I2C_TXOF */
mbed_official 525:c320967f86b9 643 #define _I2C_IEN_TXOF_MASK 0x1000UL /**< Bit mask for I2C_TXOF */
mbed_official 525:c320967f86b9 644 #define _I2C_IEN_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 645 #define I2C_IEN_TXOF_DEFAULT (_I2C_IEN_TXOF_DEFAULT << 12) /**< Shifted mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 646 #define I2C_IEN_RXUF (0x1UL << 13) /**< Receive Buffer Underflow Interrupt Enable */
mbed_official 525:c320967f86b9 647 #define _I2C_IEN_RXUF_SHIFT 13 /**< Shift value for I2C_RXUF */
mbed_official 525:c320967f86b9 648 #define _I2C_IEN_RXUF_MASK 0x2000UL /**< Bit mask for I2C_RXUF */
mbed_official 525:c320967f86b9 649 #define _I2C_IEN_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 650 #define I2C_IEN_RXUF_DEFAULT (_I2C_IEN_RXUF_DEFAULT << 13) /**< Shifted mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 651 #define I2C_IEN_BITO (0x1UL << 14) /**< Bus Idle Timeout Interrupt Enable */
mbed_official 525:c320967f86b9 652 #define _I2C_IEN_BITO_SHIFT 14 /**< Shift value for I2C_BITO */
mbed_official 525:c320967f86b9 653 #define _I2C_IEN_BITO_MASK 0x4000UL /**< Bit mask for I2C_BITO */
mbed_official 525:c320967f86b9 654 #define _I2C_IEN_BITO_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 655 #define I2C_IEN_BITO_DEFAULT (_I2C_IEN_BITO_DEFAULT << 14) /**< Shifted mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 656 #define I2C_IEN_CLTO (0x1UL << 15) /**< Clock Low Interrupt Enable */
mbed_official 525:c320967f86b9 657 #define _I2C_IEN_CLTO_SHIFT 15 /**< Shift value for I2C_CLTO */
mbed_official 525:c320967f86b9 658 #define _I2C_IEN_CLTO_MASK 0x8000UL /**< Bit mask for I2C_CLTO */
mbed_official 525:c320967f86b9 659 #define _I2C_IEN_CLTO_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 660 #define I2C_IEN_CLTO_DEFAULT (_I2C_IEN_CLTO_DEFAULT << 15) /**< Shifted mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 661 #define I2C_IEN_SSTOP (0x1UL << 16) /**< SSTOP Interrupt Enable */
mbed_official 525:c320967f86b9 662 #define _I2C_IEN_SSTOP_SHIFT 16 /**< Shift value for I2C_SSTOP */
mbed_official 525:c320967f86b9 663 #define _I2C_IEN_SSTOP_MASK 0x10000UL /**< Bit mask for I2C_SSTOP */
mbed_official 525:c320967f86b9 664 #define _I2C_IEN_SSTOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 665 #define I2C_IEN_SSTOP_DEFAULT (_I2C_IEN_SSTOP_DEFAULT << 16) /**< Shifted mode DEFAULT for I2C_IEN */
mbed_official 525:c320967f86b9 666
mbed_official 525:c320967f86b9 667 /* Bit fields for I2C ROUTE */
mbed_official 525:c320967f86b9 668 #define _I2C_ROUTE_RESETVALUE 0x00000000UL /**< Default value for I2C_ROUTE */
mbed_official 525:c320967f86b9 669 #define _I2C_ROUTE_MASK 0x00000703UL /**< Mask for I2C_ROUTE */
mbed_official 525:c320967f86b9 670 #define I2C_ROUTE_SDAPEN (0x1UL << 0) /**< SDA Pin Enable */
mbed_official 525:c320967f86b9 671 #define _I2C_ROUTE_SDAPEN_SHIFT 0 /**< Shift value for I2C_SDAPEN */
mbed_official 525:c320967f86b9 672 #define _I2C_ROUTE_SDAPEN_MASK 0x1UL /**< Bit mask for I2C_SDAPEN */
mbed_official 525:c320967f86b9 673 #define _I2C_ROUTE_SDAPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_ROUTE */
mbed_official 525:c320967f86b9 674 #define I2C_ROUTE_SDAPEN_DEFAULT (_I2C_ROUTE_SDAPEN_DEFAULT << 0) /**< Shifted mode DEFAULT for I2C_ROUTE */
mbed_official 525:c320967f86b9 675 #define I2C_ROUTE_SCLPEN (0x1UL << 1) /**< SCL Pin Enable */
mbed_official 525:c320967f86b9 676 #define _I2C_ROUTE_SCLPEN_SHIFT 1 /**< Shift value for I2C_SCLPEN */
mbed_official 525:c320967f86b9 677 #define _I2C_ROUTE_SCLPEN_MASK 0x2UL /**< Bit mask for I2C_SCLPEN */
mbed_official 525:c320967f86b9 678 #define _I2C_ROUTE_SCLPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_ROUTE */
mbed_official 525:c320967f86b9 679 #define I2C_ROUTE_SCLPEN_DEFAULT (_I2C_ROUTE_SCLPEN_DEFAULT << 1) /**< Shifted mode DEFAULT for I2C_ROUTE */
mbed_official 525:c320967f86b9 680 #define _I2C_ROUTE_LOCATION_SHIFT 8 /**< Shift value for I2C_LOCATION */
mbed_official 525:c320967f86b9 681 #define _I2C_ROUTE_LOCATION_MASK 0x700UL /**< Bit mask for I2C_LOCATION */
mbed_official 525:c320967f86b9 682 #define _I2C_ROUTE_LOCATION_LOC0 0x00000000UL /**< Mode LOC0 for I2C_ROUTE */
mbed_official 525:c320967f86b9 683 #define _I2C_ROUTE_LOCATION_DEFAULT 0x00000000UL /**< Mode DEFAULT for I2C_ROUTE */
mbed_official 525:c320967f86b9 684 #define _I2C_ROUTE_LOCATION_LOC1 0x00000001UL /**< Mode LOC1 for I2C_ROUTE */
mbed_official 525:c320967f86b9 685 #define _I2C_ROUTE_LOCATION_LOC2 0x00000002UL /**< Mode LOC2 for I2C_ROUTE */
mbed_official 525:c320967f86b9 686 #define _I2C_ROUTE_LOCATION_LOC3 0x00000003UL /**< Mode LOC3 for I2C_ROUTE */
mbed_official 525:c320967f86b9 687 #define _I2C_ROUTE_LOCATION_LOC4 0x00000004UL /**< Mode LOC4 for I2C_ROUTE */
mbed_official 525:c320967f86b9 688 #define _I2C_ROUTE_LOCATION_LOC5 0x00000005UL /**< Mode LOC5 for I2C_ROUTE */
mbed_official 525:c320967f86b9 689 #define _I2C_ROUTE_LOCATION_LOC6 0x00000006UL /**< Mode LOC6 for I2C_ROUTE */
mbed_official 525:c320967f86b9 690 #define I2C_ROUTE_LOCATION_LOC0 (_I2C_ROUTE_LOCATION_LOC0 << 8) /**< Shifted mode LOC0 for I2C_ROUTE */
mbed_official 525:c320967f86b9 691 #define I2C_ROUTE_LOCATION_DEFAULT (_I2C_ROUTE_LOCATION_DEFAULT << 8) /**< Shifted mode DEFAULT for I2C_ROUTE */
mbed_official 525:c320967f86b9 692 #define I2C_ROUTE_LOCATION_LOC1 (_I2C_ROUTE_LOCATION_LOC1 << 8) /**< Shifted mode LOC1 for I2C_ROUTE */
mbed_official 525:c320967f86b9 693 #define I2C_ROUTE_LOCATION_LOC2 (_I2C_ROUTE_LOCATION_LOC2 << 8) /**< Shifted mode LOC2 for I2C_ROUTE */
mbed_official 525:c320967f86b9 694 #define I2C_ROUTE_LOCATION_LOC3 (_I2C_ROUTE_LOCATION_LOC3 << 8) /**< Shifted mode LOC3 for I2C_ROUTE */
mbed_official 525:c320967f86b9 695 #define I2C_ROUTE_LOCATION_LOC4 (_I2C_ROUTE_LOCATION_LOC4 << 8) /**< Shifted mode LOC4 for I2C_ROUTE */
mbed_official 525:c320967f86b9 696 #define I2C_ROUTE_LOCATION_LOC5 (_I2C_ROUTE_LOCATION_LOC5 << 8) /**< Shifted mode LOC5 for I2C_ROUTE */
mbed_official 525:c320967f86b9 697 #define I2C_ROUTE_LOCATION_LOC6 (_I2C_ROUTE_LOCATION_LOC6 << 8) /**< Shifted mode LOC6 for I2C_ROUTE */
mbed_official 525:c320967f86b9 698
mbed_official 525:c320967f86b9 699 /** @} End of group EFM32LG_I2C */
mbed_official 525:c320967f86b9 700
mbed_official 525:c320967f86b9 701