Jonathan Piat / USBDevice

USB device stack

Fork of USBDevice by mbed official

USBDevice/USBHAL_KL25Z.cpp@48:918b04fe6a5b, 2015-06-09 (annotated)

Committer:
jpiat
Date:
Tue Jun 09 12:32:28 2015 +0000
Revision:
48:918b04fe6a5b
Parent:
43:c0605f23f916 
Enabled clock recovery

Who changed what in which revision?

UserRevisionLine numberNew contents of line
samux 8:335f2506f422 1 /* Copyright (c) 2010-2011 mbed.org, MIT License
samux 8:335f2506f422 2 *
samux 8:335f2506f422 3 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
samux 8:335f2506f422 4 * and associated documentation files (the "Software"), to deal in the Software without
samux 8:335f2506f422 5 * restriction, including without limitation the rights to use, copy, modify, merge, publish,
samux 8:335f2506f422 6 * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
samux 8:335f2506f422 7 * Software is furnished to do so, subject to the following conditions:
samux 8:335f2506f422 8 *
samux 8:335f2506f422 9 * The above copyright notice and this permission notice shall be included in all copies or
samux 8:335f2506f422 10 * substantial portions of the Software.
samux 8:335f2506f422 11 *
samux 8:335f2506f422 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
samux 8:335f2506f422 13 * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
samux 8:335f2506f422 14 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
samux 8:335f2506f422 15 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
samux 8:335f2506f422 16 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
samux 8:335f2506f422 17 */
samux 8:335f2506f422 18
mbed_official 43:c0605f23f916 19 #if defined(TARGET_KL25Z) | defined(TARGET_KL43Z) | defined(TARGET_KL46Z) | defined(TARGET_K20D50M) | defined(TARGET_K64F) | defined(TARGET_K22F) | defined(TARGET_TEENSY3_1)
samux 8:335f2506f422 20
samux 8:335f2506f422 21 #include "USBHAL.h"
samux 8:335f2506f422 22
samux 8:335f2506f422 23 USBHAL * USBHAL::instance;
samux 8:335f2506f422 24
samux 8:335f2506f422 25 static volatile int epComplete = 0;
samux 8:335f2506f422 26
samux 8:335f2506f422 27 // Convert physical endpoint number to register bit
samux 8:335f2506f422 28 #define EP(endpoint) (1<<(endpoint))
samux 8:335f2506f422 29
samux 8:335f2506f422 30 // Convert physical to logical
samux 8:335f2506f422 31 #define PHY_TO_LOG(endpoint) ((endpoint)>>1)
samux 8:335f2506f422 32
samux 8:335f2506f422 33 // Get endpoint direction
samux 8:335f2506f422 34 #define IN_EP(endpoint) ((endpoint) & 1U ? true : false)
samux 8:335f2506f422 35 #define OUT_EP(endpoint) ((endpoint) & 1U ? false : true)
samux 8:335f2506f422 36
samux 8:335f2506f422 37 #define BD_OWN_MASK (1<<7)
samux 8:335f2506f422 38 #define BD_DATA01_MASK (1<<6)
samux 8:335f2506f422 39 #define BD_KEEP_MASK (1<<5)
samux 8:335f2506f422 40 #define BD_NINC_MASK (1<<4)
samux 8:335f2506f422 41 #define BD_DTS_MASK (1<<3)
samux 8:335f2506f422 42 #define BD_STALL_MASK (1<<2)
samux 8:335f2506f422 43
samux 8:335f2506f422 44 #define TX 1
samux 8:335f2506f422 45 #define RX 0
samux 8:335f2506f422 46 #define ODD 0
samux 8:335f2506f422 47 #define EVEN 1
samux 8:335f2506f422 48 // this macro waits a physical endpoint number
samux 8:335f2506f422 49 #define EP_BDT_IDX(ep, dir, odd) (((ep * 4) + (2 * dir) + (1 * odd)))
samux 8:335f2506f422 50
samux 8:335f2506f422 51 #define SETUP_TOKEN 0x0D
samux 8:335f2506f422 52 #define IN_TOKEN 0x09
samux 8:335f2506f422 53 #define OUT_TOKEN 0x01
samux 8:335f2506f422 54 #define TOK_PID(idx) ((bdt[idx].info >> 2) & 0x0F)
samux 8:335f2506f422 55
samux 8:335f2506f422 56 // for each endpt: 8 bytes
samux 8:335f2506f422 57 typedef struct BDT {
samux 8:335f2506f422 58 uint8_t info; // BD[0:7]
samux 8:335f2506f422 59 uint8_t dummy; // RSVD: BD[8:15]
samux 8:335f2506f422 60 uint16_t byte_count; // BD[16:32]
samux 8:335f2506f422 61 uint32_t address; // Addr
mbed_official 20:d38b72fed893 62 } BDT;
samux 8:335f2506f422 63
samux 8:335f2506f422 64
samux 8:335f2506f422 65 // there are:
samux 8:335f2506f422 66 // * 16 bidirectionnal endpt -> 32 physical endpt
samux 8:335f2506f422 67 // * as there are ODD and EVEN buffer -> 32*2 bdt
samux 8:335f2506f422 68 __attribute__((__aligned__(512))) BDT bdt[NUMBER_OF_PHYSICAL_ENDPOINTS * 2];
samux 9:354942d2fa38 69 uint8_t * endpoint_buffer[(NUMBER_OF_PHYSICAL_ENDPOINTS - 2) * 2];
samux 9:354942d2fa38 70 uint8_t * endpoint_buffer_iso[2*2];
samux 8:335f2506f422 71
samux 8:335f2506f422 72 static uint8_t set_addr = 0;
samux 8:335f2506f422 73 static uint8_t addr = 0;
samux 8:335f2506f422 74
samux 8:335f2506f422 75 static uint32_t Data1 = 0x55555555;
samux 8:335f2506f422 76
samux 8:335f2506f422 77 static uint32_t frameNumber() {
bogdanm 13:16731886c049 78 return((USB0->FRMNUML | (USB0->FRMNUMH << 8)) & 0x07FF);
samux 8:335f2506f422 79 }
samux 8:335f2506f422 80
samux 8:335f2506f422 81 uint32_t USBHAL::endpointReadcore(uint8_t endpoint, uint8_t *buffer) {
samux 8:335f2506f422 82 return 0;
samux 8:335f2506f422 83 }
samux 8:335f2506f422 84
mbed_official 20:d38b72fed893 85 USBHAL::USBHAL(void) {
samux 8:335f2506f422 86 // Disable IRQ
samux 8:335f2506f422 87 NVIC_DisableIRQ(USB0_IRQn);
mbed_official 20:d38b72fed893 88
mbed_official 22:5b7d31d9d3f3 89 #if defined(TARGET_K64F)
mbed_official 22:5b7d31d9d3f3 90 MPU->CESR=0;
mbed_official 22:5b7d31d9d3f3 91 #endif
samux 8:335f2506f422 92 // fill in callback array
samux 8:335f2506f422 93 epCallback[0] = &USBHAL::EP1_OUT_callback;
samux 8:335f2506f422 94 epCallback[1] = &USBHAL::EP1_IN_callback;
samux 8:335f2506f422 95 epCallback[2] = &USBHAL::EP2_OUT_callback;
samux 8:335f2506f422 96 epCallback[3] = &USBHAL::EP2_IN_callback;
samux 8:335f2506f422 97 epCallback[4] = &USBHAL::EP3_OUT_callback;
samux 8:335f2506f422 98 epCallback[5] = &USBHAL::EP3_IN_callback;
samux 8:335f2506f422 99 epCallback[6] = &USBHAL::EP4_OUT_callback;
samux 8:335f2506f422 100 epCallback[7] = &USBHAL::EP4_IN_callback;
samux 8:335f2506f422 101 epCallback[8] = &USBHAL::EP5_OUT_callback;
samux 8:335f2506f422 102 epCallback[9] = &USBHAL::EP5_IN_callback;
samux 8:335f2506f422 103 epCallback[10] = &USBHAL::EP6_OUT_callback;
samux 8:335f2506f422 104 epCallback[11] = &USBHAL::EP6_IN_callback;
samux 8:335f2506f422 105 epCallback[12] = &USBHAL::EP7_OUT_callback;
samux 8:335f2506f422 106 epCallback[13] = &USBHAL::EP7_IN_callback;
samux 8:335f2506f422 107 epCallback[14] = &USBHAL::EP8_OUT_callback;
samux 8:335f2506f422 108 epCallback[15] = &USBHAL::EP8_IN_callback;
samux 8:335f2506f422 109 epCallback[16] = &USBHAL::EP9_OUT_callback;
samux 8:335f2506f422 110 epCallback[17] = &USBHAL::EP9_IN_callback;
samux 8:335f2506f422 111 epCallback[18] = &USBHAL::EP10_OUT_callback;
samux 8:335f2506f422 112 epCallback[19] = &USBHAL::EP10_IN_callback;
samux 8:335f2506f422 113 epCallback[20] = &USBHAL::EP11_OUT_callback;
samux 8:335f2506f422 114 epCallback[21] = &USBHAL::EP11_IN_callback;
samux 8:335f2506f422 115 epCallback[22] = &USBHAL::EP12_OUT_callback;
samux 8:335f2506f422 116 epCallback[23] = &USBHAL::EP12_IN_callback;
samux 8:335f2506f422 117 epCallback[24] = &USBHAL::EP13_OUT_callback;
samux 8:335f2506f422 118 epCallback[25] = &USBHAL::EP13_IN_callback;
samux 8:335f2506f422 119 epCallback[26] = &USBHAL::EP14_OUT_callback;
samux 8:335f2506f422 120 epCallback[27] = &USBHAL::EP14_IN_callback;
samux 8:335f2506f422 121 epCallback[28] = &USBHAL::EP15_OUT_callback;
samux 8:335f2506f422 122 epCallback[29] = &USBHAL::EP15_IN_callback;
mbed_official 20:d38b72fed893 123
mbed_official 34:a4e9ddc2e2af 124 #if defined(TARGET_KL43Z)
mbed_official 34:a4e9ddc2e2af 125 // enable USBFS clock
mbed_official 34:a4e9ddc2e2af 126 SIM->SCGC4 |= SIM_SCGC4_USBFS_MASK;
mbed_official 20:d38b72fed893 127
mbed_official 34:a4e9ddc2e2af 128 // enable the IRC48M clock
mbed_official 34:a4e9ddc2e2af 129 USB0->CLK_RECOVER_IRC_EN |= USB_CLK_RECOVER_IRC_EN_IRC_EN_MASK;
mbed_official 34:a4e9ddc2e2af 130
mbed_official 34:a4e9ddc2e2af 131 // enable the USB clock recovery tuning
mbed_official 34:a4e9ddc2e2af 132 USB0->CLK_RECOVER_CTRL |= USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN_MASK;
mbed_official 34:a4e9ddc2e2af 133
mbed_official 34:a4e9ddc2e2af 134 // choose usb src clock
mbed_official 34:a4e9ddc2e2af 135 SIM->SOPT2 |= SIM_SOPT2_USBSRC_MASK;
mbed_official 34:a4e9ddc2e2af 136 #else
jpiat 48:918b04fe6a5b 137
jpiat 48:918b04fe6a5b 138 // enable OTG clock
jpiat 48:918b04fe6a5b 139 SIM->SCGC4 |= SIM_SCGC4_USBOTG_MASK;
jpiat 48:918b04fe6a5b 140 // enable the IRC48M clock
jpiat 48:918b04fe6a5b 141 USB0->CLK_RECOVER_IRC_EN |= USB_CLK_RECOVER_IRC_EN_IRC_EN_MASK;
jpiat 48:918b04fe6a5b 142 // enable the USB clock recovery tuning
jpiat 48:918b04fe6a5b 143 USB0->CLK_RECOVER_CTRL |= USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN_MASK;
samux 8:335f2506f422 144 // choose usb src as PLL
mbed_official 38:dfe51ad5cacf 145 SIM->SOPT2 &= ~SIM_SOPT2_PLLFLLSEL_MASK;
jpiat 48:918b04fe6a5b 146 SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL(3) | SIM_SOPT2_USBSRC_MASK;
jpiat 48:918b04fe6a5b 147 SIM->CLKDIV2 &= ~SIM_CLKDIV2_USBDIV_MASK ;
jpiat 48:918b04fe6a5b 148 SIM->CLKDIV2 &= ~SIM_CLKDIV2_USBFRAC_MASK ;
jpiat 48:918b04fe6a5b 149 //SIM->SOPT2 |= (SIM_SOPT2_USBSRC_MASK | (1 << SIM_SOPT2_PLLFLLSEL_SHIFT));
jpiat 48:918b04fe6a5b 150 /* // choose usb src as PLL
jpiat 48:918b04fe6a5b 151 SIM->SOPT2 &= ~SIM_SOPT2_PLLFLLSEL_MASK;
mbed_official 38:dfe51ad5cacf 152 SIM->SOPT2 |= (SIM_SOPT2_USBSRC_MASK | (1 << SIM_SOPT2_PLLFLLSEL_SHIFT));
mbed_official 20:d38b72fed893 153
samux 8:335f2506f422 154 // enable OTG clock
samux 8:335f2506f422 155 SIM->SCGC4 |= SIM_SCGC4_USBOTG_MASK;
jpiat 48:918b04fe6a5b 156 */
mbed_official 34:a4e9ddc2e2af 157 #endif
samux 8:335f2506f422 158
samux 8:335f2506f422 159 // Attach IRQ
samux 8:335f2506f422 160 instance = this;
samux 8:335f2506f422 161 NVIC_SetVector(USB0_IRQn, (uint32_t)&_usbisr);
samux 8:335f2506f422 162 NVIC_EnableIRQ(USB0_IRQn);
mbed_official 20:d38b72fed893 163
samux 8:335f2506f422 164 // USB Module Configuration
samux 8:335f2506f422 165 // Reset USB Module
samux 8:335f2506f422 166 USB0->USBTRC0 |= USB_USBTRC0_USBRESET_MASK;
samux 8:335f2506f422 167 while(USB0->USBTRC0 & USB_USBTRC0_USBRESET_MASK);
mbed_official 20:d38b72fed893 168
samux 8:335f2506f422 169 // Set BDT Base Register
mbed_official 22:5b7d31d9d3f3 170 USB0->BDTPAGE1 = (uint8_t)((uint32_t)bdt>>8);
mbed_official 22:5b7d31d9d3f3 171 USB0->BDTPAGE2 = (uint8_t)((uint32_t)bdt>>16);
mbed_official 22:5b7d31d9d3f3 172 USB0->BDTPAGE3 = (uint8_t)((uint32_t)bdt>>24);
samux 8:335f2506f422 173
samux 8:335f2506f422 174 // Clear interrupt flag
samux 8:335f2506f422 175 USB0->ISTAT = 0xff;
samux 8:335f2506f422 176
samux 8:335f2506f422 177 // USB Interrupt Enablers
mbed_official 20:d38b72fed893 178 USB0->INTEN |= USB_INTEN_TOKDNEEN_MASK |
mbed_official 20:d38b72fed893 179 USB_INTEN_SOFTOKEN_MASK |
samux 8:335f2506f422 180 USB_INTEN_ERROREN_MASK |
samux 8:335f2506f422 181 USB_INTEN_USBRSTEN_MASK;
mbed_official 20:d38b72fed893 182
mbed_official 20:d38b72fed893 183 // Disable weak pull downs
mbed_official 20:d38b72fed893 184 USB0->USBCTRL &= ~(USB_USBCTRL_PDE_MASK | USB_USBCTRL_SUSP_MASK);
mbed_official 20:d38b72fed893 185
samux 8:335f2506f422 186 USB0->USBTRC0 |= 0x40;
samux 8:335f2506f422 187 }
samux 8:335f2506f422 188
samux 8:335f2506f422 189 USBHAL::~USBHAL(void) { }
samux 8:335f2506f422 190
samux 8:335f2506f422 191 void USBHAL::connect(void) {
samux 8:335f2506f422 192 // enable USB
samux 8:335f2506f422 193 USB0->CTL |= USB_CTL_USBENSOFEN_MASK;
samux 8:335f2506f422 194 // Pull up enable
samux 8:335f2506f422 195 USB0->CONTROL |= USB_CONTROL_DPPULLUPNONOTG_MASK;
samux 8:335f2506f422 196 }
samux 8:335f2506f422 197
samux 8:335f2506f422 198 void USBHAL::disconnect(void) {
samux 8:335f2506f422 199 // disable USB
samux 8:335f2506f422 200 USB0->CTL &= ~USB_CTL_USBENSOFEN_MASK;
samux 8:335f2506f422 201 // Pull up disable
samux 8:335f2506f422 202 USB0->CONTROL &= ~USB_CONTROL_DPPULLUPNONOTG_MASK;
bogdanm 14:d495202c90f4 203
bogdanm 14:d495202c90f4 204 //Free buffers if required:
bogdanm 14:d495202c90f4 205 for (int i = 0; i<(NUMBER_OF_PHYSICAL_ENDPOINTS - 2) * 2; i++) {
bogdanm 14:d495202c90f4 206 free(endpoint_buffer[i]);
bogdanm 14:d495202c90f4 207 endpoint_buffer[i] = NULL;
bogdanm 14:d495202c90f4 208 }
bogdanm 14:d495202c90f4 209 free(endpoint_buffer_iso[2]);
bogdanm 14:d495202c90f4 210 endpoint_buffer_iso[2] = NULL;
bogdanm 14:d495202c90f4 211 free(endpoint_buffer_iso[0]);
bogdanm 14:d495202c90f4 212 endpoint_buffer_iso[0] = NULL;
samux 8:335f2506f422 213 }
samux 8:335f2506f422 214
samux 8:335f2506f422 215 void USBHAL::configureDevice(void) {
samux 8:335f2506f422 216 // not needed
samux 8:335f2506f422 217 }
samux 8:335f2506f422 218
samux 8:335f2506f422 219 void USBHAL::unconfigureDevice(void) {
samux 8:335f2506f422 220 // not needed
samux 8:335f2506f422 221 }
samux 8:335f2506f422 222
samux 8:335f2506f422 223 void USBHAL::setAddress(uint8_t address) {
samux 8:335f2506f422 224 // we don't set the address now otherwise the usb controller does not ack
samux 8:335f2506f422 225 // we set a flag instead
samux 8:335f2506f422 226 // see usbisr when an IN token is received
samux 8:335f2506f422 227 set_addr = 1;
samux 8:335f2506f422 228 addr = address;
samux 8:335f2506f422 229 }
samux 8:335f2506f422 230
samux 8:335f2506f422 231 bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket, uint32_t flags) {
samux 8:335f2506f422 232 uint32_t handshake_flag = 0;
samux 8:335f2506f422 233 uint8_t * buf;
samux 8:335f2506f422 234
samux 8:335f2506f422 235 if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) {
samux 8:335f2506f422 236 return false;
samux 8:335f2506f422 237 }
samux 8:335f2506f422 238
samux 8:335f2506f422 239 uint32_t log_endpoint = PHY_TO_LOG(endpoint);
samux 8:335f2506f422 240
samux 8:335f2506f422 241 if ((flags & ISOCHRONOUS) == 0) {
samux 8:335f2506f422 242 handshake_flag = USB_ENDPT_EPHSHK_MASK;
samux 9:354942d2fa38 243 if (IN_EP(endpoint)) {
bogdanm 14:d495202c90f4 244 if (endpoint_buffer[EP_BDT_IDX(log_endpoint, TX, ODD)] == NULL)
bogdanm 14:d495202c90f4 245 endpoint_buffer[EP_BDT_IDX(log_endpoint, TX, ODD)] = (uint8_t *) malloc (64*2);
bogdanm 14:d495202c90f4 246 buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, TX, ODD)][0];
samux 9:354942d2fa38 247 } else {
bogdanm 14:d495202c90f4 248 if (endpoint_buffer[EP_BDT_IDX(log_endpoint, RX, ODD)] == NULL)
bogdanm 14:d495202c90f4 249 endpoint_buffer[EP_BDT_IDX(log_endpoint, RX, ODD)] = (uint8_t *) malloc (64*2);
bogdanm 14:d495202c90f4 250 buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, RX, ODD)][0];
samux 9:354942d2fa38 251 }
samux 8:335f2506f422 252 } else {
samux 9:354942d2fa38 253 if (IN_EP(endpoint)) {
bogdanm 14:d495202c90f4 254 if (endpoint_buffer_iso[2] == NULL)
bogdanm 14:d495202c90f4 255 endpoint_buffer_iso[2] = (uint8_t *) malloc (1023*2);
samux 8:335f2506f422 256 buf = &endpoint_buffer_iso[2][0];
samux 9:354942d2fa38 257 } else {
bogdanm 14:d495202c90f4 258 if (endpoint_buffer_iso[0] == NULL)
bogdanm 14:d495202c90f4 259 endpoint_buffer_iso[0] = (uint8_t *) malloc (1023*2);
samux 8:335f2506f422 260 buf = &endpoint_buffer_iso[0][0];
samux 9:354942d2fa38 261 }
samux 8:335f2506f422 262 }
samux 8:335f2506f422 263
samux 8:335f2506f422 264 // IN endpt -> device to host (TX)
samux 8:335f2506f422 265 if (IN_EP(endpoint)) {
samux 8:335f2506f422 266 USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint)
samux 8:335f2506f422 267 USB_ENDPT_EPTXEN_MASK; // en TX (IN) tran
samux 8:335f2506f422 268 bdt[EP_BDT_IDX(log_endpoint, TX, ODD )].address = (uint32_t) buf;
samux 8:335f2506f422 269 bdt[EP_BDT_IDX(log_endpoint, TX, EVEN)].address = 0;
samux 8:335f2506f422 270 }
samux 8:335f2506f422 271 // OUT endpt -> host to device (RX)
samux 8:335f2506f422 272 else {
samux 8:335f2506f422 273 USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint)
samux 8:335f2506f422 274 USB_ENDPT_EPRXEN_MASK; // en RX (OUT) tran.
samux 8:335f2506f422 275 bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].byte_count = maxPacket;
samux 8:335f2506f422 276 bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].address = (uint32_t) buf;
samux 8:335f2506f422 277 bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info = BD_OWN_MASK | BD_DTS_MASK;
samux 8:335f2506f422 278 bdt[EP_BDT_IDX(log_endpoint, RX, EVEN)].info = 0;
samux 8:335f2506f422 279 }
samux 8:335f2506f422 280
samux 8:335f2506f422 281 Data1 |= (1 << endpoint);
samux 8:335f2506f422 282
samux 8:335f2506f422 283 return true;
samux 8:335f2506f422 284 }
samux 8:335f2506f422 285
samux 8:335f2506f422 286 // read setup packet
samux 8:335f2506f422 287 void USBHAL::EP0setup(uint8_t *buffer) {
samux 8:335f2506f422 288 uint32_t sz;
samux 8:335f2506f422 289 endpointReadResult(EP0OUT, buffer, &sz);
samux 8:335f2506f422 290 }
samux 8:335f2506f422 291
samux 8:335f2506f422 292 void USBHAL::EP0readStage(void) {
samux 8:335f2506f422 293 Data1 &= ~1UL; // set DATA0
samux 8:335f2506f422 294 bdt[0].info = (BD_DTS_MASK | BD_OWN_MASK);
samux 8:335f2506f422 295 }
samux 8:335f2506f422 296
samux 8:335f2506f422 297 void USBHAL::EP0read(void) {
samux 8:335f2506f422 298 uint32_t idx = EP_BDT_IDX(PHY_TO_LOG(EP0OUT), RX, 0);
samux 8:335f2506f422 299 bdt[idx].byte_count = MAX_PACKET_SIZE_EP0;
samux 8:335f2506f422 300 }
samux 8:335f2506f422 301
samux 8:335f2506f422 302 uint32_t USBHAL::EP0getReadResult(uint8_t *buffer) {
samux 8:335f2506f422 303 uint32_t sz;
samux 8:335f2506f422 304 endpointReadResult(EP0OUT, buffer, &sz);
samux 8:335f2506f422 305 return sz;
samux 8:335f2506f422 306 }
samux 8:335f2506f422 307
samux 8:335f2506f422 308 void USBHAL::EP0write(uint8_t *buffer, uint32_t size) {
samux 8:335f2506f422 309 endpointWrite(EP0IN, buffer, size);
samux 8:335f2506f422 310 }
samux 8:335f2506f422 311
samux 8:335f2506f422 312 void USBHAL::EP0getWriteResult(void) {
samux 8:335f2506f422 313 }
samux 8:335f2506f422 314
samux 8:335f2506f422 315 void USBHAL::EP0stall(void) {
samux 8:335f2506f422 316 stallEndpoint(EP0OUT);
samux 8:335f2506f422 317 }
samux 8:335f2506f422 318
samux 8:335f2506f422 319 EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize) {
samux 8:335f2506f422 320 endpoint = PHY_TO_LOG(endpoint);
samux 8:335f2506f422 321 uint32_t idx = EP_BDT_IDX(endpoint, RX, 0);
samux 8:335f2506f422 322 bdt[idx].byte_count = maximumSize;
samux 8:335f2506f422 323 return EP_PENDING;
samux 8:335f2506f422 324 }
samux 8:335f2506f422 325
samux 8:335f2506f422 326 EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_t *bytesRead) {
samux 8:335f2506f422 327 uint32_t n, sz, idx, setup = 0;
samux 8:335f2506f422 328 uint8_t not_iso;
samux 8:335f2506f422 329 uint8_t * ep_buf;
mbed_official 20:d38b72fed893 330
samux 8:335f2506f422 331 uint32_t log_endpoint = PHY_TO_LOG(endpoint);
mbed_official 20:d38b72fed893 332
samux 8:335f2506f422 333 if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) {
samux 8:335f2506f422 334 return EP_INVALID;
samux 8:335f2506f422 335 }
samux 8:335f2506f422 336
samux 8:335f2506f422 337 // if read on a IN endpoint -> error
samux 8:335f2506f422 338 if (IN_EP(endpoint)) {
samux 8:335f2506f422 339 return EP_INVALID;
samux 8:335f2506f422 340 }
samux 8:335f2506f422 341
samux 8:335f2506f422 342 idx = EP_BDT_IDX(log_endpoint, RX, 0);
samux 8:335f2506f422 343 sz = bdt[idx].byte_count;
samux 8:335f2506f422 344 not_iso = USB0->ENDPOINT[log_endpoint].ENDPT & USB_ENDPT_EPHSHK_MASK;
samux 8:335f2506f422 345
samux 8:335f2506f422 346 //for isochronous endpoint, we don't wait an interrupt
samux 8:335f2506f422 347 if ((log_endpoint != 0) && not_iso && !(epComplete & EP(endpoint))) {
samux 8:335f2506f422 348 return EP_PENDING;
samux 8:335f2506f422 349 }
samux 8:335f2506f422 350
samux 8:335f2506f422 351 if ((log_endpoint == 0) && (TOK_PID(idx) == SETUP_TOKEN)) {
samux 8:335f2506f422 352 setup = 1;
samux 8:335f2506f422 353 }
samux 8:335f2506f422 354
samux 8:335f2506f422 355 // non iso endpoint
samux 8:335f2506f422 356 if (not_iso) {
samux 8:335f2506f422 357 ep_buf = endpoint_buffer[idx];
samux 8:335f2506f422 358 } else {
samux 8:335f2506f422 359 ep_buf = endpoint_buffer_iso[0];
samux 8:335f2506f422 360 }
samux 8:335f2506f422 361
samux 8:335f2506f422 362 for (n = 0; n < sz; n++) {
samux 8:335f2506f422 363 buffer[n] = ep_buf[n];
samux 8:335f2506f422 364 }
samux 8:335f2506f422 365
samux 8:335f2506f422 366 if (((Data1 >> endpoint) & 1) == ((bdt[idx].info >> 6) & 1)) {
samux 8:335f2506f422 367 if (setup && (buffer[6] == 0)) // if no setup data stage,
samux 8:335f2506f422 368 Data1 &= ~1UL; // set DATA0
mbed_official 20:d38b72fed893 369 else
samux 8:335f2506f422 370 Data1 ^= (1 << endpoint);
samux 8:335f2506f422 371 }
samux 8:335f2506f422 372
samux 8:335f2506f422 373 if (((Data1 >> endpoint) & 1)) {
samux 8:335f2506f422 374 bdt[idx].info = BD_DTS_MASK | BD_DATA01_MASK | BD_OWN_MASK;
samux 8:335f2506f422 375 }
samux 8:335f2506f422 376 else {
samux 8:335f2506f422 377 bdt[idx].info = BD_DTS_MASK | BD_OWN_MASK;
samux 8:335f2506f422 378 }
mbed_official 20:d38b72fed893 379
samux 8:335f2506f422 380 USB0->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK;
samux 8:335f2506f422 381 *bytesRead = sz;
samux 8:335f2506f422 382
samux 8:335f2506f422 383 epComplete &= ~EP(endpoint);
samux 8:335f2506f422 384 return EP_COMPLETED;
samux 8:335f2506f422 385 }
samux 8:335f2506f422 386
samux 8:335f2506f422 387 EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size) {
samux 8:335f2506f422 388 uint32_t idx, n;
samux 8:335f2506f422 389 uint8_t * ep_buf;
samux 8:335f2506f422 390
samux 8:335f2506f422 391 if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) {
samux 8:335f2506f422 392 return EP_INVALID;
samux 8:335f2506f422 393 }
samux 8:335f2506f422 394
samux 8:335f2506f422 395 // if write on a OUT endpoint -> error
samux 8:335f2506f422 396 if (OUT_EP(endpoint)) {
samux 8:335f2506f422 397 return EP_INVALID;
samux 8:335f2506f422 398 }
samux 8:335f2506f422 399
samux 8:335f2506f422 400 idx = EP_BDT_IDX(PHY_TO_LOG(endpoint), TX, 0);
samux 8:335f2506f422 401 bdt[idx].byte_count = size;
mbed_official 20:d38b72fed893 402
mbed_official 20:d38b72fed893 403
samux 8:335f2506f422 404 // non iso endpoint
samux 8:335f2506f422 405 if (USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT & USB_ENDPT_EPHSHK_MASK) {
samux 8:335f2506f422 406 ep_buf = endpoint_buffer[idx];
samux 8:335f2506f422 407 } else {
samux 8:335f2506f422 408 ep_buf = endpoint_buffer_iso[2];
samux 8:335f2506f422 409 }
mbed_official 20:d38b72fed893 410
samux 8:335f2506f422 411 for (n = 0; n < size; n++) {
samux 8:335f2506f422 412 ep_buf[n] = data[n];
samux 8:335f2506f422 413 }
mbed_official 20:d38b72fed893 414
samux 8:335f2506f422 415 if ((Data1 >> endpoint) & 1) {
samux 8:335f2506f422 416 bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK;
samux 8:335f2506f422 417 } else {
samux 8:335f2506f422 418 bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK | BD_DATA01_MASK;
samux 8:335f2506f422 419 }
mbed_official 20:d38b72fed893 420
samux 8:335f2506f422 421 Data1 ^= (1 << endpoint);
mbed_official 20:d38b72fed893 422
samux 8:335f2506f422 423 return EP_PENDING;
samux 8:335f2506f422 424 }
samux 8:335f2506f422 425
samux 8:335f2506f422 426 EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint) {
samux 8:335f2506f422 427 if (epComplete & EP(endpoint)) {
samux 8:335f2506f422 428 epComplete &= ~EP(endpoint);
samux 8:335f2506f422 429 return EP_COMPLETED;
samux 8:335f2506f422 430 }
samux 8:335f2506f422 431
samux 8:335f2506f422 432 return EP_PENDING;
samux 8:335f2506f422 433 }
samux 8:335f2506f422 434
samux 8:335f2506f422 435 void USBHAL::stallEndpoint(uint8_t endpoint) {
samux 8:335f2506f422 436 USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT |= USB_ENDPT_EPSTALL_MASK;
samux 8:335f2506f422 437 }
samux 8:335f2506f422 438
samux 8:335f2506f422 439 void USBHAL::unstallEndpoint(uint8_t endpoint) {
samux 8:335f2506f422 440 USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT &= ~USB_ENDPT_EPSTALL_MASK;
samux 8:335f2506f422 441 }
samux 8:335f2506f422 442
samux 8:335f2506f422 443 bool USBHAL::getEndpointStallState(uint8_t endpoint) {
samux 8:335f2506f422 444 uint8_t stall = (USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT & USB_ENDPT_EPSTALL_MASK);
samux 8:335f2506f422 445 return (stall) ? true : false;
samux 8:335f2506f422 446 }
samux 8:335f2506f422 447
samux 8:335f2506f422 448 void USBHAL::remoteWakeup(void) {
samux 8:335f2506f422 449 // [TODO]
samux 8:335f2506f422 450 }
samux 8:335f2506f422 451
samux 8:335f2506f422 452
samux 8:335f2506f422 453 void USBHAL::_usbisr(void) {
samux 8:335f2506f422 454 instance->usbisr();
samux 8:335f2506f422 455 }
samux 8:335f2506f422 456
samux 8:335f2506f422 457
samux 8:335f2506f422 458 void USBHAL::usbisr(void) {
samux 8:335f2506f422 459 uint8_t i;
samux 8:335f2506f422 460 uint8_t istat = USB0->ISTAT;
samux 8:335f2506f422 461
samux 8:335f2506f422 462 // reset interrupt
mbed_official 20:d38b72fed893 463 if (istat & USB_ISTAT_USBRST_MASK) {
samux 8:335f2506f422 464 // disable all endpt
samux 8:335f2506f422 465 for(i = 0; i < 16; i++) {
samux 8:335f2506f422 466 USB0->ENDPOINT[i].ENDPT = 0x00;
samux 8:335f2506f422 467 }
samux 8:335f2506f422 468
samux 8:335f2506f422 469 // enable control endpoint
samux 8:335f2506f422 470 realiseEndpoint(EP0OUT, MAX_PACKET_SIZE_EP0, 0);
samux 8:335f2506f422 471 realiseEndpoint(EP0IN, MAX_PACKET_SIZE_EP0, 0);
samux 8:335f2506f422 472
samux 8:335f2506f422 473 Data1 = 0x55555555;
samux 8:335f2506f422 474 USB0->CTL |= USB_CTL_ODDRST_MASK;
samux 8:335f2506f422 475
samux 8:335f2506f422 476 USB0->ISTAT = 0xFF; // clear all interrupt status flags
samux 8:335f2506f422 477 USB0->ERRSTAT = 0xFF; // clear all error flags
samux 8:335f2506f422 478 USB0->ERREN = 0xFF; // enable error interrupt sources
samux 8:335f2506f422 479 USB0->ADDR = 0x00; // set default address
samux 8:335f2506f422 480
samux 8:335f2506f422 481 return;
samux 8:335f2506f422 482 }
samux 8:335f2506f422 483
samux 8:335f2506f422 484 // resume interrupt
samux 8:335f2506f422 485 if (istat & USB_ISTAT_RESUME_MASK) {
samux 8:335f2506f422 486 USB0->ISTAT = USB_ISTAT_RESUME_MASK;
samux 8:335f2506f422 487 }
samux 8:335f2506f422 488
samux 8:335f2506f422 489 // SOF interrupt
samux 8:335f2506f422 490 if (istat & USB_ISTAT_SOFTOK_MASK) {
mbed_official 20:d38b72fed893 491 USB0->ISTAT = USB_ISTAT_SOFTOK_MASK;
samux 8:335f2506f422 492 // SOF event, read frame number
samux 8:335f2506f422 493 SOF(frameNumber());
samux 8:335f2506f422 494 }
mbed_official 20:d38b72fed893 495
samux 8:335f2506f422 496 // stall interrupt
samux 8:335f2506f422 497 if (istat & 1<<7) {
samux 8:335f2506f422 498 if (USB0->ENDPOINT[0].ENDPT & USB_ENDPT_EPSTALL_MASK)
samux 8:335f2506f422 499 USB0->ENDPOINT[0].ENDPT &= ~USB_ENDPT_EPSTALL_MASK;
samux 8:335f2506f422 500 USB0->ISTAT |= USB_ISTAT_STALL_MASK;
samux 8:335f2506f422 501 }
samux 8:335f2506f422 502
samux 8:335f2506f422 503 // token interrupt
samux 8:335f2506f422 504 if (istat & 1<<3) {
samux 8:335f2506f422 505 uint32_t num = (USB0->STAT >> 4) & 0x0F;
samux 8:335f2506f422 506 uint32_t dir = (USB0->STAT >> 3) & 0x01;
samux 8:335f2506f422 507 uint32_t ev_odd = (USB0->STAT >> 2) & 0x01;
samux 8:335f2506f422 508
samux 8:335f2506f422 509 // setup packet
samux 8:335f2506f422 510 if ((num == 0) && (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == SETUP_TOKEN)) {
samux 8:335f2506f422 511 Data1 &= ~0x02;
samux 8:335f2506f422 512 bdt[EP_BDT_IDX(0, TX, EVEN)].info &= ~BD_OWN_MASK;
samux 8:335f2506f422 513 bdt[EP_BDT_IDX(0, TX, ODD)].info &= ~BD_OWN_MASK;
samux 8:335f2506f422 514
samux 8:335f2506f422 515 // EP0 SETUP event (SETUP data received)
samux 8:335f2506f422 516 EP0setupCallback();
mbed_official 20:d38b72fed893 517
samux 8:335f2506f422 518 } else {
samux 8:335f2506f422 519 // OUT packet
samux 8:335f2506f422 520 if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == OUT_TOKEN) {
samux 8:335f2506f422 521 if (num == 0)
samux 8:335f2506f422 522 EP0out();
samux 8:335f2506f422 523 else {
samux 8:335f2506f422 524 epComplete |= (1 << EP(num));
samux 8:335f2506f422 525 if ((instance->*(epCallback[EP(num) - 2]))()) {
samux 8:335f2506f422 526 epComplete &= ~(1 << EP(num));
samux 8:335f2506f422 527 }
samux 8:335f2506f422 528 }
samux 8:335f2506f422 529 }
samux 8:335f2506f422 530
samux 8:335f2506f422 531 // IN packet
samux 8:335f2506f422 532 if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == IN_TOKEN) {
samux 8:335f2506f422 533 if (num == 0) {
samux 8:335f2506f422 534 EP0in();
samux 8:335f2506f422 535 if (set_addr == 1) {
samux 8:335f2506f422 536 USB0->ADDR = addr & 0x7F;
samux 8:335f2506f422 537 set_addr = 0;
samux 8:335f2506f422 538 }
samux 8:335f2506f422 539 }
samux 8:335f2506f422 540 else {
samux 8:335f2506f422 541 epComplete |= (1 << (EP(num) + 1));
samux 8:335f2506f422 542 if ((instance->*(epCallback[EP(num) + 1 - 2]))()) {
samux 8:335f2506f422 543 epComplete &= ~(1 << (EP(num) + 1));
samux 8:335f2506f422 544 }
samux 8:335f2506f422 545 }
samux 8:335f2506f422 546 }
samux 8:335f2506f422 547 }
samux 8:335f2506f422 548
samux 8:335f2506f422 549 USB0->ISTAT = USB_ISTAT_TOKDNE_MASK;
samux 8:335f2506f422 550 }
mbed_official 20:d38b72fed893 551
samux 8:335f2506f422 552 // sleep interrupt
samux 8:335f2506f422 553 if (istat & 1<<4) {
samux 8:335f2506f422 554 USB0->ISTAT |= USB_ISTAT_SLEEP_MASK;
mbed_official 20:d38b72fed893 555 }
samux 8:335f2506f422 556
samux 8:335f2506f422 557 // error interrupt
samux 8:335f2506f422 558 if (istat & USB_ISTAT_ERROR_MASK) {
samux 8:335f2506f422 559 USB0->ERRSTAT = 0xFF;
samux 8:335f2506f422 560 USB0->ISTAT |= USB_ISTAT_ERROR_MASK;
samux 8:335f2506f422 561 }
samux 8:335f2506f422 562 }
samux 8:335f2506f422 563
samux 8:335f2506f422 564
samux 8:335f2506f422 565 #endif