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targets/hal/TARGET_Freescale/TARGET_KLXX/analogin_api.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16 #include "mbed_assert.h"
bogdanm 0:9b334a45a8ff 17 #include "analogin_api.h"
bogdanm 0:9b334a45a8ff 18
bogdanm 0:9b334a45a8ff 19 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 20 #include "pinmap.h"
bogdanm 0:9b334a45a8ff 21 #include "clk_freqs.h"
bogdanm 0:9b334a45a8ff 22 #include "PeripheralPins.h"
bogdanm 0:9b334a45a8ff 23
bogdanm 0:9b334a45a8ff 24 #define MAX_FADC 6000000
bogdanm 0:9b334a45a8ff 25 #define CHANNELS_A_SHIFT 5
bogdanm 0:9b334a45a8ff 26
bogdanm 0:9b334a45a8ff 27
bogdanm 0:9b334a45a8ff 28 void analogin_init(analogin_t *obj, PinName pin) {
bogdanm 0:9b334a45a8ff 29 obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
bogdanm 0:9b334a45a8ff 30 MBED_ASSERT(obj->adc != (ADCName)NC);
bogdanm 0:9b334a45a8ff 31
bogdanm 0:9b334a45a8ff 32 SIM->SCGC6 |= SIM_SCGC6_ADC0_MASK;
bogdanm 0:9b334a45a8ff 33
bogdanm 0:9b334a45a8ff 34 uint32_t port = (uint32_t)pin >> PORT_SHIFT;
bogdanm 0:9b334a45a8ff 35 SIM->SCGC5 |= 1 << (SIM_SCGC5_PORTA_SHIFT + port);
bogdanm 0:9b334a45a8ff 36
bogdanm 0:9b334a45a8ff 37 uint32_t cfg2_muxsel = ADC_CFG2_MUXSEL_MASK;
bogdanm 0:9b334a45a8ff 38 if (obj->adc & (1 << CHANNELS_A_SHIFT)) {
bogdanm 0:9b334a45a8ff 39 cfg2_muxsel = 0;
bogdanm 0:9b334a45a8ff 40 }
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 // bus clk
bogdanm 0:9b334a45a8ff 43 uint32_t PCLK = bus_frequency();
bogdanm 0:9b334a45a8ff 44 uint32_t clkdiv;
bogdanm 0:9b334a45a8ff 45 for (clkdiv = 0; clkdiv < 4; clkdiv++) {
bogdanm 0:9b334a45a8ff 46 if ((PCLK >> clkdiv) <= MAX_FADC)
bogdanm 0:9b334a45a8ff 47 break;
bogdanm 0:9b334a45a8ff 48 }
bogdanm 0:9b334a45a8ff 49 if (clkdiv == 4) //Set max div
bogdanm 0:9b334a45a8ff 50 clkdiv = 0x7;
bogdanm 0:9b334a45a8ff 51
bogdanm 0:9b334a45a8ff 52 ADC0->SC1[1] = ADC_SC1_ADCH(obj->adc & ~(1 << CHANNELS_A_SHIFT));
bogdanm 0:9b334a45a8ff 53
bogdanm 0:9b334a45a8ff 54 ADC0->CFG1 = ADC_CFG1_ADLPC_MASK // Low-Power Configuration
bogdanm 0:9b334a45a8ff 55 | ADC_CFG1_ADIV(clkdiv & 0x3) // Clock Divide Select: (Input Clock)/8
bogdanm 0:9b334a45a8ff 56 | ADC_CFG1_ADLSMP_MASK // Long Sample Time
bogdanm 0:9b334a45a8ff 57 | ADC_CFG1_MODE(3) // (16)bits Resolution
bogdanm 0:9b334a45a8ff 58 | ADC_CFG1_ADICLK(clkdiv >> 2); // Input Clock: (Bus Clock)/2
bogdanm 0:9b334a45a8ff 59
bogdanm 0:9b334a45a8ff 60 ADC0->CFG2 = cfg2_muxsel // ADxxb or ADxxa channels
bogdanm 0:9b334a45a8ff 61 | ADC_CFG2_ADHSC_MASK // High-Speed Configuration
bogdanm 0:9b334a45a8ff 62 | ADC_CFG2_ADLSTS(0); // Long Sample Time Select
bogdanm 0:9b334a45a8ff 63
bogdanm 0:9b334a45a8ff 64 ADC0->SC2 = ADC_SC2_REFSEL(0); // Default Voltage Reference
bogdanm 0:9b334a45a8ff 65
bogdanm 0:9b334a45a8ff 66 ADC0->SC3 = ADC_SC3_AVGE_MASK // Hardware Average Enable
bogdanm 0:9b334a45a8ff 67 | ADC_SC3_AVGS(0); // 4 Samples Averaged
bogdanm 0:9b334a45a8ff 68
bogdanm 0:9b334a45a8ff 69 pinmap_pinout(pin, PinMap_ADC);
bogdanm 0:9b334a45a8ff 70 }
bogdanm 0:9b334a45a8ff 71
bogdanm 0:9b334a45a8ff 72 uint16_t analogin_read_u16(analogin_t *obj) {
bogdanm 0:9b334a45a8ff 73 // start conversion
bogdanm 0:9b334a45a8ff 74 ADC0->SC1[0] = ADC_SC1_ADCH(obj->adc & ~(1 << CHANNELS_A_SHIFT));
bogdanm 0:9b334a45a8ff 75
bogdanm 0:9b334a45a8ff 76 // Wait Conversion Complete
bogdanm 0:9b334a45a8ff 77 while ((ADC0->SC1[0] & ADC_SC1_COCO_MASK) != ADC_SC1_COCO_MASK);
bogdanm 0:9b334a45a8ff 78
bogdanm 0:9b334a45a8ff 79 // Return value
bogdanm 0:9b334a45a8ff 80 return (uint16_t)ADC0->R[0];
bogdanm 0:9b334a45a8ff 81 }
bogdanm 0:9b334a45a8ff 82
bogdanm 0:9b334a45a8ff 83 float analogin_read(analogin_t *obj) {
bogdanm 0:9b334a45a8ff 84 uint16_t value = analogin_read_u16(obj);
bogdanm 0:9b334a45a8ff 85 return (float)value * (1.0f / (float)0xFFFF);
bogdanm 0:9b334a45a8ff 86 }
bogdanm 0:9b334a45a8ff 87