Junichi Katsu / Mbed 2 deprecated WallbotR4

Test Ver

Dependencies:   mbed FatFileSystem

PowerControl/PowerControl.h@0:269589d8d2c2, 2012-11-17 (annotated)

Committer:
jksoft
Date:
Sat Nov 17 13:22:00 2012 +0000
Revision:
0:269589d8d2c2
Test Program

Who changed what in which revision?

UserRevisionLine numberNew contents of line
jksoft 0:269589d8d2c2 1 /* mbed PowerControl Library
jksoft 0:269589d8d2c2 2 * Copyright (c) 2010 Michael Wei
jksoft 0:269589d8d2c2 3 */
jksoft 0:269589d8d2c2 4
jksoft 0:269589d8d2c2 5 #ifndef MBED_POWERCONTROL_H
jksoft 0:269589d8d2c2 6 #define MBED_POWERCONTROL_H
jksoft 0:269589d8d2c2 7
jksoft 0:269589d8d2c2 8 //shouldn't have to include, but fixes weird problems with defines
jksoft 0:269589d8d2c2 9 #include "LPC1768/LPC17xx.h"
jksoft 0:269589d8d2c2 10
jksoft 0:269589d8d2c2 11 //System Control Register
jksoft 0:269589d8d2c2 12 // bit 0: Reserved
jksoft 0:269589d8d2c2 13 // bit 1: Sleep on Exit
jksoft 0:269589d8d2c2 14 #define LPC1768_SCR_SLEEPONEXIT 0x2
jksoft 0:269589d8d2c2 15 // bit 2: Deep Sleep
jksoft 0:269589d8d2c2 16 #define LPC1768_SCR_SLEEPDEEP 0x4
jksoft 0:269589d8d2c2 17 // bit 3: Resereved
jksoft 0:269589d8d2c2 18 // bit 4: Send on Pending
jksoft 0:269589d8d2c2 19 #define LPC1768_SCR_SEVONPEND 0x10
jksoft 0:269589d8d2c2 20 // bit 5-31: Reserved
jksoft 0:269589d8d2c2 21
jksoft 0:269589d8d2c2 22 //Power Control Register
jksoft 0:269589d8d2c2 23 // bit 0: Power mode control bit 0 (power-down mode)
jksoft 0:269589d8d2c2 24 #define LPC1768_PCON_PM0 0x1
jksoft 0:269589d8d2c2 25 // bit 1: Power mode control bit 1 (deep power-down mode)
jksoft 0:269589d8d2c2 26 #define LPC1768_PCON_PM1 0x2
jksoft 0:269589d8d2c2 27 // bit 2: Brown-out reduced power mode
jksoft 0:269589d8d2c2 28 #define LPC1768_PCON_BODRPM 0x4
jksoft 0:269589d8d2c2 29 // bit 3: Brown-out global disable
jksoft 0:269589d8d2c2 30 #define LPC1768_PCON_BOGD 0x8
jksoft 0:269589d8d2c2 31 // bit 4: Brown-out reset disable
jksoft 0:269589d8d2c2 32 #define LPC1768_PCON_BORD 0x10
jksoft 0:269589d8d2c2 33 // bit 5-7 : Reserved
jksoft 0:269589d8d2c2 34 // bit 8: Sleep Mode Entry Flag
jksoft 0:269589d8d2c2 35 #define LPC1768_PCON_SMFLAG 0x100
jksoft 0:269589d8d2c2 36 // bit 9: Deep Sleep Entry Flag
jksoft 0:269589d8d2c2 37 #define LPC1768_PCON_DSFLAG 0x200
jksoft 0:269589d8d2c2 38 // bit 10: Power Down Entry Flag
jksoft 0:269589d8d2c2 39 #define LPC1768_PCON_PDFLAG 0x400
jksoft 0:269589d8d2c2 40 // bit 11: Deep Power Down Entry Flag
jksoft 0:269589d8d2c2 41 #define LPC1768_PCON_DPDFLAG 0x800
jksoft 0:269589d8d2c2 42 // bit 12-31: Reserved
jksoft 0:269589d8d2c2 43
jksoft 0:269589d8d2c2 44 //"Sleep Mode" (WFI).
jksoft 0:269589d8d2c2 45 inline void Sleep(void)
jksoft 0:269589d8d2c2 46 {
jksoft 0:269589d8d2c2 47 __WFI();
jksoft 0:269589d8d2c2 48 }
jksoft 0:269589d8d2c2 49
jksoft 0:269589d8d2c2 50 //"Deep Sleep" Mode
jksoft 0:269589d8d2c2 51 inline void DeepSleep(void)
jksoft 0:269589d8d2c2 52 {
jksoft 0:269589d8d2c2 53 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
jksoft 0:269589d8d2c2 54 __WFI();
jksoft 0:269589d8d2c2 55 }
jksoft 0:269589d8d2c2 56
jksoft 0:269589d8d2c2 57 //"Power-Down" Mode
jksoft 0:269589d8d2c2 58 inline void PowerDown(void)
jksoft 0:269589d8d2c2 59 {
jksoft 0:269589d8d2c2 60 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
jksoft 0:269589d8d2c2 61 LPC_SC->PCON &= ~LPC1768_PCON_PM1;
jksoft 0:269589d8d2c2 62 LPC_SC->PCON |= LPC1768_PCON_PM0;
jksoft 0:269589d8d2c2 63 __WFI();
jksoft 0:269589d8d2c2 64 //reset back to normal
jksoft 0:269589d8d2c2 65 LPC_SC->PCON &= ~(LPC1768_PCON_PM1 | LPC1768_PCON_PM0);
jksoft 0:269589d8d2c2 66 }
jksoft 0:269589d8d2c2 67
jksoft 0:269589d8d2c2 68 //"Deep Power-Down" Mode
jksoft 0:269589d8d2c2 69 inline void DeepPowerDown(void)
jksoft 0:269589d8d2c2 70 {
jksoft 0:269589d8d2c2 71 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
jksoft 0:269589d8d2c2 72 LPC_SC->PCON |= LPC1768_PCON_PM1 | LPC1768_PCON_PM0;
jksoft 0:269589d8d2c2 73 __WFI();
jksoft 0:269589d8d2c2 74 //reset back to normal
jksoft 0:269589d8d2c2 75 LPC_SC->PCON &= ~(LPC1768_PCON_PM1 | LPC1768_PCON_PM0);
jksoft 0:269589d8d2c2 76 }
jksoft 0:269589d8d2c2 77
jksoft 0:269589d8d2c2 78 //shut down BOD during power-down/deep sleep
jksoft 0:269589d8d2c2 79 inline void BrownOut_ReducedPowerMode_Enable(void)
jksoft 0:269589d8d2c2 80 {
jksoft 0:269589d8d2c2 81 LPC_SC->PCON |= LPC1768_PCON_BODRPM;
jksoft 0:269589d8d2c2 82 }
jksoft 0:269589d8d2c2 83
jksoft 0:269589d8d2c2 84 //turn on BOD during power-down/deep sleep
jksoft 0:269589d8d2c2 85 inline void BrownOut_ReducedPowerMode_Disable(void)
jksoft 0:269589d8d2c2 86 {
jksoft 0:269589d8d2c2 87 LPC_SC->PCON &= ~LPC1768_PCON_BODRPM;
jksoft 0:269589d8d2c2 88 }
jksoft 0:269589d8d2c2 89
jksoft 0:269589d8d2c2 90 //turn off brown out circutry
jksoft 0:269589d8d2c2 91 inline void BrownOut_Global_Disable(void)
jksoft 0:269589d8d2c2 92 {
jksoft 0:269589d8d2c2 93 LPC_SC->PCON |= LPC1768_PCON_BOGD;
jksoft 0:269589d8d2c2 94 }
jksoft 0:269589d8d2c2 95
jksoft 0:269589d8d2c2 96 //turn on brown out circutry
jksoft 0:269589d8d2c2 97 inline void BrownOut_Global_Enable(void)
jksoft 0:269589d8d2c2 98 {
jksoft 0:269589d8d2c2 99 LPC_SC->PCON &= !LPC1768_PCON_BOGD;
jksoft 0:269589d8d2c2 100 }
jksoft 0:269589d8d2c2 101
jksoft 0:269589d8d2c2 102 //turn off brown out reset circutry
jksoft 0:269589d8d2c2 103 inline void BrownOut_Reset_Disable(void)
jksoft 0:269589d8d2c2 104 {
jksoft 0:269589d8d2c2 105 LPC_SC->PCON |= LPC1768_PCON_BORD;
jksoft 0:269589d8d2c2 106 }
jksoft 0:269589d8d2c2 107
jksoft 0:269589d8d2c2 108 //turn on brown outreset circutry
jksoft 0:269589d8d2c2 109 inline void BrownOut_Reset_Enable(void)
jksoft 0:269589d8d2c2 110 {
jksoft 0:269589d8d2c2 111 LPC_SC->PCON &= ~LPC1768_PCON_BORD;
jksoft 0:269589d8d2c2 112 }
jksoft 0:269589d8d2c2 113 //Peripheral Control Register
jksoft 0:269589d8d2c2 114 // bit 0: Reserved
jksoft 0:269589d8d2c2 115 // bit 1: PCTIM0: Timer/Counter 0 power/clock enable
jksoft 0:269589d8d2c2 116 #define LPC1768_PCONP_PCTIM0 0x2
jksoft 0:269589d8d2c2 117 // bit 2: PCTIM1: Timer/Counter 1 power/clock enable
jksoft 0:269589d8d2c2 118 #define LPC1768_PCONP_PCTIM1 0x4
jksoft 0:269589d8d2c2 119 // bit 3: PCUART0: UART 0 power/clock enable
jksoft 0:269589d8d2c2 120 #define LPC1768_PCONP_PCUART0 0x8
jksoft 0:269589d8d2c2 121 // bit 4: PCUART1: UART 1 power/clock enable
jksoft 0:269589d8d2c2 122 #define LPC1768_PCONP_PCUART1 0x10
jksoft 0:269589d8d2c2 123 // bit 5: Reserved
jksoft 0:269589d8d2c2 124 // bit 6: PCPWM1: PWM 1 power/clock enable
jksoft 0:269589d8d2c2 125 #define LPC1768_PCONP_PCPWM1 0x40
jksoft 0:269589d8d2c2 126 // bit 7: PCI2C0: I2C interface 0 power/clock enable
jksoft 0:269589d8d2c2 127 #define LPC1768_PCONP_PCI2C0 0x80
jksoft 0:269589d8d2c2 128 // bit 8: PCSPI: SPI interface power/clock enable
jksoft 0:269589d8d2c2 129 #define LPC1768_PCONP_PCSPI 0x100
jksoft 0:269589d8d2c2 130 // bit 9: PCRTC: RTC power/clock enable
jksoft 0:269589d8d2c2 131 #define LPC1768_PCONP_PCRTC 0x200
jksoft 0:269589d8d2c2 132 // bit 10: PCSSP1: SSP interface 1 power/clock enable
jksoft 0:269589d8d2c2 133 #define LPC1768_PCONP_PCSSP1 0x400
jksoft 0:269589d8d2c2 134 // bit 11: Reserved
jksoft 0:269589d8d2c2 135 // bit 12: PCADC: A/D converter power/clock enable
jksoft 0:269589d8d2c2 136 #define LPC1768_PCONP_PCADC 0x1000
jksoft 0:269589d8d2c2 137 // bit 13: PCCAN1: CAN controller 1 power/clock enable
jksoft 0:269589d8d2c2 138 #define LPC1768_PCONP_PCCAN1 0x2000
jksoft 0:269589d8d2c2 139 // bit 14: PCCAN2: CAN controller 2 power/clock enable
jksoft 0:269589d8d2c2 140 #define LPC1768_PCONP_PCCAN2 0x4000
jksoft 0:269589d8d2c2 141 // bit 15: PCGPIO: GPIOs power/clock enable
jksoft 0:269589d8d2c2 142 #define LPC1768_PCONP_PCGPIO 0x8000
jksoft 0:269589d8d2c2 143 // bit 16: PCRIT: Repetitive interrupt timer power/clock enable
jksoft 0:269589d8d2c2 144 #define LPC1768_PCONP_PCRIT 0x10000
jksoft 0:269589d8d2c2 145 // bit 17: PCMCPWM: Motor control PWM power/clock enable
jksoft 0:269589d8d2c2 146 #define LPC1768_PCONP_PCMCPWM 0x20000
jksoft 0:269589d8d2c2 147 // bit 18: PCQEI: Quadrature encoder interface power/clock enable
jksoft 0:269589d8d2c2 148 #define LPC1768_PCONP_PCQEI 0x40000
jksoft 0:269589d8d2c2 149 // bit 19: PCI2C1: I2C interface 1 power/clock enable
jksoft 0:269589d8d2c2 150 #define LPC1768_PCONP_PCI2C1 0x80000
jksoft 0:269589d8d2c2 151 // bit 20: Reserved
jksoft 0:269589d8d2c2 152 // bit 21: PCSSP0: SSP interface 0 power/clock enable
jksoft 0:269589d8d2c2 153 #define LPC1768_PCONP_PCSSP0 0x200000
jksoft 0:269589d8d2c2 154 // bit 22: PCTIM2: Timer 2 power/clock enable
jksoft 0:269589d8d2c2 155 #define LPC1768_PCONP_PCTIM2 0x400000
jksoft 0:269589d8d2c2 156 // bit 23: PCTIM3: Timer 3 power/clock enable
jksoft 0:269589d8d2c2 157 #define LPC1768_PCONP_PCQTIM3 0x800000
jksoft 0:269589d8d2c2 158 // bit 24: PCUART2: UART 2 power/clock enable
jksoft 0:269589d8d2c2 159 #define LPC1768_PCONP_PCUART2 0x1000000
jksoft 0:269589d8d2c2 160 // bit 25: PCUART3: UART 3 power/clock enable
jksoft 0:269589d8d2c2 161 #define LPC1768_PCONP_PCUART3 0x2000000
jksoft 0:269589d8d2c2 162 // bit 26: PCI2C2: I2C interface 2 power/clock enable
jksoft 0:269589d8d2c2 163 #define LPC1768_PCONP_PCI2C2 0x4000000
jksoft 0:269589d8d2c2 164 // bit 27: PCI2S: I2S interface power/clock enable
jksoft 0:269589d8d2c2 165 #define LPC1768_PCONP_PCI2S 0x8000000
jksoft 0:269589d8d2c2 166 // bit 28: Reserved
jksoft 0:269589d8d2c2 167 // bit 29: PCGPDMA: GP DMA function power/clock enable
jksoft 0:269589d8d2c2 168 #define LPC1768_PCONP_PCGPDMA 0x20000000
jksoft 0:269589d8d2c2 169 // bit 30: PCENET: Ethernet block power/clock enable
jksoft 0:269589d8d2c2 170 #define LPC1768_PCONP_PCENET 0x40000000
jksoft 0:269589d8d2c2 171 // bit 31: PCUSB: USB interface power/clock enable
jksoft 0:269589d8d2c2 172 #define LPC1768_PCONP_PCUSB 0x80000000
jksoft 0:269589d8d2c2 173
jksoft 0:269589d8d2c2 174 //Powers Up specified Peripheral(s)
jksoft 0:269589d8d2c2 175 inline unsigned int Peripheral_PowerUp(unsigned int bitMask)
jksoft 0:269589d8d2c2 176 {
jksoft 0:269589d8d2c2 177 return LPC_SC->PCONP |= bitMask;
jksoft 0:269589d8d2c2 178 }
jksoft 0:269589d8d2c2 179
jksoft 0:269589d8d2c2 180 //Powers Down specified Peripheral(s)
jksoft 0:269589d8d2c2 181 inline unsigned int Peripheral_PowerDown(unsigned int bitMask)
jksoft 0:269589d8d2c2 182 {
jksoft 0:269589d8d2c2 183 return LPC_SC->PCONP &= ~bitMask;
jksoft 0:269589d8d2c2 184 }
jksoft 0:269589d8d2c2 185
jksoft 0:269589d8d2c2 186 //returns if the peripheral is on or off
jksoft 0:269589d8d2c2 187 inline bool Peripheral_GetStatus(unsigned int peripheral)
jksoft 0:269589d8d2c2 188 {
jksoft 0:269589d8d2c2 189 return (LPC_SC->PCONP & peripheral) ? true : false;
jksoft 0:269589d8d2c2 190 }
jksoft 0:269589d8d2c2 191
jksoft 0:269589d8d2c2 192 #endif