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nRF51822_wallbot/nordic/nrf-sdk/s110/nrf_sdm.h@0:8468a4403fea, 2016-10-11 (annotated)

Committer:
jksoft
Date:
Tue Oct 11 11:09:42 2016 +0000
Revision:
0:8468a4403fea
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jksoft 0:8468a4403fea 1 /*
jksoft 0:8468a4403fea 2 * Copyright (c) 2011 Nordic Semiconductor. All Rights Reserved.
jksoft 0:8468a4403fea 3 *
jksoft 0:8468a4403fea 4 * The information contained herein is confidential property of Nordic Semiconductor. The use,
jksoft 0:8468a4403fea 5 * copying, transfer or disclosure of such information is prohibited except by express written
jksoft 0:8468a4403fea 6 * agreement with Nordic Semiconductor.
jksoft 0:8468a4403fea 7 *
jksoft 0:8468a4403fea 8 */
jksoft 0:8468a4403fea 9 /**
jksoft 0:8468a4403fea 10 @defgroup nrf_sdm_api SoftDevice Manager API
jksoft 0:8468a4403fea 11 @{
jksoft 0:8468a4403fea 12
jksoft 0:8468a4403fea 13 @brief APIs for SoftDevice management.
jksoft 0:8468a4403fea 14
jksoft 0:8468a4403fea 15 */
jksoft 0:8468a4403fea 16
jksoft 0:8468a4403fea 17 /* Header guard */
jksoft 0:8468a4403fea 18 #ifndef NRF_SDM_H__
jksoft 0:8468a4403fea 19 #define NRF_SDM_H__
jksoft 0:8468a4403fea 20
jksoft 0:8468a4403fea 21 #include "nrf_svc.h"
jksoft 0:8468a4403fea 22 #include "nrf51.h"
jksoft 0:8468a4403fea 23 #include "nrf_soc.h"
jksoft 0:8468a4403fea 24 #include "nrf_error_sdm.h"
jksoft 0:8468a4403fea 25
jksoft 0:8468a4403fea 26 /** @addtogroup NRF_SDM_DEFINES Defines
jksoft 0:8468a4403fea 27 * @{ */
jksoft 0:8468a4403fea 28
jksoft 0:8468a4403fea 29 /**@brief SoftDevice Manager SVC Base number. */
jksoft 0:8468a4403fea 30 #define SDM_SVC_BASE (0x10)
jksoft 0:8468a4403fea 31
jksoft 0:8468a4403fea 32 /** @} */
jksoft 0:8468a4403fea 33
jksoft 0:8468a4403fea 34 /** @addtogroup NRF_SDM_ENUMS Enumerations
jksoft 0:8468a4403fea 35 * @{ */
jksoft 0:8468a4403fea 36
jksoft 0:8468a4403fea 37 /**@brief nRF SoftDevice Manager API SVC numbers. */
jksoft 0:8468a4403fea 38 enum NRF_SD_SVCS
jksoft 0:8468a4403fea 39 {
jksoft 0:8468a4403fea 40 SD_SOFTDEVICE_ENABLE = SDM_SVC_BASE, /**< ::sd_softdevice_enable */
jksoft 0:8468a4403fea 41 SD_SOFTDEVICE_DISABLE, /**< ::sd_softdevice_disable */
jksoft 0:8468a4403fea 42 SD_SOFTDEVICE_IS_ENABLED, /**< ::sd_softdevice_is_enabled */
jksoft 0:8468a4403fea 43 SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, /**< ::sd_softdevice_vector_table_base_set */
jksoft 0:8468a4403fea 44 SVC_SDM_LAST /**< Placeholder for last SDM SVC */
jksoft 0:8468a4403fea 45 };
jksoft 0:8468a4403fea 46
jksoft 0:8468a4403fea 47 /**@brief Possible lfclk oscillator sources. */
jksoft 0:8468a4403fea 48 enum NRF_CLOCK_LFCLKSRCS
jksoft 0:8468a4403fea 49 {
jksoft 0:8468a4403fea 50 NRF_CLOCK_LFCLKSRC_SYNTH_250_PPM, /**< LFCLK Synthesized from HFCLK. */
jksoft 0:8468a4403fea 51 NRF_CLOCK_LFCLKSRC_XTAL_500_PPM, /**< LFCLK crystal oscillator 500 PPM accuracy. */
jksoft 0:8468a4403fea 52 NRF_CLOCK_LFCLKSRC_XTAL_250_PPM, /**< LFCLK crystal oscillator 250 PPM accuracy. */
jksoft 0:8468a4403fea 53 NRF_CLOCK_LFCLKSRC_XTAL_150_PPM, /**< LFCLK crystal oscillator 150 PPM accuracy. */
jksoft 0:8468a4403fea 54 NRF_CLOCK_LFCLKSRC_XTAL_100_PPM, /**< LFCLK crystal oscillator 100 PPM accuracy. */
jksoft 0:8468a4403fea 55 NRF_CLOCK_LFCLKSRC_XTAL_75_PPM, /**< LFCLK crystal oscillator 75 PPM accuracy. */
jksoft 0:8468a4403fea 56 NRF_CLOCK_LFCLKSRC_XTAL_50_PPM, /**< LFCLK crystal oscillator 50 PPM accuracy. */
jksoft 0:8468a4403fea 57 NRF_CLOCK_LFCLKSRC_XTAL_30_PPM, /**< LFCLK crystal oscillator 30 PPM accuracy. */
jksoft 0:8468a4403fea 58 NRF_CLOCK_LFCLKSRC_XTAL_20_PPM, /**< LFCLK crystal oscillator 20 PPM accuracy. */
jksoft 0:8468a4403fea 59 NRF_CLOCK_LFCLKSRC_RC_250_PPM_250MS_CALIBRATION, /**< LFCLK RC oscillator, 250ms calibration interval.*/
jksoft 0:8468a4403fea 60 NRF_CLOCK_LFCLKSRC_RC_250_PPM_500MS_CALIBRATION, /**< LFCLK RC oscillator, 500ms calibration interval.*/
jksoft 0:8468a4403fea 61 NRF_CLOCK_LFCLKSRC_RC_250_PPM_1000MS_CALIBRATION, /**< LFCLK RC oscillator, 1000ms calibration interval.*/
jksoft 0:8468a4403fea 62 NRF_CLOCK_LFCLKSRC_RC_250_PPM_2000MS_CALIBRATION, /**< LFCLK RC oscillator, 2000ms calibration interval.*/
jksoft 0:8468a4403fea 63 NRF_CLOCK_LFCLKSRC_RC_250_PPM_4000MS_CALIBRATION, /**< LFCLK RC oscillator, 4000ms calibration interval.*/
jksoft 0:8468a4403fea 64 NRF_CLOCK_LFCLKSRC_RC_250_PPM_8000MS_CALIBRATION, /**< LFCLK RC oscillator, 8000ms calibration interval.*/
jksoft 0:8468a4403fea 65 NRF_CLOCK_LFCLKSRC_RC_250_PPM_TEMP_1000MS_CALIBRATION, /**< LFCLK RC oscillator. Temperature checked every 1000ms, if changed above a threshold, a calibration is done.*/
jksoft 0:8468a4403fea 66 NRF_CLOCK_LFCLKSRC_RC_250_PPM_TEMP_2000MS_CALIBRATION, /**< LFCLK RC oscillator. Temperature checked every 2000ms, if changed above a threshold, a calibration is done.*/
jksoft 0:8468a4403fea 67 NRF_CLOCK_LFCLKSRC_RC_250_PPM_TEMP_4000MS_CALIBRATION, /**< LFCLK RC oscillator. Temperature checked every 4000ms, if changed above a threshold, a calibration is done.*/
jksoft 0:8468a4403fea 68 NRF_CLOCK_LFCLKSRC_RC_250_PPM_TEMP_8000MS_CALIBRATION, /**< LFCLK RC oscillator. Temperature checked every 8000ms, if changed above a threshold, a calibration is done.*/
jksoft 0:8468a4403fea 69 NRF_CLOCK_LFCLKSRC_RC_250_PPM_TEMP_16000MS_CALIBRATION, /**< LFCLK RC oscillator. Temperature checked every 16000ms, if changed above a threshold, a calibration is done.*/
jksoft 0:8468a4403fea 70 };
jksoft 0:8468a4403fea 71
jksoft 0:8468a4403fea 72 /** @} */
jksoft 0:8468a4403fea 73
jksoft 0:8468a4403fea 74 /** @addtogroup NRF_SDM_TYPES Types
jksoft 0:8468a4403fea 75 * @{ */
jksoft 0:8468a4403fea 76
jksoft 0:8468a4403fea 77 /**@brief Type representing lfclk oscillator source. */
jksoft 0:8468a4403fea 78 typedef uint32_t nrf_clock_lfclksrc_t;
jksoft 0:8468a4403fea 79
jksoft 0:8468a4403fea 80
jksoft 0:8468a4403fea 81 /**@brief SoftDevice Assertion Handler type.
jksoft 0:8468a4403fea 82 *
jksoft 0:8468a4403fea 83 * When an unexpected error occurs within the SoftDevice it will call the SoftDevice assertion handler callback.
jksoft 0:8468a4403fea 84 * The protocol stack will be in an undefined state when this happens and the only way to recover will be to
jksoft 0:8468a4403fea 85 * perform a reset, using e.g. CMSIS NVIC_SystemReset().
jksoft 0:8468a4403fea 86 *
jksoft 0:8468a4403fea 87 * @note This callback is executed in HardFault context, thus SVC functions cannot be called from the SoftDevice assert callback.
jksoft 0:8468a4403fea 88 *
jksoft 0:8468a4403fea 89 * @param[in] pc The program counter of the failed assert.
jksoft 0:8468a4403fea 90 * @param[in] line_number Line number where the assert failed.
jksoft 0:8468a4403fea 91 * @param[in] file_name File name where the assert failed.
jksoft 0:8468a4403fea 92 */
jksoft 0:8468a4403fea 93 typedef void (*softdevice_assertion_handler_t)(uint32_t pc, uint16_t line_number, const uint8_t * p_file_name);
jksoft 0:8468a4403fea 94
jksoft 0:8468a4403fea 95 /** @} */
jksoft 0:8468a4403fea 96
jksoft 0:8468a4403fea 97 /** @addtogroup NRF_SDM_FUNCTIONS Functions
jksoft 0:8468a4403fea 98 * @{ */
jksoft 0:8468a4403fea 99
jksoft 0:8468a4403fea 100 /**@brief Enables the SoftDevice and by extension the protocol stack.
jksoft 0:8468a4403fea 101 *
jksoft 0:8468a4403fea 102 * Idempotent function to enable the SoftDevice.
jksoft 0:8468a4403fea 103 *
jksoft 0:8468a4403fea 104 * @note Some care must be taken if a low frequency clock source is already running when calling this function:
jksoft 0:8468a4403fea 105 * If the LF clock has a different source then the one currently running, it will be stopped. Then, the new
jksoft 0:8468a4403fea 106 * clock source will be started.
jksoft 0:8468a4403fea 107 *
jksoft 0:8468a4403fea 108 * @note This function has no effect when returning with an error.
jksoft 0:8468a4403fea 109 *
jksoft 0:8468a4403fea 110 * @post If return code is ::NRF_SUCCESS
jksoft 0:8468a4403fea 111 * - SoC library and protocol stack APIs are made available
jksoft 0:8468a4403fea 112 * - A portion of RAM will be unavailable (see relevant SDS documentation)
jksoft 0:8468a4403fea 113 * - Some peripherals will be unavailable or available only through the SoC API (see relevant SDS documentation)
jksoft 0:8468a4403fea 114 * - Interrupts will not arrive from protected peripherals or interrupts
jksoft 0:8468a4403fea 115 * - nrf_nvic_ functions must be used instead of CMSIS NVIC_ functions for reliable usage of the softdevice.
jksoft 0:8468a4403fea 116 * - Interrupt latency may be affected by the SoftDevice (see relevant SDS documentation)
jksoft 0:8468a4403fea 117 * - Chosen low frequency clock source will be running
jksoft 0:8468a4403fea 118 *
jksoft 0:8468a4403fea 119 * @param clock_source Low frequency clock source and accuracy. (Note: In the case of XTAL source, the PPM accuracy of the chosen clock source must be greater than or equal to the actual characteristics of your XTAL clock).
jksoft 0:8468a4403fea 120 * @param assertion_handler Callback for SoftDevice assertions.
jksoft 0:8468a4403fea 121 *
jksoft 0:8468a4403fea 122 * @retval ::NRF_SUCCESS
jksoft 0:8468a4403fea 123 * @retval ::NRF_ERROR_SDM_INCORRECT_INTERRUPT_CONFIGURATION SoftDeviceinterrupt is already enabled, or an enabled interrupt has an illegal priority level
jksoft 0:8468a4403fea 124 * @retval ::NRF_ERROR_SDM_LFCLK_SOURCE_UNKNOWN Unknown low frequency clock source selected
jksoft 0:8468a4403fea 125 */
jksoft 0:8468a4403fea 126 SVCALL(SD_SOFTDEVICE_ENABLE, uint32_t, sd_softdevice_enable(nrf_clock_lfclksrc_t clock_source, softdevice_assertion_handler_t assertion_handler));
jksoft 0:8468a4403fea 127
jksoft 0:8468a4403fea 128 /**@brief Disables the SoftDevice and by extension the protocol stack.
jksoft 0:8468a4403fea 129 *
jksoft 0:8468a4403fea 130 * Idempotent function to disable the SoftDevice.
jksoft 0:8468a4403fea 131 *
jksoft 0:8468a4403fea 132 * @post SoC library and protocol stack APIs are made unavailable.
jksoft 0:8468a4403fea 133 * @post All interrupts that was protected by the SoftDevice will be disabled and initialized to priority 0 (highest).
jksoft 0:8468a4403fea 134 * @post All peripherals used by the SoftDevice will be reset to default values.
jksoft 0:8468a4403fea 135 * @post All of RAM become available.
jksoft 0:8468a4403fea 136 * @post All interrupts are forwarded to the application.
jksoft 0:8468a4403fea 137 * @post LFCLK source chosen in ::sd_softdevice_enable will be left running.
jksoft 0:8468a4403fea 138 *
jksoft 0:8468a4403fea 139 * @retval ::NRF_SUCCESS
jksoft 0:8468a4403fea 140 */
jksoft 0:8468a4403fea 141 SVCALL(SD_SOFTDEVICE_DISABLE, uint32_t, sd_softdevice_disable(void));
jksoft 0:8468a4403fea 142
jksoft 0:8468a4403fea 143 /**@brief Check if the SoftDevice is enabled.
jksoft 0:8468a4403fea 144 *
jksoft 0:8468a4403fea 145 * @param[out] p_softdevice_enabled If the SoftDevice is enabled: 1 else 0.
jksoft 0:8468a4403fea 146 *
jksoft 0:8468a4403fea 147 * @retval ::NRF_SUCCESS
jksoft 0:8468a4403fea 148 */
jksoft 0:8468a4403fea 149 SVCALL(SD_SOFTDEVICE_IS_ENABLED, uint32_t, sd_softdevice_is_enabled(uint8_t * p_softdevice_enabled));
jksoft 0:8468a4403fea 150
jksoft 0:8468a4403fea 151 /**@brief Sets the base address of the interrupt vector table for interrupts forwarded from the SoftDevice
jksoft 0:8468a4403fea 152 *
jksoft 0:8468a4403fea 153 * This function is only intended to be called when a bootloader is enabled.
jksoft 0:8468a4403fea 154 *
jksoft 0:8468a4403fea 155 * @param[in] address The base address of the interrupt vector table for forwarded interrupts.
jksoft 0:8468a4403fea 156
jksoft 0:8468a4403fea 157 * @retval ::NRF_SUCCESS
jksoft 0:8468a4403fea 158 */
jksoft 0:8468a4403fea 159 SVCALL(SD_SOFTDEVICE_VECTOR_TABLE_BASE_SET, uint32_t, sd_softdevice_vector_table_base_set(uint32_t address));
jksoft 0:8468a4403fea 160
jksoft 0:8468a4403fea 161 /** @} */
jksoft 0:8468a4403fea 162
jksoft 0:8468a4403fea 163 #endif // NRF_SDM_H__
jksoft 0:8468a4403fea 164
jksoft 0:8468a4403fea 165 /**
jksoft 0:8468a4403fea 166 @}
jksoft 0:8468a4403fea 167 */