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mbed_config.h
00001 /* 00002 * mbed SDK 00003 * Copyright (c) 2017 ARM Limited 00004 * 00005 * Licensed under the Apache License, Version 2.0 (the "License"); 00006 * you may not use this file except in compliance with the License. 00007 * You may obtain a copy of the License at 00008 * 00009 * http://www.apache.org/licenses/LICENSE-2.0 00010 * 00011 * Unless required by applicable law or agreed to in writing, software 00012 * distributed under the License is distributed on an "AS IS" BASIS, 00013 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 00014 * See the License for the specific language governing permissions and 00015 * limitations under the License. 00016 */ 00017 00018 // Automatically generated configuration file. 00019 // DO NOT EDIT, content will be overwritten. 00020 00021 #ifndef __MBED_CONFIG_DATA__ 00022 #define __MBED_CONFIG_DATA__ 00023 00024 // Configuration parameters 00025 #define CLOCK_SOURCE USE_PLL_MSI // set by target:NUCLEO_L432KC 00026 #define LPTICKER_DELAY_TICKS 0 // set by target:NUCLEO_L432KC 00027 #define MBED_CONF_PLATFORM_DEFAULT_SERIAL_BAUD_RATE 9600 // set by library:platform 00028 #define MBED_CONF_PLATFORM_STDIO_BAUD_RATE 9600 // set by library:platform 00029 #define MBED_CONF_PLATFORM_STDIO_CONVERT_NEWLINES 0 // set by library:platform 00030 #define MBED_CONF_PLATFORM_STDIO_FLUSH_AT_EXIT 1 // set by library:platform 00031 #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 // set by target:MCU_STM32_BAREMETAL 00032 #define MBED_CONF_TARGET_CONSOLE_UART 1 // set by target:Target 00033 #define MBED_CONF_TARGET_DEEP_SLEEP_LATENCY 4 // set by target:MCU_STM32 00034 #define MBED_CONF_TARGET_DEFAULT_ADC_VREF NAN // set by target:Target 00035 #define MBED_CONF_TARGET_INIT_US_TICKER_AT_BOOT 1 // set by target:MCU_STM32 00036 #define MBED_CONF_TARGET_LPTICKER_LPTIM 1 // set by target:NUCLEO_L432KC 00037 #define MBED_CONF_TARGET_LPTICKER_LPTIM_CLOCK 1 // set by target:MCU_STM32 00038 #define MBED_CONF_TARGET_LPUART_CLOCK_SOURCE USE_LPUART_CLK_LSE|USE_LPUART_CLK_PCLK1 // set by target:MCU_STM32 00039 #define MBED_CONF_TARGET_LSE_AVAILABLE 1 // set by target:MCU_STM32 00040 #define MBED_CONF_TARGET_MPU_ROM_END 0x0fffffff // set by target:Target 00041 #define MBED_CONF_TARGET_TICKLESS_FROM_US_TICKER 0 // set by target:Target 00042 #define MBED_CONF_TARGET_XIP_ENABLE 0 // set by target:Target 00043 00044 #endif 00045
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