Jim Paris / mbed-dev-STM32L151RB

Fork of mbed-dev with the NUCLEO-L152RE target modified for use with the STM32L151RB (128 kB flash, 16 kB RAM).

Fork of mbed-dev by mbed official

To use this, remove the default "mbed" library and import this one instead. Target must be NUCLEO_L152RE.

Files at this revision

API Documentation at this revision

Revision 26:d19adb5b60f6, committed 2016-02-01

Comitter:
jim@jtan.com
Date:
Mon Feb 01 21:31:40 2016 -0500
Parent:
25:d1474e74f0a2
Child:
27:6c90eee1f870
Commit message:
Adjust flash and RAM sizes and locations for bootloader.

After this change, built images will not run unless a bootloader stub
is present. At minimum, that stub needs to set SCB->VTOR to
0x08002000, load SP from *0x08002000, and then jump to *0x08002004.

This is a mess, because the MBED code is a disaster, and we're
changing it for 4 toolchains at once.

Changed in this revision

targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_ARM_MICRO/startup_stm32l152xe.S Show annotated file Show diff for this revision Revisions of this file
targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_ARM_MICRO/stm32l152re.sct Show annotated file Show diff for this revision Revisions of this file
targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_ARM_STD/startup_stm32l152xe.S Show annotated file Show diff for this revision Revisions of this file
targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_ARM_STD/stm32l152re.sct Show annotated file Show diff for this revision Revisions of this file
targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_GCC_ARM/STM32L152XE.ld Show annotated file Show diff for this revision Revisions of this file
targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_IAR/stm32l152xe.icf Show annotated file Show diff for this revision Revisions of this file
targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/system_stm32l1xx.c Show annotated file Show diff for this revision Revisions of this file 
--- a/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_ARM_MICRO/startup_stm32l152xe.S	Thu Oct 08 10:27:29 2015 -0400
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_ARM_MICRO/startup_stm32l152xe.S	Mon Feb 01 21:31:40 2016 -0500
@@ -39,8 +39,8 @@
                 EXPORT  __initial_sp
                 
 Stack_Mem       SPACE   Stack_Size
-__initial_sp    EQU     0x20004000 ; Top of RAM (16 KB)
-
+        ;;  Reserve 8 bytes at top of RAM for bootloader flags
+__initial_sp    EQU     (0x20004000 - 8); Top of RAM (16 KB)
 
 ; <h> Heap Configuration
 ;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>

--- a/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_ARM_MICRO/stm32l152re.sct	Thu Oct 08 10:27:29 2015 -0400
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_ARM_MICRO/stm32l152re.sct	Mon Feb 01 21:31:40 2016 -0500
@@ -28,16 +28,18 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 ; STM32L152RB: 128KB FLASH + 16KB SRAM
-LR_IROM1 0x08000000 0x20000  {    ; load region size_region
+; Reserve 8 KiB at start of flash for bootloader
+; Reserve 8 bytes at end of RAM for bootloader flags
+LR_IROM1 (0x08000000+8192) (0x20000-8192)  {    ; load region size_region
 
-  ER_IROM1 0x08000000 0x20000  {  ; load address = execution address
+  ER_IROM1 (0x08000000+8192) (0x20000-8192)  {  ; load address = execution address
    *.o (RESET, +First)
    *(InRoot$$Sections)
    .ANY (+RO)
   }
 
   ; 73 vectors = 292 bytes (0x124) to be reserved in RAM
-  RW_IRAM1 (0x20000000+0x124) (0x04000-0x124)  {  ; RW data
+  RW_IRAM1 (0x20000000+0x124) (0x04000-0x124-8)  {  ; RW data
    .ANY (+RW +ZI)
   }
 

--- a/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_ARM_STD/startup_stm32l152xe.S	Thu Oct 08 10:27:29 2015 -0400
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_ARM_STD/startup_stm32l152xe.S	Mon Feb 01 21:31:40 2016 -0500
@@ -27,7 +27,8 @@
 ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
-__initial_sp    EQU     0x20004000 ; Top of RAM (16 KB)
+        ;;  Reserve 8 bytes at top of RAM for bootloader flags
+__initial_sp    EQU     (0x20004000 - 8) ; Top of RAM (16 KB)
 
                 PRESERVE8
                 THUMB

--- a/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_ARM_STD/stm32l152re.sct	Thu Oct 08 10:27:29 2015 -0400
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_ARM_STD/stm32l152re.sct	Mon Feb 01 21:31:40 2016 -0500
@@ -27,17 +27,19 @@
 ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
-; STM32L152RE: 128KB FLASH + 16KB SRAM
-LR_IROM1 0x08000000 0x20000  {    ; load region size_region
+; STM32L152RB: 128KB FLASH + 16KB SRAM
+; Reserve 8 KiB at start of flash for bootloader
+; Reserve 8 bytes at end of RAM for bootloader flags
+LR_IROM1 (0x08000000+8192) (0x20000-8192)  {    ; load region size_region
 
-  ER_IROM1 0x08000000 0x20000  {  ; load address = execution address
+  ER_IROM1 (0x08000000+8192) (0x20000-8192)  {  ; load address = execution address
    *.o (RESET, +First)
    *(InRoot$$Sections)
    .ANY (+RO)
   }
 
   ; 73 vectors = 292 bytes (0x124) to be reserved in RAM
-  RW_IRAM1 (0x20000000+0x124) (0x04000-0x124)  {  ; RW data
+  RW_IRAM1 (0x20000000+0x124) (0x04000-0x124-8)  {  ; RW data
    .ANY (+RW +ZI)
   }
 

--- a/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_GCC_ARM/STM32L152XE.ld	Thu Oct 08 10:27:29 2015 -0400
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_GCC_ARM/STM32L152XE.ld	Mon Feb 01 21:31:40 2016 -0500
@@ -4,8 +4,10 @@
   /* 128KB FLASH, 16KB RAM, Reserve up till 0x13C. There are 0x73 vectors = 292
    * bytes (0x124) in RAM. But all GCC scripts seem to require BootRAM @0x138
    */
-  FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 128k
-  RAM (rwx) : ORIGIN = 0x2000013C, LENGTH = 0x04000-0x13C
+/* Reserve 8 KiB at start of flash for bootloader */
+/* Reserve 8 bytes at end of RAM for bootloader flags */
+  FLASH (rx) : ORIGIN = 0x08000000+8k, LENGTH = 128k-8k
+  RAM (rwx) : ORIGIN = 0x2000013C, LENGTH = 0x04000-0x13C-8
 }
 
 /* Linker script to place sections and symbol values. Should be used together

--- a/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_IAR/stm32l152xe.icf	Thu Oct 08 10:27:29 2015 -0400
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_IAR/stm32l152xe.icf	Mon Feb 01 21:31:40 2016 -0500
@@ -1,13 +1,16 @@
+/* Reserve 8 KiB at start of flash for bootloader */
+/* Reserve 8 bytes at end of RAM for bootloader flags */
+
 /* [ROM = 128kb = 0x20000] */
-define symbol __intvec_start__     = 0x08000000;
-define symbol __region_ROM_start__ = 0x08000000;
+define symbol __intvec_start__     = 0x08002000;
+define symbol __region_ROM_start__ = 0x08002000;
 define symbol __region_ROM_end__   = 0x0801FFFF;
 
 /* [RAM = 16kb = 0x04000] Vector table dynamic copy: 73 vectors = 292 bytes (0x124) to be reserved in RAM */
 define symbol __NVIC_start__          = 0x20000000;
 define symbol __NVIC_end__            = 0x20000127; /* Add 4 more bytes to be aligned on 8 bytes */
 define symbol __region_RAM_start__    = 0x20000128;
-define symbol __region_RAM_end__      = 0x20003FFF;
+define symbol __region_RAM_end__      = 0x20003FF7;
 
 /* Memory regions */
 define memory mem with size = 4G;

--- a/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/system_stm32l1xx.c	Thu Oct 08 10:27:29 2015 -0400
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/system_stm32l1xx.c	Mon Feb 01 21:31:40 2016 -0500
@@ -114,8 +114,8 @@
 /*!< Uncomment the following line if you need to relocate your vector Table in
      Internal SRAM. */ 
 /* #define VECT_TAB_SRAM */
-#define VECT_TAB_OFFSET  0x0 /*!< Vector Table base offset field. 
-                                  This value must be a multiple of 0x200. */
+#define VECT_TAB_OFFSET  0x2000 /*!< Vector Table base offset field. 
+                                     This value must be a multiple of 0x200. */
 /**
   * @}
   */