Fork of mbed-dev with the NUCLEO-L152RE target modified for use with the STM32L151RB (128 kB flash, 16 kB RAM).

Fork of mbed-dev by mbed official

To use this, remove the default "mbed" library and import this one instead. Target must be NUCLEO_L152RE.

Files at this revision

API Documentation at this revision

Comitter:
Jim Paris
Date:
Tue Oct 06 17:44:28 2015 -0400
Parent:
5:ac9f6c2c45e8
Child:
7:3f555e981bba
Child:
15:5f5024781014
Child:
19:4dfcd92ef21e
Commit message:
Adjust flash and RAM sizes for STM32L152RB

Changed in this revision

targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_ARM_MICRO/startup_stm32l152xe.S Show annotated file Show diff for this revision Revisions of this file
targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_ARM_MICRO/stm32l152re.sct Show annotated file Show diff for this revision Revisions of this file
targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_ARM_STD/startup_stm32l152xe.S Show annotated file Show diff for this revision Revisions of this file
targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_ARM_STD/stm32l152re.sct Show annotated file Show diff for this revision Revisions of this file
targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_GCC_ARM/STM32L152XE.ld Show annotated file Show diff for this revision Revisions of this file
targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_IAR/stm32l152xe.icf Show annotated file Show diff for this revision Revisions of this file
--- a/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_ARM_MICRO/startup_stm32l152xe.S	Tue Oct 06 13:30:11 2015 +0100
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_ARM_MICRO/startup_stm32l152xe.S	Tue Oct 06 17:44:28 2015 -0400
@@ -39,7 +39,7 @@
                 EXPORT  __initial_sp
                 
 Stack_Mem       SPACE   Stack_Size
-__initial_sp    EQU     0x20014000 ; Top of RAM (80 KB)
+__initial_sp    EQU     0x20004000 ; Top of RAM (16 KB)
 
 
 ; <h> Heap Configuration
--- a/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_ARM_MICRO/stm32l152re.sct	Tue Oct 06 13:30:11 2015 +0100
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_ARM_MICRO/stm32l152re.sct	Tue Oct 06 17:44:28 2015 -0400
@@ -27,17 +27,17 @@
 ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
-; STM32L152RE: 512KB FLASH + 80KB SRAM
-LR_IROM1 0x08000000 0x80000  {    ; load region size_region
+; STM32L152RB: 128KB FLASH + 16KB SRAM
+LR_IROM1 0x08000000 0x20000  {    ; load region size_region
 
-  ER_IROM1 0x08000000 0x80000  {  ; load address = execution address
+  ER_IROM1 0x08000000 0x20000  {  ; load address = execution address
    *.o (RESET, +First)
    *(InRoot$$Sections)
    .ANY (+RO)
   }
 
   ; 73 vectors = 292 bytes (0x124) to be reserved in RAM
-  RW_IRAM1 (0x20000000+0x124) (0x14000-0x124)  {  ; RW data
+  RW_IRAM1 (0x20000000+0x124) (0x04000-0x124)  {  ; RW data
    .ANY (+RW +ZI)
   }
 
--- a/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_ARM_STD/startup_stm32l152xe.S	Tue Oct 06 13:30:11 2015 +0100
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_ARM_STD/startup_stm32l152xe.S	Tue Oct 06 17:44:28 2015 -0400
@@ -27,7 +27,7 @@
 ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
-__initial_sp    EQU     0x20014000 ; Top of RAM (80 KB)
+__initial_sp    EQU     0x20004000 ; Top of RAM (16 KB)
 
                 PRESERVE8
                 THUMB
--- a/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_ARM_STD/stm32l152re.sct	Tue Oct 06 13:30:11 2015 +0100
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_ARM_STD/stm32l152re.sct	Tue Oct 06 17:44:28 2015 -0400
@@ -27,17 +27,17 @@
 ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
-; STM32L152RE: 512KB FLASH + 80KB SRAM
-LR_IROM1 0x08000000 0x80000  {    ; load region size_region
+; STM32L152RE: 128KB FLASH + 16KB SRAM
+LR_IROM1 0x08000000 0x20000  {    ; load region size_region
 
-  ER_IROM1 0x08000000 0x80000  {  ; load address = execution address
+  ER_IROM1 0x08000000 0x20000  {  ; load address = execution address
    *.o (RESET, +First)
    *(InRoot$$Sections)
    .ANY (+RO)
   }
 
   ; 73 vectors = 292 bytes (0x124) to be reserved in RAM
-  RW_IRAM1 (0x20000000+0x124) (0x14000-0x124)  {  ; RW data
+  RW_IRAM1 (0x20000000+0x124) (0x04000-0x124)  {  ; RW data
    .ANY (+RW +ZI)
   }
 
--- a/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_GCC_ARM/STM32L152XE.ld	Tue Oct 06 13:30:11 2015 +0100
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_GCC_ARM/STM32L152XE.ld	Tue Oct 06 17:44:28 2015 -0400
@@ -1,11 +1,11 @@
 /* Linker script to configure memory regions. */
 MEMORY
 {
-  /* 512KB FLASH, 80KB RAM, Reserve up till 0x13C. There are 0x73 vectors = 292
+  /* 128KB FLASH, 16KB RAM, Reserve up till 0x13C. There are 0x73 vectors = 292
    * bytes (0x124) in RAM. But all GCC scripts seem to require BootRAM @0x138
    */
-  FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512k
-  RAM (rwx) : ORIGIN = 0x2000013C, LENGTH = 0x14000-0x13C
+  FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 128k
+  RAM (rwx) : ORIGIN = 0x2000013C, LENGTH = 0x04000-0x13C
 }
 
 /* Linker script to place sections and symbol values. Should be used together
--- a/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_IAR/stm32l152xe.icf	Tue Oct 06 13:30:11 2015 +0100
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/TOOLCHAIN_IAR/stm32l152xe.icf	Tue Oct 06 17:44:28 2015 -0400
@@ -1,13 +1,13 @@
-/* [ROM = 64kb = 0x10000] */
+/* [ROM = 128kb = 0x20000] */
 define symbol __intvec_start__     = 0x08000000;
 define symbol __region_ROM_start__ = 0x08000000;
-define symbol __region_ROM_end__   = 0x0807FFFF;
+define symbol __region_ROM_end__   = 0x0801FFFF;
 
-/* [RAM = 80kb = 0x14000] Vector table dynamic copy: 73 vectors = 292 bytes (0x124) to be reserved in RAM */
+/* [RAM = 16kb = 0x04000] Vector table dynamic copy: 73 vectors = 292 bytes (0x124) to be reserved in RAM */
 define symbol __NVIC_start__          = 0x20000000;
 define symbol __NVIC_end__            = 0x20000127; /* Add 4 more bytes to be aligned on 8 bytes */
 define symbol __region_RAM_start__    = 0x20000128;
-define symbol __region_RAM_end__      = 0x20013FFF;
+define symbol __region_RAM_end__      = 0x20003FFF;
 
 /* Memory regions */
 define memory mem with size = 4G;
@@ -16,8 +16,8 @@
 
 /* Stack and Heap */
 /*Heap 1/4 of ram and stack 1/8*/
-define symbol __size_cstack__ = 0x2800;
-define symbol __size_heap__   = 0x5000;
+define symbol __size_cstack__ = 0x800;
+define symbol __size_heap__   = 0x1000;
 define block CSTACK    with alignment = 8, size = __size_cstack__   { };
 define block HEAP      with alignment = 8, size = __size_heap__     { };
 define block STACKHEAP with fixed order { block HEAP, block CSTACK };