Fork of mbed-dev with the NUCLEO-L152RE target modified for use with the STM32L151RB (128 kB flash, 16 kB RAM).
Fork of mbed-dev by
To use this, remove the default "mbed" library and import this one instead. Target must be NUCLEO_L152RE.
Revision 21:7cdba1c88efd, committed 2015-10-07
- Comitter:
- Jim Paris
- Date:
- Wed Oct 07 14:43:47 2015 -0400
- Parent:
- 20:bd577c0b8d12
- Child:
- 22:8a570566d9a2
- Commit message:
- Remove use of peripherals that don't exist on STM32L151xB
Changed in this revision
--- a/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/PeripheralNames.h Wed Oct 07 14:24:13 2015 -0400 +++ b/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/PeripheralNames.h Wed Oct 07 14:43:47 2015 -0400 @@ -48,8 +48,8 @@ UART_1 = (int)USART1_BASE, UART_2 = (int)USART2_BASE, UART_3 = (int)USART3_BASE, - UART_4 = (int)UART4_BASE, - UART_5 = (int)UART5_BASE +// UART_4 = (int)UART4_BASE, +// UART_5 = (int)UART5_BASE } UARTName; #define STDIO_UART_TX PA_2 @@ -59,7 +59,7 @@ typedef enum { SPI_1 = (int)SPI1_BASE, SPI_2 = (int)SPI2_BASE, - SPI_3 = (int)SPI3_BASE +// SPI_3 = (int)SPI3_BASE } SPIName; typedef enum { @@ -71,7 +71,7 @@ PWM_2 = (int)TIM2_BASE, PWM_3 = (int)TIM3_BASE, PWM_4 = (int)TIM4_BASE, - PWM_5 = (int)TIM5_BASE, +// PWM_5 = (int)TIM5_BASE, PWM_9 = (int)TIM9_BASE, PWM_10 = (int)TIM10_BASE, PWM_11 = (int)TIM11_BASE
--- a/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/PeripheralPins.c Wed Oct 07 14:24:13 2015 -0400 +++ b/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/PeripheralPins.c Wed Oct 07 14:43:47 2015 -0400 @@ -135,8 +135,8 @@ {PB_6, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, {PB_10, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // {PC_10, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, - {PC_10, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, - {PC_12, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, +// {PC_10, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, +// {PC_12, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, {NC, NC, 0} }; @@ -146,8 +146,8 @@ {PB_7, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, {PB_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // {PC_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, - {PC_11, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, - {PD_2, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, +// {PC_11, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, +// {PD_2, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, {NC, NC, 0} }; @@ -159,7 +159,7 @@ {PB_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, // {PB_5, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, {PB_15, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, - {PC_12, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, +// {PC_12, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, {NC, NC, 0} }; @@ -169,7 +169,7 @@ {PB_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, // {PB_4, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, {PB_14, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, - {PC_11, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, +// {PC_11, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, {NC, NC, 0} }; @@ -178,7 +178,7 @@ {PB_3, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, // {PB_3, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, {PB_13, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, - {PC_10, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, +// {PC_10, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, {NC, NC, 0} };
--- a/targets/hal/TARGET_STM/TARGET_STM32L1/pwmout_api.c Wed Oct 07 14:24:13 2015 -0400 +++ b/targets/hal/TARGET_STM/TARGET_STM32L1/pwmout_api.c Wed Oct 07 14:43:47 2015 -0400 @@ -51,7 +51,7 @@ if (obj->pwm == PWM_2) __TIM2_CLK_ENABLE(); if (obj->pwm == PWM_3) __TIM3_CLK_ENABLE(); if (obj->pwm == PWM_4) __TIM4_CLK_ENABLE(); - if (obj->pwm == PWM_5) __TIM5_CLK_ENABLE(); +// if (obj->pwm == PWM_5) __TIM5_CLK_ENABLE(); if (obj->pwm == PWM_9) __TIM9_CLK_ENABLE(); if (obj->pwm == PWM_10) __TIM10_CLK_ENABLE(); if (obj->pwm == PWM_11) __TIM11_CLK_ENABLE();
--- a/targets/hal/TARGET_STM/TARGET_STM32L1/spi_api.c Wed Oct 07 14:24:13 2015 -0400 +++ b/targets/hal/TARGET_STM/TARGET_STM32L1/spi_api.c Wed Oct 07 14:43:47 2015 -0400 @@ -83,9 +83,9 @@ if (obj->spi == SPI_2) { __SPI2_CLK_ENABLE(); } - if (obj->spi == SPI_3) { - __SPI3_CLK_ENABLE(); - } +// if (obj->spi == SPI_3) { +// __SPI3_CLK_ENABLE(); +// } // Configure the SPI pins pinmap_pinout(mosi, PinMap_SPI_MOSI); @@ -127,11 +127,11 @@ __SPI2_CLK_DISABLE(); } - if (obj->spi == SPI_3) { - __SPI3_FORCE_RESET(); - __SPI3_RELEASE_RESET(); - __SPI3_CLK_DISABLE(); - } +// if (obj->spi == SPI_3) { +// __SPI3_FORCE_RESET(); +// __SPI3_RELEASE_RESET(); +// __SPI3_CLK_DISABLE(); +// } // Configure GPIO pin_function(obj->pin_miso, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));