Jhon Plantikow / DHT11

DHT11

TARGET_NUCLEO_F072RB/stm32f0xx_hal_spi.h@0:c52df770855b, 2015-08-13 (annotated)

Committer:
jhon309
Date:
Thu Aug 13 00:21:57 2015 +0000
Revision:
0:c52df770855b
DHT11

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jhon309 0:c52df770855b 1 /**
jhon309 0:c52df770855b 2 ******************************************************************************
jhon309 0:c52df770855b 3 * @file stm32f0xx_hal_spi.h
jhon309 0:c52df770855b 4 * @author MCD Application Team
jhon309 0:c52df770855b 5 * @version V1.2.0
jhon309 0:c52df770855b 6 * @date 11-December-2014
jhon309 0:c52df770855b 7 * @brief Header file of SPI HAL module.
jhon309 0:c52df770855b 8 ******************************************************************************
jhon309 0:c52df770855b 9 * @attention
jhon309 0:c52df770855b 10 *
jhon309 0:c52df770855b 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
jhon309 0:c52df770855b 12 *
jhon309 0:c52df770855b 13 * Redistribution and use in source and binary forms, with or without modification,
jhon309 0:c52df770855b 14 * are permitted provided that the following conditions are met:
jhon309 0:c52df770855b 15 * 1. Redistributions of source code must retain the above copyright notice,
jhon309 0:c52df770855b 16 * this list of conditions and the following disclaimer.
jhon309 0:c52df770855b 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
jhon309 0:c52df770855b 18 * this list of conditions and the following disclaimer in the documentation
jhon309 0:c52df770855b 19 * and/or other materials provided with the distribution.
jhon309 0:c52df770855b 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
jhon309 0:c52df770855b 21 * may be used to endorse or promote products derived from this software
jhon309 0:c52df770855b 22 * without specific prior written permission.
jhon309 0:c52df770855b 23 *
jhon309 0:c52df770855b 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
jhon309 0:c52df770855b 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
jhon309 0:c52df770855b 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
jhon309 0:c52df770855b 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
jhon309 0:c52df770855b 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
jhon309 0:c52df770855b 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
jhon309 0:c52df770855b 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
jhon309 0:c52df770855b 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
jhon309 0:c52df770855b 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
jhon309 0:c52df770855b 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
jhon309 0:c52df770855b 34 *
jhon309 0:c52df770855b 35 ******************************************************************************
jhon309 0:c52df770855b 36 */
jhon309 0:c52df770855b 37
jhon309 0:c52df770855b 38 /* Define to prevent recursive inclusion -------------------------------------*/
jhon309 0:c52df770855b 39 #ifndef __STM32F0xx_HAL_SPI_H
jhon309 0:c52df770855b 40 #define __STM32F0xx_HAL_SPI_H
jhon309 0:c52df770855b 41
jhon309 0:c52df770855b 42 #ifdef __cplusplus
jhon309 0:c52df770855b 43 extern "C" {
jhon309 0:c52df770855b 44 #endif
jhon309 0:c52df770855b 45
jhon309 0:c52df770855b 46 /* Includes ------------------------------------------------------------------*/
jhon309 0:c52df770855b 47 #include "stm32f0xx_hal_def.h"
jhon309 0:c52df770855b 48
jhon309 0:c52df770855b 49 /** @addtogroup STM32F0xx_HAL_Driver
jhon309 0:c52df770855b 50 * @{
jhon309 0:c52df770855b 51 */
jhon309 0:c52df770855b 52
jhon309 0:c52df770855b 53 /** @addtogroup SPI
jhon309 0:c52df770855b 54 * @{
jhon309 0:c52df770855b 55 */
jhon309 0:c52df770855b 56
jhon309 0:c52df770855b 57 /* Exported types ------------------------------------------------------------*/
jhon309 0:c52df770855b 58 /** @defgroup SPI_Exported_Types SPI Exported Types
jhon309 0:c52df770855b 59 * @{
jhon309 0:c52df770855b 60 */
jhon309 0:c52df770855b 61
jhon309 0:c52df770855b 62 /**
jhon309 0:c52df770855b 63 * @brief SPI Configuration Structure definition
jhon309 0:c52df770855b 64 */
jhon309 0:c52df770855b 65 typedef struct
jhon309 0:c52df770855b 66 {
jhon309 0:c52df770855b 67 uint32_t Mode; /*!< Specifies the SPI operating mode.
jhon309 0:c52df770855b 68 This parameter can be a value of @ref SPI_mode */
jhon309 0:c52df770855b 69
jhon309 0:c52df770855b 70 uint32_t Direction; /*!< Specifies the SPI bidirectional mode state.
jhon309 0:c52df770855b 71 This parameter can be a value of @ref SPI_Direction */
jhon309 0:c52df770855b 72
jhon309 0:c52df770855b 73 uint32_t DataSize; /*!< Specifies the SPI data size.
jhon309 0:c52df770855b 74 This parameter can be a value of @ref SPI_data_size */
jhon309 0:c52df770855b 75
jhon309 0:c52df770855b 76 uint32_t CLKPolarity; /*!< Specifies the serial clock steady state.
jhon309 0:c52df770855b 77 This parameter can be a value of @ref SPI_Clock_Polarity */
jhon309 0:c52df770855b 78
jhon309 0:c52df770855b 79 uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture.
jhon309 0:c52df770855b 80 This parameter can be a value of @ref SPI_Clock_Phase */
jhon309 0:c52df770855b 81
jhon309 0:c52df770855b 82 uint32_t NSS; /*!< Specifies whether the NSS signal is managed by
jhon309 0:c52df770855b 83 hardware (NSS pin) or by software using the SSI bit.
jhon309 0:c52df770855b 84 This parameter can be a value of @ref SPI_Slave_Select_management */
jhon309 0:c52df770855b 85
jhon309 0:c52df770855b 86 uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
jhon309 0:c52df770855b 87 used to configure the transmit and receive SCK clock.
jhon309 0:c52df770855b 88 This parameter can be a value of @ref SPI_BaudRate_Prescaler
jhon309 0:c52df770855b 89 @note The communication clock is derived from the master
jhon309 0:c52df770855b 90 clock. The slave clock does not need to be set. */
jhon309 0:c52df770855b 91
jhon309 0:c52df770855b 92 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
jhon309 0:c52df770855b 93 This parameter can be a value of @ref SPI_MSB_LSB_transmission */
jhon309 0:c52df770855b 94
jhon309 0:c52df770855b 95 uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not .
jhon309 0:c52df770855b 96 This parameter can be a value of @ref SPI_TI_mode */
jhon309 0:c52df770855b 97
jhon309 0:c52df770855b 98 uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not.
jhon309 0:c52df770855b 99 This parameter can be a value of @ref SPI_CRC_Calculation */
jhon309 0:c52df770855b 100
jhon309 0:c52df770855b 101 uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation.
jhon309 0:c52df770855b 102 This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */
jhon309 0:c52df770855b 103
jhon309 0:c52df770855b 104 uint32_t CRCLength; /*!< Specifies the CRC Length used for the CRC calculation.
jhon309 0:c52df770855b 105 CRC Length is only used with Data8 and Data16, not other data size
jhon309 0:c52df770855b 106 This parameter must 0 or 1 or 2*/
jhon309 0:c52df770855b 107
jhon309 0:c52df770855b 108 uint32_t NSSPMode; /*!< Specifies whether the NSSP signal is enabled or not .
jhon309 0:c52df770855b 109 This parameter can be a value of @ref SPI_NSSP_Mode
jhon309 0:c52df770855b 110 This mode is activated by the NSSP bit in the SPIx_CR2 register and
jhon309 0:c52df770855b 111 it takes effect only if the SPI interface is configured as Motorola SPI
jhon309 0:c52df770855b 112 master (FRF=0) with capture on the first edge (SPIx_CR1 CPHA = 0,
jhon309 0:c52df770855b 113 CPOL setting is ignored).. */
jhon309 0:c52df770855b 114 } SPI_InitTypeDef;
jhon309 0:c52df770855b 115
jhon309 0:c52df770855b 116 /**
jhon309 0:c52df770855b 117 * @brief HAL State structures definition
jhon309 0:c52df770855b 118 */
jhon309 0:c52df770855b 119 typedef enum
jhon309 0:c52df770855b 120 {
jhon309 0:c52df770855b 121 HAL_SPI_STATE_RESET = 0x00, /*!< Peripheral not Initialized */
jhon309 0:c52df770855b 122 HAL_SPI_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
jhon309 0:c52df770855b 123 HAL_SPI_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
jhon309 0:c52df770855b 124 HAL_SPI_STATE_BUSY_TX = 0x03, /*!< Data Transmission process is ongoing */
jhon309 0:c52df770855b 125 HAL_SPI_STATE_BUSY_RX = 0x04, /*!< Data Reception process is ongoing */
jhon309 0:c52df770855b 126 HAL_SPI_STATE_BUSY_TX_RX = 0x05, /*!< Data Transmission and Reception process is ongoing */
jhon309 0:c52df770855b 127 HAL_SPI_STATE_ERROR = 0x06 /*!< SPI error state */
jhon309 0:c52df770855b 128 }HAL_SPI_StateTypeDef;
jhon309 0:c52df770855b 129
jhon309 0:c52df770855b 130 /**
jhon309 0:c52df770855b 131 * @brief SPI handle Structure definition
jhon309 0:c52df770855b 132 */
jhon309 0:c52df770855b 133 typedef struct __SPI_HandleTypeDef
jhon309 0:c52df770855b 134 {
jhon309 0:c52df770855b 135 SPI_TypeDef *Instance; /*!< SPI registers base address */
jhon309 0:c52df770855b 136
jhon309 0:c52df770855b 137 SPI_InitTypeDef Init; /*!< SPI communication parameters */
jhon309 0:c52df770855b 138
jhon309 0:c52df770855b 139 uint8_t *pTxBuffPtr; /*!< Pointer to SPI Tx transfer Buffer */
jhon309 0:c52df770855b 140
jhon309 0:c52df770855b 141 uint16_t TxXferSize; /*!< SPI Tx Transfer size */
jhon309 0:c52df770855b 142
jhon309 0:c52df770855b 143 uint16_t TxXferCount; /*!< SPI Tx Transfer Counter */
jhon309 0:c52df770855b 144
jhon309 0:c52df770855b 145 uint8_t *pRxBuffPtr; /*!< Pointer to SPI Rx transfer Buffer */
jhon309 0:c52df770855b 146
jhon309 0:c52df770855b 147 uint16_t RxXferSize; /*!< SPI Rx Transfer size */
jhon309 0:c52df770855b 148
jhon309 0:c52df770855b 149 uint16_t RxXferCount; /*!< SPI Rx Transfer Counter */
jhon309 0:c52df770855b 150
jhon309 0:c52df770855b 151 uint32_t CRCSize; /*!< SPI CRC size used for the transfer */
jhon309 0:c52df770855b 152
jhon309 0:c52df770855b 153 void (*RxISR)(struct __SPI_HandleTypeDef *hspi); /*!< function pointer on Rx IRQ handler */
jhon309 0:c52df770855b 154
jhon309 0:c52df770855b 155 void (*TxISR)(struct __SPI_HandleTypeDef *hspi); /*!< function pointer on Tx IRQ handler */
jhon309 0:c52df770855b 156
jhon309 0:c52df770855b 157 DMA_HandleTypeDef *hdmatx; /*!< SPI Tx DMA Handle parameters */
jhon309 0:c52df770855b 158
jhon309 0:c52df770855b 159 DMA_HandleTypeDef *hdmarx; /*!< SPI Rx DMA Handle parameters */
jhon309 0:c52df770855b 160
jhon309 0:c52df770855b 161 HAL_LockTypeDef Lock; /*!< Locking object */
jhon309 0:c52df770855b 162
jhon309 0:c52df770855b 163 HAL_SPI_StateTypeDef State; /*!< SPI communication state */
jhon309 0:c52df770855b 164
jhon309 0:c52df770855b 165 __IO uint32_t ErrorCode; /*!< SPI Error code
jhon309 0:c52df770855b 166 This parameter can be a value of @ref SPI_Error */
jhon309 0:c52df770855b 167
jhon309 0:c52df770855b 168 }SPI_HandleTypeDef;
jhon309 0:c52df770855b 169
jhon309 0:c52df770855b 170 /**
jhon309 0:c52df770855b 171 * @}
jhon309 0:c52df770855b 172 */
jhon309 0:c52df770855b 173
jhon309 0:c52df770855b 174 /* Exported constants --------------------------------------------------------*/
jhon309 0:c52df770855b 175
jhon309 0:c52df770855b 176 /** @defgroup SPI_Exported_Constants SPI Exported Constants
jhon309 0:c52df770855b 177 * @{
jhon309 0:c52df770855b 178 */
jhon309 0:c52df770855b 179
jhon309 0:c52df770855b 180 /** @defgroup SPI_Error SPI Error
jhon309 0:c52df770855b 181 * @{
jhon309 0:c52df770855b 182 */
jhon309 0:c52df770855b 183 #define HAL_SPI_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
jhon309 0:c52df770855b 184 #define HAL_SPI_ERROR_MODF ((uint32_t)0x00000001) /*!< MODF error */
jhon309 0:c52df770855b 185 #define HAL_SPI_ERROR_CRC ((uint32_t)0x00000002) /*!< CRC error */
jhon309 0:c52df770855b 186 #define HAL_SPI_ERROR_OVR ((uint32_t)0x00000004) /*!< OVR error */
jhon309 0:c52df770855b 187 #define HAL_SPI_ERROR_FRE ((uint32_t)0x00000008) /*!< FRE error */
jhon309 0:c52df770855b 188 #define HAL_SPI_ERROR_DMA ((uint32_t)0x00000010) /*!< DMA transfer error */
jhon309 0:c52df770855b 189 #define HAL_SPI_ERROR_FLAG ((uint32_t)0x00000020) /*!< Error on BSY/TXE/FTLVL/FRLVL Flag */
jhon309 0:c52df770855b 190 #define HAL_SPI_ERROR_UNKNOW ((uint32_t)0x00000040) /*!< Unknow Error error */
jhon309 0:c52df770855b 191 /**
jhon309 0:c52df770855b 192 * @}
jhon309 0:c52df770855b 193 */
jhon309 0:c52df770855b 194
jhon309 0:c52df770855b 195 /** @defgroup SPI_mode SPI mode
jhon309 0:c52df770855b 196 * @{
jhon309 0:c52df770855b 197 */
jhon309 0:c52df770855b 198 #define SPI_MODE_SLAVE ((uint32_t)0x00000000)
jhon309 0:c52df770855b 199 #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI)
jhon309 0:c52df770855b 200 #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \
jhon309 0:c52df770855b 201 ((MODE) == SPI_MODE_MASTER))
jhon309 0:c52df770855b 202 /**
jhon309 0:c52df770855b 203 * @}
jhon309 0:c52df770855b 204 */
jhon309 0:c52df770855b 205
jhon309 0:c52df770855b 206 /** @defgroup SPI_Direction SPI Direction
jhon309 0:c52df770855b 207 * @{
jhon309 0:c52df770855b 208 */
jhon309 0:c52df770855b 209 #define SPI_DIRECTION_2LINES ((uint32_t)0x00000000)
jhon309 0:c52df770855b 210 #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY
jhon309 0:c52df770855b 211 #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE
jhon309 0:c52df770855b 212
jhon309 0:c52df770855b 213 #define IS_SPI_DIRECTION(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \
jhon309 0:c52df770855b 214 ((MODE) == SPI_DIRECTION_2LINES_RXONLY) ||\
jhon309 0:c52df770855b 215 ((MODE) == SPI_DIRECTION_1LINE))
jhon309 0:c52df770855b 216
jhon309 0:c52df770855b 217 #define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES)
jhon309 0:c52df770855b 218
jhon309 0:c52df770855b 219 #define IS_SPI_DIRECTION_2LINES_OR_1LINE(MODE) (((MODE) == SPI_DIRECTION_2LINES)|| \
jhon309 0:c52df770855b 220 ((MODE) == SPI_DIRECTION_1LINE))
jhon309 0:c52df770855b 221 /**
jhon309 0:c52df770855b 222 * @}
jhon309 0:c52df770855b 223 */
jhon309 0:c52df770855b 224
jhon309 0:c52df770855b 225 /** @defgroup SPI_data_size SPI Data size
jhon309 0:c52df770855b 226 * @{
jhon309 0:c52df770855b 227 */
jhon309 0:c52df770855b 228 #define SPI_DATASIZE_4BIT ((uint32_t)0x0300) /*!< SPI Datasize = 4bits */
jhon309 0:c52df770855b 229 #define SPI_DATASIZE_5BIT ((uint32_t)0x0400) /*!< SPI Datasize = 5bits */
jhon309 0:c52df770855b 230 #define SPI_DATASIZE_6BIT ((uint32_t)0x0500) /*!< SPI Datasize = 6bits */
jhon309 0:c52df770855b 231 #define SPI_DATASIZE_7BIT ((uint32_t)0x0600) /*!< SPI Datasize = 7bits */
jhon309 0:c52df770855b 232 #define SPI_DATASIZE_8BIT ((uint32_t)0x0700) /*!< SPI Datasize = 8bits */
jhon309 0:c52df770855b 233 #define SPI_DATASIZE_9BIT ((uint32_t)0x0800) /*!< SPI Datasize = 9bits */
jhon309 0:c52df770855b 234 #define SPI_DATASIZE_10BIT ((uint32_t)0x0900) /*!< SPI Datasize = 10bits */
jhon309 0:c52df770855b 235 #define SPI_DATASIZE_11BIT ((uint32_t)0x0A00) /*!< SPI Datasize = 11bits */
jhon309 0:c52df770855b 236 #define SPI_DATASIZE_12BIT ((uint32_t)0x0B00) /*!< SPI Datasize = 12bits */
jhon309 0:c52df770855b 237 #define SPI_DATASIZE_13BIT ((uint32_t)0x0C00) /*!< SPI Datasize = 13bits */
jhon309 0:c52df770855b 238 #define SPI_DATASIZE_14BIT ((uint32_t)0x0D00) /*!< SPI Datasize = 14bits */
jhon309 0:c52df770855b 239 #define SPI_DATASIZE_15BIT ((uint32_t)0x0E00) /*!< SPI Datasize = 15bits */
jhon309 0:c52df770855b 240 #define SPI_DATASIZE_16BIT ((uint32_t)0x0F00) /*!< SPI Datasize = 16bits */
jhon309 0:c52df770855b 241 #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DATASIZE_16BIT) || \
jhon309 0:c52df770855b 242 ((DATASIZE) == SPI_DATASIZE_15BIT) || \
jhon309 0:c52df770855b 243 ((DATASIZE) == SPI_DATASIZE_14BIT) || \
jhon309 0:c52df770855b 244 ((DATASIZE) == SPI_DATASIZE_13BIT) || \
jhon309 0:c52df770855b 245 ((DATASIZE) == SPI_DATASIZE_12BIT) || \
jhon309 0:c52df770855b 246 ((DATASIZE) == SPI_DATASIZE_11BIT) || \
jhon309 0:c52df770855b 247 ((DATASIZE) == SPI_DATASIZE_10BIT) || \
jhon309 0:c52df770855b 248 ((DATASIZE) == SPI_DATASIZE_9BIT) || \
jhon309 0:c52df770855b 249 ((DATASIZE) == SPI_DATASIZE_8BIT) || \
jhon309 0:c52df770855b 250 ((DATASIZE) == SPI_DATASIZE_7BIT) || \
jhon309 0:c52df770855b 251 ((DATASIZE) == SPI_DATASIZE_6BIT) || \
jhon309 0:c52df770855b 252 ((DATASIZE) == SPI_DATASIZE_5BIT) || \
jhon309 0:c52df770855b 253 ((DATASIZE) == SPI_DATASIZE_4BIT))
jhon309 0:c52df770855b 254
jhon309 0:c52df770855b 255 /**
jhon309 0:c52df770855b 256 * @}
jhon309 0:c52df770855b 257 */
jhon309 0:c52df770855b 258
jhon309 0:c52df770855b 259 /** @defgroup SPI_Clock_Polarity SPI Clock Polarity
jhon309 0:c52df770855b 260 * @{
jhon309 0:c52df770855b 261 */
jhon309 0:c52df770855b 262 #define SPI_POLARITY_LOW ((uint32_t)0x00000000) /*!< SPI polarity Low */
jhon309 0:c52df770855b 263 #define SPI_POLARITY_HIGH SPI_CR1_CPOL /*!< SPI polarity High */
jhon309 0:c52df770855b 264 #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_POLARITY_LOW) || \
jhon309 0:c52df770855b 265 ((CPOL) == SPI_POLARITY_HIGH))
jhon309 0:c52df770855b 266 /**
jhon309 0:c52df770855b 267 * @}
jhon309 0:c52df770855b 268 */
jhon309 0:c52df770855b 269
jhon309 0:c52df770855b 270 /** @defgroup SPI_Clock_Phase SPI Clock Phase
jhon309 0:c52df770855b 271 * @{
jhon309 0:c52df770855b 272 */
jhon309 0:c52df770855b 273 #define SPI_PHASE_1EDGE ((uint32_t)0x00000000) /*!< SPI Phase 1EDGE */
jhon309 0:c52df770855b 274 #define SPI_PHASE_2EDGE SPI_CR1_CPHA /*!< SPI Phase 2EDGE */
jhon309 0:c52df770855b 275 #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_PHASE_1EDGE) || \
jhon309 0:c52df770855b 276 ((CPHA) == SPI_PHASE_2EDGE))
jhon309 0:c52df770855b 277 /**
jhon309 0:c52df770855b 278 * @}
jhon309 0:c52df770855b 279 */
jhon309 0:c52df770855b 280
jhon309 0:c52df770855b 281 /** @defgroup SPI_Slave_Select_management SPI Slave Select management
jhon309 0:c52df770855b 282 * @{
jhon309 0:c52df770855b 283 */
jhon309 0:c52df770855b 284 #define SPI_NSS_SOFT SPI_CR1_SSM
jhon309 0:c52df770855b 285 #define SPI_NSS_HARD_INPUT ((uint32_t)0x00000000)
jhon309 0:c52df770855b 286 #define SPI_NSS_HARD_OUTPUT ((uint32_t)0x00040000)
jhon309 0:c52df770855b 287 #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_SOFT) || \
jhon309 0:c52df770855b 288 ((NSS) == SPI_NSS_HARD_INPUT) || \
jhon309 0:c52df770855b 289 ((NSS) == SPI_NSS_HARD_OUTPUT))
jhon309 0:c52df770855b 290 /**
jhon309 0:c52df770855b 291 * @}
jhon309 0:c52df770855b 292 */
jhon309 0:c52df770855b 293
jhon309 0:c52df770855b 294 /** @defgroup SPI_NSSP_Mode SPI NSS pulse management
jhon309 0:c52df770855b 295 * @{
jhon309 0:c52df770855b 296 */
jhon309 0:c52df770855b 297 #define SPI_NSS_PULSE_ENABLED SPI_CR2_NSSP
jhon309 0:c52df770855b 298 #define SPI_NSS_PULSE_DISABLED ((uint32_t)0x00000000)
jhon309 0:c52df770855b 299
jhon309 0:c52df770855b 300 #define IS_SPI_NSSP(NSSP) (((NSSP) == SPI_NSS_PULSE_ENABLED) || \
jhon309 0:c52df770855b 301 ((NSSP) == SPI_NSS_PULSE_DISABLED))
jhon309 0:c52df770855b 302 /**
jhon309 0:c52df770855b 303 * @}
jhon309 0:c52df770855b 304 */
jhon309 0:c52df770855b 305
jhon309 0:c52df770855b 306 /** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler
jhon309 0:c52df770855b 307 * @{
jhon309 0:c52df770855b 308 */
jhon309 0:c52df770855b 309 #define SPI_BAUDRATEPRESCALER_2 ((uint32_t)0x00000000)
jhon309 0:c52df770855b 310 #define SPI_BAUDRATEPRESCALER_4 ((uint32_t)0x00000008)
jhon309 0:c52df770855b 311 #define SPI_BAUDRATEPRESCALER_8 ((uint32_t)0x00000010)
jhon309 0:c52df770855b 312 #define SPI_BAUDRATEPRESCALER_16 ((uint32_t)0x00000018)
jhon309 0:c52df770855b 313 #define SPI_BAUDRATEPRESCALER_32 ((uint32_t)0x00000020)
jhon309 0:c52df770855b 314 #define SPI_BAUDRATEPRESCALER_64 ((uint32_t)0x00000028)
jhon309 0:c52df770855b 315 #define SPI_BAUDRATEPRESCALER_128 ((uint32_t)0x00000030)
jhon309 0:c52df770855b 316 #define SPI_BAUDRATEPRESCALER_256 ((uint32_t)0x00000038)
jhon309 0:c52df770855b 317 #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \
jhon309 0:c52df770855b 318 ((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \
jhon309 0:c52df770855b 319 ((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \
jhon309 0:c52df770855b 320 ((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \
jhon309 0:c52df770855b 321 ((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \
jhon309 0:c52df770855b 322 ((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \
jhon309 0:c52df770855b 323 ((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \
jhon309 0:c52df770855b 324 ((PRESCALER) == SPI_BAUDRATEPRESCALER_256))
jhon309 0:c52df770855b 325 /**
jhon309 0:c52df770855b 326 * @}
jhon309 0:c52df770855b 327 */
jhon309 0:c52df770855b 328
jhon309 0:c52df770855b 329 /** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB transmission
jhon309 0:c52df770855b 330 * @{
jhon309 0:c52df770855b 331 */
jhon309 0:c52df770855b 332 #define SPI_FIRSTBIT_MSB ((uint32_t)0x00000000)
jhon309 0:c52df770855b 333 #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST
jhon309 0:c52df770855b 334 #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \
jhon309 0:c52df770855b 335 ((BIT) == SPI_FIRSTBIT_LSB))
jhon309 0:c52df770855b 336 /**
jhon309 0:c52df770855b 337 * @}
jhon309 0:c52df770855b 338 */
jhon309 0:c52df770855b 339
jhon309 0:c52df770855b 340 /** @defgroup SPI_TI_mode SPI TI mode
jhon309 0:c52df770855b 341 * @{
jhon309 0:c52df770855b 342 */
jhon309 0:c52df770855b 343 #define SPI_TIMODE_DISABLED ((uint32_t)0x00000000)
jhon309 0:c52df770855b 344 #define SPI_TIMODE_ENABLED SPI_CR2_FRF
jhon309 0:c52df770855b 345 #define IS_SPI_TIMODE(MODE) (((MODE) == SPI_TIMODE_DISABLED) || \
jhon309 0:c52df770855b 346 ((MODE) == SPI_TIMODE_ENABLED))
jhon309 0:c52df770855b 347 /**
jhon309 0:c52df770855b 348 * @}
jhon309 0:c52df770855b 349 */
jhon309 0:c52df770855b 350
jhon309 0:c52df770855b 351 /** @defgroup SPI_CRC_Calculation SPI CRC Calculation
jhon309 0:c52df770855b 352 * @{
jhon309 0:c52df770855b 353 */
jhon309 0:c52df770855b 354 #define SPI_CRCCALCULATION_DISABLED ((uint32_t)0x00000000)
jhon309 0:c52df770855b 355 #define SPI_CRCCALCULATION_ENABLED SPI_CR1_CRCEN
jhon309 0:c52df770855b 356 #define IS_SPI_CRC_CALCULATION(CALCULATION) (((CALCULATION) == SPI_CRCCALCULATION_DISABLED) || \
jhon309 0:c52df770855b 357 ((CALCULATION) == SPI_CRCCALCULATION_ENABLED))
jhon309 0:c52df770855b 358 /**
jhon309 0:c52df770855b 359 * @}
jhon309 0:c52df770855b 360 */
jhon309 0:c52df770855b 361
jhon309 0:c52df770855b 362 /** @defgroup SPI_CRC_length SPI CRC length
jhon309 0:c52df770855b 363 * @{
jhon309 0:c52df770855b 364 * This parameter can be one of the following values:
jhon309 0:c52df770855b 365 * SPI_CRC_LENGTH_DATASIZE: aligned with the data size
jhon309 0:c52df770855b 366 * SPI_CRC_LENGTH_8BIT : CRC 8bit
jhon309 0:c52df770855b 367 * SPI_CRC_LENGTH_16BIT : CRC 16bit
jhon309 0:c52df770855b 368 */
jhon309 0:c52df770855b 369 #define SPI_CRC_LENGTH_DATASIZE 0
jhon309 0:c52df770855b 370 #define SPI_CRC_LENGTH_8BIT 1
jhon309 0:c52df770855b 371 #define SPI_CRC_LENGTH_16BIT 2
jhon309 0:c52df770855b 372 #define IS_SPI_CRC_LENGTH(LENGTH) (((LENGTH) == SPI_CRC_LENGTH_DATASIZE) ||\
jhon309 0:c52df770855b 373 ((LENGTH) == SPI_CRC_LENGTH_8BIT) || \
jhon309 0:c52df770855b 374 ((LENGTH) == SPI_CRC_LENGTH_16BIT))
jhon309 0:c52df770855b 375 /**
jhon309 0:c52df770855b 376 * @}
jhon309 0:c52df770855b 377 */
jhon309 0:c52df770855b 378
jhon309 0:c52df770855b 379 /** @defgroup SPI_FIFO_reception_threshold SPI FIFO reception threshold
jhon309 0:c52df770855b 380 * @{
jhon309 0:c52df770855b 381 * This parameter can be one of the following values:
jhon309 0:c52df770855b 382 * SPI_RXFIFO_THRESHOLD or SPI_RXFIFO_THRESHOLD_QF :
jhon309 0:c52df770855b 383 * RXNE event is generated if the FIFO
jhon309 0:c52df770855b 384 * level is greater or equal to 1/2(16-bits).
jhon309 0:c52df770855b 385 * SPI_RXFIFO_THRESHOLD_HF: RXNE event is generated if the FIFO
jhon309 0:c52df770855b 386 * level is greater or equal to 1/4(8 bits). */
jhon309 0:c52df770855b 387 #define SPI_RXFIFO_THRESHOLD SPI_CR2_FRXTH
jhon309 0:c52df770855b 388 #define SPI_RXFIFO_THRESHOLD_QF SPI_CR2_FRXTH
jhon309 0:c52df770855b 389 #define SPI_RXFIFO_THRESHOLD_HF ((uint32_t)0x0)
jhon309 0:c52df770855b 390
jhon309 0:c52df770855b 391 /**
jhon309 0:c52df770855b 392 * @}
jhon309 0:c52df770855b 393 */
jhon309 0:c52df770855b 394
jhon309 0:c52df770855b 395 /** @defgroup SPI_Interrupt_configuration_definition SPI Interrupt configuration definition
jhon309 0:c52df770855b 396 * @brief SPI Interrupt definition
jhon309 0:c52df770855b 397 * Elements values convention: 0xXXXXXXXX
jhon309 0:c52df770855b 398 * - XXXXXXXX : Interrupt control mask
jhon309 0:c52df770855b 399 * @{
jhon309 0:c52df770855b 400 */
jhon309 0:c52df770855b 401 #define SPI_IT_TXE SPI_CR2_TXEIE
jhon309 0:c52df770855b 402 #define SPI_IT_RXNE SPI_CR2_RXNEIE
jhon309 0:c52df770855b 403 #define SPI_IT_ERR SPI_CR2_ERRIE
jhon309 0:c52df770855b 404 /**
jhon309 0:c52df770855b 405 * @}
jhon309 0:c52df770855b 406 */
jhon309 0:c52df770855b 407
jhon309 0:c52df770855b 408
jhon309 0:c52df770855b 409 /** @defgroup SPI_Flag_definition SPI Flag definition
jhon309 0:c52df770855b 410 * @brief Flag definition
jhon309 0:c52df770855b 411 * Elements values convention: 0xXXXXYYYY
jhon309 0:c52df770855b 412 * - XXXX : Flag register Index
jhon309 0:c52df770855b 413 * - YYYY : Flag mask
jhon309 0:c52df770855b 414 * @{
jhon309 0:c52df770855b 415 */
jhon309 0:c52df770855b 416 #define SPI_FLAG_RXNE SPI_SR_RXNE /* SPI status flag: Rx buffer not empty flag */
jhon309 0:c52df770855b 417 #define SPI_FLAG_TXE SPI_SR_TXE /* SPI status flag: Tx buffer empty flag */
jhon309 0:c52df770855b 418 #define SPI_FLAG_BSY SPI_SR_BSY /* SPI status flag: Busy flag */
jhon309 0:c52df770855b 419 #define SPI_FLAG_CRCERR SPI_SR_CRCERR /* SPI Error flag: CRC error flag */
jhon309 0:c52df770855b 420 #define SPI_FLAG_MODF SPI_SR_MODF /* SPI Error flag: Mode fault flag */
jhon309 0:c52df770855b 421 #define SPI_FLAG_OVR SPI_SR_OVR /* SPI Error flag: Overrun flag */
jhon309 0:c52df770855b 422 #define SPI_FLAG_FRE SPI_SR_FRE /* SPI Error flag: TI mode frame format error flag */
jhon309 0:c52df770855b 423 #define SPI_FLAG_FTLVL SPI_SR_FTLVL /* SPI fifo transmission level */
jhon309 0:c52df770855b 424 #define SPI_FLAG_FRLVL SPI_SR_FRLVL /* SPI fifo reception level */
jhon309 0:c52df770855b 425 /**
jhon309 0:c52df770855b 426 * @}
jhon309 0:c52df770855b 427 */
jhon309 0:c52df770855b 428
jhon309 0:c52df770855b 429 /** @defgroup SPI_transmission_fifo_status_level SPI transmission fifo status level
jhon309 0:c52df770855b 430 * @{
jhon309 0:c52df770855b 431 */
jhon309 0:c52df770855b 432 #define SPI_FTLVL_EMPTY ((uint32_t)0x0000)
jhon309 0:c52df770855b 433 #define SPI_FTLVL_QUARTER_FULL ((uint32_t)0x0800)
jhon309 0:c52df770855b 434 #define SPI_FTLVL_HALF_FULL ((uint32_t)0x1000)
jhon309 0:c52df770855b 435 #define SPI_FTLVL_FULL ((uint32_t)0x1800)
jhon309 0:c52df770855b 436
jhon309 0:c52df770855b 437 /**
jhon309 0:c52df770855b 438 * @}
jhon309 0:c52df770855b 439 */
jhon309 0:c52df770855b 440
jhon309 0:c52df770855b 441 /** @defgroup SPI_reception_fifo_status_level SPI reception fifo status level
jhon309 0:c52df770855b 442 * @{
jhon309 0:c52df770855b 443 */
jhon309 0:c52df770855b 444 #define SPI_FRLVL_EMPTY ((uint32_t)0x0000)
jhon309 0:c52df770855b 445 #define SPI_FRLVL_QUARTER_FULL ((uint32_t)0x0200)
jhon309 0:c52df770855b 446 #define SPI_FRLVL_HALF_FULL ((uint32_t)0x0400)
jhon309 0:c52df770855b 447 #define SPI_FRLVL_FULL ((uint32_t)0x0600)
jhon309 0:c52df770855b 448 /**
jhon309 0:c52df770855b 449 * @}
jhon309 0:c52df770855b 450 */
jhon309 0:c52df770855b 451
jhon309 0:c52df770855b 452 /**
jhon309 0:c52df770855b 453 * @}
jhon309 0:c52df770855b 454 */
jhon309 0:c52df770855b 455
jhon309 0:c52df770855b 456
jhon309 0:c52df770855b 457 /* Exported macros ------------------------------------------------------------*/
jhon309 0:c52df770855b 458 /** @defgroup SPI_Exported_Macros SPI Exported Macros
jhon309 0:c52df770855b 459 * @{
jhon309 0:c52df770855b 460 */
jhon309 0:c52df770855b 461
jhon309 0:c52df770855b 462 /** @brief Reset SPI handle state
jhon309 0:c52df770855b 463 * @param __HANDLE__: SPI handle.
jhon309 0:c52df770855b 464 * @retval None
jhon309 0:c52df770855b 465 */
jhon309 0:c52df770855b 466 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET)
jhon309 0:c52df770855b 467
jhon309 0:c52df770855b 468 /** @brief Enables or disables the specified SPI interrupts.
jhon309 0:c52df770855b 469 * @param __HANDLE__ : specifies the SPI Handle.
jhon309 0:c52df770855b 470 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
jhon309 0:c52df770855b 471 * @param __INTERRUPT__ : specifies the interrupt source to enable or disable.
jhon309 0:c52df770855b 472 * This parameter can be one of the following values:
jhon309 0:c52df770855b 473 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable
jhon309 0:c52df770855b 474 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
jhon309 0:c52df770855b 475 * @arg SPI_IT_ERR: Error interrupt enable
jhon309 0:c52df770855b 476 * @retval None
jhon309 0:c52df770855b 477 */
jhon309 0:c52df770855b 478 #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
jhon309 0:c52df770855b 479 #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__)))
jhon309 0:c52df770855b 480
jhon309 0:c52df770855b 481 /** @brief Checks if the specified SPI interrupt source is enabled or disabled.
jhon309 0:c52df770855b 482 * @param __HANDLE__ : specifies the SPI Handle.
jhon309 0:c52df770855b 483 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
jhon309 0:c52df770855b 484 * @param __INTERRUPT__ : specifies the SPI interrupt source to check.
jhon309 0:c52df770855b 485 * This parameter can be one of the following values:
jhon309 0:c52df770855b 486 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable
jhon309 0:c52df770855b 487 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
jhon309 0:c52df770855b 488 * @arg SPI_IT_ERR: Error interrupt enable
jhon309 0:c52df770855b 489 * @retval The new state of __IT__ (TRUE or FALSE).
jhon309 0:c52df770855b 490 */
jhon309 0:c52df770855b 491 #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
jhon309 0:c52df770855b 492
jhon309 0:c52df770855b 493 /** @brief Checks whether the specified SPI flag is set or not.
jhon309 0:c52df770855b 494 * @param __HANDLE__ : specifies the SPI Handle.
jhon309 0:c52df770855b 495 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
jhon309 0:c52df770855b 496 * @param __FLAG__ : specifies the flag to check.
jhon309 0:c52df770855b 497 * This parameter can be one of the following values:
jhon309 0:c52df770855b 498 * @arg SPI_FLAG_RXNE: Receive buffer not empty flag
jhon309 0:c52df770855b 499 * @arg SPI_FLAG_TXE: Transmit buffer empty flag
jhon309 0:c52df770855b 500 * @arg SPI_FLAG_CRCERR: CRC error flag
jhon309 0:c52df770855b 501 * @arg SPI_FLAG_MODF: Mode fault flag
jhon309 0:c52df770855b 502 * @arg SPI_FLAG_OVR: Overrun flag
jhon309 0:c52df770855b 503 * @arg SPI_FLAG_BSY: Busy flag
jhon309 0:c52df770855b 504 * @arg SPI_FLAG_FRE: Frame format error flag
jhon309 0:c52df770855b 505 * @arg SPI_FLAG_FTLVL: SPI fifo transmission level
jhon309 0:c52df770855b 506 * @arg SPI_FLAG_FRLVL: SPI fifo reception level
jhon309 0:c52df770855b 507 * @retval The new state of __FLAG__ (TRUE or FALSE).
jhon309 0:c52df770855b 508 */
jhon309 0:c52df770855b 509 #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
jhon309 0:c52df770855b 510
jhon309 0:c52df770855b 511 /** @brief Clears the SPI CRCERR pending flag.
jhon309 0:c52df770855b 512 * @param __HANDLE__ : specifies the SPI Handle.
jhon309 0:c52df770855b 513 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
jhon309 0:c52df770855b 514 * @retval None
jhon309 0:c52df770855b 515 */
jhon309 0:c52df770855b 516 #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = (uint16_t)(~SPI_FLAG_CRCERR))
jhon309 0:c52df770855b 517
jhon309 0:c52df770855b 518 /** @brief Clears the SPI MODF pending flag.
jhon309 0:c52df770855b 519 * @param __HANDLE__ : specifies the SPI Handle.
jhon309 0:c52df770855b 520 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
jhon309 0:c52df770855b 521 *
jhon309 0:c52df770855b 522 * @retval None
jhon309 0:c52df770855b 523 */
jhon309 0:c52df770855b 524 #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) do{\
jhon309 0:c52df770855b 525 __IO uint32_t tmpreg;\
jhon309 0:c52df770855b 526 tmpreg = (__HANDLE__)->Instance->SR;\
jhon309 0:c52df770855b 527 UNUSED(tmpreg); \
jhon309 0:c52df770855b 528 (__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE);\
jhon309 0:c52df770855b 529 }while(0)
jhon309 0:c52df770855b 530
jhon309 0:c52df770855b 531 /** @brief Clears the SPI OVR pending flag.
jhon309 0:c52df770855b 532 * @param __HANDLE__ : specifies the SPI Handle.
jhon309 0:c52df770855b 533 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
jhon309 0:c52df770855b 534 *
jhon309 0:c52df770855b 535 * @retval None
jhon309 0:c52df770855b 536 */
jhon309 0:c52df770855b 537 #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) do{ \
jhon309 0:c52df770855b 538 __IO uint32_t tmpreg; \
jhon309 0:c52df770855b 539 tmpreg = (__HANDLE__)->Instance->DR; \
jhon309 0:c52df770855b 540 tmpreg = (__HANDLE__)->Instance->SR; \
jhon309 0:c52df770855b 541 UNUSED(tmpreg); \
jhon309 0:c52df770855b 542 } while(0)
jhon309 0:c52df770855b 543
jhon309 0:c52df770855b 544 /** @brief Clears the SPI FRE pending flag.
jhon309 0:c52df770855b 545 * @param __HANDLE__ : specifies the SPI Handle.
jhon309 0:c52df770855b 546 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
jhon309 0:c52df770855b 547 *
jhon309 0:c52df770855b 548 * @retval None
jhon309 0:c52df770855b 549 */
jhon309 0:c52df770855b 550 #define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) do{\
jhon309 0:c52df770855b 551 __IO uint32_t tmpreg;\
jhon309 0:c52df770855b 552 tmpreg = ((__HANDLE__)->Instance->SR);\
jhon309 0:c52df770855b 553 UNUSED(tmpreg); \
jhon309 0:c52df770855b 554 }while(0)
jhon309 0:c52df770855b 555 /** @brief Enables the SPI.
jhon309 0:c52df770855b 556 * @param __HANDLE__ : specifies the SPI Handle.
jhon309 0:c52df770855b 557 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
jhon309 0:c52df770855b 558 * @retval None
jhon309 0:c52df770855b 559 */
jhon309 0:c52df770855b 560 #define __HAL_SPI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_SPE)
jhon309 0:c52df770855b 561
jhon309 0:c52df770855b 562 /** @brief Disables the SPI.
jhon309 0:c52df770855b 563 * @param __HANDLE__ : specifies the SPI Handle.
jhon309 0:c52df770855b 564 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
jhon309 0:c52df770855b 565 * @retval None
jhon309 0:c52df770855b 566 */
jhon309 0:c52df770855b 567 #define __HAL_SPI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE))
jhon309 0:c52df770855b 568
jhon309 0:c52df770855b 569 /** @brief Sets the SPI transmit-only mode.
jhon309 0:c52df770855b 570 * @param __HANDLE__ : specifies the SPI Handle.
jhon309 0:c52df770855b 571 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
jhon309 0:c52df770855b 572 * @retval None
jhon309 0:c52df770855b 573 */
jhon309 0:c52df770855b 574 #define __HAL_SPI_1LINE_TX(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_BIDIOE)
jhon309 0:c52df770855b 575
jhon309 0:c52df770855b 576 /** @brief Sets the SPI receive-only mode.
jhon309 0:c52df770855b 577 * @param __HANDLE__ : specifies the SPI Handle.
jhon309 0:c52df770855b 578 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
jhon309 0:c52df770855b 579 * @retval None
jhon309 0:c52df770855b 580 */
jhon309 0:c52df770855b 581 #define __HAL_SPI_1LINE_RX(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_BIDIOE))
jhon309 0:c52df770855b 582
jhon309 0:c52df770855b 583 /** @brief Resets the CRC calculation of the SPI.
jhon309 0:c52df770855b 584 * @param __HANDLE__ : specifies the SPI Handle.
jhon309 0:c52df770855b 585 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
jhon309 0:c52df770855b 586 * @retval None
jhon309 0:c52df770855b 587 */
jhon309 0:c52df770855b 588 #define __HAL_SPI_RESET_CRC(__HANDLE__) do{(__HANDLE__)->Instance->CR1 &= (uint16_t)(~SPI_CR1_CRCEN);\
jhon309 0:c52df770855b 589 (__HANDLE__)->Instance->CR1 |= SPI_CR1_CRCEN;}while(0)
jhon309 0:c52df770855b 590
jhon309 0:c52df770855b 591
jhon309 0:c52df770855b 592 #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (((POLYNOMIAL) >= 0x1) && ((POLYNOMIAL) <= 0xFFFF))
jhon309 0:c52df770855b 593 /**
jhon309 0:c52df770855b 594 * @}
jhon309 0:c52df770855b 595 */
jhon309 0:c52df770855b 596
jhon309 0:c52df770855b 597 /* Exported functions --------------------------------------------------------*/
jhon309 0:c52df770855b 598 /** @addtogroup SPI_Exported_Functions
jhon309 0:c52df770855b 599 * @{
jhon309 0:c52df770855b 600 */
jhon309 0:c52df770855b 601
jhon309 0:c52df770855b 602 /** @addtogroup SPI_Exported_Functions_Group1
jhon309 0:c52df770855b 603 * @{
jhon309 0:c52df770855b 604 */
jhon309 0:c52df770855b 605
jhon309 0:c52df770855b 606 /* Initialization and de-initialization functions ****************************/
jhon309 0:c52df770855b 607 HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi);
jhon309 0:c52df770855b 608 HAL_StatusTypeDef HAL_SPI_InitExtended(SPI_HandleTypeDef *hspi);
jhon309 0:c52df770855b 609 HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi);
jhon309 0:c52df770855b 610 void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
jhon309 0:c52df770855b 611 void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
jhon309 0:c52df770855b 612 /**
jhon309 0:c52df770855b 613 * @}
jhon309 0:c52df770855b 614 */
jhon309 0:c52df770855b 615
jhon309 0:c52df770855b 616 /** @addtogroup SPI_Exported_Functions_Group2
jhon309 0:c52df770855b 617 * @{
jhon309 0:c52df770855b 618 */
jhon309 0:c52df770855b 619
jhon309 0:c52df770855b 620 /* IO operation functions *****************************************************/
jhon309 0:c52df770855b 621 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
jhon309 0:c52df770855b 622 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
jhon309 0:c52df770855b 623 HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
jhon309 0:c52df770855b 624 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
jhon309 0:c52df770855b 625 HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
jhon309 0:c52df770855b 626 HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
jhon309 0:c52df770855b 627 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
jhon309 0:c52df770855b 628 HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
jhon309 0:c52df770855b 629 HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
jhon309 0:c52df770855b 630 HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi);
jhon309 0:c52df770855b 631 HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi);
jhon309 0:c52df770855b 632 HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi);
jhon309 0:c52df770855b 633 HAL_StatusTypeDef HAL_SPI_FlushRxFifo(SPI_HandleTypeDef *hspi);
jhon309 0:c52df770855b 634
jhon309 0:c52df770855b 635 void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi);
jhon309 0:c52df770855b 636 void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
jhon309 0:c52df770855b 637 void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi);
jhon309 0:c52df770855b 638 void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi);
jhon309 0:c52df770855b 639 void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi);
jhon309 0:c52df770855b 640 void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi);
jhon309 0:c52df770855b 641 void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi);
jhon309 0:c52df770855b 642 void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi);
jhon309 0:c52df770855b 643 /**
jhon309 0:c52df770855b 644 * @}
jhon309 0:c52df770855b 645 */
jhon309 0:c52df770855b 646
jhon309 0:c52df770855b 647 /** @addtogroup SPI_Exported_Functions_Group3
jhon309 0:c52df770855b 648 * @{
jhon309 0:c52df770855b 649 */
jhon309 0:c52df770855b 650
jhon309 0:c52df770855b 651 /* Peripheral State and Error functions ***************************************/
jhon309 0:c52df770855b 652 HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi);
jhon309 0:c52df770855b 653 uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
jhon309 0:c52df770855b 654 /**
jhon309 0:c52df770855b 655 * @}
jhon309 0:c52df770855b 656 */
jhon309 0:c52df770855b 657
jhon309 0:c52df770855b 658 /**
jhon309 0:c52df770855b 659 * @}
jhon309 0:c52df770855b 660 */
jhon309 0:c52df770855b 661
jhon309 0:c52df770855b 662 /**
jhon309 0:c52df770855b 663 * @}
jhon309 0:c52df770855b 664 */
jhon309 0:c52df770855b 665
jhon309 0:c52df770855b 666 /**
jhon309 0:c52df770855b 667 * @}
jhon309 0:c52df770855b 668 */
jhon309 0:c52df770855b 669
jhon309 0:c52df770855b 670 #ifdef __cplusplus
jhon309 0:c52df770855b 671 }
jhon309 0:c52df770855b 672 #endif
jhon309 0:c52df770855b 673
jhon309 0:c52df770855b 674 #endif /* __STM32F0xx_HAL_SPI_H */
jhon309 0:c52df770855b 675
jhon309 0:c52df770855b 676 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
jhon309 0:c52df770855b 677