Jhon Plantikow / DHT11

DHT11

TARGET_NUCLEO_F072RB/stm32f0xx_hal_pwr_ex.h@0:c52df770855b, 2015-08-13 (annotated)

Committer:
jhon309
Date:
Thu Aug 13 00:21:57 2015 +0000
Revision:
0:c52df770855b
DHT11

Who changed what in which revision?

UserRevisionLine numberNew contents of line
jhon309 0:c52df770855b 1 /**
jhon309 0:c52df770855b 2 ******************************************************************************
jhon309 0:c52df770855b 3 * @file stm32f0xx_hal_pwr_ex.h
jhon309 0:c52df770855b 4 * @author MCD Application Team
jhon309 0:c52df770855b 5 * @version V1.2.0
jhon309 0:c52df770855b 6 * @date 11-December-2014
jhon309 0:c52df770855b 7 * @brief Header file of PWR HAL Extension module.
jhon309 0:c52df770855b 8 ******************************************************************************
jhon309 0:c52df770855b 9 * @attention
jhon309 0:c52df770855b 10 *
jhon309 0:c52df770855b 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
jhon309 0:c52df770855b 12 *
jhon309 0:c52df770855b 13 * Redistribution and use in source and binary forms, with or without modification,
jhon309 0:c52df770855b 14 * are permitted provided that the following conditions are met:
jhon309 0:c52df770855b 15 * 1. Redistributions of source code must retain the above copyright notice,
jhon309 0:c52df770855b 16 * this list of conditions and the following disclaimer.
jhon309 0:c52df770855b 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
jhon309 0:c52df770855b 18 * this list of conditions and the following disclaimer in the documentation
jhon309 0:c52df770855b 19 * and/or other materials provided with the distribution.
jhon309 0:c52df770855b 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
jhon309 0:c52df770855b 21 * may be used to endorse or promote products derived from this software
jhon309 0:c52df770855b 22 * without specific prior written permission.
jhon309 0:c52df770855b 23 *
jhon309 0:c52df770855b 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
jhon309 0:c52df770855b 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
jhon309 0:c52df770855b 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
jhon309 0:c52df770855b 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
jhon309 0:c52df770855b 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
jhon309 0:c52df770855b 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
jhon309 0:c52df770855b 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
jhon309 0:c52df770855b 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
jhon309 0:c52df770855b 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
jhon309 0:c52df770855b 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
jhon309 0:c52df770855b 34 *
jhon309 0:c52df770855b 35 ******************************************************************************
jhon309 0:c52df770855b 36 */
jhon309 0:c52df770855b 37
jhon309 0:c52df770855b 38 /* Define to prevent recursive inclusion -------------------------------------*/
jhon309 0:c52df770855b 39 #ifndef __STM32F0xx_HAL_PWR_EX_H
jhon309 0:c52df770855b 40 #define __STM32F0xx_HAL_PWR_EX_H
jhon309 0:c52df770855b 41
jhon309 0:c52df770855b 42 #ifdef __cplusplus
jhon309 0:c52df770855b 43 extern "C" {
jhon309 0:c52df770855b 44 #endif
jhon309 0:c52df770855b 45
jhon309 0:c52df770855b 46 /* Includes ------------------------------------------------------------------*/
jhon309 0:c52df770855b 47 #include "stm32f0xx_hal_def.h"
jhon309 0:c52df770855b 48
jhon309 0:c52df770855b 49 /** @addtogroup STM32F0xx_HAL_Driver
jhon309 0:c52df770855b 50 * @{
jhon309 0:c52df770855b 51 */
jhon309 0:c52df770855b 52
jhon309 0:c52df770855b 53 /** @addtogroup PWREx
jhon309 0:c52df770855b 54 * @{
jhon309 0:c52df770855b 55 */
jhon309 0:c52df770855b 56
jhon309 0:c52df770855b 57 /* Exported types ------------------------------------------------------------*/
jhon309 0:c52df770855b 58
jhon309 0:c52df770855b 59 /** @defgroup PWREx_Exported_Types PWREx Exported Types
jhon309 0:c52df770855b 60 * @{
jhon309 0:c52df770855b 61 */
jhon309 0:c52df770855b 62
jhon309 0:c52df770855b 63 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
jhon309 0:c52df770855b 64 defined (STM32F071xB) || defined (STM32F072xB) || \
jhon309 0:c52df770855b 65 defined (STM32F091xC)
jhon309 0:c52df770855b 66
jhon309 0:c52df770855b 67 /**
jhon309 0:c52df770855b 68 * @brief PWR PVD configuration structure definition
jhon309 0:c52df770855b 69 */
jhon309 0:c52df770855b 70 typedef struct
jhon309 0:c52df770855b 71 {
jhon309 0:c52df770855b 72 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level
jhon309 0:c52df770855b 73 This parameter can be a value of @ref PWREx_PVD_detection_level */
jhon309 0:c52df770855b 74
jhon309 0:c52df770855b 75 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
jhon309 0:c52df770855b 76 This parameter can be a value of @ref PWREx_PVD_Mode */
jhon309 0:c52df770855b 77 }PWR_PVDTypeDef;
jhon309 0:c52df770855b 78
jhon309 0:c52df770855b 79 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
jhon309 0:c52df770855b 80 /* defined (STM32F071xB) || defined (STM32F072xB) || */
jhon309 0:c52df770855b 81 /* defined (STM32F091xC) */
jhon309 0:c52df770855b 82 /**
jhon309 0:c52df770855b 83 * @}
jhon309 0:c52df770855b 84 */
jhon309 0:c52df770855b 85 /* Exported constants --------------------------------------------------------*/
jhon309 0:c52df770855b 86
jhon309 0:c52df770855b 87 /** @defgroup PWREx_Exported_Constants PWREx Exported Constants
jhon309 0:c52df770855b 88 * @{
jhon309 0:c52df770855b 89 */
jhon309 0:c52df770855b 90
jhon309 0:c52df770855b 91
jhon309 0:c52df770855b 92 /** @defgroup PWREx_WakeUp_Pins PWREx Wakeup Pins
jhon309 0:c52df770855b 93 * @{
jhon309 0:c52df770855b 94 */
jhon309 0:c52df770855b 95 #if defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
jhon309 0:c52df770855b 96 defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC)
jhon309 0:c52df770855b 97 #define PWR_WAKEUP_PIN1 ((uint32_t)0x00)
jhon309 0:c52df770855b 98 #define PWR_WAKEUP_PIN2 ((uint32_t)0x01)
jhon309 0:c52df770855b 99 #define PWR_WAKEUP_PIN3 ((uint32_t)0x02)
jhon309 0:c52df770855b 100 #define PWR_WAKEUP_PIN4 ((uint32_t)0x03)
jhon309 0:c52df770855b 101 #define PWR_WAKEUP_PIN5 ((uint32_t)0x04)
jhon309 0:c52df770855b 102 #define PWR_WAKEUP_PIN6 ((uint32_t)0x05)
jhon309 0:c52df770855b 103 #define PWR_WAKEUP_PIN7 ((uint32_t)0x06)
jhon309 0:c52df770855b 104 #define PWR_WAKEUP_PIN8 ((uint32_t)0x07)
jhon309 0:c52df770855b 105
jhon309 0:c52df770855b 106 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
jhon309 0:c52df770855b 107 ((PIN) == PWR_WAKEUP_PIN2) || \
jhon309 0:c52df770855b 108 ((PIN) == PWR_WAKEUP_PIN3) || \
jhon309 0:c52df770855b 109 ((PIN) == PWR_WAKEUP_PIN4) || \
jhon309 0:c52df770855b 110 ((PIN) == PWR_WAKEUP_PIN5) || \
jhon309 0:c52df770855b 111 ((PIN) == PWR_WAKEUP_PIN6) || \
jhon309 0:c52df770855b 112 ((PIN) == PWR_WAKEUP_PIN7) || \
jhon309 0:c52df770855b 113 ((PIN) == PWR_WAKEUP_PIN8))
jhon309 0:c52df770855b 114 #else
jhon309 0:c52df770855b 115 #define PWR_WAKEUP_PIN1 ((uint32_t)0x00)
jhon309 0:c52df770855b 116 #define PWR_WAKEUP_PIN2 ((uint32_t)0x01)
jhon309 0:c52df770855b 117
jhon309 0:c52df770855b 118 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
jhon309 0:c52df770855b 119 ((PIN) == PWR_WAKEUP_PIN2))
jhon309 0:c52df770855b 120 #endif /* defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || */
jhon309 0:c52df770855b 121 /* defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC) */
jhon309 0:c52df770855b 122 /**
jhon309 0:c52df770855b 123 * @}
jhon309 0:c52df770855b 124 */
jhon309 0:c52df770855b 125
jhon309 0:c52df770855b 126 /** @defgroup PWREx_EXTI_Line PWREx EXTI Line
jhon309 0:c52df770855b 127 * @{
jhon309 0:c52df770855b 128 */
jhon309 0:c52df770855b 129 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
jhon309 0:c52df770855b 130 defined (STM32F071xB) || defined (STM32F072xB) || \
jhon309 0:c52df770855b 131 defined (STM32F091xC)
jhon309 0:c52df770855b 132
jhon309 0:c52df770855b 133 #define PWR_EXTI_LINE_PVD ((uint32_t)0x00010000) /*!< External interrupt line 16 Connected to the PVD EXTI Line */
jhon309 0:c52df770855b 134
jhon309 0:c52df770855b 135 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
jhon309 0:c52df770855b 136 /* defined (STM32F071xB) || defined (STM32F072xB) || */
jhon309 0:c52df770855b 137 /* defined (STM32F091xC) */
jhon309 0:c52df770855b 138
jhon309 0:c52df770855b 139 #if defined (STM32F042x6) || defined (STM32F048xx) || \
jhon309 0:c52df770855b 140 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
jhon309 0:c52df770855b 141 defined (STM32F091xC) || defined (STM32F098xx)
jhon309 0:c52df770855b 142
jhon309 0:c52df770855b 143 #define PWR_EXTI_LINE_VDDIO2 ((uint32_t)0x80000000) /*!< External interrupt line 31 Connected to the Vddio2 Monitor EXTI Line */
jhon309 0:c52df770855b 144
jhon309 0:c52df770855b 145 #endif /* defined (STM32F042x6) || defined (STM32F048xx) ||\
jhon309 0:c52df770855b 146 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
jhon309 0:c52df770855b 147 defined (STM32F091xC) || defined (STM32F098xx) ||*/
jhon309 0:c52df770855b 148 /**
jhon309 0:c52df770855b 149 * @}
jhon309 0:c52df770855b 150 */
jhon309 0:c52df770855b 151
jhon309 0:c52df770855b 152 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
jhon309 0:c52df770855b 153 defined (STM32F071xB) || defined (STM32F072xB) || \
jhon309 0:c52df770855b 154 defined (STM32F091xC)
jhon309 0:c52df770855b 155 /** @defgroup PWREx_PVD_detection_level PWREx PVD detection level
jhon309 0:c52df770855b 156 * @{
jhon309 0:c52df770855b 157 */
jhon309 0:c52df770855b 158 #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0
jhon309 0:c52df770855b 159 #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1
jhon309 0:c52df770855b 160 #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2
jhon309 0:c52df770855b 161 #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3
jhon309 0:c52df770855b 162 #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4
jhon309 0:c52df770855b 163 #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5
jhon309 0:c52df770855b 164 #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6
jhon309 0:c52df770855b 165 #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7
jhon309 0:c52df770855b 166 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
jhon309 0:c52df770855b 167 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
jhon309 0:c52df770855b 168 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
jhon309 0:c52df770855b 169 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
jhon309 0:c52df770855b 170 /**
jhon309 0:c52df770855b 171 * @}
jhon309 0:c52df770855b 172 */
jhon309 0:c52df770855b 173
jhon309 0:c52df770855b 174 /** @defgroup PWREx_PVD_Mode PWREx PVD Mode
jhon309 0:c52df770855b 175 * @{
jhon309 0:c52df770855b 176 */
jhon309 0:c52df770855b 177 #define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000) /*!< basic mode is used */
jhon309 0:c52df770855b 178 #define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001) /*!< External Interrupt Mode with Rising edge trigger detection */
jhon309 0:c52df770855b 179 #define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002) /*!< External Interrupt Mode with Falling edge trigger detection */
jhon309 0:c52df770855b 180 #define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
jhon309 0:c52df770855b 181 #define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001) /*!< Event Mode with Rising edge trigger detection */
jhon309 0:c52df770855b 182 #define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002) /*!< Event Mode with Falling edge trigger detection */
jhon309 0:c52df770855b 183 #define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003) /*!< Event Mode with Rising/Falling edge trigger detection */
jhon309 0:c52df770855b 184
jhon309 0:c52df770855b 185 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
jhon309 0:c52df770855b 186 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
jhon309 0:c52df770855b 187 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
jhon309 0:c52df770855b 188 ((MODE) == PWR_PVD_MODE_NORMAL))
jhon309 0:c52df770855b 189 /**
jhon309 0:c52df770855b 190 * @}
jhon309 0:c52df770855b 191 */
jhon309 0:c52df770855b 192 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
jhon309 0:c52df770855b 193 /* defined (STM32F071xB) || defined (STM32F072xB) || */
jhon309 0:c52df770855b 194 /* defined (STM32F091xC) */
jhon309 0:c52df770855b 195
jhon309 0:c52df770855b 196 /** @defgroup PWREx_Flag PWREx Flag
jhon309 0:c52df770855b 197 * @{
jhon309 0:c52df770855b 198 */
jhon309 0:c52df770855b 199 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
jhon309 0:c52df770855b 200 defined (STM32F071xB) || defined (STM32F072xB) || \
jhon309 0:c52df770855b 201 defined (STM32F091xC)
jhon309 0:c52df770855b 202
jhon309 0:c52df770855b 203 #define PWR_FLAG_WU PWR_CSR_WUF
jhon309 0:c52df770855b 204 #define PWR_FLAG_SB PWR_CSR_SBF
jhon309 0:c52df770855b 205 #define PWR_FLAG_PVDO PWR_CSR_PVDO
jhon309 0:c52df770855b 206 #define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF
jhon309 0:c52df770855b 207 #elif defined (STM32F070x6) || defined (STM32F070xB) || defined (STM32F030xC)
jhon309 0:c52df770855b 208 #define PWR_FLAG_WU PWR_CSR_WUF
jhon309 0:c52df770855b 209 #define PWR_FLAG_SB PWR_CSR_SBF
jhon309 0:c52df770855b 210 #define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF
jhon309 0:c52df770855b 211 #else
jhon309 0:c52df770855b 212 #define PWR_FLAG_WU PWR_CSR_WUF
jhon309 0:c52df770855b 213 #define PWR_FLAG_SB PWR_CSR_SBF
jhon309 0:c52df770855b 214
jhon309 0:c52df770855b 215 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
jhon309 0:c52df770855b 216 /* defined (STM32F071xB) || defined (STM32F072xB) || */
jhon309 0:c52df770855b 217 /* defined (STM32F091xC) */
jhon309 0:c52df770855b 218 /**
jhon309 0:c52df770855b 219 * @}
jhon309 0:c52df770855b 220 */
jhon309 0:c52df770855b 221
jhon309 0:c52df770855b 222 /**
jhon309 0:c52df770855b 223 * @}
jhon309 0:c52df770855b 224 */
jhon309 0:c52df770855b 225
jhon309 0:c52df770855b 226 /* Exported macro ------------------------------------------------------------*/
jhon309 0:c52df770855b 227 /** @defgroup PWREx_Exported_Macros PWREx Exported Macros
jhon309 0:c52df770855b 228 * @{
jhon309 0:c52df770855b 229 */
jhon309 0:c52df770855b 230 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
jhon309 0:c52df770855b 231 defined (STM32F071xB) || defined (STM32F072xB) || \
jhon309 0:c52df770855b 232 defined (STM32F091xC)
jhon309 0:c52df770855b 233 /**
jhon309 0:c52df770855b 234 * @brief Enable interrupt on PVD Exti Line 16.
jhon309 0:c52df770855b 235 * @retval None.
jhon309 0:c52df770855b 236 */
jhon309 0:c52df770855b 237 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD))
jhon309 0:c52df770855b 238
jhon309 0:c52df770855b 239 /**
jhon309 0:c52df770855b 240 * @brief Disable interrupt on PVD Exti Line 16.
jhon309 0:c52df770855b 241 * @retval None.
jhon309 0:c52df770855b 242 */
jhon309 0:c52df770855b 243 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD))
jhon309 0:c52df770855b 244
jhon309 0:c52df770855b 245 /**
jhon309 0:c52df770855b 246 * @brief Enable event on PVD Exti Line 16.
jhon309 0:c52df770855b 247 * @retval None.
jhon309 0:c52df770855b 248 */
jhon309 0:c52df770855b 249 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD))
jhon309 0:c52df770855b 250
jhon309 0:c52df770855b 251 /**
jhon309 0:c52df770855b 252 * @brief Disable event on PVD Exti Line 16.
jhon309 0:c52df770855b 253 * @retval None.
jhon309 0:c52df770855b 254 */
jhon309 0:c52df770855b 255 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD))
jhon309 0:c52df770855b 256
jhon309 0:c52df770855b 257 /**
jhon309 0:c52df770855b 258 * @brief PVD EXTI line configuration: clear falling edge and rising edge trigger.
jhon309 0:c52df770855b 259 * @retval None.
jhon309 0:c52df770855b 260 */
jhon309 0:c52df770855b 261 #define __HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER() EXTI->FTSR &= ~(PWR_EXTI_LINE_PVD); \
jhon309 0:c52df770855b 262 EXTI->RTSR &= ~(PWR_EXTI_LINE_PVD)
jhon309 0:c52df770855b 263
jhon309 0:c52df770855b 264 /**
jhon309 0:c52df770855b 265 * @brief PVD EXTI line configuration: set falling edge trigger.
jhon309 0:c52df770855b 266 * @retval None.
jhon309 0:c52df770855b 267 */
jhon309 0:c52df770855b 268 #define __HAL_PWR_PVD_EXTI_SET_FALLING_EGDE_TRIGGER() EXTI->FTSR |= (PWR_EXTI_LINE_PVD)
jhon309 0:c52df770855b 269
jhon309 0:c52df770855b 270 /**
jhon309 0:c52df770855b 271 * @brief PVD EXTI line configuration: set rising edge trigger.
jhon309 0:c52df770855b 272 * @retval None.
jhon309 0:c52df770855b 273 */
jhon309 0:c52df770855b 274 #define __HAL_PWR_PVD_EXTI_SET_RISING_EDGE_TRIGGER() EXTI->RTSR |= (PWR_EXTI_LINE_PVD)
jhon309 0:c52df770855b 275
jhon309 0:c52df770855b 276 /**
jhon309 0:c52df770855b 277 * @brief Check whether the specified PVD EXTI interrupt flag is set or not.
jhon309 0:c52df770855b 278 * @retval EXTI PVD Line Status.
jhon309 0:c52df770855b 279 */
jhon309 0:c52df770855b 280 #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD))
jhon309 0:c52df770855b 281
jhon309 0:c52df770855b 282 /**
jhon309 0:c52df770855b 283 * @brief Clear the PVD EXTI flag.
jhon309 0:c52df770855b 284 * @retval None.
jhon309 0:c52df770855b 285 */
jhon309 0:c52df770855b 286 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD))
jhon309 0:c52df770855b 287
jhon309 0:c52df770855b 288 /**
jhon309 0:c52df770855b 289 * @brief Generate a Software interrupt on selected EXTI line.
jhon309 0:c52df770855b 290 * @retval None.
jhon309 0:c52df770855b 291 */
jhon309 0:c52df770855b 292 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD))
jhon309 0:c52df770855b 293
jhon309 0:c52df770855b 294 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
jhon309 0:c52df770855b 295 /* defined (STM32F071xB) || defined (STM32F072xB) || */
jhon309 0:c52df770855b 296 /* defined (STM32F091xC) */
jhon309 0:c52df770855b 297
jhon309 0:c52df770855b 298
jhon309 0:c52df770855b 299 #if defined (STM32F042x6) || defined (STM32F048xx) || \
jhon309 0:c52df770855b 300 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
jhon309 0:c52df770855b 301 defined (STM32F091xC) || defined (STM32F098xx)
jhon309 0:c52df770855b 302 /**
jhon309 0:c52df770855b 303 * @brief Enable interrupt on Vddio2 Monitor Exti Line 31.
jhon309 0:c52df770855b 304 * @retval None.
jhon309 0:c52df770855b 305 */
jhon309 0:c52df770855b 306 #define __HAL_PWR_VDDIO2_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_VDDIO2))
jhon309 0:c52df770855b 307
jhon309 0:c52df770855b 308 /**
jhon309 0:c52df770855b 309 * @brief Disable interrupt on Vddio2 Monitor Exti Line 31.
jhon309 0:c52df770855b 310 * @retval None.
jhon309 0:c52df770855b 311 */
jhon309 0:c52df770855b 312 #define __HAL_PWR_VDDIO2_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_VDDIO2))
jhon309 0:c52df770855b 313
jhon309 0:c52df770855b 314 /**
jhon309 0:c52df770855b 315 * @brief Vddio2 Monitor EXTI line configuration: clear falling edge and rising edge trigger.
jhon309 0:c52df770855b 316 * @retval None.
jhon309 0:c52df770855b 317 */
jhon309 0:c52df770855b 318 #define __HAL_PWR_VDDIO2_EXTI_CLEAR_EGDE_TRIGGER() EXTI->FTSR &= ~(PWR_EXTI_LINE_VDDIO2); \
jhon309 0:c52df770855b 319 EXTI->RTSR &= ~(PWR_EXTI_LINE_VDDIO2)
jhon309 0:c52df770855b 320
jhon309 0:c52df770855b 321 /**
jhon309 0:c52df770855b 322 * @brief Vddio2 Monitor EXTI line configuration: set falling edge trigger.
jhon309 0:c52df770855b 323 * @retval None.
jhon309 0:c52df770855b 324 */
jhon309 0:c52df770855b 325 #define __HAL_PWR_VDDIO2_EXTI_SET_FALLING_EGDE_TRIGGER() EXTI->FTSR |= (PWR_EXTI_LINE_VDDIO2)
jhon309 0:c52df770855b 326
jhon309 0:c52df770855b 327 /**
jhon309 0:c52df770855b 328 * @brief Check whether the specified VDDIO2 monitor EXTI interrupt flag is set or not.
jhon309 0:c52df770855b 329 * @retval EXTI VDDIO2 Monitor Line Status.
jhon309 0:c52df770855b 330 */
jhon309 0:c52df770855b 331 #define __HAL_PWR_VDDIO2_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_VDDIO2))
jhon309 0:c52df770855b 332
jhon309 0:c52df770855b 333 /**
jhon309 0:c52df770855b 334 * @brief Clear the VDDIO2 Monitor EXTI flag.
jhon309 0:c52df770855b 335 * @retval None.
jhon309 0:c52df770855b 336 */
jhon309 0:c52df770855b 337 #define __HAL_PWR_VDDIO2_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_VDDIO2))
jhon309 0:c52df770855b 338
jhon309 0:c52df770855b 339 /**
jhon309 0:c52df770855b 340 * @brief Generate a Software interrupt on selected EXTI line.
jhon309 0:c52df770855b 341 * @retval None.
jhon309 0:c52df770855b 342 */
jhon309 0:c52df770855b 343 #define __HAL_PWR_VDDIO2_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_VDDIO2))
jhon309 0:c52df770855b 344
jhon309 0:c52df770855b 345
jhon309 0:c52df770855b 346 #endif /* defined (STM32F042x6) || defined (STM32F048xx) ||\
jhon309 0:c52df770855b 347 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
jhon309 0:c52df770855b 348 defined (STM32F091xC) || defined (STM32F098xx) */
jhon309 0:c52df770855b 349
jhon309 0:c52df770855b 350 /**
jhon309 0:c52df770855b 351 * @}
jhon309 0:c52df770855b 352 */
jhon309 0:c52df770855b 353
jhon309 0:c52df770855b 354 /* Exported functions --------------------------------------------------------*/
jhon309 0:c52df770855b 355
jhon309 0:c52df770855b 356 /** @addtogroup PWREx_Exported_Functions PWREx Exported Functions
jhon309 0:c52df770855b 357 * @{
jhon309 0:c52df770855b 358 */
jhon309 0:c52df770855b 359
jhon309 0:c52df770855b 360 /** @addtogroup PWREx_Exported_Functions_Group1
jhon309 0:c52df770855b 361 * @{
jhon309 0:c52df770855b 362 */
jhon309 0:c52df770855b 363 /* I/O operation functions ***************************************************/
jhon309 0:c52df770855b 364 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
jhon309 0:c52df770855b 365 defined (STM32F071xB) || defined (STM32F072xB) || \
jhon309 0:c52df770855b 366 defined (STM32F091xC)
jhon309 0:c52df770855b 367 void HAL_PWR_PVD_IRQHandler(void);
jhon309 0:c52df770855b 368 void HAL_PWR_PVDCallback(void);
jhon309 0:c52df770855b 369 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
jhon309 0:c52df770855b 370 /* defined (STM32F071xB) || defined (STM32F072xB) || */
jhon309 0:c52df770855b 371 /* defined (STM32F091xC) */
jhon309 0:c52df770855b 372
jhon309 0:c52df770855b 373 #if defined (STM32F042x6) || defined (STM32F048xx) || \
jhon309 0:c52df770855b 374 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
jhon309 0:c52df770855b 375 defined (STM32F091xC) || defined (STM32F098xx)
jhon309 0:c52df770855b 376 void HAL_PWR_Vddio2Monitor_IRQHandler(void);
jhon309 0:c52df770855b 377 void HAL_PWR_Vddio2MonitorCallback(void);
jhon309 0:c52df770855b 378 #endif /* defined (STM32F042x6) || defined (STM32F048xx) || \
jhon309 0:c52df770855b 379 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
jhon309 0:c52df770855b 380 defined (STM32F091xC) || defined (STM32F098xx) */
jhon309 0:c52df770855b 381
jhon309 0:c52df770855b 382 /* Peripheral Control functions **********************************************/
jhon309 0:c52df770855b 383 #if defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || \
jhon309 0:c52df770855b 384 defined (STM32F071xB) || defined (STM32F072xB) || \
jhon309 0:c52df770855b 385 defined (STM32F091xC)
jhon309 0:c52df770855b 386 void HAL_PWR_PVDConfig(PWR_PVDTypeDef *sConfigPVD);
jhon309 0:c52df770855b 387 void HAL_PWR_EnablePVD(void);
jhon309 0:c52df770855b 388 void HAL_PWR_DisablePVD(void);
jhon309 0:c52df770855b 389 #endif /* defined (STM32F031x6) || defined (STM32F042x6) || defined (STM32F051x8) || */
jhon309 0:c52df770855b 390 /* defined (STM32F071xB) || defined (STM32F072xB) || */
jhon309 0:c52df770855b 391 /* defined (STM32F091xC) */
jhon309 0:c52df770855b 392
jhon309 0:c52df770855b 393 #if defined (STM32F042x6) || defined (STM32F048xx) || \
jhon309 0:c52df770855b 394 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
jhon309 0:c52df770855b 395 defined (STM32F091xC) || defined (STM32F098xx)
jhon309 0:c52df770855b 396 void HAL_PWR_EnableVddio2Monitor(void);
jhon309 0:c52df770855b 397 void HAL_PWR_DisableVddio2Monitor(void);
jhon309 0:c52df770855b 398 #endif /* defined (STM32F042x6) || defined (STM32F048xx) || \
jhon309 0:c52df770855b 399 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
jhon309 0:c52df770855b 400 defined (STM32F091xC) || defined (STM32F098xx) */
jhon309 0:c52df770855b 401
jhon309 0:c52df770855b 402 /**
jhon309 0:c52df770855b 403 * @}
jhon309 0:c52df770855b 404 */
jhon309 0:c52df770855b 405
jhon309 0:c52df770855b 406 /**
jhon309 0:c52df770855b 407 * @}
jhon309 0:c52df770855b 408 */
jhon309 0:c52df770855b 409
jhon309 0:c52df770855b 410 /**
jhon309 0:c52df770855b 411 * @}
jhon309 0:c52df770855b 412 */
jhon309 0:c52df770855b 413
jhon309 0:c52df770855b 414 /**
jhon309 0:c52df770855b 415 * @}
jhon309 0:c52df770855b 416 */
jhon309 0:c52df770855b 417
jhon309 0:c52df770855b 418 #ifdef __cplusplus
jhon309 0:c52df770855b 419 }
jhon309 0:c52df770855b 420 #endif
jhon309 0:c52df770855b 421
jhon309 0:c52df770855b 422 #endif /* __STM32F0xx_HAL_PWR_EX_H */
jhon309 0:c52df770855b 423
jhon309 0:c52df770855b 424 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
jhon309 0:c52df770855b 425