DHT11

Committer:
jhon309
Date:
Thu Aug 13 00:21:57 2015 +0000
Revision:
0:c52df770855b
DHT11

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jhon309 0:c52df770855b 1 /**************************************************************************//**
jhon309 0:c52df770855b 2 * @file core_cmInstr.h
jhon309 0:c52df770855b 3 * @brief CMSIS Cortex-M Core Instruction Access Header File
jhon309 0:c52df770855b 4 * @version V3.20
jhon309 0:c52df770855b 5 * @date 05. March 2013
jhon309 0:c52df770855b 6 *
jhon309 0:c52df770855b 7 * @note
jhon309 0:c52df770855b 8 *
jhon309 0:c52df770855b 9 ******************************************************************************/
jhon309 0:c52df770855b 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
jhon309 0:c52df770855b 11
jhon309 0:c52df770855b 12 All rights reserved.
jhon309 0:c52df770855b 13 Redistribution and use in source and binary forms, with or without
jhon309 0:c52df770855b 14 modification, are permitted provided that the following conditions are met:
jhon309 0:c52df770855b 15 - Redistributions of source code must retain the above copyright
jhon309 0:c52df770855b 16 notice, this list of conditions and the following disclaimer.
jhon309 0:c52df770855b 17 - Redistributions in binary form must reproduce the above copyright
jhon309 0:c52df770855b 18 notice, this list of conditions and the following disclaimer in the
jhon309 0:c52df770855b 19 documentation and/or other materials provided with the distribution.
jhon309 0:c52df770855b 20 - Neither the name of ARM nor the names of its contributors may be used
jhon309 0:c52df770855b 21 to endorse or promote products derived from this software without
jhon309 0:c52df770855b 22 specific prior written permission.
jhon309 0:c52df770855b 23 *
jhon309 0:c52df770855b 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
jhon309 0:c52df770855b 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
jhon309 0:c52df770855b 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
jhon309 0:c52df770855b 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
jhon309 0:c52df770855b 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
jhon309 0:c52df770855b 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
jhon309 0:c52df770855b 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
jhon309 0:c52df770855b 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
jhon309 0:c52df770855b 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
jhon309 0:c52df770855b 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
jhon309 0:c52df770855b 34 POSSIBILITY OF SUCH DAMAGE.
jhon309 0:c52df770855b 35 ---------------------------------------------------------------------------*/
jhon309 0:c52df770855b 36
jhon309 0:c52df770855b 37
jhon309 0:c52df770855b 38 #ifndef __CORE_CMINSTR_H
jhon309 0:c52df770855b 39 #define __CORE_CMINSTR_H
jhon309 0:c52df770855b 40
jhon309 0:c52df770855b 41
jhon309 0:c52df770855b 42 /* ########################## Core Instruction Access ######################### */
jhon309 0:c52df770855b 43 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
jhon309 0:c52df770855b 44 Access to dedicated instructions
jhon309 0:c52df770855b 45 @{
jhon309 0:c52df770855b 46 */
jhon309 0:c52df770855b 47
jhon309 0:c52df770855b 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
jhon309 0:c52df770855b 49 /* ARM armcc specific functions */
jhon309 0:c52df770855b 50
jhon309 0:c52df770855b 51 #if (__ARMCC_VERSION < 400677)
jhon309 0:c52df770855b 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
jhon309 0:c52df770855b 53 #endif
jhon309 0:c52df770855b 54
jhon309 0:c52df770855b 55
jhon309 0:c52df770855b 56 /** \brief No Operation
jhon309 0:c52df770855b 57
jhon309 0:c52df770855b 58 No Operation does nothing. This instruction can be used for code alignment purposes.
jhon309 0:c52df770855b 59 */
jhon309 0:c52df770855b 60 #define __NOP __nop
jhon309 0:c52df770855b 61
jhon309 0:c52df770855b 62
jhon309 0:c52df770855b 63 /** \brief Wait For Interrupt
jhon309 0:c52df770855b 64
jhon309 0:c52df770855b 65 Wait For Interrupt is a hint instruction that suspends execution
jhon309 0:c52df770855b 66 until one of a number of events occurs.
jhon309 0:c52df770855b 67 */
jhon309 0:c52df770855b 68 #define __WFI __wfi
jhon309 0:c52df770855b 69
jhon309 0:c52df770855b 70
jhon309 0:c52df770855b 71 /** \brief Wait For Event
jhon309 0:c52df770855b 72
jhon309 0:c52df770855b 73 Wait For Event is a hint instruction that permits the processor to enter
jhon309 0:c52df770855b 74 a low-power state until one of a number of events occurs.
jhon309 0:c52df770855b 75 */
jhon309 0:c52df770855b 76 #define __WFE __wfe
jhon309 0:c52df770855b 77
jhon309 0:c52df770855b 78
jhon309 0:c52df770855b 79 /** \brief Send Event
jhon309 0:c52df770855b 80
jhon309 0:c52df770855b 81 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
jhon309 0:c52df770855b 82 */
jhon309 0:c52df770855b 83 #define __SEV __sev
jhon309 0:c52df770855b 84
jhon309 0:c52df770855b 85
jhon309 0:c52df770855b 86 /** \brief Instruction Synchronization Barrier
jhon309 0:c52df770855b 87
jhon309 0:c52df770855b 88 Instruction Synchronization Barrier flushes the pipeline in the processor,
jhon309 0:c52df770855b 89 so that all instructions following the ISB are fetched from cache or
jhon309 0:c52df770855b 90 memory, after the instruction has been completed.
jhon309 0:c52df770855b 91 */
jhon309 0:c52df770855b 92 #define __ISB() __isb(0xF)
jhon309 0:c52df770855b 93
jhon309 0:c52df770855b 94
jhon309 0:c52df770855b 95 /** \brief Data Synchronization Barrier
jhon309 0:c52df770855b 96
jhon309 0:c52df770855b 97 This function acts as a special kind of Data Memory Barrier.
jhon309 0:c52df770855b 98 It completes when all explicit memory accesses before this instruction complete.
jhon309 0:c52df770855b 99 */
jhon309 0:c52df770855b 100 #define __DSB() __dsb(0xF)
jhon309 0:c52df770855b 101
jhon309 0:c52df770855b 102
jhon309 0:c52df770855b 103 /** \brief Data Memory Barrier
jhon309 0:c52df770855b 104
jhon309 0:c52df770855b 105 This function ensures the apparent order of the explicit memory operations before
jhon309 0:c52df770855b 106 and after the instruction, without ensuring their completion.
jhon309 0:c52df770855b 107 */
jhon309 0:c52df770855b 108 #define __DMB() __dmb(0xF)
jhon309 0:c52df770855b 109
jhon309 0:c52df770855b 110
jhon309 0:c52df770855b 111 /** \brief Reverse byte order (32 bit)
jhon309 0:c52df770855b 112
jhon309 0:c52df770855b 113 This function reverses the byte order in integer value.
jhon309 0:c52df770855b 114
jhon309 0:c52df770855b 115 \param [in] value Value to reverse
jhon309 0:c52df770855b 116 \return Reversed value
jhon309 0:c52df770855b 117 */
jhon309 0:c52df770855b 118 #define __REV __rev
jhon309 0:c52df770855b 119
jhon309 0:c52df770855b 120
jhon309 0:c52df770855b 121 /** \brief Reverse byte order (16 bit)
jhon309 0:c52df770855b 122
jhon309 0:c52df770855b 123 This function reverses the byte order in two unsigned short values.
jhon309 0:c52df770855b 124
jhon309 0:c52df770855b 125 \param [in] value Value to reverse
jhon309 0:c52df770855b 126 \return Reversed value
jhon309 0:c52df770855b 127 */
jhon309 0:c52df770855b 128 #ifndef __NO_EMBEDDED_ASM
jhon309 0:c52df770855b 129 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
jhon309 0:c52df770855b 130 {
jhon309 0:c52df770855b 131 rev16 r0, r0
jhon309 0:c52df770855b 132 bx lr
jhon309 0:c52df770855b 133 }
jhon309 0:c52df770855b 134 #endif
jhon309 0:c52df770855b 135
jhon309 0:c52df770855b 136 /** \brief Reverse byte order in signed short value
jhon309 0:c52df770855b 137
jhon309 0:c52df770855b 138 This function reverses the byte order in a signed short value with sign extension to integer.
jhon309 0:c52df770855b 139
jhon309 0:c52df770855b 140 \param [in] value Value to reverse
jhon309 0:c52df770855b 141 \return Reversed value
jhon309 0:c52df770855b 142 */
jhon309 0:c52df770855b 143 #ifndef __NO_EMBEDDED_ASM
jhon309 0:c52df770855b 144 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
jhon309 0:c52df770855b 145 {
jhon309 0:c52df770855b 146 revsh r0, r0
jhon309 0:c52df770855b 147 bx lr
jhon309 0:c52df770855b 148 }
jhon309 0:c52df770855b 149 #endif
jhon309 0:c52df770855b 150
jhon309 0:c52df770855b 151
jhon309 0:c52df770855b 152 /** \brief Rotate Right in unsigned value (32 bit)
jhon309 0:c52df770855b 153
jhon309 0:c52df770855b 154 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
jhon309 0:c52df770855b 155
jhon309 0:c52df770855b 156 \param [in] value Value to rotate
jhon309 0:c52df770855b 157 \param [in] value Number of Bits to rotate
jhon309 0:c52df770855b 158 \return Rotated value
jhon309 0:c52df770855b 159 */
jhon309 0:c52df770855b 160 #define __ROR __ror
jhon309 0:c52df770855b 161
jhon309 0:c52df770855b 162
jhon309 0:c52df770855b 163 /** \brief Breakpoint
jhon309 0:c52df770855b 164
jhon309 0:c52df770855b 165 This function causes the processor to enter Debug state.
jhon309 0:c52df770855b 166 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
jhon309 0:c52df770855b 167
jhon309 0:c52df770855b 168 \param [in] value is ignored by the processor.
jhon309 0:c52df770855b 169 If required, a debugger can use it to store additional information about the breakpoint.
jhon309 0:c52df770855b 170 */
jhon309 0:c52df770855b 171 #define __BKPT(value) __breakpoint(value)
jhon309 0:c52df770855b 172
jhon309 0:c52df770855b 173
jhon309 0:c52df770855b 174 #if (__CORTEX_M >= 0x03)
jhon309 0:c52df770855b 175
jhon309 0:c52df770855b 176 /** \brief Reverse bit order of value
jhon309 0:c52df770855b 177
jhon309 0:c52df770855b 178 This function reverses the bit order of the given value.
jhon309 0:c52df770855b 179
jhon309 0:c52df770855b 180 \param [in] value Value to reverse
jhon309 0:c52df770855b 181 \return Reversed value
jhon309 0:c52df770855b 182 */
jhon309 0:c52df770855b 183 #define __RBIT __rbit
jhon309 0:c52df770855b 184
jhon309 0:c52df770855b 185
jhon309 0:c52df770855b 186 /** \brief LDR Exclusive (8 bit)
jhon309 0:c52df770855b 187
jhon309 0:c52df770855b 188 This function performs a exclusive LDR command for 8 bit value.
jhon309 0:c52df770855b 189
jhon309 0:c52df770855b 190 \param [in] ptr Pointer to data
jhon309 0:c52df770855b 191 \return value of type uint8_t at (*ptr)
jhon309 0:c52df770855b 192 */
jhon309 0:c52df770855b 193 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
jhon309 0:c52df770855b 194
jhon309 0:c52df770855b 195
jhon309 0:c52df770855b 196 /** \brief LDR Exclusive (16 bit)
jhon309 0:c52df770855b 197
jhon309 0:c52df770855b 198 This function performs a exclusive LDR command for 16 bit values.
jhon309 0:c52df770855b 199
jhon309 0:c52df770855b 200 \param [in] ptr Pointer to data
jhon309 0:c52df770855b 201 \return value of type uint16_t at (*ptr)
jhon309 0:c52df770855b 202 */
jhon309 0:c52df770855b 203 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
jhon309 0:c52df770855b 204
jhon309 0:c52df770855b 205
jhon309 0:c52df770855b 206 /** \brief LDR Exclusive (32 bit)
jhon309 0:c52df770855b 207
jhon309 0:c52df770855b 208 This function performs a exclusive LDR command for 32 bit values.
jhon309 0:c52df770855b 209
jhon309 0:c52df770855b 210 \param [in] ptr Pointer to data
jhon309 0:c52df770855b 211 \return value of type uint32_t at (*ptr)
jhon309 0:c52df770855b 212 */
jhon309 0:c52df770855b 213 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
jhon309 0:c52df770855b 214
jhon309 0:c52df770855b 215
jhon309 0:c52df770855b 216 /** \brief STR Exclusive (8 bit)
jhon309 0:c52df770855b 217
jhon309 0:c52df770855b 218 This function performs a exclusive STR command for 8 bit values.
jhon309 0:c52df770855b 219
jhon309 0:c52df770855b 220 \param [in] value Value to store
jhon309 0:c52df770855b 221 \param [in] ptr Pointer to location
jhon309 0:c52df770855b 222 \return 0 Function succeeded
jhon309 0:c52df770855b 223 \return 1 Function failed
jhon309 0:c52df770855b 224 */
jhon309 0:c52df770855b 225 #define __STREXB(value, ptr) __strex(value, ptr)
jhon309 0:c52df770855b 226
jhon309 0:c52df770855b 227
jhon309 0:c52df770855b 228 /** \brief STR Exclusive (16 bit)
jhon309 0:c52df770855b 229
jhon309 0:c52df770855b 230 This function performs a exclusive STR command for 16 bit values.
jhon309 0:c52df770855b 231
jhon309 0:c52df770855b 232 \param [in] value Value to store
jhon309 0:c52df770855b 233 \param [in] ptr Pointer to location
jhon309 0:c52df770855b 234 \return 0 Function succeeded
jhon309 0:c52df770855b 235 \return 1 Function failed
jhon309 0:c52df770855b 236 */
jhon309 0:c52df770855b 237 #define __STREXH(value, ptr) __strex(value, ptr)
jhon309 0:c52df770855b 238
jhon309 0:c52df770855b 239
jhon309 0:c52df770855b 240 /** \brief STR Exclusive (32 bit)
jhon309 0:c52df770855b 241
jhon309 0:c52df770855b 242 This function performs a exclusive STR command for 32 bit values.
jhon309 0:c52df770855b 243
jhon309 0:c52df770855b 244 \param [in] value Value to store
jhon309 0:c52df770855b 245 \param [in] ptr Pointer to location
jhon309 0:c52df770855b 246 \return 0 Function succeeded
jhon309 0:c52df770855b 247 \return 1 Function failed
jhon309 0:c52df770855b 248 */
jhon309 0:c52df770855b 249 #define __STREXW(value, ptr) __strex(value, ptr)
jhon309 0:c52df770855b 250
jhon309 0:c52df770855b 251
jhon309 0:c52df770855b 252 /** \brief Remove the exclusive lock
jhon309 0:c52df770855b 253
jhon309 0:c52df770855b 254 This function removes the exclusive lock which is created by LDREX.
jhon309 0:c52df770855b 255
jhon309 0:c52df770855b 256 */
jhon309 0:c52df770855b 257 #define __CLREX __clrex
jhon309 0:c52df770855b 258
jhon309 0:c52df770855b 259
jhon309 0:c52df770855b 260 /** \brief Signed Saturate
jhon309 0:c52df770855b 261
jhon309 0:c52df770855b 262 This function saturates a signed value.
jhon309 0:c52df770855b 263
jhon309 0:c52df770855b 264 \param [in] value Value to be saturated
jhon309 0:c52df770855b 265 \param [in] sat Bit position to saturate to (1..32)
jhon309 0:c52df770855b 266 \return Saturated value
jhon309 0:c52df770855b 267 */
jhon309 0:c52df770855b 268 #define __SSAT __ssat
jhon309 0:c52df770855b 269
jhon309 0:c52df770855b 270
jhon309 0:c52df770855b 271 /** \brief Unsigned Saturate
jhon309 0:c52df770855b 272
jhon309 0:c52df770855b 273 This function saturates an unsigned value.
jhon309 0:c52df770855b 274
jhon309 0:c52df770855b 275 \param [in] value Value to be saturated
jhon309 0:c52df770855b 276 \param [in] sat Bit position to saturate to (0..31)
jhon309 0:c52df770855b 277 \return Saturated value
jhon309 0:c52df770855b 278 */
jhon309 0:c52df770855b 279 #define __USAT __usat
jhon309 0:c52df770855b 280
jhon309 0:c52df770855b 281
jhon309 0:c52df770855b 282 /** \brief Count leading zeros
jhon309 0:c52df770855b 283
jhon309 0:c52df770855b 284 This function counts the number of leading zeros of a data value.
jhon309 0:c52df770855b 285
jhon309 0:c52df770855b 286 \param [in] value Value to count the leading zeros
jhon309 0:c52df770855b 287 \return number of leading zeros in value
jhon309 0:c52df770855b 288 */
jhon309 0:c52df770855b 289 #define __CLZ __clz
jhon309 0:c52df770855b 290
jhon309 0:c52df770855b 291 #endif /* (__CORTEX_M >= 0x03) */
jhon309 0:c52df770855b 292
jhon309 0:c52df770855b 293
jhon309 0:c52df770855b 294
jhon309 0:c52df770855b 295 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
jhon309 0:c52df770855b 296 /* IAR iccarm specific functions */
jhon309 0:c52df770855b 297
jhon309 0:c52df770855b 298 #include <cmsis_iar.h>
jhon309 0:c52df770855b 299
jhon309 0:c52df770855b 300
jhon309 0:c52df770855b 301 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
jhon309 0:c52df770855b 302 /* TI CCS specific functions */
jhon309 0:c52df770855b 303
jhon309 0:c52df770855b 304 #include <cmsis_ccs.h>
jhon309 0:c52df770855b 305
jhon309 0:c52df770855b 306
jhon309 0:c52df770855b 307 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
jhon309 0:c52df770855b 308 /* GNU gcc specific functions */
jhon309 0:c52df770855b 309
jhon309 0:c52df770855b 310 /* Define macros for porting to both thumb1 and thumb2.
jhon309 0:c52df770855b 311 * For thumb1, use low register (r0-r7), specified by constrant "l"
jhon309 0:c52df770855b 312 * Otherwise, use general registers, specified by constrant "r" */
jhon309 0:c52df770855b 313 #if defined (__thumb__) && !defined (__thumb2__)
jhon309 0:c52df770855b 314 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
jhon309 0:c52df770855b 315 #define __CMSIS_GCC_USE_REG(r) "l" (r)
jhon309 0:c52df770855b 316 #else
jhon309 0:c52df770855b 317 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
jhon309 0:c52df770855b 318 #define __CMSIS_GCC_USE_REG(r) "r" (r)
jhon309 0:c52df770855b 319 #endif
jhon309 0:c52df770855b 320
jhon309 0:c52df770855b 321 /** \brief No Operation
jhon309 0:c52df770855b 322
jhon309 0:c52df770855b 323 No Operation does nothing. This instruction can be used for code alignment purposes.
jhon309 0:c52df770855b 324 */
jhon309 0:c52df770855b 325 __attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void)
jhon309 0:c52df770855b 326 {
jhon309 0:c52df770855b 327 __ASM volatile ("nop");
jhon309 0:c52df770855b 328 }
jhon309 0:c52df770855b 329
jhon309 0:c52df770855b 330
jhon309 0:c52df770855b 331 /** \brief Wait For Interrupt
jhon309 0:c52df770855b 332
jhon309 0:c52df770855b 333 Wait For Interrupt is a hint instruction that suspends execution
jhon309 0:c52df770855b 334 until one of a number of events occurs.
jhon309 0:c52df770855b 335 */
jhon309 0:c52df770855b 336 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void)
jhon309 0:c52df770855b 337 {
jhon309 0:c52df770855b 338 __ASM volatile ("wfi");
jhon309 0:c52df770855b 339 }
jhon309 0:c52df770855b 340
jhon309 0:c52df770855b 341
jhon309 0:c52df770855b 342 /** \brief Wait For Event
jhon309 0:c52df770855b 343
jhon309 0:c52df770855b 344 Wait For Event is a hint instruction that permits the processor to enter
jhon309 0:c52df770855b 345 a low-power state until one of a number of events occurs.
jhon309 0:c52df770855b 346 */
jhon309 0:c52df770855b 347 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void)
jhon309 0:c52df770855b 348 {
jhon309 0:c52df770855b 349 __ASM volatile ("wfe");
jhon309 0:c52df770855b 350 }
jhon309 0:c52df770855b 351
jhon309 0:c52df770855b 352
jhon309 0:c52df770855b 353 /** \brief Send Event
jhon309 0:c52df770855b 354
jhon309 0:c52df770855b 355 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
jhon309 0:c52df770855b 356 */
jhon309 0:c52df770855b 357 __attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void)
jhon309 0:c52df770855b 358 {
jhon309 0:c52df770855b 359 __ASM volatile ("sev");
jhon309 0:c52df770855b 360 }
jhon309 0:c52df770855b 361
jhon309 0:c52df770855b 362
jhon309 0:c52df770855b 363 /** \brief Instruction Synchronization Barrier
jhon309 0:c52df770855b 364
jhon309 0:c52df770855b 365 Instruction Synchronization Barrier flushes the pipeline in the processor,
jhon309 0:c52df770855b 366 so that all instructions following the ISB are fetched from cache or
jhon309 0:c52df770855b 367 memory, after the instruction has been completed.
jhon309 0:c52df770855b 368 */
jhon309 0:c52df770855b 369 __attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void)
jhon309 0:c52df770855b 370 {
jhon309 0:c52df770855b 371 __ASM volatile ("isb");
jhon309 0:c52df770855b 372 }
jhon309 0:c52df770855b 373
jhon309 0:c52df770855b 374
jhon309 0:c52df770855b 375 /** \brief Data Synchronization Barrier
jhon309 0:c52df770855b 376
jhon309 0:c52df770855b 377 This function acts as a special kind of Data Memory Barrier.
jhon309 0:c52df770855b 378 It completes when all explicit memory accesses before this instruction complete.
jhon309 0:c52df770855b 379 */
jhon309 0:c52df770855b 380 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void)
jhon309 0:c52df770855b 381 {
jhon309 0:c52df770855b 382 __ASM volatile ("dsb");
jhon309 0:c52df770855b 383 }
jhon309 0:c52df770855b 384
jhon309 0:c52df770855b 385
jhon309 0:c52df770855b 386 /** \brief Data Memory Barrier
jhon309 0:c52df770855b 387
jhon309 0:c52df770855b 388 This function ensures the apparent order of the explicit memory operations before
jhon309 0:c52df770855b 389 and after the instruction, without ensuring their completion.
jhon309 0:c52df770855b 390 */
jhon309 0:c52df770855b 391 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void)
jhon309 0:c52df770855b 392 {
jhon309 0:c52df770855b 393 __ASM volatile ("dmb");
jhon309 0:c52df770855b 394 }
jhon309 0:c52df770855b 395
jhon309 0:c52df770855b 396
jhon309 0:c52df770855b 397 /** \brief Reverse byte order (32 bit)
jhon309 0:c52df770855b 398
jhon309 0:c52df770855b 399 This function reverses the byte order in integer value.
jhon309 0:c52df770855b 400
jhon309 0:c52df770855b 401 \param [in] value Value to reverse
jhon309 0:c52df770855b 402 \return Reversed value
jhon309 0:c52df770855b 403 */
jhon309 0:c52df770855b 404 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value)
jhon309 0:c52df770855b 405 {
jhon309 0:c52df770855b 406 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
jhon309 0:c52df770855b 407 return __builtin_bswap32(value);
jhon309 0:c52df770855b 408 #else
jhon309 0:c52df770855b 409 uint32_t result;
jhon309 0:c52df770855b 410
jhon309 0:c52df770855b 411 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
jhon309 0:c52df770855b 412 return(result);
jhon309 0:c52df770855b 413 #endif
jhon309 0:c52df770855b 414 }
jhon309 0:c52df770855b 415
jhon309 0:c52df770855b 416
jhon309 0:c52df770855b 417 /** \brief Reverse byte order (16 bit)
jhon309 0:c52df770855b 418
jhon309 0:c52df770855b 419 This function reverses the byte order in two unsigned short values.
jhon309 0:c52df770855b 420
jhon309 0:c52df770855b 421 \param [in] value Value to reverse
jhon309 0:c52df770855b 422 \return Reversed value
jhon309 0:c52df770855b 423 */
jhon309 0:c52df770855b 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value)
jhon309 0:c52df770855b 425 {
jhon309 0:c52df770855b 426 uint32_t result;
jhon309 0:c52df770855b 427
jhon309 0:c52df770855b 428 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
jhon309 0:c52df770855b 429 return(result);
jhon309 0:c52df770855b 430 }
jhon309 0:c52df770855b 431
jhon309 0:c52df770855b 432
jhon309 0:c52df770855b 433 /** \brief Reverse byte order in signed short value
jhon309 0:c52df770855b 434
jhon309 0:c52df770855b 435 This function reverses the byte order in a signed short value with sign extension to integer.
jhon309 0:c52df770855b 436
jhon309 0:c52df770855b 437 \param [in] value Value to reverse
jhon309 0:c52df770855b 438 \return Reversed value
jhon309 0:c52df770855b 439 */
jhon309 0:c52df770855b 440 __attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value)
jhon309 0:c52df770855b 441 {
jhon309 0:c52df770855b 442 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
jhon309 0:c52df770855b 443 return (short)__builtin_bswap16(value);
jhon309 0:c52df770855b 444 #else
jhon309 0:c52df770855b 445 uint32_t result;
jhon309 0:c52df770855b 446
jhon309 0:c52df770855b 447 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
jhon309 0:c52df770855b 448 return(result);
jhon309 0:c52df770855b 449 #endif
jhon309 0:c52df770855b 450 }
jhon309 0:c52df770855b 451
jhon309 0:c52df770855b 452
jhon309 0:c52df770855b 453 /** \brief Rotate Right in unsigned value (32 bit)
jhon309 0:c52df770855b 454
jhon309 0:c52df770855b 455 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
jhon309 0:c52df770855b 456
jhon309 0:c52df770855b 457 \param [in] value Value to rotate
jhon309 0:c52df770855b 458 \param [in] value Number of Bits to rotate
jhon309 0:c52df770855b 459 \return Rotated value
jhon309 0:c52df770855b 460 */
jhon309 0:c52df770855b 461 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
jhon309 0:c52df770855b 462 {
jhon309 0:c52df770855b 463 return (op1 >> op2) | (op1 << (32 - op2));
jhon309 0:c52df770855b 464 }
jhon309 0:c52df770855b 465
jhon309 0:c52df770855b 466
jhon309 0:c52df770855b 467 /** \brief Breakpoint
jhon309 0:c52df770855b 468
jhon309 0:c52df770855b 469 This function causes the processor to enter Debug state.
jhon309 0:c52df770855b 470 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
jhon309 0:c52df770855b 471
jhon309 0:c52df770855b 472 \param [in] value is ignored by the processor.
jhon309 0:c52df770855b 473 If required, a debugger can use it to store additional information about the breakpoint.
jhon309 0:c52df770855b 474 */
jhon309 0:c52df770855b 475 #define __BKPT(value) __ASM volatile ("bkpt "#value)
jhon309 0:c52df770855b 476
jhon309 0:c52df770855b 477
jhon309 0:c52df770855b 478 #if (__CORTEX_M >= 0x03)
jhon309 0:c52df770855b 479
jhon309 0:c52df770855b 480 /** \brief Reverse bit order of value
jhon309 0:c52df770855b 481
jhon309 0:c52df770855b 482 This function reverses the bit order of the given value.
jhon309 0:c52df770855b 483
jhon309 0:c52df770855b 484 \param [in] value Value to reverse
jhon309 0:c52df770855b 485 \return Reversed value
jhon309 0:c52df770855b 486 */
jhon309 0:c52df770855b 487 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
jhon309 0:c52df770855b 488 {
jhon309 0:c52df770855b 489 uint32_t result;
jhon309 0:c52df770855b 490
jhon309 0:c52df770855b 491 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
jhon309 0:c52df770855b 492 return(result);
jhon309 0:c52df770855b 493 }
jhon309 0:c52df770855b 494
jhon309 0:c52df770855b 495
jhon309 0:c52df770855b 496 /** \brief LDR Exclusive (8 bit)
jhon309 0:c52df770855b 497
jhon309 0:c52df770855b 498 This function performs a exclusive LDR command for 8 bit value.
jhon309 0:c52df770855b 499
jhon309 0:c52df770855b 500 \param [in] ptr Pointer to data
jhon309 0:c52df770855b 501 \return value of type uint8_t at (*ptr)
jhon309 0:c52df770855b 502 */
jhon309 0:c52df770855b 503 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
jhon309 0:c52df770855b 504 {
jhon309 0:c52df770855b 505 uint32_t result;
jhon309 0:c52df770855b 506
jhon309 0:c52df770855b 507 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
jhon309 0:c52df770855b 508 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
jhon309 0:c52df770855b 509 #else
jhon309 0:c52df770855b 510 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
jhon309 0:c52df770855b 511 accepted by assembler. So has to use following less efficient pattern.
jhon309 0:c52df770855b 512 */
jhon309 0:c52df770855b 513 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
jhon309 0:c52df770855b 514 #endif
jhon309 0:c52df770855b 515 return(result);
jhon309 0:c52df770855b 516 }
jhon309 0:c52df770855b 517
jhon309 0:c52df770855b 518
jhon309 0:c52df770855b 519 /** \brief LDR Exclusive (16 bit)
jhon309 0:c52df770855b 520
jhon309 0:c52df770855b 521 This function performs a exclusive LDR command for 16 bit values.
jhon309 0:c52df770855b 522
jhon309 0:c52df770855b 523 \param [in] ptr Pointer to data
jhon309 0:c52df770855b 524 \return value of type uint16_t at (*ptr)
jhon309 0:c52df770855b 525 */
jhon309 0:c52df770855b 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
jhon309 0:c52df770855b 527 {
jhon309 0:c52df770855b 528 uint32_t result;
jhon309 0:c52df770855b 529
jhon309 0:c52df770855b 530 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
jhon309 0:c52df770855b 531 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
jhon309 0:c52df770855b 532 #else
jhon309 0:c52df770855b 533 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
jhon309 0:c52df770855b 534 accepted by assembler. So has to use following less efficient pattern.
jhon309 0:c52df770855b 535 */
jhon309 0:c52df770855b 536 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
jhon309 0:c52df770855b 537 #endif
jhon309 0:c52df770855b 538 return(result);
jhon309 0:c52df770855b 539 }
jhon309 0:c52df770855b 540
jhon309 0:c52df770855b 541
jhon309 0:c52df770855b 542 /** \brief LDR Exclusive (32 bit)
jhon309 0:c52df770855b 543
jhon309 0:c52df770855b 544 This function performs a exclusive LDR command for 32 bit values.
jhon309 0:c52df770855b 545
jhon309 0:c52df770855b 546 \param [in] ptr Pointer to data
jhon309 0:c52df770855b 547 \return value of type uint32_t at (*ptr)
jhon309 0:c52df770855b 548 */
jhon309 0:c52df770855b 549 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
jhon309 0:c52df770855b 550 {
jhon309 0:c52df770855b 551 uint32_t result;
jhon309 0:c52df770855b 552
jhon309 0:c52df770855b 553 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
jhon309 0:c52df770855b 554 return(result);
jhon309 0:c52df770855b 555 }
jhon309 0:c52df770855b 556
jhon309 0:c52df770855b 557
jhon309 0:c52df770855b 558 /** \brief STR Exclusive (8 bit)
jhon309 0:c52df770855b 559
jhon309 0:c52df770855b 560 This function performs a exclusive STR command for 8 bit values.
jhon309 0:c52df770855b 561
jhon309 0:c52df770855b 562 \param [in] value Value to store
jhon309 0:c52df770855b 563 \param [in] ptr Pointer to location
jhon309 0:c52df770855b 564 \return 0 Function succeeded
jhon309 0:c52df770855b 565 \return 1 Function failed
jhon309 0:c52df770855b 566 */
jhon309 0:c52df770855b 567 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
jhon309 0:c52df770855b 568 {
jhon309 0:c52df770855b 569 uint32_t result;
jhon309 0:c52df770855b 570
jhon309 0:c52df770855b 571 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
jhon309 0:c52df770855b 572 return(result);
jhon309 0:c52df770855b 573 }
jhon309 0:c52df770855b 574
jhon309 0:c52df770855b 575
jhon309 0:c52df770855b 576 /** \brief STR Exclusive (16 bit)
jhon309 0:c52df770855b 577
jhon309 0:c52df770855b 578 This function performs a exclusive STR command for 16 bit values.
jhon309 0:c52df770855b 579
jhon309 0:c52df770855b 580 \param [in] value Value to store
jhon309 0:c52df770855b 581 \param [in] ptr Pointer to location
jhon309 0:c52df770855b 582 \return 0 Function succeeded
jhon309 0:c52df770855b 583 \return 1 Function failed
jhon309 0:c52df770855b 584 */
jhon309 0:c52df770855b 585 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
jhon309 0:c52df770855b 586 {
jhon309 0:c52df770855b 587 uint32_t result;
jhon309 0:c52df770855b 588
jhon309 0:c52df770855b 589 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
jhon309 0:c52df770855b 590 return(result);
jhon309 0:c52df770855b 591 }
jhon309 0:c52df770855b 592
jhon309 0:c52df770855b 593
jhon309 0:c52df770855b 594 /** \brief STR Exclusive (32 bit)
jhon309 0:c52df770855b 595
jhon309 0:c52df770855b 596 This function performs a exclusive STR command for 32 bit values.
jhon309 0:c52df770855b 597
jhon309 0:c52df770855b 598 \param [in] value Value to store
jhon309 0:c52df770855b 599 \param [in] ptr Pointer to location
jhon309 0:c52df770855b 600 \return 0 Function succeeded
jhon309 0:c52df770855b 601 \return 1 Function failed
jhon309 0:c52df770855b 602 */
jhon309 0:c52df770855b 603 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
jhon309 0:c52df770855b 604 {
jhon309 0:c52df770855b 605 uint32_t result;
jhon309 0:c52df770855b 606
jhon309 0:c52df770855b 607 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
jhon309 0:c52df770855b 608 return(result);
jhon309 0:c52df770855b 609 }
jhon309 0:c52df770855b 610
jhon309 0:c52df770855b 611
jhon309 0:c52df770855b 612 /** \brief Remove the exclusive lock
jhon309 0:c52df770855b 613
jhon309 0:c52df770855b 614 This function removes the exclusive lock which is created by LDREX.
jhon309 0:c52df770855b 615
jhon309 0:c52df770855b 616 */
jhon309 0:c52df770855b 617 __attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void)
jhon309 0:c52df770855b 618 {
jhon309 0:c52df770855b 619 __ASM volatile ("clrex" ::: "memory");
jhon309 0:c52df770855b 620 }
jhon309 0:c52df770855b 621
jhon309 0:c52df770855b 622
jhon309 0:c52df770855b 623 /** \brief Signed Saturate
jhon309 0:c52df770855b 624
jhon309 0:c52df770855b 625 This function saturates a signed value.
jhon309 0:c52df770855b 626
jhon309 0:c52df770855b 627 \param [in] value Value to be saturated
jhon309 0:c52df770855b 628 \param [in] sat Bit position to saturate to (1..32)
jhon309 0:c52df770855b 629 \return Saturated value
jhon309 0:c52df770855b 630 */
jhon309 0:c52df770855b 631 #define __SSAT(ARG1,ARG2) \
jhon309 0:c52df770855b 632 ({ \
jhon309 0:c52df770855b 633 uint32_t __RES, __ARG1 = (ARG1); \
jhon309 0:c52df770855b 634 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
jhon309 0:c52df770855b 635 __RES; \
jhon309 0:c52df770855b 636 })
jhon309 0:c52df770855b 637
jhon309 0:c52df770855b 638
jhon309 0:c52df770855b 639 /** \brief Unsigned Saturate
jhon309 0:c52df770855b 640
jhon309 0:c52df770855b 641 This function saturates an unsigned value.
jhon309 0:c52df770855b 642
jhon309 0:c52df770855b 643 \param [in] value Value to be saturated
jhon309 0:c52df770855b 644 \param [in] sat Bit position to saturate to (0..31)
jhon309 0:c52df770855b 645 \return Saturated value
jhon309 0:c52df770855b 646 */
jhon309 0:c52df770855b 647 #define __USAT(ARG1,ARG2) \
jhon309 0:c52df770855b 648 ({ \
jhon309 0:c52df770855b 649 uint32_t __RES, __ARG1 = (ARG1); \
jhon309 0:c52df770855b 650 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
jhon309 0:c52df770855b 651 __RES; \
jhon309 0:c52df770855b 652 })
jhon309 0:c52df770855b 653
jhon309 0:c52df770855b 654
jhon309 0:c52df770855b 655 /** \brief Count leading zeros
jhon309 0:c52df770855b 656
jhon309 0:c52df770855b 657 This function counts the number of leading zeros of a data value.
jhon309 0:c52df770855b 658
jhon309 0:c52df770855b 659 \param [in] value Value to count the leading zeros
jhon309 0:c52df770855b 660 \return number of leading zeros in value
jhon309 0:c52df770855b 661 */
jhon309 0:c52df770855b 662 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value)
jhon309 0:c52df770855b 663 {
jhon309 0:c52df770855b 664 uint32_t result;
jhon309 0:c52df770855b 665
jhon309 0:c52df770855b 666 __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
jhon309 0:c52df770855b 667 return(result);
jhon309 0:c52df770855b 668 }
jhon309 0:c52df770855b 669
jhon309 0:c52df770855b 670 #endif /* (__CORTEX_M >= 0x03) */
jhon309 0:c52df770855b 671
jhon309 0:c52df770855b 672
jhon309 0:c52df770855b 673
jhon309 0:c52df770855b 674
jhon309 0:c52df770855b 675 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
jhon309 0:c52df770855b 676 /* TASKING carm specific functions */
jhon309 0:c52df770855b 677
jhon309 0:c52df770855b 678 /*
jhon309 0:c52df770855b 679 * The CMSIS functions have been implemented as intrinsics in the compiler.
jhon309 0:c52df770855b 680 * Please use "carm -?i" to get an up to date list of all intrinsics,
jhon309 0:c52df770855b 681 * Including the CMSIS ones.
jhon309 0:c52df770855b 682 */
jhon309 0:c52df770855b 683
jhon309 0:c52df770855b 684 #endif
jhon309 0:c52df770855b 685
jhon309 0:c52df770855b 686 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
jhon309 0:c52df770855b 687
jhon309 0:c52df770855b 688 #endif /* __CORE_CMINSTR_H */