Jeroen van Zoeren / mbed-dev

Dependents:   Ophaalbrug-dev

Fork of mbed-dev by mbed official

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Initial commit on mbed-dev

Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 *******************************************************************************
bogdanm 0:9b334a45a8ff 3 * Copyright (c) 2014, STMicroelectronics
bogdanm 0:9b334a45a8ff 4 * All rights reserved.
bogdanm 0:9b334a45a8ff 5 *
bogdanm 0:9b334a45a8ff 6 * Redistribution and use in source and binary forms, with or without
bogdanm 0:9b334a45a8ff 7 * modification, are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 8 *
bogdanm 0:9b334a45a8ff 9 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 10 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 12 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 13 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 15 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 16 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 17 *
bogdanm 0:9b334a45a8ff 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 28 *******************************************************************************
bogdanm 0:9b334a45a8ff 29 */
bogdanm 0:9b334a45a8ff 30 #include "mbed_assert.h"
bogdanm 0:9b334a45a8ff 31 #include "pwmout_api.h"
bogdanm 0:9b334a45a8ff 32
bogdanm 0:9b334a45a8ff 33 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 34 #include "pinmap.h"
bogdanm 0:9b334a45a8ff 35
bogdanm 0:9b334a45a8ff 36 // TIM2 cannot be used because already used by the us_ticker
bogdanm 0:9b334a45a8ff 37 static const PinMap PinMap_PWM[] = {
bogdanm 0:9b334a45a8ff 38 // {PA_0, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH1
bogdanm 0:9b334a45a8ff 39 // {PA_1, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH2
bogdanm 0:9b334a45a8ff 40 {PA_1, PWM_15, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_9)}, // TIM15_CH1N
bogdanm 0:9b334a45a8ff 41 {PA_2, PWM_15, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_9)}, // TIM15_CH1
bogdanm 0:9b334a45a8ff 42 {PA_3, PWM_15, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_9)}, // TIM15_CH2
bogdanm 0:9b334a45a8ff 43 // {PA_5, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH1
bogdanm 0:9b334a45a8ff 44 {PA_6, PWM_16, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM16_CH1
bogdanm 0:9b334a45a8ff 45 {PA_7, PWM_17, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM17_CH1
bogdanm 0:9b334a45a8ff 46 // {PA_7, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH1N
bogdanm 0:9b334a45a8ff 47 {PA_8, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH1
bogdanm 0:9b334a45a8ff 48 {PA_9, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH2
bogdanm 0:9b334a45a8ff 49 // {PA_9, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_10)}, // TIM2_CH3
bogdanm 0:9b334a45a8ff 50 {PA_10, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH3
bogdanm 0:9b334a45a8ff 51 // {PA_10, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_10)}, // TIM2_CH4
bogdanm 0:9b334a45a8ff 52 {PA_11, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_11)}, // TIM1_CH4
bogdanm 0:9b334a45a8ff 53 // {PA_11, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH1N
bogdanm 0:9b334a45a8ff 54 {PA_12, PWM_16, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM16_CH1
bogdanm 0:9b334a45a8ff 55 // {PA_12, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH2N
bogdanm 0:9b334a45a8ff 56 {PA_13, PWM_16, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM16_CH1N
bogdanm 0:9b334a45a8ff 57 // {PA_15, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH1
bogdanm 0:9b334a45a8ff 58
bogdanm 0:9b334a45a8ff 59 {PB_0, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH2N
bogdanm 0:9b334a45a8ff 60 {PB_1, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH3N
bogdanm 0:9b334a45a8ff 61 // {PB_3, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH2
bogdanm 0:9b334a45a8ff 62 {PB_4, PWM_16, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM16_CH1
bogdanm 0:9b334a45a8ff 63 {PB_5, PWM_17, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_10)}, // TIM17_CH1
bogdanm 0:9b334a45a8ff 64 {PB_6, PWM_16, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM16_CH1N
bogdanm 0:9b334a45a8ff 65 {PB_7, PWM_17, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM17_CH1N
bogdanm 0:9b334a45a8ff 66 {PB_8, PWM_16, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM16_CH1
bogdanm 0:9b334a45a8ff 67 {PB_9, PWM_17, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM17_CH1
bogdanm 0:9b334a45a8ff 68 // {PB_10, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH3
bogdanm 0:9b334a45a8ff 69 // {PB_11, PWM_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM2_CH4
bogdanm 0:9b334a45a8ff 70 {PB_13, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH1N
bogdanm 0:9b334a45a8ff 71 {PB_14, PWM_15, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM15_CH1
bogdanm 0:9b334a45a8ff 72 // {PB_14, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH2N
bogdanm 0:9b334a45a8ff 73 {PB_15, PWM_15, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_1)}, // TIM15_CH2
bogdanm 0:9b334a45a8ff 74 // {PB_15, PWM_15, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_2)}, // TIM15_CH1N
bogdanm 0:9b334a45a8ff 75 // {PB_15, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_4)}, // TIM1_CH3N
bogdanm 0:9b334a45a8ff 76
bogdanm 0:9b334a45a8ff 77 {PC_0, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_2)}, // TIM1_CH1
bogdanm 0:9b334a45a8ff 78 {PC_1, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_2)}, // TIM1_CH2
bogdanm 0:9b334a45a8ff 79 {PC_2, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_2)}, // TIM1_CH3
bogdanm 0:9b334a45a8ff 80 {PC_3, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_2)}, // TIM1_CH4
bogdanm 0:9b334a45a8ff 81 {PC_13, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_4)}, // TIM1_CH1N
bogdanm 0:9b334a45a8ff 82
bogdanm 0:9b334a45a8ff 83 {PF_0, PWM_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_PP, GPIO_PuPd_UP, GPIO_AF_6)}, // TIM1_CH3N
bogdanm 0:9b334a45a8ff 84
bogdanm 0:9b334a45a8ff 85 {NC, NC, 0}
bogdanm 0:9b334a45a8ff 86 };
bogdanm 0:9b334a45a8ff 87
bogdanm 0:9b334a45a8ff 88 void pwmout_init(pwmout_t* obj, PinName pin) {
bogdanm 0:9b334a45a8ff 89 // Get the peripheral name from the pin and assign it to the object
bogdanm 0:9b334a45a8ff 90 obj->pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM);
bogdanm 0:9b334a45a8ff 91 MBED_ASSERT(obj->pwm == (PWMName)NC);
bogdanm 0:9b334a45a8ff 92
bogdanm 0:9b334a45a8ff 93 // Enable TIM clock
bogdanm 0:9b334a45a8ff 94 if (obj->pwm == PWM_1) RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE);
bogdanm 0:9b334a45a8ff 95 if (obj->pwm == PWM_15) RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM15, ENABLE);
bogdanm 0:9b334a45a8ff 96 if (obj->pwm == PWM_16) RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM16, ENABLE);
bogdanm 0:9b334a45a8ff 97 if (obj->pwm == PWM_17) RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM17, ENABLE);
bogdanm 0:9b334a45a8ff 98
bogdanm 0:9b334a45a8ff 99 // Configure GPIO
bogdanm 0:9b334a45a8ff 100 pinmap_pinout(pin, PinMap_PWM);
bogdanm 0:9b334a45a8ff 101
bogdanm 0:9b334a45a8ff 102 obj->pin = pin;
bogdanm 0:9b334a45a8ff 103 obj->period = 0;
bogdanm 0:9b334a45a8ff 104 obj->pulse = 0;
bogdanm 0:9b334a45a8ff 105
bogdanm 0:9b334a45a8ff 106 pwmout_period_us(obj, 20000); // 20 ms per default
bogdanm 0:9b334a45a8ff 107 }
bogdanm 0:9b334a45a8ff 108
bogdanm 0:9b334a45a8ff 109 void pwmout_free(pwmout_t* obj) {
bogdanm 0:9b334a45a8ff 110 TIM_TypeDef *tim = (TIM_TypeDef *)(obj->pwm);
bogdanm 0:9b334a45a8ff 111 TIM_DeInit(tim);
bogdanm 0:9b334a45a8ff 112 }
bogdanm 0:9b334a45a8ff 113
bogdanm 0:9b334a45a8ff 114 void pwmout_write(pwmout_t* obj, float value) {
bogdanm 0:9b334a45a8ff 115 TIM_TypeDef *tim = (TIM_TypeDef *)(obj->pwm);
bogdanm 0:9b334a45a8ff 116 TIM_OCInitTypeDef TIM_OCInitStructure;
bogdanm 0:9b334a45a8ff 117
bogdanm 0:9b334a45a8ff 118 if (value < (float)0.0) {
bogdanm 0:9b334a45a8ff 119 value = (float)0.0;
bogdanm 0:9b334a45a8ff 120 } else if (value > (float)1.0) {
bogdanm 0:9b334a45a8ff 121 value = (float)1.0;
bogdanm 0:9b334a45a8ff 122 }
bogdanm 0:9b334a45a8ff 123
bogdanm 0:9b334a45a8ff 124 obj->pulse = (uint32_t)((float)obj->period * value);
bogdanm 0:9b334a45a8ff 125
bogdanm 0:9b334a45a8ff 126 // Configure channels
bogdanm 0:9b334a45a8ff 127 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
bogdanm 0:9b334a45a8ff 128 TIM_OCInitStructure.TIM_Pulse = obj->pulse;
bogdanm 0:9b334a45a8ff 129 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
bogdanm 0:9b334a45a8ff 130 TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCPolarity_High;
bogdanm 0:9b334a45a8ff 131 TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Reset;
bogdanm 0:9b334a45a8ff 132 TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCNIdleState_Reset;
bogdanm 0:9b334a45a8ff 133
bogdanm 0:9b334a45a8ff 134 switch (obj->pin) {
bogdanm 0:9b334a45a8ff 135 // Channels 1
bogdanm 0:9b334a45a8ff 136 // case PA_0:
bogdanm 0:9b334a45a8ff 137 case PA_2:
bogdanm 0:9b334a45a8ff 138 // case PA_5:
bogdanm 0:9b334a45a8ff 139 case PA_6:
bogdanm 0:9b334a45a8ff 140 case PA_7:
bogdanm 0:9b334a45a8ff 141 case PA_8:
bogdanm 0:9b334a45a8ff 142 case PA_12:
bogdanm 0:9b334a45a8ff 143 // case PA_15:
bogdanm 0:9b334a45a8ff 144 case PB_4:
bogdanm 0:9b334a45a8ff 145 case PB_5:
bogdanm 0:9b334a45a8ff 146 case PB_8:
bogdanm 0:9b334a45a8ff 147 case PB_9:
bogdanm 0:9b334a45a8ff 148 case PB_14:
bogdanm 0:9b334a45a8ff 149 case PC_0:
bogdanm 0:9b334a45a8ff 150 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
bogdanm 0:9b334a45a8ff 151 TIM_OC1PreloadConfig(tim, TIM_OCPreload_Enable);
bogdanm 0:9b334a45a8ff 152 TIM_OC1Init(tim, &TIM_OCInitStructure);
bogdanm 0:9b334a45a8ff 153 break;
bogdanm 0:9b334a45a8ff 154 // Channels 1N
bogdanm 0:9b334a45a8ff 155 case PA_1:
bogdanm 0:9b334a45a8ff 156 // case PA_7:
bogdanm 0:9b334a45a8ff 157 // case PA_11:
bogdanm 0:9b334a45a8ff 158 case PA_13:
bogdanm 0:9b334a45a8ff 159 case PB_6:
bogdanm 0:9b334a45a8ff 160 case PB_7:
bogdanm 0:9b334a45a8ff 161 case PB_13:
bogdanm 0:9b334a45a8ff 162 // case PB_15:
bogdanm 0:9b334a45a8ff 163 case PC_13:
bogdanm 0:9b334a45a8ff 164 TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
bogdanm 0:9b334a45a8ff 165 TIM_OC1PreloadConfig(tim, TIM_OCPreload_Enable);
bogdanm 0:9b334a45a8ff 166 TIM_OC1Init(tim, &TIM_OCInitStructure);
bogdanm 0:9b334a45a8ff 167 break;
bogdanm 0:9b334a45a8ff 168 // Channels 2
bogdanm 0:9b334a45a8ff 169 // case PA_1:
bogdanm 0:9b334a45a8ff 170 case PA_3:
bogdanm 0:9b334a45a8ff 171 case PA_9:
bogdanm 0:9b334a45a8ff 172 // case PB_3:
bogdanm 0:9b334a45a8ff 173 case PB_15:
bogdanm 0:9b334a45a8ff 174 case PC_1:
bogdanm 0:9b334a45a8ff 175 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
bogdanm 0:9b334a45a8ff 176 TIM_OC2PreloadConfig(tim, TIM_OCPreload_Enable);
bogdanm 0:9b334a45a8ff 177 TIM_OC2Init(tim, &TIM_OCInitStructure);
bogdanm 0:9b334a45a8ff 178 break;
bogdanm 0:9b334a45a8ff 179 // Channels 2N
bogdanm 0:9b334a45a8ff 180 // case PA_12:
bogdanm 0:9b334a45a8ff 181 case PB_0:
bogdanm 0:9b334a45a8ff 182 // case PB_14:
bogdanm 0:9b334a45a8ff 183 TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
bogdanm 0:9b334a45a8ff 184 TIM_OC2PreloadConfig(tim, TIM_OCPreload_Enable);
bogdanm 0:9b334a45a8ff 185 TIM_OC2Init(tim, &TIM_OCInitStructure);
bogdanm 0:9b334a45a8ff 186 break;
bogdanm 0:9b334a45a8ff 187 // Channels 3
bogdanm 0:9b334a45a8ff 188 // case PA_9:
bogdanm 0:9b334a45a8ff 189 case PA_10:
bogdanm 0:9b334a45a8ff 190 // case PB_10:
bogdanm 0:9b334a45a8ff 191 case PC_2:
bogdanm 0:9b334a45a8ff 192 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
bogdanm 0:9b334a45a8ff 193 TIM_OC3PreloadConfig(tim, TIM_OCPreload_Enable);
bogdanm 0:9b334a45a8ff 194 TIM_OC3Init(tim, &TIM_OCInitStructure);
bogdanm 0:9b334a45a8ff 195 break;
bogdanm 0:9b334a45a8ff 196 // Channels 3N
bogdanm 0:9b334a45a8ff 197 case PB_1:
bogdanm 0:9b334a45a8ff 198 case PF_0:
bogdanm 0:9b334a45a8ff 199 // case PB_15:
bogdanm 0:9b334a45a8ff 200 TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
bogdanm 0:9b334a45a8ff 201 TIM_OC3PreloadConfig(tim, TIM_OCPreload_Enable);
bogdanm 0:9b334a45a8ff 202 TIM_OC3Init(tim, &TIM_OCInitStructure);
bogdanm 0:9b334a45a8ff 203 break;
bogdanm 0:9b334a45a8ff 204 // Channels 4
bogdanm 0:9b334a45a8ff 205 // case PA_10:
bogdanm 0:9b334a45a8ff 206 case PA_11:
bogdanm 0:9b334a45a8ff 207 // case PB_11:
bogdanm 0:9b334a45a8ff 208 case PC_3:
bogdanm 0:9b334a45a8ff 209 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
bogdanm 0:9b334a45a8ff 210 TIM_OC4PreloadConfig(tim, TIM_OCPreload_Enable);
bogdanm 0:9b334a45a8ff 211 TIM_OC4Init(tim, &TIM_OCInitStructure);
bogdanm 0:9b334a45a8ff 212 break;
bogdanm 0:9b334a45a8ff 213 default:
bogdanm 0:9b334a45a8ff 214 return;
bogdanm 0:9b334a45a8ff 215 }
bogdanm 0:9b334a45a8ff 216 }
bogdanm 0:9b334a45a8ff 217
bogdanm 0:9b334a45a8ff 218 float pwmout_read(pwmout_t* obj) {
bogdanm 0:9b334a45a8ff 219 float value = 0;
bogdanm 0:9b334a45a8ff 220 if (obj->period > 0) {
bogdanm 0:9b334a45a8ff 221 value = (float)(obj->pulse) / (float)(obj->period);
bogdanm 0:9b334a45a8ff 222 }
bogdanm 0:9b334a45a8ff 223 return ((value > (float)1.0) ? ((float)1.0) : (value));
bogdanm 0:9b334a45a8ff 224 }
bogdanm 0:9b334a45a8ff 225
bogdanm 0:9b334a45a8ff 226 void pwmout_period(pwmout_t* obj, float seconds) {
bogdanm 0:9b334a45a8ff 227 pwmout_period_us(obj, seconds * 1000000.0f);
bogdanm 0:9b334a45a8ff 228 }
bogdanm 0:9b334a45a8ff 229
bogdanm 0:9b334a45a8ff 230 void pwmout_period_ms(pwmout_t* obj, int ms) {
bogdanm 0:9b334a45a8ff 231 pwmout_period_us(obj, ms * 1000);
bogdanm 0:9b334a45a8ff 232 }
bogdanm 0:9b334a45a8ff 233
bogdanm 0:9b334a45a8ff 234 void pwmout_period_us(pwmout_t* obj, int us) {
bogdanm 0:9b334a45a8ff 235 TIM_TypeDef *tim = (TIM_TypeDef *)(obj->pwm);
bogdanm 0:9b334a45a8ff 236 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
bogdanm 0:9b334a45a8ff 237 float dc = pwmout_read(obj);
bogdanm 0:9b334a45a8ff 238
bogdanm 0:9b334a45a8ff 239 TIM_Cmd(tim, DISABLE);
bogdanm 0:9b334a45a8ff 240
bogdanm 0:9b334a45a8ff 241 obj->period = us;
bogdanm 0:9b334a45a8ff 242
bogdanm 0:9b334a45a8ff 243 TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);
bogdanm 0:9b334a45a8ff 244 TIM_TimeBaseStructure.TIM_Period = obj->period - 1;
bogdanm 0:9b334a45a8ff 245 TIM_TimeBaseStructure.TIM_Prescaler = (uint16_t)(SystemCoreClock / 1000000) - 1; // 1 µs tick
bogdanm 0:9b334a45a8ff 246 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
bogdanm 0:9b334a45a8ff 247 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
bogdanm 0:9b334a45a8ff 248 TIM_TimeBaseInit(tim, &TIM_TimeBaseStructure);
bogdanm 0:9b334a45a8ff 249
bogdanm 0:9b334a45a8ff 250 // Set duty cycle again
bogdanm 0:9b334a45a8ff 251 pwmout_write(obj, dc);
bogdanm 0:9b334a45a8ff 252
bogdanm 0:9b334a45a8ff 253 TIM_ARRPreloadConfig(tim, ENABLE);
bogdanm 0:9b334a45a8ff 254
bogdanm 0:9b334a45a8ff 255 // Warning: Main Output must be enabled on TIM1, TIM8, TIM5, TIM6 and TIM17
bogdanm 0:9b334a45a8ff 256 if ((obj->pwm == PWM_1) || (obj->pwm == PWM_15) || (obj->pwm == PWM_16) || (obj->pwm == PWM_17)) {
bogdanm 0:9b334a45a8ff 257 TIM_CtrlPWMOutputs(tim, ENABLE);
bogdanm 0:9b334a45a8ff 258 }
bogdanm 0:9b334a45a8ff 259
bogdanm 0:9b334a45a8ff 260 TIM_Cmd(tim, ENABLE);
bogdanm 0:9b334a45a8ff 261 }
bogdanm 0:9b334a45a8ff 262
bogdanm 0:9b334a45a8ff 263 void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
bogdanm 0:9b334a45a8ff 264 pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
bogdanm 0:9b334a45a8ff 265 }
bogdanm 0:9b334a45a8ff 266
bogdanm 0:9b334a45a8ff 267 void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
bogdanm 0:9b334a45a8ff 268 pwmout_pulsewidth_us(obj, ms * 1000);
bogdanm 0:9b334a45a8ff 269 }
bogdanm 0:9b334a45a8ff 270
bogdanm 0:9b334a45a8ff 271 void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
bogdanm 0:9b334a45a8ff 272 float value = (float)us / (float)obj->period;
bogdanm 0:9b334a45a8ff 273 pwmout_write(obj, value);
bogdanm 0:9b334a45a8ff 274 }