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nrf24l01.cpp
00001 /****************************************************************************** 00002 * 00003 * File: nrf24l01.c 00004 * 00005 * Copyright S. Brennen Ball, 2006-2007 00006 * 00007 * The author provides no guarantees, warantees, or promises, implied or 00008 * otherwise. By using this software you agree to indemnify the author 00009 * of any damages incurred by using it. 00010 * 00011 *****************************************************************************/ 00012 00013 #include "nrf24l01.h" 00014 #include "mbed.h" 00015 00016 /* Extern DigitalPin objects for csn, irq and ce */ 00017 extern DigitalOut nRF_CSN; 00018 extern DigitalOut nRF_CE; 00019 extern DigitalIn nRF_IRQ; 00020 extern SPI nRF_spi; 00021 00022 //Arguments except opt_rx_standby_mode fill the actual register they are named 00023 // after. Registers that do not need to be initialized are not included here. 00024 //The argument opt_rx_active_mode is only used if the user is initializing the 00025 // 24L01 as a receiver. If the argument is false, the receiver will remain in 00026 // standby mode and not monitor for packets. If the argument is true, the CE 00027 // pin will be set and the 24L01 will monitor for packets. In TX mode, the value 00028 // of this argument is insignificant. 00029 //If the user wants to leave any 1-byte register in its default state, simply put 00030 // as that register's argument nrf24l01_<reg>_DEFAULT_VAL, where <reg> is the register 00031 // name. 00032 //If the user wants to leave any of the 5-byte registers RX_ADDR_P0, RX_ADDR_P1, or 00033 // TX_ADDR in its default state, simply put NULL in the argument for that address value. 00034 void nrf24l01_initialize(unsigned char config, 00035 unsigned char opt_rx_active_mode, 00036 unsigned char en_aa, 00037 unsigned char en_rxaddr, 00038 unsigned char setup_aw, 00039 unsigned char setup_retr, 00040 unsigned char rf_ch, 00041 unsigned char rf_setup, 00042 unsigned char * rx_addr_p0, 00043 unsigned char * rx_addr_p1, 00044 unsigned char rx_addr_p2, 00045 unsigned char rx_addr_p3, 00046 unsigned char rx_addr_p4, 00047 unsigned char rx_addr_p5, 00048 unsigned char * tx_addr, 00049 unsigned char rx_pw_p0, 00050 unsigned char rx_pw_p1, 00051 unsigned char rx_pw_p2, 00052 unsigned char rx_pw_p3, 00053 unsigned char rx_pw_p4, 00054 unsigned char rx_pw_p5) 00055 { 00056 unsigned char data[5]; 00057 00058 data[0] = en_aa; 00059 nrf24l01_write_register(nrf24l01_EN_AA, data, 1); 00060 00061 data[0] = en_rxaddr; 00062 nrf24l01_write_register(nrf24l01_EN_RXADDR, data, 1); 00063 00064 data[0] = setup_aw; 00065 nrf24l01_write_register(nrf24l01_SETUP_AW, data, 1); 00066 00067 data[0] = setup_retr; 00068 nrf24l01_write_register(nrf24l01_SETUP_RETR, data, 1); 00069 00070 data[0] = rf_ch; 00071 nrf24l01_write_register(nrf24l01_RF_CH, data, 1); 00072 00073 data[0] = rf_setup; 00074 nrf24l01_write_register(nrf24l01_RF_SETUP, data, 1); 00075 00076 if(rx_addr_p0 != NULL) 00077 nrf24l01_set_rx_addr(rx_addr_p0, 5, 0); 00078 else 00079 { 00080 data[0] = nrf24l01_RX_ADDR_P0_B0_DEFAULT_VAL; 00081 data[1] = nrf24l01_RX_ADDR_P0_B1_DEFAULT_VAL; 00082 data[2] = nrf24l01_RX_ADDR_P0_B2_DEFAULT_VAL; 00083 data[3] = nrf24l01_RX_ADDR_P0_B3_DEFAULT_VAL; 00084 data[4] = nrf24l01_RX_ADDR_P0_B4_DEFAULT_VAL; 00085 00086 nrf24l01_set_rx_addr(data, 5, 0); 00087 } 00088 00089 if(rx_addr_p1 != NULL) 00090 nrf24l01_set_rx_addr(rx_addr_p1, 5, 1); 00091 else 00092 { 00093 data[0] = nrf24l01_RX_ADDR_P1_B0_DEFAULT_VAL; 00094 data[1] = nrf24l01_RX_ADDR_P1_B1_DEFAULT_VAL; 00095 data[2] = nrf24l01_RX_ADDR_P1_B2_DEFAULT_VAL; 00096 data[3] = nrf24l01_RX_ADDR_P1_B3_DEFAULT_VAL; 00097 data[4] = nrf24l01_RX_ADDR_P1_B4_DEFAULT_VAL; 00098 00099 nrf24l01_set_rx_addr(data, 5, 1); 00100 } 00101 00102 data[0] = rx_addr_p2; 00103 nrf24l01_set_rx_addr(data, 1, 2); 00104 00105 data[0] = rx_addr_p3; 00106 nrf24l01_set_rx_addr(data, 1, 3); 00107 00108 data[0] = rx_addr_p4; 00109 nrf24l01_set_rx_addr(data, 1, 4); 00110 00111 data[0] = rx_addr_p5; 00112 nrf24l01_set_rx_addr(data, 1, 5); 00113 00114 if(tx_addr != NULL) 00115 nrf24l01_set_tx_addr(tx_addr, 5); 00116 else 00117 { 00118 data[0] = nrf24l01_TX_ADDR_B0_DEFAULT_VAL; 00119 data[1] = nrf24l01_TX_ADDR_B1_DEFAULT_VAL; 00120 data[2] = nrf24l01_TX_ADDR_B2_DEFAULT_VAL; 00121 data[3] = nrf24l01_TX_ADDR_B3_DEFAULT_VAL; 00122 data[4] = nrf24l01_TX_ADDR_B4_DEFAULT_VAL; 00123 00124 nrf24l01_set_tx_addr(data, 5); 00125 } 00126 00127 data[0] = rx_pw_p0; 00128 nrf24l01_write_register(nrf24l01_RX_PW_P0, data, 1); 00129 00130 data[0] = rx_pw_p1; 00131 nrf24l01_write_register(nrf24l01_RX_PW_P1, data, 1); 00132 00133 data[0] = rx_pw_p2; 00134 nrf24l01_write_register(nrf24l01_RX_PW_P2, data, 1); 00135 00136 data[0] = rx_pw_p3; 00137 nrf24l01_write_register(nrf24l01_RX_PW_P3, data, 1); 00138 00139 data[0] = rx_pw_p4; 00140 nrf24l01_write_register(nrf24l01_RX_PW_P4, data, 1); 00141 00142 data[0] = rx_pw_p5; 00143 nrf24l01_write_register(nrf24l01_RX_PW_P5, data, 1); 00144 00145 if((config & nrf24l01_CONFIG_PWR_UP) != 0) 00146 nrf24l01_power_up_param(opt_rx_active_mode, config); 00147 else 00148 nrf24l01_power_down_param(config); 00149 } 00150 00151 //initializes the 24L01 to all default values except the PWR_UP and PRIM_RX bits 00152 //this function also disables the auto-ack feature on the chip (EN_AA register is 0) 00153 //bool rx is true if the device should be a receiver and false if it should be 00154 // a transmitter. 00155 //unsigned char payload_width is the payload width for pipe 0. All other pipes 00156 // are left in their default (disabled) state. 00157 //bool enable_auto_ack controls the auto ack feature on pipe 0. If true, auto-ack will 00158 // be enabled. If false, auto-ack is disabled. 00159 void nrf24l01_initialize_debug(bool rx, unsigned char p0_payload_width, bool enable_auto_ack) 00160 { 00161 unsigned char config; 00162 unsigned char en_aa; 00163 00164 config = nrf24l01_CONFIG_DEFAULT_VAL | nrf24l01_CONFIG_PWR_UP; 00165 00166 if(enable_auto_ack != false) 00167 en_aa = nrf24l01_EN_AA_ENAA_P0; 00168 else 00169 en_aa = nrf24l01_EN_AA_ENAA_NONE; 00170 00171 if(rx == true) 00172 config = config | nrf24l01_CONFIG_PRIM_RX; 00173 00174 nrf24l01_initialize(config, 00175 true, 00176 en_aa, 00177 nrf24l01_EN_RXADDR_DEFAULT_VAL, 00178 nrf24l01_SETUP_AW_DEFAULT_VAL, 00179 nrf24l01_SETUP_RETR_DEFAULT_VAL, 00180 nrf24l01_RF_CH_DEFAULT_VAL, 00181 nrf24l01_RF_SETUP_DEFAULT_VAL, 00182 NULL, 00183 NULL, 00184 nrf24l01_RX_ADDR_P2_DEFAULT_VAL, 00185 nrf24l01_RX_ADDR_P3_DEFAULT_VAL, 00186 nrf24l01_RX_ADDR_P4_DEFAULT_VAL, 00187 nrf24l01_RX_ADDR_P5_DEFAULT_VAL, 00188 NULL, 00189 p0_payload_width, 00190 nrf24l01_RX_PW_P1_DEFAULT_VAL, 00191 nrf24l01_RX_PW_P2_DEFAULT_VAL, 00192 nrf24l01_RX_PW_P3_DEFAULT_VAL, 00193 nrf24l01_RX_PW_P4_DEFAULT_VAL, 00194 nrf24l01_RX_PW_P5_DEFAULT_VAL); 00195 } 00196 00197 //initializes only the CONFIG register and pipe 0's payload width 00198 //the primary purpose of this function is to allow users with microcontrollers with 00199 // extremely small program memories to still be able to init their 24L01. This code 00200 // should have a smaller footprint than the above init functions. 00201 //when using this method, the 24L01 MUST have its default configuration loaded 00202 // in all registers to work. It is recommended that the device be reset or 00203 // have its power cycled immediately before this code is run. 00204 //in normal circumstances, the user should use nrf24l01_initialize() rather than this 00205 // function, since this function does not set all of the register values. 00206 void nrf24l01_initialize_debug_lite(bool rx, unsigned char p0_payload_width) 00207 { 00208 unsigned char config; 00209 00210 config = nrf24l01_CONFIG_DEFAULT_VAL; 00211 00212 if(rx != false) 00213 config |= nrf24l01_CONFIG_PRIM_RX; 00214 00215 nrf24l01_write_register(nrf24l01_RX_PW_P0, &p0_payload_width, 1); 00216 nrf24l01_power_up_param(true, config); 00217 } 00218 00219 //powers up the 24L01 with all necessary delays 00220 //this function takes the existing contents of the CONFIG register and sets the PWR_UP 00221 //the argument rx_active_mode is only used if the user is setting up the 00222 // 24L01 as a receiver. If the argument is false, the receiver will remain in 00223 // standby mode and not monitor for packets. If the argument is true, the CE 00224 // pin will be set and the 24L01 will monitor for packets. In TX mode, the value 00225 // of this argument is insignificant. 00226 //note: if the read value of the CONFIG register already has the PWR_UP bit set, this function 00227 // exits in order to not make an unecessary register write. 00228 void nrf24l01_power_up(bool rx_active_mode) 00229 { 00230 unsigned char config; 00231 00232 nrf24l01_read_register(nrf24l01_CONFIG, &config, 1); 00233 00234 if((config & nrf24l01_CONFIG_PWR_UP) != 0) 00235 return; 00236 00237 config |= nrf24l01_CONFIG_PWR_UP; 00238 00239 nrf24l01_write_register(nrf24l01_CONFIG, &config, 1); 00240 00241 delay_us(1500); 00242 00243 if((config & nrf24l01_CONFIG_PRIM_RX) == 0) 00244 nrf24l01_clear_ce(); 00245 else 00246 { 00247 if(rx_active_mode != false) 00248 nrf24l01_set_ce(); 00249 else 00250 nrf24l01_clear_ce(); 00251 } 00252 } 00253 00254 //powers up the 24L01 with all necessary delays 00255 //this function allows the user to set the contents of the CONFIG register, but the function 00256 // sets the PWR_UP bit in the CONFIG register, so the user does not need to. 00257 //the argument rx_active_mode is only used if the user is setting up the 00258 // 24L01 as a receiver. If the argument is false, the receiver will remain in 00259 // standby mode and not monitor for packets. If the argument is true, the CE 00260 // pin will be set and the 24L01 will monitor for packets. In TX mode, the value 00261 // of this argument is insignificant. 00262 void nrf24l01_power_up_param(bool rx_active_mode, unsigned char config) 00263 { 00264 // unsigned char test, test2; 00265 00266 config |= nrf24l01_CONFIG_PWR_UP; 00267 00268 nrf24l01_write_register(nrf24l01_CONFIG, &config, 1); 00269 00270 delay_us(1500); 00271 00272 if((config & nrf24l01_CONFIG_PRIM_RX) == 0) 00273 nrf24l01_clear_ce(); 00274 else 00275 { 00276 if(rx_active_mode != false) 00277 nrf24l01_set_ce(); 00278 else 00279 nrf24l01_clear_ce(); 00280 } 00281 } 00282 00283 //powers down the 24L01 00284 //this function takes the existing contents of the CONFIG register and simply 00285 // clears the PWR_UP bit in the CONFIG register. 00286 //note: if the read value of the CONFIG register already has the PWR_UP bit cleared, this 00287 // function exits in order to not make an unecessary register write. 00288 void nrf24l01_power_down() 00289 { 00290 unsigned char config; 00291 00292 nrf24l01_read_register(nrf24l01_CONFIG, &config, 1); 00293 00294 if((config & nrf24l01_CONFIG_PWR_UP) == 0) 00295 return; 00296 00297 config &= (~nrf24l01_CONFIG_PWR_UP); 00298 00299 nrf24l01_write_register(nrf24l01_CONFIG, &config, 1); 00300 00301 nrf24l01_clear_ce(); 00302 } 00303 00304 //powers down the 24L01 00305 //this function allows the user to set the contents of the CONFIG register, but the function 00306 // clears the PWR_UP bit in the CONFIG register, so the user does not need to. 00307 void nrf24l01_power_down_param(unsigned char config) 00308 { 00309 config &= (~nrf24l01_CONFIG_PWR_UP); 00310 00311 nrf24l01_write_register(nrf24l01_CONFIG, &config, 1); 00312 00313 nrf24l01_clear_ce(); 00314 } 00315 00316 00317 //sets up the 24L01 as a receiver with all necessary delays 00318 //this function takes the existing contents of the CONFIG register and sets the PRIM_RX 00319 // bit in the CONFIG register. 00320 //if the argument rx_active_mode is false, the receiver will remain in standby mode 00321 // and not monitor for packets. If the argument is true, the CE pin will be set 00322 // and the 24L01 will monitor for packets. 00323 //note: if the read value of the CONFIG register already has the PRIM_RX bit set, this function 00324 // exits in order to not make an unecessary register write. 00325 void nrf24l01_set_as_rx(bool rx_active_mode) 00326 { 00327 unsigned char config; 00328 volatile unsigned char status; 00329 00330 status = nrf24l01_read_register(0, &config, 1); 00331 00332 if((config & nrf24l01_CONFIG_PRIM_RX) != 0) 00333 return; 00334 00335 config |= nrf24l01_CONFIG_PRIM_RX; 00336 00337 nrf24l01_write_register(nrf24l01_CONFIG, &config, 1); 00338 00339 if(rx_active_mode != false) 00340 nrf24l01_set_ce(); 00341 else 00342 nrf24l01_clear_ce(); 00343 } 00344 00345 //sets up the 24L01 as a receiver with all necessary delays 00346 //this function allows the user to set the contents of the CONFIG register, but the function 00347 // sets the PRIM_RX bit in the CONFIG register, so the user does not need to. 00348 //if the argument rx_active_mode is false, the receiver will remain in standby mode 00349 // and not monitor for packets. If the argument is true, the CE pin will be set 00350 // and the 24L01 will monitor for packets. 00351 void nrf24l01_set_as_rx_param(bool rx_active_mode, unsigned char config) 00352 { 00353 config |= nrf24l01_CONFIG_PRIM_RX; 00354 00355 if((config & nrf24l01_CONFIG_PWR_UP) != 0) 00356 nrf24l01_power_up_param(rx_active_mode, config); 00357 else 00358 nrf24l01_power_down_param(config); 00359 } 00360 00361 //takes a 24L01 that is already in RX standby mode and puts it in active RX mode 00362 void nrf24l01_rx_standby_to_active() 00363 { 00364 nrf24l01_set_ce(); 00365 } 00366 00367 //takes a 24L01 that is already in active RX mode and puts it in RX standy mode 00368 void nrf24l01_rx_active_to_standby() 00369 { 00370 nrf24l01_clear_ce(); 00371 } 00372 00373 //sets up the 24L01 as a transmitter 00374 //this function takes the existing contents of the CONFIG register and simply 00375 // clears the PRIM_RX bit in the CONFIG register. 00376 //note: if the read value of the CONFIG register already has the PRIM_RX bit cleared, this 00377 // function exits in order to not make an unecessary register write. 00378 void nrf24l01_set_as_tx() 00379 { 00380 unsigned char config; 00381 00382 nrf24l01_read_register(nrf24l01_CONFIG, &config, 1); 00383 00384 if((config & nrf24l01_CONFIG_PRIM_RX) == 0) 00385 return; 00386 00387 config &= (~nrf24l01_CONFIG_PRIM_RX); 00388 00389 nrf24l01_write_register(nrf24l01_CONFIG, &config, 1); 00390 00391 nrf24l01_clear_ce(); 00392 } 00393 00394 //sets up the 24L01 as a transmitter 00395 //this function allows the user to set the contents of the CONFIG register, but the function 00396 // clears the PRIM_RX bit in the CONFIG register, so the user does not need to. 00397 void nrf24l01_set_as_tx_param(unsigned char config) 00398 { 00399 config &= ~(nrf24l01_CONFIG_PRIM_RX); 00400 00401 if((config & nrf24l01_CONFIG_PWR_UP) != 0) 00402 nrf24l01_power_up_param(false, config); 00403 else 00404 nrf24l01_power_down_param(config); 00405 } 00406 00407 //executes the W_REGISTER SPI operation 00408 //unsigned char regnumber indicates the register number assigned by the nrf24l01 specification. 00409 // For regnumber values, see section titled "register definitions" in nrf24l01.h. 00410 //unsigned char * data should be of size 1 for all register writes except for RX_ADDR_P0, RX_ADDR_P1, 00411 // and TX_ADDR. The size of data should be set according to the user-specified size of the address 00412 // length for the register the address is being sent to. 00413 //unsigned int len is always the size of unsigned char * data. For example, if data is declared as 00414 // data[6], len should equal 6. 00415 //returns the value of the STATUS register 00416 unsigned char nrf24l01_write_register(unsigned char regnumber, unsigned char * data, unsigned int len) 00417 { 00418 return nrf24l01_execute_command(nrf24l01_W_REGISTER | (regnumber & nrf24l01_W_REGISTER_DATA), data, len, false); 00419 } 00420 00421 //executes the R_REGISTER SPI operation 00422 //unsigned char regnumber indicates the register number assigned by the nrf24l01 specification. 00423 // For regnumber values, see section titled "register definitions" in nrf24l01.h. 00424 //unsigned char * data should be of size 1 for all register writes except for RX_ADDR_P0, RX_ADDR_P1, 00425 // and TX_ADDR. The size of data should be set according to the user-specified size of the address 00426 // length for the register the address is being read from. 00427 //unsigned int len is always the size of unsigned char * data. For example, if data is declared as 00428 // data[6], len = 6. 00429 //returns the value of the STATUS register 00430 unsigned char nrf24l01_read_register(unsigned char regnumber, unsigned char * data, unsigned int len) 00431 { 00432 return nrf24l01_execute_command(regnumber & nrf24l01_R_REGISTER_DATA, data, len, true); 00433 } 00434 00435 //executes the W_TX_PAYLOAD operation 00436 //unsigned char * data is the actual payload to be sent to the nrf24l01. 00437 //unsigned int len is the length of the payload being sent (this should be sized 00438 // according to the payload length specified by the receiving nrf24l01). 00439 //if bool transmit is true, the nrf24l01 immediately transmits the data in the payload. 00440 // if false, the user must use the nrf24l01_transmit() function to send the payload. 00441 //returns the value of the STATUS register 00442 unsigned char nrf24l01_write_tx_payload(unsigned char * data, unsigned int len, bool transmit) 00443 { 00444 unsigned char status; 00445 00446 status = nrf24l01_execute_command(nrf24l01_W_TX_PAYLOAD, data, len, false); 00447 00448 if(transmit == true) 00449 nrf24l01_transmit(); 00450 00451 return status; 00452 } 00453 00454 //executes the R_RX_PAYLOAD instruction 00455 //unsigned char * data is the actual payload that has been received by the nrf24l01. 00456 // The user must size data according to the payload width specified to the nrf24l01. 00457 // This variable is filled by this function, so individual byte values need not be 00458 // initialized by the user. 00459 //unsigned int len is the length of the payload being clocked out of the nrf24l01 (this 00460 // should be sized according to the payload length specified to the nrf24l01). 00461 //returns the value of the STATUS register 00462 unsigned char nrf24l01_read_rx_payload(unsigned char * data, unsigned int len) 00463 { 00464 unsigned char status; 00465 00466 nrf24l01_clear_ce(); 00467 status = nrf24l01_execute_command(nrf24l01_R_RX_PAYLOAD, data, len, true); 00468 nrf24l01_set_ce(); 00469 00470 return status; 00471 } 00472 00473 //executes the FLUSH_TX SPI operation 00474 //this funciton empties the contents of the TX FIFO 00475 //returns the value of the STATUS register 00476 unsigned char nrf24l01_flush_tx() 00477 { 00478 return nrf24l01_execute_command(nrf24l01_FLUSH_TX, NULL, 0, true); 00479 } 00480 00481 //executes the FLUSH_RX SPI operation 00482 //this funciton empties the contents of the RX FIFO 00483 //returns the value of the STATUS register 00484 unsigned char nrf24l01_flush_rx() 00485 { 00486 return nrf24l01_execute_command(nrf24l01_FLUSH_RX, NULL, 0, true); 00487 } 00488 00489 //executes the REUSE_TX_PL SPI operation 00490 //this funciton allows the user to constantly send a packet repeatedly when issued. 00491 //returns the value of the STATUS register 00492 unsigned char nrf24l01_reuse_tx_pl() 00493 { 00494 return nrf24l01_execute_command(nrf24l01_REUSE_TX_PL, NULL, 0, true); 00495 } 00496 00497 //executes the FLUSH_TX SPI operation 00498 //this funciton does nothing 00499 //returns the value of the STATUS register 00500 unsigned char nrf24l01_nop() 00501 { 00502 return nrf24l01_execute_command(nrf24l01_NOP, NULL, 0, true); 00503 } 00504 00505 //transmits the current tx payload 00506 void nrf24l01_transmit() 00507 { 00508 nrf24l01_set_ce(); 00509 delay_us(10); 00510 nrf24l01_clear_ce(); 00511 } 00512 00513 //clears the pin on the host microcontroller that is attached to the 24l01's CE pin 00514 void nrf24l01_clear_ce() 00515 { 00516 nRF_CE = 0; 00517 //nrf24l01_CE_IOREGISTER &= ~nrf24l01_CE_PINMASK; 00518 } 00519 00520 //sets the pin on the host microcontroller that is attached to the 24l01's CE pin 00521 void nrf24l01_set_ce() 00522 { 00523 nRF_CE = 1; 00524 //nrf24l01_CE_IOREGISTER |= nrf24l01_CE_PINMASK; 00525 } 00526 00527 //returns true if CE is high, false if not 00528 bool nrf24l01_ce_pin_active() 00529 { 00530 return nRF_CE.read(); 00531 /* 00532 if((nrf24l01_CE_IOREGISTER & nrf24l01_CE_PINMASK) != 0) 00533 return true; 00534 else 00535 return false; 00536 */ 00537 } 00538 00539 //sets the pin on the host microcontroller that is attached to the 24l01's CSN pin 00540 void nrf24l01_clear_csn() 00541 { 00542 nRF_CSN = 0; 00543 //nrf24l01_CSN_IOREGISTER &= ~nrf24l01_CSN_PINMASK; 00544 } 00545 00546 //clears the pin on the host microcontroller that is attached to the 24l01's CSN pin 00547 void nrf24l01_set_csn() 00548 { 00549 nRF_CSN = 1; 00550 //nrf24l01_CSN_IOREGISTER |= nrf24l01_CSN_PINMASK; 00551 } 00552 00553 //returns true if CSN is high, false if not 00554 bool nrf24l01_csn_pin_active() 00555 { 00556 return nRF_CSN.read(); 00557 /* 00558 if((nrf24l01_CSN_IOREGISTER & nrf24l01_CSN_PINMASK) != 0) 00559 return true; 00560 else 00561 return false; 00562 */ 00563 } 00564 00565 //sets the TX address in the TX_ADDR register 00566 //unsigned char * address is the actual address to be used. It should be sized 00567 // according to the tx_addr length specified to the nrf24l01. 00568 //unsigned int len is the length of the address. Its value should be specified 00569 // according to the tx_addr length specified to the nrf24l01. 00570 void nrf24l01_set_tx_addr(unsigned char * address, unsigned int len) 00571 { 00572 nrf24l01_write_register(nrf24l01_TX_ADDR, address, len); 00573 } 00574 00575 //sets the RX address in the RX_ADDR register that is offset by rxpipenum 00576 //unsigned char * address is the actual address to be used. It should be sized 00577 // according to the rx_addr length that is being filled. 00578 //unsigned int len is the length of the address. Its value should be specified 00579 // according to the rx_addr length specified to the nrf24l01. 00580 //unsigned char rxpipenum is the pipe number (zero to five) whose address is being 00581 // specified. If an invalid address (greater than five) is supplied, the function 00582 // does nothing. 00583 void nrf24l01_set_rx_addr(unsigned char * address, unsigned int len, unsigned char rxpipenum) 00584 { 00585 if(rxpipenum > 5) 00586 return; 00587 00588 nrf24l01_write_register(nrf24l01_RX_ADDR_P0 + rxpipenum, address, len); 00589 } 00590 00591 //sets the RX payload width on the pipe offset by rxpipenum 00592 //unsigned char payloadwidth is the length of the payload for the pipe referenced in 00593 // rxpipenum. It must be less than or equal to 32. If an invalid payload width is 00594 // specified, the function does nothing. 00595 //unsigned char rxpipenum is the pipe number (zero to five) whose address is being 00596 // specified. If an invalid address (greater than five) is supplied, the function 00597 // does nothing. 00598 void nrf24l01_set_rx_pw(unsigned char payloadwidth, unsigned char rxpipenum) 00599 { 00600 if((rxpipenum > 5) || (payloadwidth > 32)) 00601 return; 00602 00603 nrf24l01_write_register(nrf24l01_RX_PW_P0 + rxpipenum, &payloadwidth, 1); 00604 } 00605 00606 //gets the RX payload width on the pipe offset by rxpipenum 00607 //unsigned char rxpipenum is the pipe number (zero to five) whose address is being 00608 // specified. If an invalid address (greater than five) is supplied, the function 00609 // does nothing. 00610 unsigned char nrf24l01_get_rx_pw(unsigned char rxpipenum) 00611 { 00612 unsigned char data; 00613 00614 if((rxpipenum > 5)) 00615 return 0; 00616 00617 nrf24l01_read_register(nrf24l01_RX_PW_P0 + rxpipenum, &data, 1); 00618 00619 return data; 00620 } 00621 00622 //returns the value of the CONFIG register 00623 unsigned char nrf24l01_get_config() 00624 { 00625 unsigned char data; 00626 00627 nrf24l01_read_register(nrf24l01_CONFIG, &data, 1); 00628 00629 return data; 00630 } 00631 00632 //sets the value of the CONFIG register 00633 void nrf24l01_set_config(unsigned char config) 00634 { 00635 nrf24l01_write_register(nrf24l01_CONFIG, &config, 1); 00636 } 00637 00638 //returns the current RF channel in RF_CH register 00639 unsigned char nrf24l01_get_rf_ch() 00640 { 00641 unsigned char data; 00642 00643 nrf24l01_read_register(nrf24l01_RF_CH, &data, 1); 00644 00645 return data; 00646 } 00647 00648 //unsigned char channel is the channel to be changed to. 00649 void nrf24l01_set_rf_ch(unsigned char channel) 00650 { 00651 unsigned char data; 00652 00653 data = channel & ~nrf24l01_RF_CH_RESERVED; 00654 00655 nrf24l01_write_register(nrf24l01_RF_CH, &data, 1); 00656 } 00657 00658 //returns the value of the OBSERVE_TX register 00659 unsigned char nrf24l01_get_observe_tx() 00660 { 00661 unsigned char data; 00662 00663 nrf24l01_read_register(nrf24l01_OBSERVE_TX, &data, 1); 00664 00665 return data; 00666 } 00667 00668 //returns the current PLOS_CNT value in OBSERVE_TX register 00669 unsigned char nrf24l01_get_plos_cnt() 00670 { 00671 unsigned char data; 00672 00673 nrf24l01_read_register(nrf24l01_OBSERVE_TX, &data, 1); 00674 00675 return ((data & nrf24l01_OBSERVE_TX_PLOS_CNT) >> 4); 00676 } 00677 00678 //clears the PLOS_CNT field of the OBSERVE_TX register 00679 //this function makes a read of the current value of RF_CH and 00680 // simply writes it back to the register, clearing PLOS_CNT 00681 void nrf24l01_clear_plos_cnt() 00682 { 00683 unsigned char data; 00684 00685 nrf24l01_read_register(nrf24l01_RF_CH, &data, 1); 00686 nrf24l01_write_register(nrf24l01_RF_CH, &data, 1); 00687 } 00688 00689 //clears the PLOS_CNT field of the OBSERVE_TX register 00690 //this function allows the user to set the RF_CH register by using 00691 // the argument in the function during the PLOS_CNT clearing process 00692 void nrf24l01_clear_plos_cnt_param(unsigned char rf_ch) 00693 { 00694 nrf24l01_write_register(nrf24l01_RF_CH, &rf_ch, 1); 00695 } 00696 00697 //returns the current ARC_CNT value in OBSERVE_TX register 00698 unsigned char nrf24l01_get_arc_cnt() 00699 { 00700 unsigned char data; 00701 00702 nrf24l01_read_register(nrf24l01_OBSERVE_TX, &data, 1); 00703 00704 return (data & nrf24l01_OBSERVE_TX_ARC_CNT); 00705 } 00706 00707 //returns true if auto-ack is enabled on the pipe that is offset by rxpipenum 00708 //unsigned char rxpipenum is the pipe number (zero to five) whose address is being 00709 // specified. If an invalid address (greater than five) is supplied, the function 00710 // returns false. 00711 bool nrf24l01_aa_enabled(unsigned char rxpipenum) 00712 { 00713 unsigned char data; 00714 00715 if(rxpipenum > 5) 00716 return false; 00717 00718 nrf24l01_read_register(nrf24l01_EN_AA, &data, 1); 00719 00720 return (data & (0x01 << rxpipenum)); 00721 } 00722 00723 //enables auto-ack is enabled on the pipe that is offset by rxpipenum 00724 //unsigned char rxpipenum is the pipe number (zero to five) whose address is being 00725 // does nothing. 00726 void nrf24l01_aa_enable(unsigned char rxpipenum) 00727 { 00728 unsigned char data; 00729 00730 if(rxpipenum > 5) 00731 return; 00732 00733 nrf24l01_read_register(nrf24l01_EN_AA, &data, 1); 00734 00735 if((data & (0x01 << rxpipenum)) != 0) 00736 return; 00737 00738 data |= 0x01 << rxpipenum; 00739 00740 nrf24l01_write_register(nrf24l01_EN_AA, &data, 1); 00741 } 00742 00743 //disables auto-ack is enabled on the pipe that is offset by rxpipenum 00744 //unsigned char rxpipenum is the pipe number (zero to five) whose address is being 00745 // does nothing. 00746 void nrf24l01_aa_disable(unsigned char rxpipenum) 00747 { 00748 unsigned char data; 00749 00750 if(rxpipenum > 5) 00751 return; 00752 00753 nrf24l01_read_register(nrf24l01_EN_AA, &data, 1); 00754 00755 if((data & (0x01 << rxpipenum)) == 0) 00756 return; 00757 00758 data &= ~(0x01 << rxpipenum); 00759 00760 nrf24l01_write_register(nrf24l01_EN_AA, &data, 1); 00761 } 00762 00763 //returns true if the pipe is enabled that is offset by rxpipenum 00764 //unsigned char rxpipenum is the pipe number (zero to five) whose address is being 00765 // specified. If an invalid address (greater than five) is supplied, the function 00766 // returns false. 00767 bool nrf24l01_rx_pipe_enabled(unsigned char rxpipenum) 00768 { 00769 unsigned char data; 00770 00771 if((rxpipenum > 5)) 00772 return false; 00773 00774 nrf24l01_read_register(nrf24l01_EN_RXADDR, &data, 1); 00775 00776 return (data & (0x01 << rxpipenum)); 00777 } 00778 00779 //enables the pipe that is offset by rxpipenum 00780 //unsigned char rxpipenum is the pipe number (zero to five) whose address is being 00781 // specified. If an invalid address (greater than five) is supplied, the function 00782 // does nothing. 00783 void nrf24l01_rx_pipe_enable(unsigned char rxpipenum) 00784 { 00785 unsigned char data; 00786 00787 if(rxpipenum > 5) 00788 return; 00789 00790 nrf24l01_read_register(nrf24l01_EN_RXADDR, &data, 1); 00791 00792 if((data & (0x01 << rxpipenum)) != 0) 00793 return; 00794 00795 data |= 0x01 << rxpipenum; 00796 00797 nrf24l01_write_register(nrf24l01_EN_RXADDR, &data, 1); 00798 } 00799 00800 //disables the pipe that is offset by rxpipenum 00801 //unsigned char rxpipenum is the pipe number (zero to five) whose address is being 00802 // specified. If an invalid address (greater than five) is supplied, the function 00803 // does nothing. 00804 void nrf24l01_rx_pipe_disable(unsigned char rxpipenum) 00805 { 00806 unsigned char data; 00807 00808 if(rxpipenum > 5) 00809 return; 00810 00811 nrf24l01_read_register(nrf24l01_EN_RXADDR, &data, 1); 00812 00813 if((data & (0x01 << rxpipenum)) == 0) 00814 return; 00815 00816 data &= ~(0x01 << rxpipenum); 00817 00818 nrf24l01_write_register(nrf24l01_EN_RXADDR, &data, 1); 00819 } 00820 00821 //returns the status of the CD register (true if carrier detect [CD] is 00822 // active, false if not) 00823 bool nrf24l01_cd_active() 00824 { 00825 unsigned char data; 00826 00827 nrf24l01_read_register(nrf24l01_CD, &data, 1); 00828 00829 return data; 00830 } 00831 00832 //returns the value of the FIFO_STATUS register 00833 unsigned char nrf24l01_get_fifo_status() 00834 { 00835 unsigned char data; 00836 00837 nrf24l01_read_register(nrf24l01_FIFO_STATUS, &data, 1); 00838 00839 return data; 00840 } 00841 00842 //return the value of the status register 00843 unsigned char nrf24l01_get_status() 00844 { 00845 return nrf24l01_nop(); 00846 } 00847 00848 //returns true if TX_REUSE bit in FIFO_STATUS register is set, false otherwise 00849 bool nrf24l01_fifo_tx_reuse() 00850 { 00851 unsigned char data; 00852 00853 nrf24l01_read_register(nrf24l01_FIFO_STATUS, &data, 1); 00854 00855 return (bool)(data & nrf24l01_FIFO_STATUS_TX_REUSE); 00856 } 00857 00858 //returns true if TX_FULL bit in FIFO_STATUS register is set, false otherwise 00859 bool nrf24l01_fifo_tx_full() 00860 { 00861 unsigned char data; 00862 00863 nrf24l01_read_register(nrf24l01_FIFO_STATUS, &data, 1); 00864 00865 return (bool)(data & nrf24l01_FIFO_STATUS_TX_FULL); 00866 } 00867 00868 //returns true if TX_EMPTY bit in FIFO_STATUS register is set, false otherwise 00869 bool nrf24l01_fifo_tx_empty() 00870 { 00871 unsigned char data; 00872 00873 nrf24l01_read_register(nrf24l01_FIFO_STATUS, &data, 1); 00874 00875 return (bool)(data & nrf24l01_FIFO_STATUS_TX_EMPTY); 00876 } 00877 00878 //returns true if RX_FULL bit in FIFO_STATUS register is set, false otherwise 00879 bool nrf24l01_fifo_rx_full() 00880 { 00881 unsigned char data; 00882 00883 nrf24l01_read_register(nrf24l01_FIFO_STATUS, &data, 1); 00884 00885 return (bool)(data & nrf24l01_FIFO_STATUS_RX_FULL); 00886 } 00887 00888 //returns true if RX_EMPTYE bit in FIFO_STATUS register is set, false otherwise 00889 bool nrf24l01_fifo_rx_empty() 00890 { 00891 unsigned char data; 00892 00893 nrf24l01_read_register(nrf24l01_FIFO_STATUS, &data, 1); 00894 00895 return (bool)(data & nrf24l01_FIFO_STATUS_RX_EMPTY); 00896 } 00897 00898 //returns true if IRQ pin is low, false otherwise 00899 bool nrf24l01_irq_pin_active() 00900 { 00901 return !nRF_IRQ.read(); 00902 /* 00903 if((nrf24l01_IRQ_IOREGISTER & nrf24l01_IRQ_PINMASK) != 0) 00904 return false; 00905 else 00906 return true; 00907 */ 00908 } 00909 00910 //returns true if RX_DR interrupt is active, false otherwise 00911 bool nrf24l01_irq_rx_dr_active() 00912 { 00913 return (nrf24l01_get_status() & nrf24l01_STATUS_RX_DR); 00914 } 00915 00916 //returns true if TX_DS interrupt is active, false otherwise 00917 bool nrf24l01_irq_tx_ds_active() 00918 { 00919 return (nrf24l01_get_status() & nrf24l01_STATUS_TX_DS); 00920 } 00921 00922 //returns true if MAX_RT interrupt is active, false otherwise 00923 bool nrf24l01_irq_max_rt_active() 00924 { 00925 return (nrf24l01_get_status() & nrf24l01_STATUS_MAX_RT); 00926 } 00927 00928 //clear all interrupts in the status register 00929 void nrf24l01_irq_clear_all() 00930 { 00931 unsigned char data = nrf24l01_STATUS_RX_DR | nrf24l01_STATUS_TX_DS | nrf24l01_STATUS_MAX_RT; 00932 00933 nrf24l01_write_register(nrf24l01_STATUS, &data, 1); 00934 } 00935 00936 //clears only the RX_DR interrupt 00937 void nrf24l01_irq_clear_rx_dr() 00938 { 00939 unsigned char data = nrf24l01_STATUS_RX_DR; 00940 00941 nrf24l01_write_register(nrf24l01_STATUS, &data, 1); 00942 } 00943 00944 //clears only the TX_DS interrupt 00945 void nrf24l01_irq_clear_tx_ds() 00946 { 00947 unsigned char data = nrf24l01_STATUS_TX_DS; 00948 00949 nrf24l01_write_register(nrf24l01_STATUS, &data, 1); 00950 } 00951 00952 //clears only the MAX_RT interrupt 00953 void nrf24l01_irq_clear_max_rt() 00954 { 00955 unsigned char data = nrf24l01_STATUS_MAX_RT; 00956 00957 nrf24l01_write_register(nrf24l01_STATUS, &data, 1); 00958 } 00959 00960 //returns the current pipe in the 24L01's STATUS register 00961 unsigned char nrf24l01_get_rx_pipe() 00962 { 00963 return nrf24l01_get_rx_pipe_from_status(nrf24l01_get_status()); 00964 } 00965 00966 unsigned char nrf24l01_get_rx_pipe_from_status(unsigned char status) 00967 { 00968 return ((status & 0xE) >> 1); 00969 } 00970 00971 //flush both fifos and clear interrupts 00972 void nrf24l01_clear_flush() 00973 { 00974 nrf24l01_flush_rx(); 00975 nrf24l01_flush_tx(); 00976 nrf24l01_irq_clear_all(); 00977 } 00978 00979 //unsigned char * data must be at least 35 bytes long 00980 void nrf24l01_get_all_registers(unsigned char * data) 00981 { 00982 unsigned int outer; 00983 unsigned int inner; 00984 unsigned int dataloc = 0; 00985 unsigned char buffer[5]; 00986 00987 for(outer = 0; outer <= 0x17; outer++) 00988 { 00989 nrf24l01_read_register(outer, buffer, 5); 00990 00991 for(inner = 0; inner < 5; inner++) 00992 { 00993 if(inner >= 1 && (outer != 0x0A && outer != 0x0B && outer != 0x10)) 00994 break; 00995 00996 data[dataloc] = buffer[inner]; 00997 dataloc++; 00998 } 00999 } 01000 } 01001 01002 //low-level spi send function for library use 01003 //the user should not call this function directly, but rather use one of the 8 SPI data instructions 01004 unsigned char nrf24l01_execute_command(unsigned char instruction, unsigned char * data, unsigned int len, bool copydata) 01005 { 01006 unsigned char status; 01007 01008 nrf24l01_clear_csn(); 01009 01010 status = instruction; 01011 nrf24l01_spi_send_read(&status, 1, true); 01012 nrf24l01_spi_send_read(data, len, copydata); 01013 01014 nrf24l01_set_csn(); 01015 01016 return status; 01017 } 01018 01019 //low-level spi send function for library use 01020 //the user should not call this function directly, but rather use one of the 8 SPI data instructions 01021 void nrf24l01_spi_send_read(unsigned char * data, unsigned int len, bool copydata) 01022 { 01023 unsigned int count; 01024 unsigned char tempbyte; 01025 01026 for(count = 0; count < len; count++) 01027 { 01028 if(copydata != false) 01029 data[count] = spi_send_read_byte(data[count]); 01030 else 01031 { 01032 tempbyte = data[count]; 01033 spi_send_read_byte(tempbyte); 01034 } 01035 } 01036 } 01037
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