Jeff Craighead / CY14B101P

Encapsulates access to the Cypress CY14B101P nvSRAM module.

Diff: CY14B101P.cpp

Revision:
1:0f4063d68380
Parent:
0:eec14545c442
Child:
2:50ca90120eb6
--- a/CY14B101P.cpp	Mon Jul 11 16:41:25 2011 +0000
+++ b/CY14B101P.cpp	Mon Jul 11 17:08:39 2011 +0000
@@ -2,11 +2,11 @@
 
 Serial pc_(USBTX,USBRX);
 //Constructor - specify mbed pins for SPI connection to memory and the SPI clock rate
-NVSRAM::NVSRAM(PinName mosi, PinName miso, PinName sclk, PinName csel, int spifrequency, int spibits, int spimode) : spi_(mosi, miso, sclk), chipSel_(csel) {
+NVSRAM::NVSRAM(PinName mosi, PinName miso, PinName sclk, PinName csel, int spifrequency) : spi_(mosi, miso, sclk), chipSel_(csel) {
 
     //chipSel_(csel);
 
-    spi_.format(spibits,spimode);
+    spi_.format(8,0);
     spi_.frequency(spifrequency);
     spifreq = spifrequency;
     chipSel_=1;