LIS2DH.h

00001 /*******************************************************************************
00002  * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
00003  *
00004  * Permission is hereby granted, free of charge, to any person obtaining a
00005  * copy of this software and associated documentation files (the "Software"),
00006  * to deal in the Software without restriction, including without limitation
00007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
00008  * and/or sell copies of the Software, and to permit persons to whom the
00009  * Software is furnished to do so, subject to the following conditions:
00010  *
00011  * The above copyright notice and this permission notice shall be included
00012  * in all copies or substantial portions of the Software.
00013  *
00014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
00015  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
00016  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
00017  * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
00018  * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
00019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
00020  * OTHER DEALINGS IN THE SOFTWARE.
00021  *
00022  * Except as contained in this notice, the name of Maxim Integrated
00023  * Products, Inc. shall not be used except as stated in the Maxim Integrated
00024  * Products, Inc. Branding Policy.
00025  *
00026  * The mere transfer of this software does not imply any licenses
00027  * of trade secrets, proprietary technology, copyrights, patents,
00028  * trademarks, maskwork rights, or any other form of intellectual
00029  * property whatsoever. Maxim Integrated Products, Inc. retains all
00030  * ownership rights.
00031  *******************************************************************************
00032  */
00033 
00034 #ifndef LIS2DH_H_
00035 #define LIS2DH_H_
00036 
00037 #include "mbed.h"
00038 
00039 /**
00040  * Driver for the LIS2DH on the HSP Platform
00041  *
00042  * @code
00043  * #include <stdio.h>
00044  * #include "mbed.h"
00045  * #include "xxx.h"
00046  *
00047  * I2C i2c(I2C_SDA, I2C_SCL);
00048  * xxx xxx(&i2c);
00049  *
00050  * int main(void) {
00051  *     printf("Initialized xxx\n");
00052  *     while(1) {
00053  *         if (xxx.init() != 0) {
00054  *             printf("Error communicating with xxx\n");
00055  *         } else {
00056  *             printf("Initialized xxx\n");
00057  *             break;
00058  *         }
00059  *         wait(1);
00060  *     }
00061  *
00062  *     while(1) {
00063  *         printf("");
00064  *         wait(1);
00065  *     }
00066  * }
00067  * @endcode
00068  */
00069 
00070 void LIS2DHIntHandler(void);
00071 
00072 #define LIS2DH_READID 0x33
00073 
00074 /// @brief LIS2DH Register addresses
00075 #define LIS2DH_STATUS_REG_AUX  0x07
00076 #define LIS2DH_OUT_TEMP_L      0x0C
00077 #define LIS2DH_OUT_TEMP_H      0x0D
00078 #define LIS2DH_INT_COUNTER_REG 0x0E
00079 #define LIS2DH_WHO_AM_I        0x0F
00080 #define LIS2DH_TEMP_CFG_REG    0x1F
00081 #define LIS2DH_CTRL_REG1       0x20
00082 #define LIS2DH_CTRL_REG2       0x21
00083 #define LIS2DH_CTRL_REG3       0x22
00084 #define LIS2DH_CTRL_REG4       0x23
00085 #define LIS2DH_CTRL_REG5       0x24
00086 #define LIS2DH_CTRL_REG6       0x25
00087 #define LIS2DH_REFERENCE       0x26
00088 #define LIS2DH_STATUS_REG2     0x27
00089 #define LIS2DH_OUT_X_L         0x28
00090 #define LIS2DH_OUT_X_H         0x29
00091 #define LIS2DH_OUT_Y_L         0x2A
00092 #define LIS2DH_OUT_Y_H         0x2B
00093 #define LIS2DH_OUT_Z_L         0x2C
00094 #define LIS2DH_OUT_Z_H         0x2D
00095 #define LIS2DH_FIFO_CTRL_REG   0x2E
00096 #define LIS2DH_FIFO_SRC_REG    0x2F
00097 #define LIS2DH_INT1_CFG        0x30
00098 #define LIS2DH_INT1_SRC        0x31
00099 #define LIS2DH_INT1_THS        0x32
00100 #define LIS2DH_INT1_DURATION   0x33
00101 #define LIS2DH_INT2_CFG        0x34
00102 #define LIS2DH_INT2_SRC        0x35
00103 #define LIS2DH_INT2_THS        0x36
00104 #define LIS2DH_INT2_DURATION   0x37
00105 #define LIS2DH_CLICK_CFG       0x38
00106 #define LIS2DH_CLICK_SRC       0x39
00107 #define LIS2DH_CLICK_THS       0x3A
00108 #define LIS2DH_TIME_LIMIT      0x3B
00109 #define LIS2DH_TIME_LATENCY    0x3C
00110 #define LIS2DH_TIME_WINDOW     0x3D
00111 #define LIS2DH_Act_THS         0x3E
00112 #define LIS2DH_Act_DUR         0x3F
00113 
00114 #define LIS2DH_DATARATE_1HZ    0x1
00115 #define LIS2DH_DATARATE_10HZ   0x2
00116 #define LIS2DH_DATARATE_25HZ   0x3
00117 #define LIS2DH_DATARATE_50HZ   0x4
00118 #define LIS2DH_DATARATE_100HZ  0x5
00119 #define LIS2DH_DATARATE_200HZ  0x6
00120 #define LIS2DH_DATARATE_400HZ  0x7
00121 
00122 #define LIS2DH_FIFOMODE_BYPASS  0x00
00123 #define LIS2DH_FIFOMODE_FIFO    0x01
00124 #define LIS2DH_FIFOMODE_STREAM  0x02
00125 #define LIS2DH_FIFOMODE_TRIGGER 0x03
00126 
00127 #define LIS2DH_ID 0x33
00128 #define LIS2DH_FIFO_SIZE 32
00129 
00130 #define LISD2DH_FIFO_MODE_BYPASS  0
00131 #define LISD2DH_FIFO_MODE_FIFO    1
00132 #define LISD2DH_FIFO_MODE_STREAM  2
00133 #define LISD2DH_FIFO_MODE_TRIGGER 3
00134 
00135 #define LIS2DH_NUMBER_OF_AXIS  3
00136 #define LIS2DH_MAX_DATA_SIZE   (LIS2DH_NUMBER_OF_AXIS * LIS2DH_FIFO_SIZE)
00137 
00138 class LIS2DH {
00139 public:
00140   /// @brief STATUS_AUX (07h)
00141   union lis2dh_status_aux_reg {
00142     char all;
00143     struct {
00144       char reserved3 : 2;
00145       char TDA       : 1;
00146       char reserved2 : 3;
00147       char TOR       : 1;
00148       char reserved1 : 1;
00149     } bit;
00150   } lis2dh_status_aux;
00151 
00152   /// @brief OUT_TEMP_L (0Ch)
00153   union lis2dh_out_temp_l_reg {
00154     char all;
00155   } lis2dh_out_temp_l;
00156 
00157   /// @brief OUT_TEMP_H (0Dh)
00158   union lis2dh_out_temp_h_reg {
00159     char all;
00160   } lis2dh_out_temp_h;
00161 
00162   /// @brief INT_COUNTER (0Eh)
00163   union lis2dh_int_counter_reg {
00164     char all;
00165   } lis2dh_int_counter;
00166 
00167   /// @brief WHO_AM_I (0Fh)
00168   union lis2dh_who_am_i_reg {
00169     char all;
00170   } lis2dh_who_am_i;
00171 
00172   /// @brief TEMP_CFG_REG (1Fh)
00173   union lis2dh_temp_cfg_reg {
00174     char all;
00175     struct {
00176       char reserved1 : 6;
00177       char TEMP_EN0  : 1;
00178       char TEMP_EN1  : 1;
00179     } bit;
00180   } lis2dh_temp_cfg;
00181 
00182   /// @brief CTRL_REG1 (20h)
00183   union lis2dh_ctrl_reg1_reg {
00184     char all;
00185     struct {
00186       char Xen  : 1;
00187       char Yen  : 1;
00188       char Zen  : 1;
00189       char LPen : 1;
00190       char ODR  : 4;
00191     } bit;
00192   } lis2dh_ctrl_reg1;
00193 
00194   /// @brief CTRL_REG1 (21h)
00195   union lis2dh_ctrl_reg2_reg {
00196     char all;
00197     struct {
00198       char HPIS    : 3;
00199       char HPCLICK : 1;
00200       char FDS     : 1;
00201       char HPCF    : 2;
00202       char HPM     : 2;
00203     } bit;
00204   } lis2dh_ctrl_reg2;
00205 
00206   /// @brief CTRL_REG3 (22h)
00207   union lis2dh_ctrl_reg3_reg {
00208     char all;
00209     struct {
00210       char reserved   : 1;
00211       char I1_OVERRUN : 1;
00212       char I1_WTM     : 1;
00213       char I1_DRDY    : 2;
00214       char I1_AOI     : 1;
00215       char I1_CLICK   : 1;
00216     } bit;
00217   } lis2dh_ctrl_reg3;
00218 
00219   /// @brief CTRL_REG4 (23h)
00220   union lis2dh_ctrl_reg4_reg {
00221     char all;
00222     struct {
00223       char SIM : 1;
00224       char ST  : 2;
00225       char HR  : 1;
00226       char FS  : 2;
00227       char BLE : 1;
00228       char BDU : 1;
00229     } bit;
00230   } lis2dh_ctrl_reg4;
00231 
00232   /// @brief CTRL_REG5 (24h)
00233   union lis2dh_ctrl_reg5_reg {
00234     char all;
00235     struct {
00236       char D4D_INT2 : 1;
00237       char LIR_INT2 : 1;
00238       char D4D_INT1 : 1;
00239       char LIR_INT1 : 1;
00240       char reserved : 2;
00241       char FIFO_EN  : 1;
00242       char BOOT     : 1;
00243     } bit;
00244   } lis2dh_ctrl_reg5;
00245 
00246   /// @brief CTRL_REG6 (25h)
00247   union lis2dh_ctrl_reg6_reg {
00248     char all;
00249     struct {
00250       char reserved1 : 1;
00251       char H_LACTIVE : 1;
00252       char reserved2 : 1;
00253       char P2_ACT    : 1;
00254       char BOOT_I2   : 1;
00255       char I2_INT2   : 2;
00256       char I2_INT1   : 1;
00257       char I2_CLICKen: 1;
00258     } bit;
00259   } lis2dh_ctrl_reg6;
00260 
00261   /// @brief REFERENCE (26h)
00262   union lis2dh_reference_reg {
00263     char all;
00264   } lis2dh_reference;
00265 
00266   /// @brief STATUS_REG (27h)
00267   union lis2dh_status_reg_ {
00268     char all;
00269     struct {
00270       char XDA   : 1;
00271       char YDA   : 1;
00272       char ZDA   : 1;
00273       char ZYXDA : 1;
00274       char XOR   : 1;
00275       char YOR   : 1;
00276       char ZOR   : 1;
00277       char ZYXOR : 1;
00278     } bit;
00279   } lis2dh_status_reg;
00280 
00281   /// @brief OUT_X_L (28h)
00282   union lis2dh_out_x_l_ {
00283     char all;
00284   } lis2dh_out_x_l;
00285 
00286   /// @brief OUT_X_H (29h)
00287   union lis2dh_out_x_h_ {
00288     char all;
00289   } lis2dh_out_x_h;
00290 
00291   /// @brief OUT_Y_L (2Ah)
00292   union lis2dh_out_y_l_ {
00293     char all;
00294   } lis2dh_out_y_l;
00295 
00296   /// @brief OUT_Y_H (2Bh)
00297   union lis2dh_out_y_h_ {
00298     char all;
00299   } lis2dh_out_y_h;
00300 
00301   /// @brief OUT_Z_L (2Ch)
00302   union lis2dh_out_z_l_ {
00303     char all;
00304   } lis2dh_out_z_l;
00305 
00306   /// @brief OUT_Z_H (2Dh)
00307   union lis2dh_out_z_h_ {
00308     char all;
00309   } lis2dh_out_z_h;
00310 
00311   /// @brief FIFO_CTRL_REG (2Eh)
00312   union lis2dh_fifo_ctrl_reg_ {
00313     char all;
00314     struct {
00315       char FTH : 5;
00316       char TR  : 1;
00317       char FM  : 2;
00318     } bit;
00319   } lis2dh_fifo_ctrl_reg;
00320 
00321   /// @brief FIFO_CTRL_REG (2Fh)
00322   union lis2dh_fifo_src_reg_ {
00323     char all;
00324     struct {
00325       char FSS       : 5;
00326       char EMPTY     : 1;
00327       char OVRN_FIFO : 1;
00328       char WTM       : 1;
00329     } bit;
00330   } lis2dh_fifo_src_reg;
00331 
00332   /// @brief INT1_CFG (30h)
00333   union lis2dh_int1_cfg_reg_ {
00334     char all;
00335     struct {
00336       char XLIE_XDOWNE : 1;
00337       char XHIE_XUPE   : 1;
00338       char YLIE_YDOWNE : 1;
00339       char YHIE_YUPE   : 1;
00340       char ZLIE_ZDOWNE : 1;
00341       char ZHIE_ZUPE   : 1;
00342       char SIXD        : 1;
00343       char AOI         : 1;
00344     } bit;
00345   } lis2dh_int1_cfg;
00346 
00347   /// @brief INT1_SRC (31h)
00348   union lis2dh_int1_src_reg_ {
00349     char all;
00350     struct {
00351       char XL : 1;
00352       char XH : 1;
00353       char YL : 1;
00354       char YH : 1;
00355       char ZL : 1;
00356       char ZH : 1;
00357       char IA : 1;
00358       char reserved : 1;
00359     } bit;
00360   } lis2dh_int1_src;
00361 
00362   /// @brief INT1_THS (32h)
00363   union lis2dh_int1_ths_reg_ {
00364     char all;
00365   } lis2dh_int1_ths;
00366 
00367   /// @brief INT1_DURATION (33h)
00368   union lis2dh_int1_duration_reg_ {
00369     char all;
00370   } lis2dh_int1_duration;
00371 
00372   /// @brief INT2_CFG (34h)
00373   union lis2dh_int2_cfg_reg_ {
00374     char all;
00375     struct {
00376       char XLIE : 1;
00377       char XHIE : 1;
00378       char YLIE : 1;
00379       char YHIE : 1;
00380       char ZLIE : 1;
00381       char ZHIE : 1;
00382       char SIX6 : 1;
00383       char AOI  : 1;
00384     } bit;
00385   } lis2dh_int2_cfg;
00386 
00387   /// @brief INT2_SRC (35h)
00388   union lis2dh_int2_src_reg_ {
00389     char all;
00390     struct {
00391       char XL       : 1;
00392       char XH       : 1;
00393       char YL       : 1;
00394       char YH       : 1;
00395       char ZL       : 1;
00396       char ZH       : 1;
00397       char IA       : 1;
00398       char reserved : 1;
00399     } bit;
00400   } lis2dh_int2_src;
00401 
00402   /// @brief INT2_THS (36h)
00403   union lis2dh_int2_ths_reg_ {
00404     char all;
00405   } lis2dh_int2_ths;
00406 
00407   /// @brief INT2_DURATION (37h)
00408   union lis2dh_int2_duration_reg_ {
00409     char all;
00410   } lis2dh_int2_duration;
00411 
00412   LIS2DH(PinName sda, PinName scl, int slaveAddress);
00413   LIS2DH(I2C *i2c, int slaveAddress);
00414   ~LIS2DH(void);
00415 
00416   /** @brief Initialize the device
00417   */
00418   void init(void);
00419   /** @brief Interrupt handler
00420   */
00421   void int_handler(void);
00422   /** @brief Get motion data from the device fifo
00423   */
00424   int get_motion_fifo(short *valueX, short *valueY, short *valueZ);
00425   /** @brief Get the last cached motion values (cached from a previous interrupt
00426    * event)
00427   */
00428   int get_motion_cached(int16_t *valueX, int16_t *valueY, int16_t *valueZ);
00429   /** @brief Star Interrupts
00430   */
00431   int initStart(int dataRate, int fifoThreshold);
00432   /** @brief Stop interrupts
00433   */
00434   void stop(void);
00435   /** @brief Read device register
00436   */
00437   int readReg(char reg, char *value);
00438   /** @brief Write device regsiter
00439   */
00440   int writeReg(char reg, char value);
00441   /** @brief Detect if device exists
00442   */
00443   int detect(char *detected);
00444   /** @brief Read the device ID
00445   */
00446   char readId(void);
00447 
00448   static LIS2DH *instance;
00449 
00450 private:
00451   /** @brief
00452   */
00453   void configure_interrupt(void);
00454   /// I2C pointer
00455   I2C *i2c;
00456   /// Is this object the owner of the I2C object
00457   bool isOwner;
00458   /// Device slave address
00459   int slaveAddress;
00460 };
00461 
00462 #endif /* LIS2DH_H_ */