Jinbuhm Kim
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W5500_Driver
Wiznet W5500 driver and TCP/UDP loopback
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wizchip_conf.c
00001 /* Wiznet W5500 Library 00002 * Copyright (c) 2013, WIZnet Co., LTD. 00003 * 00004 * Licensed under the Apache License, Version 2.0 (the "License"); 00005 * you may not use this file except in compliance with the License. 00006 * You may obtain a copy of the License at 00007 * 00008 * http://www.apache.org/licenses/LICENSE-2.0 00009 * 00010 * Unless required by applicable law or agreed to in writing, software 00011 * distributed under the License is distributed on an "AS IS" BASIS, 00012 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 00013 * See the License for the specific language governing permissions and 00014 * limitations under the License. 00015 */ 00016 00017 #include "wizchip_conf.h" 00018 /** 00019 * @brief Default function to enable interrupt. 00020 * @note This function help not to access wrong address. If you do not describe this function or register any functions, 00021 * null function is called. 00022 */ 00023 void wizchip_cris_enter(void) {}; 00024 /** 00025 * @brief Default function to disable interrupt. 00026 * @note This function help not to access wrong address. If you do not describe this function or register any functions, 00027 * null function is called. 00028 */ 00029 void wizchip_cris_exit(void) {}; 00030 /** 00031 * @brief Default function to select chip. 00032 * @note This function help not to access wrong address. If you do not describe this function or register any functions, 00033 * null function is called. 00034 */ 00035 void wizchip_cs_select(void) {}; 00036 /** 00037 * @brief Default function to deselect chip. 00038 * @note This function help not to access wrong address. If you do not describe this function or register any functions, 00039 * null function is called. 00040 */ 00041 void wizchip_cs_deselect(void) {}; 00042 /** 00043 * @brief Default function to read in SPI interface. 00044 * @note This function help not to access wrong address. If you do not describe this function or register any functions, 00045 * null function is called. 00046 */ 00047 uint8_t wizchip_spi_readbyte(void) {return 0;}; 00048 /** 00049 * @brief Default function to write in SPI interface. 00050 * @note This function help not to access wrong address. If you do not describe this function or register any functions, 00051 * null function is called. 00052 */ 00053 void wizchip_spi_writebyte(uint8_t wb) {}; 00054 00055 /** 00056 * @\ref _WIZCHIP instance 00057 */ 00058 _WIZCHIP WIZCHIP = 00059 { 00060 .CRIS._enter = wizchip_cris_enter, 00061 .CRIS._exit = wizchip_cris_exit, 00062 .CS._select = wizchip_cs_select, 00063 .CS._deselect = wizchip_cs_deselect, 00064 .IF.SPI._read_byte = wizchip_spi_readbyte, 00065 .IF.SPI._write_byte = wizchip_spi_writebyte 00066 }; 00067 00068 static uint8_t _DNS_[4]; // DNS server ip address 00069 static dhcp_mode _DHCP_; // DHCP mode 00070 00071 void reg_wizchip_cris_cbfunc(void(*cris_en)(void), void(*cris_ex)(void)) 00072 { 00073 if(!cris_en || !cris_ex) 00074 { 00075 WIZCHIP.CRIS._enter = wizchip_cris_enter; 00076 WIZCHIP.CRIS._exit = wizchip_cris_exit; 00077 } 00078 else 00079 { 00080 WIZCHIP.CRIS._enter = cris_en; 00081 WIZCHIP.CRIS._exit = cris_ex; 00082 } 00083 } 00084 00085 void reg_wizchip_cs_cbfunc(void(*cs_sel)(void), void(*cs_desel)(void)) 00086 { 00087 if(!cs_sel || !cs_desel) 00088 { 00089 WIZCHIP.CS._select = wizchip_cs_select; 00090 WIZCHIP.CS._deselect = wizchip_cs_deselect; 00091 } 00092 else 00093 { 00094 WIZCHIP.CS._select = cs_sel; 00095 WIZCHIP.CS._deselect = cs_desel; 00096 } 00097 } 00098 00099 00100 void reg_wizchip_spi_cbfunc(uint8_t (*spi_rb)(void), void (*spi_wb)(uint8_t wb)) 00101 { 00102 00103 if(!spi_rb || !spi_wb) 00104 { 00105 WIZCHIP.IF.SPI._read_byte = wizchip_spi_readbyte; 00106 WIZCHIP.IF.SPI._write_byte = wizchip_spi_writebyte; 00107 } 00108 else 00109 { 00110 WIZCHIP.IF.SPI._read_byte = spi_rb; 00111 WIZCHIP.IF.SPI._write_byte = spi_wb; 00112 } 00113 } 00114 00115 int8_t ctlwizchip(ctlwizchip_type cwtype, void* arg) 00116 { 00117 uint8_t tmp = 0; 00118 uint8_t* ptmp[2] = {0,0}; 00119 00120 switch(cwtype) 00121 { 00122 case CW_RESET_WIZCHIP: 00123 wizchip_sw_reset(); 00124 break; 00125 case CW_INIT_WIZCHIP: 00126 if(arg != 0) 00127 { 00128 ptmp[0] = (uint8_t*)arg; 00129 ptmp[1] = ptmp[0] + _WIZCHIP_SOCK_NUM_; 00130 } 00131 return wizchip_init(ptmp[0], ptmp[1]); 00132 case CW_CLR_INTERRUPT: 00133 wizchip_clrinterrupt(*((intr_kind*)arg)); 00134 break; 00135 case CW_GET_INTERRUPT: 00136 *((intr_kind*)arg) = wizchip_getinterrupt(); 00137 break; 00138 case CW_SET_INTRMASK: 00139 wizchip_setinterruptmask(*((intr_kind*)arg)); 00140 break; 00141 case CW_GET_INTRMASK: 00142 *((intr_kind*)arg) = wizchip_getinterruptmask(); 00143 break; 00144 case CW_SET_INTRTIME: 00145 setINTLEVEL(*(uint16_t*)arg); 00146 break; 00147 case CW_GET_INTRTIME: 00148 *(uint16_t*)arg = getINTLEVEL(); 00149 break; 00150 case CW_RESET_PHY: 00151 wizphy_reset(); 00152 break; 00153 case CW_SET_PHYCONF: 00154 wizphy_setphyconf((wiz_PhyConf*)arg); 00155 break; 00156 case CW_GET_PHYCONF: 00157 wizphy_getphyconf((wiz_PhyConf*)arg); 00158 break; 00159 case CW_GET_PHYSTATUS: 00160 break; 00161 case CW_SET_PHYPOWMODE: 00162 return wizphy_setphypmode(*(uint8_t*)arg); 00163 case CW_GET_PHYPOWMODE: 00164 tmp = wizphy_getphypmode(); 00165 if((int8_t)tmp == -1) return -1; 00166 *(uint8_t*)arg = tmp; 00167 break; 00168 case CW_GET_PHYLINK: 00169 tmp = wizphy_getphylink(); 00170 if((int8_t)tmp == -1) return -1; 00171 *(uint8_t*)arg = tmp; 00172 break; 00173 default: 00174 return -1; 00175 } 00176 return 0; 00177 } 00178 00179 00180 int8_t ctlnetwork(ctlnetwork_type cntype, void* arg) 00181 { 00182 00183 switch(cntype) 00184 { 00185 case CN_SET_NETINFO: 00186 wizchip_setnetinfo((wiz_NetInfo*)arg); 00187 break; 00188 case CN_GET_NETINFO: 00189 wizchip_getnetinfo((wiz_NetInfo*)arg); 00190 break; 00191 case CN_SET_NETMODE: 00192 return wizchip_setnetmode(*(netmode_type*)arg); 00193 case CN_GET_NETMODE: 00194 *(netmode_type*)arg = wizchip_getnetmode(); 00195 break; 00196 case CN_SET_TIMEOUT: 00197 wizchip_settimeout((wiz_NetTimeout*)arg); 00198 break; 00199 case CN_GET_TIMEOUT: 00200 wizchip_gettimeout((wiz_NetTimeout*)arg); 00201 break; 00202 default: 00203 return -1; 00204 } 00205 return 0; 00206 } 00207 00208 void wizchip_sw_reset(void) 00209 { 00210 uint8_t gw[4], sn[4], sip[4]; 00211 uint8_t mac[6]; 00212 00213 getSHAR(mac); 00214 getGAR(gw); getSUBR(sn); getSIPR(sip); 00215 setMR(MR_RST); 00216 getMR(); // for delay 00217 setSHAR(mac); 00218 setGAR(gw); 00219 setSUBR(sn); 00220 setSIPR(sip); 00221 } 00222 00223 int8_t wizchip_init(uint8_t* txsize, uint8_t* rxsize) 00224 { 00225 int8_t i; 00226 int8_t tmp = 0; 00227 00228 wizchip_sw_reset(); 00229 if(txsize) 00230 { 00231 tmp = 0; 00232 for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++) 00233 tmp += txsize[i]; 00234 if(tmp > 16) return -1; 00235 for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++) 00236 setSn_TXBUF_SIZE(i, txsize[i]); 00237 } 00238 if(rxsize) 00239 { 00240 tmp = 0; 00241 for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++) 00242 tmp += rxsize[i]; 00243 if(tmp > 16) return -1; 00244 for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++) 00245 setSn_RXBUF_SIZE(i, rxsize[i]); 00246 } 00247 return 0; 00248 } 00249 00250 void wizchip_clrinterrupt(intr_kind intr) 00251 { 00252 uint8_t ir = (uint8_t)intr; 00253 uint8_t sir = (uint8_t)((uint16_t)intr >> 8); 00254 00255 setIR(ir); 00256 setSIR(sir); 00257 } 00258 00259 intr_kind wizchip_getinterrupt(void) 00260 { 00261 uint8_t ir = 0; 00262 uint8_t sir = 0; 00263 uint16_t ret = 0; 00264 00265 ir = getIR(); 00266 sir = getSIR(); 00267 00268 ret = sir; 00269 ret = (ret << 8) + ir; 00270 return (intr_kind)ret; 00271 } 00272 00273 void wizchip_setinterruptmask(intr_kind intr) 00274 { 00275 uint8_t imr = (uint8_t)intr; 00276 uint8_t simr = (uint8_t)((uint16_t)intr >> 8); 00277 00278 setIMR(imr); 00279 setSIMR(simr); 00280 } 00281 00282 intr_kind wizchip_getinterruptmask(void) 00283 { 00284 uint8_t imr = 0; 00285 uint8_t simr = 0; 00286 uint16_t ret = 0; 00287 00288 imr = getIMR(); 00289 simr = getSIMR(); 00290 00291 ret = simr; 00292 ret = (ret << 8) + imr; 00293 return (intr_kind)ret; 00294 } 00295 00296 int8_t wizphy_getphylink(void) 00297 { 00298 int8_t tmp; 00299 00300 if(getPHYCFGR() & PHYCFGR_LNK_ON) 00301 tmp = PHY_LINK_ON; 00302 else 00303 tmp = PHY_LINK_OFF; 00304 return tmp; 00305 } 00306 00307 00308 int8_t wizphy_getphypmode(void) 00309 { 00310 int8_t tmp = 0; 00311 00312 if(getPHYCFGR() & PHYCFGR_OPMDC_PDOWN) 00313 tmp = PHY_POWER_DOWN; 00314 else 00315 tmp = PHY_POWER_NORM; 00316 00317 return tmp; 00318 } 00319 00320 void wizphy_reset(void) 00321 { 00322 uint8_t tmp = getPHYCFGR(); 00323 00324 tmp &= PHYCFGR_RST; 00325 setPHYCFGR(tmp); 00326 tmp = getPHYCFGR(); 00327 tmp |= ~PHYCFGR_RST; 00328 setPHYCFGR(tmp); 00329 } 00330 00331 void wizphy_setphyconf(wiz_PhyConf* phyconf) 00332 { 00333 uint8_t tmp = 0; 00334 00335 if(phyconf->by == PHY_CONFBY_SW) 00336 tmp |= PHYCFGR_OPMD; 00337 else 00338 tmp &= ~PHYCFGR_OPMD; 00339 if(phyconf->mode == PHY_MODE_AUTONEGO) 00340 tmp |= PHYCFGR_OPMDC_ALLA; 00341 else 00342 { 00343 if(phyconf->duplex == PHY_DUPLEX_FULL) 00344 { 00345 if(phyconf->speed == PHY_SPEED_100) 00346 tmp |= PHYCFGR_OPMDC_100F; 00347 else 00348 tmp |= PHYCFGR_OPMDC_10F; 00349 } 00350 else 00351 { 00352 if(phyconf->speed == PHY_SPEED_100) 00353 tmp |= PHYCFGR_OPMDC_100H; 00354 else 00355 tmp |= PHYCFGR_OPMDC_10H; 00356 } 00357 } 00358 setPHYCFGR(tmp); 00359 wizphy_reset(); 00360 } 00361 00362 void wizphy_getphyconf(wiz_PhyConf* phyconf) 00363 { 00364 uint8_t tmp = 0; 00365 00366 tmp = getPHYCFGR(); 00367 phyconf->by = (tmp & PHYCFGR_OPMD) ? PHY_CONFBY_SW : PHY_CONFBY_HW; 00368 switch(tmp & PHYCFGR_OPMDC_ALLA) 00369 { 00370 case PHYCFGR_OPMDC_ALLA: 00371 case PHYCFGR_OPMDC_100FA: 00372 phyconf->mode = PHY_MODE_AUTONEGO; 00373 break; 00374 default: 00375 phyconf->mode = PHY_MODE_MANUAL; 00376 break; 00377 } 00378 switch(tmp & PHYCFGR_OPMDC_ALLA) 00379 { 00380 case PHYCFGR_OPMDC_100FA: 00381 case PHYCFGR_OPMDC_100F: 00382 case PHYCFGR_OPMDC_100H: 00383 phyconf->speed = PHY_SPEED_100; 00384 break; 00385 default: 00386 phyconf->speed = PHY_SPEED_10; 00387 break; 00388 } 00389 switch(tmp & PHYCFGR_OPMDC_ALLA) 00390 { 00391 case PHYCFGR_OPMDC_100FA: 00392 case PHYCFGR_OPMDC_100F: 00393 case PHYCFGR_OPMDC_10F: 00394 phyconf->duplex = PHY_DUPLEX_FULL; 00395 break; 00396 default: 00397 phyconf->duplex = PHY_DUPLEX_HALF; 00398 break; 00399 } 00400 } 00401 00402 void wizphy_getphystat(wiz_PhyConf* phyconf) 00403 { 00404 uint8_t tmp = getPHYCFGR(); 00405 00406 phyconf->duplex = (tmp & PHYCFGR_DPX_FULL) ? PHY_DUPLEX_FULL : PHY_DUPLEX_HALF; 00407 phyconf->speed = (tmp & PHYCFGR_SPD_100) ? PHY_SPEED_100 : PHY_SPEED_10; 00408 } 00409 00410 int8_t wizphy_setphypmode(uint8_t pmode) 00411 { 00412 uint8_t tmp = 0; 00413 00414 tmp = getPHYCFGR(); 00415 if((tmp & PHYCFGR_OPMD)== 0) return -1; 00416 tmp &= ~PHYCFGR_OPMDC_ALLA; 00417 if( pmode == PHY_POWER_DOWN) 00418 tmp |= PHYCFGR_OPMDC_PDOWN; 00419 else 00420 tmp |= PHYCFGR_OPMDC_ALLA; 00421 setPHYCFGR(tmp); 00422 wizphy_reset(); 00423 tmp = getPHYCFGR(); 00424 if( pmode == PHY_POWER_DOWN) 00425 { 00426 if(tmp & PHYCFGR_OPMDC_PDOWN) return 0; 00427 } 00428 else 00429 { 00430 if(tmp & PHYCFGR_OPMDC_ALLA) return 0; 00431 } 00432 return -1; 00433 } 00434 00435 00436 void wizchip_setnetinfo(wiz_NetInfo* pnetinfo) 00437 { 00438 setSHAR(pnetinfo->mac); 00439 setGAR(pnetinfo->gw); 00440 setSUBR(pnetinfo->sn); 00441 setSIPR(pnetinfo->ip); 00442 _DNS_[0] = pnetinfo->dns[0]; 00443 _DNS_[1] = pnetinfo->dns[1]; 00444 _DNS_[2] = pnetinfo->dns[2]; 00445 _DNS_[3] = pnetinfo->dns[3]; 00446 _DHCP_ = pnetinfo->dhcp; 00447 } 00448 00449 void wizchip_getnetinfo(wiz_NetInfo* pnetinfo) 00450 { 00451 getSHAR(pnetinfo->mac); 00452 getGAR(pnetinfo->gw); 00453 getSUBR(pnetinfo->sn); 00454 getSIPR(pnetinfo->ip); 00455 pnetinfo->dns[0]= _DNS_[0]; 00456 pnetinfo->dns[1]= _DNS_[1]; 00457 pnetinfo->dns[2]= _DNS_[2]; 00458 pnetinfo->dns[3]= _DNS_[3]; 00459 pnetinfo->dhcp = _DHCP_; 00460 } 00461 00462 int8_t wizchip_setnetmode(netmode_type netmode) 00463 { 00464 uint8_t tmp = 0; 00465 00466 if(netmode & ~(NM_WAKEONLAN | NM_PPPOE | NM_PINGBLOCK | NM_FORCEARP)) return -1; 00467 00468 tmp = getMR(); 00469 tmp |= (uint8_t)netmode; 00470 setMR(tmp); 00471 return 0; 00472 } 00473 00474 netmode_type wizchip_getnetmode(void) 00475 { 00476 return (netmode_type) getMR(); 00477 } 00478 00479 void wizchip_settimeout(wiz_NetTimeout* nettime) 00480 { 00481 setRCR(nettime->retry_cnt); 00482 setRTR(nettime->time_100us); 00483 } 00484 00485 void wizchip_gettimeout(wiz_NetTimeout* nettime) 00486 { 00487 nettime->retry_cnt = getRCR(); 00488 nettime->time_100us = getRTR(); 00489 }
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