w5500.h

00001 /* Wiznet W5500 Library
00002  * Copyright (c) 2013, WIZnet Co., LTD.
00003  *
00004  * Licensed under the Apache License, Version 2.0 (the "License");
00005  * you may not use this file except in compliance with the License.
00006  * You may obtain a copy of the License at
00007  *
00008  *     http://www.apache.org/licenses/LICENSE-2.0
00009  *
00010  * Unless required by applicable law or agreed to in writing, software
00011  * distributed under the License is distributed on an "AS IS" BASIS,
00012  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00013  * See the License for the specific language governing permissions and
00014  * limitations under the License.
00015  */
00016 
00017 
00018 #ifndef  _W5500_H_
00019 #define  _W5500_H_
00020 
00021 #include <stdint.h>
00022 #include "Ethernet/wizchip_conf.h"
00023 
00024 #define _W5500_SPI_READ_               (0x00 << 2) //< SPI interface Read operation in Control Phase
00025 #define _W5500_SPI_WRITE_              (0x01 << 2) //< SPI interface Write operation in Control Phase
00026 
00027 #define WIZCHIP_CREG_BLOCK          0x00    //< Common register block
00028 #define WIZCHIP_SREG_BLOCK(N)       (1+4*N) //< Socket N register block
00029 #define WIZCHIP_TXBUF_BLOCK(N)      (2+4*N) //< Socket N Tx buffer address block
00030 #define WIZCHIP_RXBUF_BLOCK(N)      (3+4*N) //< Socket N Rx buffer address block
00031 
00032 #define WIZCHIP_OFFSET_INC(ADDR, N)    (ADDR + (N<<8)) //< Increase offset address
00033 
00034 
00035 
00036 //////////////////////////////
00037 //--------------------------  defgroup ---------------------------------
00038 /**
00039  * @defgroup W5500 W5500
00040  *
00041  * @brief WHIZCHIP register defines and I/O functions of @b W5500.
00042  *
00043  * - @ref WIZCHIP_register : @ref Common_register_group and @ref Socket_register_group
00044  * - @ref WIZCHIP_IO_Functions : @ref Basic_IO_function, @ref Common_register_access_function and @ref Socket_register_access_function
00045  */
00046  
00047  
00048 /**
00049  * @defgroup WIZCHIP_register WIZCHIP register
00050  * @ingroup W5500
00051  *
00052  * @brief WHIZCHIP register defines register group of @b W5500.
00053  *
00054  * - @ref Common_register_group : Common register group
00055  * - @ref Socket_register_group : \c SOCKET n register group
00056  */
00057 
00058 
00059 /**
00060  * @defgroup WIZCHIP_IO_Functions WIZCHIP I/O functions
00061  * @ingroup W5500
00062  *
00063  * @brief This supports the basic I/O functions for @ref WIZCHIP_register.
00064  *
00065  * - <b> Basic I/O function </b> \n
00066  *   WIZCHIP_READ(), WIZCHIP_WRITE(), WIZCHIP_READ_BUF(), WIZCHIP_WRITE_BUF() \n\n
00067  *
00068  * - @ref Common_register_group <b>access functions</b> \n
00069  *  -# @b Mode \n
00070  *    getMR(), setMR()
00071  *  -# @b Interrupt \n
00072  *    getIR(), setIR(), getIMR(), setIMR(), getSIR(), setSIR(), getSIMR(), setSIMR(), getINTLEVEL(), setINTLEVEL()
00073  *  -# <b> Network Information </b> \n
00074  *    getSHAR(), setSHAR(), getGAR(), setGAR(), getSUBR(), setSUBR(), getSIPR(), setSIPR()
00075  *  -# @b Retransmission \n
00076  *    getRCR(), setRCR(), getRTR(), setRTR()
00077  *  -# @b PPPoE \n
00078  *    getPTIMER(), setPTIMER(), getPMAGIC(), getPMAGIC(), getPSID(), setPSID(), getPHAR(), setPHAR(), getPMRU(), setPMRU()
00079  *  -# <b> ICMP packet </b>\n
00080  *    getUIPR(), getUPORTR()
00081  *  -# @b etc. \n
00082  *    getPHYCFGR(), setPHYCFGR(), getVERSIONR() \n\n
00083  *
00084  * - \ref Socket_register_group <b>access functions</b> \n
00085  *   -# <b> SOCKET control</b> \n
00086  *      getSn_MR(), setSn_MR(), getSn_CR(), setSn_CR(), getSn_IMR(), setSn_IMR(), getSn_IR(), setSn_IR()
00087  *   -# <b> SOCKET information</b> \n
00088  *      getSn_SR(), getSn_DHAR(), setSn_DHAR(), getSn_PORT(), setSn_PORT(), getSn_DIPR(), setSn_DIPR(), getSn_DPORT(), setSn_DPORT()
00089  *      getSn_MSSR(), setSn_MSSR()
00090  *   -# <b> SOCKET communication </b> \n
00091  *      getSn_RXBUF_SIZE(), setSn_RXBUF_SIZE(), getSn_TXBUF_SIZE(), setSn_TXBUF_SIZE() \n
00092  *      getSn_TX_RD(), getSn_TX_WR(), setSn_TX_WR() \n
00093  *      getSn_RX_RD(), setSn_RX_RD(), getSn_RX_WR() \n
00094  *      getSn_TX_FSR(), getSn_RX_RSR(), getSn_KPALVTR(), setSn_KPALVTR()
00095  *   -# <b> IP header field </b> \n
00096  *      getSn_FRAG(), setSn_FRAG(),  getSn_TOS(), setSn_TOS() \n
00097  *      getSn_TTL(), setSn_TTL()
00098  */
00099 
00100 
00101 
00102 /**
00103  * @defgroup Common_register_group Common register
00104  * @ingroup WIZCHIP_register
00105  *
00106  * @brief Common register group\n
00107  * It set the basic for the networking\n
00108  * It set the configuration such as interrupt, network information, ICMP, etc.
00109  * @details
00110  * @sa MR : Mode register.
00111  * @sa GAR, SUBR, SHAR, SIPR
00112  * @sa INTLEVEL, IR, IMR, SIR, SIMR : Interrupt.
00113  * @sa RTR, RCR : Data retransmission.
00114  * @sa PTIMER, PMAGIC, PHAR, PSID, PMRU : PPPoE.
00115  * @sa UIPR, UPORTR : ICMP message.
00116  * @sa PHYCFGR, VERSIONR : etc.
00117  */
00118  
00119   
00120  
00121 /**
00122  * @defgroup Socket_register_group Socket register
00123  * @ingroup WIZCHIP_register
00124  *
00125  * @brief Socket register group.\n
00126  * Socket register configures and control SOCKETn which is necessary to data communication.
00127  * @details
00128  * @sa Sn_MR, Sn_CR, Sn_IR, Sn_IMR : SOCKETn Control
00129  * @sa Sn_SR, Sn_PORT, Sn_DHAR, Sn_DIPR, Sn_DPORT : SOCKETn Information
00130  * @sa Sn_MSSR, Sn_TOS, Sn_TTL, Sn_KPALVTR, Sn_FRAG : Internet protocol.
00131  * @sa Sn_RXBUF_SIZE, Sn_TXBUF_SIZE, Sn_TX_FSR, Sn_TX_RD, Sn_TX_WR, Sn_RX_RSR, Sn_RX_RD, Sn_RX_WR : Data communication
00132  */
00133  
00134  
00135  
00136  /**
00137  * @defgroup Basic_IO_function Basic I/O function
00138  * @ingroup WIZCHIP_IO_Functions
00139  * @brief These are basic input/output functions to read values from register or write values to register.
00140  */
00141 
00142 /**
00143  * @defgroup Common_register_access_function Common register access functions
00144  * @ingroup WIZCHIP_IO_Functions
00145  * @brief These are functions to access <b>common registers</b>.
00146  */
00147 
00148 /**
00149  * @defgroup Socket_register_access_function Socket register access functions
00150  * @ingroup WIZCHIP_IO_Functions
00151  * @brief These are functions to access <b>socket registers</b>.
00152  */
00153  
00154 //------------------------------- defgroup end --------------------------------------------
00155 //----------------------------- W5500 Common Registers IOMAP -----------------------------
00156 /**
00157  * @ingroup Common_register_group
00158  * @brief Mode Register address(R/W)\n
00159  * @ref MR is used for S/W reset, ping block mode, PPPoE mode and etc.
00160  * @details Each bit of @ref MR defined as follows.
00161  * <table>
00162  *      <tr>  <td>7</td> <td>6</td> <td>5</td> <td>4</td> <td>3</td> <td>2</td> <td>1</td> <td>0</td>   </tr>
00163  *      <tr>  <td>RST</td> <td>Reserved</td> <td>WOL</td> <td>PB</td> <td>PPPoE</td> <td>Reserved</td> <td>FARP</td> <td>Reserved</td> </tr>
00164  * </table>
00165  * - \ref MR_RST            : Reset
00166  * - \ref MR_WOL            : Wake on LAN
00167  * - \ref MR_PB             : Ping block
00168  * - \ref MR_PPPOE          : PPPoE mode
00169  * - \ref MR_FARP           : Force ARP mode
00170  */
00171 #define MR                 ( (0x0000 << 8) + (WIZCHIP_CREG_BLOCK << 3))
00172 
00173 /**
00174  * @ingroup Common_register_group
00175  * @brief Gateway IP Register address(R/W)
00176  * @details @ref GAR configures the default gateway address.
00177  */
00178 #define GAR                (  (0x0001 << 8) + (WIZCHIP_CREG_BLOCK << 3))
00179 
00180 /**
00181  * @ingroup Common_register_group
00182  * @brief Subnet mask Register address(R/W)
00183  * @details @ref SUBR configures the subnet mask address.
00184  */
00185 #define SUBR               (  (0x0005 << 8) + (WIZCHIP_CREG_BLOCK << 3))
00186 
00187 /**
00188  * @ingroup Common_register_group
00189  * @brief Source MAC Register address(R/W)
00190  * @details @ref SHAR configures the source hardware address.
00191  */
00192 #define SHAR               (  (0x0009 << 8) + (WIZCHIP_CREG_BLOCK << 3))
00193 
00194 /**
00195  * @ingroup Common_register_group
00196  * @brief Source IP Register address(R/W)
00197  * @details @ref SIPR configures the source IP address.
00198  */
00199 #define SIPR               (  (0x000F << 8) + (WIZCHIP_CREG_BLOCK << 3))
00200 
00201 /**
00202  * @ingroup Common_register_group
00203  * @brief Set Interrupt low level timer register address(R/W)
00204  * @details @ref INTLEVEL configures the Interrupt Assert Time.
00205  */
00206 #define INTLEVEL           (  (0x0013 << 8) + (WIZCHIP_CREG_BLOCK << 3))
00207 
00208 /**
00209  * @ingroup Common_register_group
00210  * @brief Interrupt Register(R/W)
00211  * @details @ref IR indicates the interrupt status. Each bit of @ref IR will be still until the bit will be written to by the host.
00212  * If @ref IR is not equal to x00 INTn PIN is asserted to low until it is x00\n\n
00213  * Each bit of @ref IR defined as follows.
00214  * <table>
00215  *      <tr>  <td>7</td> <td>6</td> <td>5</td> <td>4</td> <td>3</td> <td>2</td> <td>1</td> <td>0</td>   </tr>
00216  *      <tr>  <td>CONFLICT</td> <td>UNREACH</td> <td>PPPoE</td> <td>MP</td> <td>Reserved</td> <td>Reserved</td> <td>Reserved</td> <td>Reserved</td> </tr>
00217  * </table>
00218  * - \ref IR_CONFLICT : IP conflict
00219  * - \ref IR_UNREACH  : Destination unreachable
00220  * - \ref IR_PPPoE    : PPPoE connection close
00221  * - \ref IR_MP       : Magic packet
00222  */
00223 #define IR                 (  (0x0015 << 8) + (WIZCHIP_CREG_BLOCK << 3))
00224 
00225 /**
00226  * @ingroup Common_register_group
00227  * @brief Interrupt mask register(R/W)
00228  * @details @ref IMR is used to mask interrupts. Each bit of @ref IMR corresponds to each bit of @ref IR.
00229  * When a bit of @ref IMR is and the corresponding bit of @ref IR is  an interrupt will be issued. In other words,
00230  * if a bit of @ref IMR is  an interrupt will not be issued even if the corresponding bit of @ref IR is \n\n
00231  * Each bit of @ref IMR defined as the following.
00232  * <table>
00233  *      <tr>  <td>7</td> <td>6</td> <td>5</td> <td>4</td> <td>3</td> <td>2</td> <td>1</td> <td>0</td>   </tr>
00234  *      <tr>  <td>IM_IR7</td> <td>IM_IR6</td> <td>IM_IR5</td> <td>IM_IR4</td> <td>Reserved</td> <td>Reserved</td> <td>Reserved</td> <td>Reserved</td> </tr>
00235  * </table>
00236  * - \ref IM_IR7 : IP Conflict Interrupt Mask
00237  * - \ref IM_IR6 : Destination unreachable Interrupt Mask
00238  * - \ref IM_IR5 : PPPoE Close Interrupt Mask
00239  * - \ref IM_IR4 : Magic Packet Interrupt Mask
00240  */
00241 #define IMR                (  (0x0016 << 8) + (WIZCHIP_CREG_BLOCK << 3))
00242 
00243 /**
00244  * @ingroup Common_register_group
00245  * @brief Socket Interrupt Register(R/W)
00246  * @details @ref SIR indicates the interrupt status of Socket.\n
00247  * Each bit of @ref SIR be still until @ref Sn_IR is cleared by the host.\n
00248  * If @ref Sn_IR is not equal to x00 the n-th bit of @ref SIR is and INTn PIN is asserted until @ref SIR is x00 */
00249 #define SIR                (  (0x0017 << 8) + (WIZCHIP_CREG_BLOCK << 3))
00250 
00251 /**
00252  * @ingroup Common_register_group
00253  * @brief Socket Interrupt Mask Register(R/W)
00254  * @details Each bit of @ref SIMR corresponds to each bit of @ref SIR.
00255  * When a bit of @ref SIMR is and the corresponding bit of @ref SIR is  Interrupt will be issued.
00256  * In other words, if a bit of @ref SIMR is  an interrupt will be not issued even if the corresponding bit of @ref SIR is 
00257  */
00258 #define SIMR               (  (0x0018 << 8) + (WIZCHIP_CREG_BLOCK << 3))
00259 
00260 /**
00261  * @ingroup Common_register_group
00262  * @brief Timeout register address( 1 is 100us )(R/W)
00263  * @details @ref RTR configures the retransmission timeout period. The unit of timeout period is 100us and the default of @ref RTR is x07D0or 000
00264  * And so the default timeout period is 200ms(100us X 2000). During the time configured by @ref RTR, W5500 waits for the peer response
00265  * to the packet that is transmitted by \ref Sn_CR (CONNECT, DISCON, CLOSE, SEND, SEND_MAC, SEND_KEEP command).
00266  * If the peer does not respond within the @ref RTR time, W5500 retransmits the packet or issues timeout.
00267  */
00268 #define RTR                (  (0x0019 << 8) + (WIZCHIP_CREG_BLOCK << 3))
00269 
00270 /**
00271  * @ingroup Common_register_group
00272  * @brief Retry count register(R/W)
00273  * @details @ref RCR configures the number of time of retransmission.
00274  * When retransmission occurs as many as ref RCR+1 Timeout interrupt is issued (@ref Sn_IR[TIMEOUT] = .
00275  */
00276 #define RCR                (  (0x001B << 8) + (WIZCHIP_CREG_BLOCK << 3))
00277 
00278 /**
00279  * @ingroup Common_register_group
00280  * @brief PPP LCP Request Timer register  in PPPoE mode(R/W)
00281  * @details @ref PTIMER configures the time for sending LCP echo request. The unit of time is 25ms.
00282  */
00283 #define PTIMER             (  (0x001C << 8) + (WIZCHIP_CREG_BLOCK << 3))
00284 
00285 /**
00286  * @ingroup Common_register_group
00287  * @brief PPP LCP Magic number register  in PPPoE mode(R/W)
00288  * @details @ref PMAGIC configures the 4bytes magic number to be used in LCP negotiation.
00289  */
00290 #define PMAGIC             (  (0x001D << 8) + (WIZCHIP_CREG_BLOCK << 3))
00291 
00292 /**
00293  * @ingroup Common_register_group
00294  * @brief PPP Destination MAC Register address(R/W)
00295  * @details @ref PHAR configures the PPPoE server hardware address that is acquired during PPPoE connection process.
00296  */
00297 #define PHAR                (  (0x001E << 8) + (WIZCHIP_CREG_BLOCK << 3))
00298 
00299 /**
00300  * @ingroup Common_register_group
00301  * @brief PPP Session Identification Register(R/W)
00302  * @details @ref PSID configures the PPPoE sever session ID acquired during PPPoE connection process.
00303  */
00304 #define PSID               (  (0x0024 << 8) + (WIZCHIP_CREG_BLOCK << 3))
00305 
00306 /**
00307  * @ingroup Common_register_group
00308  * @brief PPP Maximum Segment Size(MSS) register(R/W)
00309  * @details @ref PMRU configures the maximum receive unit of PPPoE.
00310  */
00311 #define PMRU               (  (0x0026 << 8) + (WIZCHIP_CREG_BLOCK << 3))
00312 
00313 /**
00314  * @ingroup Common_register_group
00315  * @brief Unreachable IP register address in UDP mode(R)
00316  * @details W5500 receives an ICMP packet(Destination port unreachable) when data is sent to a port number
00317  * which socket is not open and @ref UNREACH bit of @ref IR becomes and @ref UIPR & @ref UPORTR indicates
00318  * the destination IP address & port number respectively.
00319  */
00320 #define UIPR               (  (0x0028 << 8) + (WIZCHIP_CREG_BLOCK << 3))
00321 
00322 /**
00323  * @ingroup Common_register_group
00324  * @brief Unreachable Port register address in UDP mode(R)
00325  * @details W5500 receives an ICMP packet(Destination port unreachable) when data is sent to a port number
00326  * which socket is not open and @ref UNREACH bit of @ref IR becomes and @ref UIPR & @ref UPORTR
00327  * indicates the destination IP address & port number respectively.
00328  */
00329 #define UPORTR              (  (0x002C << 8) + (WIZCHIP_CREG_BLOCK << 3))
00330 
00331 /**
00332  * @ingroup Common_register_group
00333  * @brief PHY Status Register(R/W)
00334  * @details @ref PHYCFGR configures PHY operation mode and resets PHY. In addition, @ref PHYCFGR indicates the status of PHY such as duplex, Speed, Link.
00335  */
00336 #define PHYCFGR            (  (0x002E << 8) + (WIZCHIP_CREG_BLOCK << 3))
00337 
00338 // Reserved                  (  (0x002F << 8) + (WIZCHIP_CREG_BLOCK << 3))
00339 // Reserved                  (  (0x0030 << 8) + (WIZCHIP_CREG_BLOCK << 3))
00340 // Reserved                  (  (0x0031 << 8) + (WIZCHIP_CREG_BLOCK << 3))
00341 // Reserved                  (  (0x0032 << 8) + (WIZCHIP_CREG_BLOCK << 3))
00342 // Reserved                  (  (0x0033 << 8) + (WIZCHIP_CREG_BLOCK << 3))
00343 // Reserved                  (  (0x0034 << 8) + (WIZCHIP_CREG_BLOCK << 3))
00344 // Reserved                  (  (0x0035 << 8) + (WIZCHIP_CREG_BLOCK << 3))
00345 // Reserved                  (  (0x0036 << 8) + (WIZCHIP_CREG_BLOCK << 3))
00346 // Reserved                  (  (0x0037 << 8) + (WIZCHIP_CREG_BLOCK << 3))
00347 // Reserved                  (  (0x0038 << 8) + (WIZCHIP_CREG_BLOCK << 3))
00348 
00349 /**
00350  * @ingroup Common_register_group
00351  * @brief chip version register address(R)
00352  * @details @ref VERSIONR always indicates the W5500 version as @b 0x04.
00353  */
00354 #define VERSIONR           (  (0x0039 << 8) + (WIZCHIP_CREG_BLOCK << 3))
00355 
00356 
00357 //----------------------------- W5500 Socket Registers IOMAP -----------------------------
00358 /**
00359  * @ingroup Socket_register_group
00360  * @brief socket Mode register(R/W)
00361  * @details @ref Sn_MR configures the option or protocol type of Socket n.\n\n
00362  * Each bit of @ref Sn_MR defined as the following.
00363  * <table>
00364  *      <tr>  <td>7</td> <td>6</td> <td>5</td> <td>4</td> <td>3</td> <td>2</td> <td>1</td> <td>0</td>   </tr>
00365  *      <tr>  <td>MULTI/MFEN</td> <td>BCASTB</td> <td>ND/MC/MMB</td> <td>UCASTB/MIP6B</td> <td>Protocol[3]</td> <td>Protocol[2]</td> <td>Protocol[1]</td> <td>Protocol[0]</td> </tr>
00366  * </table>
00367  * - @ref Sn_MR_MULTI   : Support UDP Multicasting
00368  * - @ref Sn_MR_BCASTB  : Broadcast block <b>in UDP Multicasting</b>
00369  * - @ref Sn_MR_ND      : No Delayed Ack(TCP) flag
00370  * - @ref Sn_MR_MC      : IGMP version used <b>in UDP mulitcasting</b>
00371  * - @ref Sn_MR_MMB     : Multicast Blocking <b>in @ref Sn_MR_MACRAW mode</b>
00372  * - @ref Sn_MR_UCASTB  : Unicast Block <b>in UDP Multicating</b>
00373  * - @ref Sn_MR_MIP6B   : IPv6 packet Blocking <b>in @ref Sn_MR_MACRAW mode</b>
00374  * - <b>Protocol</b>
00375  * <table>
00376  *      <tr>   <td><b>Protocol[3]</b></td> <td><b>Protocol[2]</b></td> <td><b>Protocol[1]</b></td> <td><b>Protocol[0]</b></td> <td>@b Meaning</td>   </tr>
00377  *      <tr>   <td>0</td> <td>0</td> <td>0</td> <td>0</td> <td>Closed</td>   </tr>
00378  *      <tr>   <td>0</td> <td>0</td> <td>0</td> <td>1</td> <td>TCP</td>   </tr>
00379  *      <tr>   <td>0</td> <td>0</td> <td>1</td> <td>0</td> <td>UDP</td>   </tr>
00380  *      <tr>   <td>0</td> <td>1</td> <td>0</td> <td>0</td> <td>MACRAW</td>   </tr>
00381  * </table>
00382  *  - @ref Sn_MR_MACRAW : MAC LAYER RAW SOCK \n
00383  *  - @ref Sn_MR_UDP        : UDP
00384  *  - @ref Sn_MR_TCP        : TCP
00385  *  - @ref Sn_MR_CLOSE  : Unused socket
00386  *  @note MACRAW mode should be only used in Socket 0.
00387  */
00388 #define Sn_MR(N)           (  (0x0000 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
00389 
00390 /**
00391  * @ingroup Socket_register_group
00392  * @brief Socket command register(R/W)
00393  * @details This is used to set the command for Socket n such as OPEN, CLOSE, CONNECT, LISTEN, SEND, and RECEIVE.\n
00394  * After W5500 accepts the command, the @ref Sn_CR register is automatically cleared to 0x00.
00395  * Even though @ref Sn_CR is cleared to 0x00, the command is still being processed.\n
00396  * To check whether the command is completed or not, please check the @ref Sn_IR or @ref Sn_SR.
00397  * - @ref Sn_CR_OPEN        : Initialize or open socket.
00398  * - @ref Sn_CR_LISTEN      : Wait connection request in TCP mode(<b>Server mode</b>)
00399  * - @ref Sn_CR_CONNECT     : Send connection request in TCP mode(<b>Client mode</b>)
00400  * - @ref Sn_CR_DISCON      : Send closing request in TCP mode.
00401  * - @ref Sn_CR_CLOSE       : Close socket.
00402  * - @ref Sn_CR_SEND        : Update TX buffer pointer and send data.
00403  * - @ref Sn_CR_SEND_MAC    : Send data with MAC address, so without ARP process.
00404  * - @ref Sn_CR_SEND_KEEP   : Send keep alive message.
00405  * - @ref Sn_CR_RECV        : Update RX buffer pointer and receive data.
00406  */
00407 #define Sn_CR(N)           (  (0x0001 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
00408 
00409 /**
00410  * @ingroup Socket_register_group
00411  * @brief Socket interrupt register(R)
00412  * @details @ref Sn_IR indicates the status of Socket Interrupt such as establishment, termination, receiving data, timeout).\n
00413  * When an interrupt occurs and the corresponding bit of @ref Sn_IMR is  the corresponding bit of @ref Sn_IR becomes \n
00414  * In order to clear the @ref Sn_IR bit, the host should write the bit to \n
00415  * <table>
00416  *      <tr>  <td>7</td> <td>6</td> <td>5</td> <td>4</td> <td>3</td> <td>2</td> <td>1</td> <td>0</td>   </tr>
00417  *      <tr>  <td>Reserved</td> <td>Reserved</td> <td>Reserved</td> <td>SEND_OK</td> <td>TIMEOUT</td> <td>RECV</td> <td>DISCON</td> <td>CON</td> </tr>
00418  * </table>
00419  * - \ref Sn_IR_SENDOK : <b>SEND_OK Interrupt</b>
00420  * - \ref Sn_IR_TIMEOUT : <b>TIMEOUT Interrupt</b>
00421  * - \ref Sn_IR_RECV : <b>RECV Interrupt</b>
00422  * - \ref Sn_IR_DISCON : <b>DISCON Interrupt</b>
00423  * - \ref Sn_IR_CON : <b>CON Interrupt</b>
00424  */
00425 #define Sn_IR(N)           (  (0x0002 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
00426 
00427 /**
00428  * @ingroup Socket_register_group
00429  * @brief Socket status register(R)
00430  * @details @ref Sn_SR indicates the status of Socket n.\n
00431  * The status of Socket n is changed by @ref Sn_CR or some special control packet as SYN, FIN packet in TCP.
00432  * @par Normal status
00433  * - @ref SOCK_CLOSED       : Closed
00434  * - @ref SOCK_INIT         : Initiate state
00435  * - @ref SOCK_LISTEN       : Listen state
00436  * - @ref SOCK_ESTABLISHED  : Success to connect
00437  * - @ref SOCK_CLOSE_WAIT   : Closing state
00438  * - @ref SOCK_UDP          : UDP socket
00439  * - @ref SOCK_MACRAW       : MAC raw mode socket
00440  *@par Temporary status during changing the status of Socket n.
00441  * - @ref SOCK_SYNSENT      : This indicates Socket n sent the connect-request packet (SYN packet) to a peer.
00442  * - @ref SOCK_SYNRECV      : It indicates Socket n successfully received the connect-request packet (SYN packet) from a peer.
00443  * - @ref SOCK_FIN_WAIT     : Connection state
00444  * - @ref SOCK_CLOSING      : Closing state
00445  * - @ref SOCK_TIME_WAIT    : Closing state
00446  * - @ref SOCK_LAST_ACK     : Closing state
00447  */
00448 #define Sn_SR(N)           (  (0x0003 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
00449 
00450 /**
00451  * @ingroup Socket_register_group
00452  * @brief source port register(R/W)
00453  * @details @ref Sn_PORT configures the source port number of Socket n.
00454  * It is valid when Socket n is used in TCP/UPD mode. It should be set before OPEN command is ordered.
00455  */
00456 #define Sn_PORT(N)         (  (0x0004 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
00457 
00458 /**
00459  * @ingroup Socket_register_group
00460  * @brief Peer MAC register address(R/W)
00461  * @details @ref Sn_DHAR configures the destination hardware address of Socket n when using SEND_MAC command in UDP mode or
00462  * it indicates that it is acquired in ARP-process by CONNECT/SEND command.
00463  */
00464 #define Sn_DHAR(N)         (  (0x0006 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
00465 
00466 /**
00467  * @ingroup Socket_register_group
00468  * @brief Peer IP register address(R/W)
00469  * @details @ref Sn_DIPR configures or indicates the destination IP address of Socket n. It is valid when Socket n is used in TCP/UDP mode.
00470  * In TCP client mode, it configures an IP address of �TCP serverbefore CONNECT command.
00471  * In TCP server mode, it indicates an IP address of �TCP clientafter successfully establishing connection.
00472  * In UDP mode, it configures an IP address of peer to be received the UDP packet by SEND or SEND_MAC command.
00473  */
00474 #define Sn_DIPR(N)         (  (0x000C << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
00475 
00476 /**
00477  * @ingroup Socket_register_group
00478  * @brief Peer port register address(R/W)
00479  * @details @ref Sn_DPORT configures or indicates the destination port number of Socket n. It is valid when Socket n is used in TCP/UDP mode.
00480  * In �TCP clientmode, it configures the listen port number of �TCP serverbefore CONNECT command.
00481  * In �TCP Servermode, it indicates the port number of TCP client after successfully establishing connection.
00482  * In UDP mode, it configures the port number of peer to be transmitted the UDP packet by SEND/SEND_MAC command.
00483  */
00484 #define Sn_DPORT(N)        (  (0x0010 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
00485 
00486 /**
00487  * @ingroup Socket_register_group
00488  * @brief Maximum Segment Size(Sn_MSSR0) register address(R/W)
00489  * @details @ref Sn_MSSR configures or indicates the MTU(Maximum Transfer Unit) of Socket n.
00490  */
00491 #define Sn_MSSR(N)         (  (0x0012 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
00492 
00493 // Reserved                  (  (0x0014 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
00494 
00495 /**
00496  * @ingroup Socket_register_group
00497  * @brief IP Type of Service(TOS) Register(R/W)
00498  * @details @ref Sn_TOS configures the TOS(Type Of Service field in IP Header) of Socket n.
00499  * It is set before OPEN command.
00500  */
00501 #define Sn_TOS(N)          (  (0x0015 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
00502 /**
00503  * @ingroup Socket_register_group
00504  * @brief IP Time to live(TTL) Register(R/W)
00505  * @details @ref Sn_TTL configures the TTL(Time To Live field in IP header) of Socket n.
00506  * It is set before OPEN command.
00507  */
00508 #define Sn_TTL(N)          (  (0x0016 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
00509 // Reserved                  (  (0x0017 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
00510 // Reserved                  (  (0x0018 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) 
00511 // Reserved                  (  (0x0019 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
00512 // Reserved                  (  (0x001A << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
00513 // Reserved                  (  (0x001B << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
00514 // Reserved                  (  (0x001C << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
00515 // Reserved                  (  (0x001D << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
00516 
00517 /**
00518  * @ingroup Socket_register_group
00519  * @brief Receive memory size register(R/W)
00520  * @details @ref Sn_RXBUF_SIZE configures the RX buffer block size of Socket n.
00521  * Socket n RX Buffer Block size can be configured with 1,2,4,8, and 16 Kbytes.
00522  * If a different size is configured, the data cannot be normally received from a peer.
00523  * Although Socket n RX Buffer Block size is initially configured to 2Kbytes,
00524  * user can re-configure its size using @ref Sn_RXBUF_SIZE. The total sum of @ref Sn_RXBUF_SIZE can not be exceed 16Kbytes.
00525  * When exceeded, the data reception error is occurred.
00526  */
00527 #define Sn_RXBUF_SIZE(N)   (  (0x001E << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
00528 
00529 /**
00530  * @ingroup Socket_register_group
00531  * @brief Transmit memory size register(R/W)
00532  * @details @ref Sn_TXBUF_SIZE configures the TX buffer block size of Socket n. Socket n TX Buffer Block size can be configured with 1,2,4,8, and 16 Kbytes.
00533  * If a different size is configured, the data can�t be normally transmitted to a peer.
00534  * Although Socket n TX Buffer Block size is initially configured to 2Kbytes,
00535  * user can be re-configure its size using @ref Sn_TXBUF_SIZE. The total sum of @ref Sn_TXBUF_SIZE can not be exceed 16Kbytes.
00536  * When exceeded, the data transmission error is occurred.
00537  */
00538 #define Sn_TXBUF_SIZE(N)   (  (0x001F << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
00539 
00540 /**
00541  * @ingroup Socket_register_group
00542  * @brief Transmit free memory size register(R)
00543  * @details @ref Sn_TX_FSR indicates the free size of Socket n TX Buffer Block. It is initialized to the configured size by @ref Sn_TXBUF_SIZE.
00544  * Data bigger than @ref Sn_TX_FSR should not be saved in the Socket n TX Buffer because the bigger data overwrites the previous saved data not yet sent.
00545  * Therefore, check before saving the data to the Socket n TX Buffer, and if data is equal or smaller than its checked size,
00546  * transmit the data with SEND/SEND_MAC command after saving the data in Socket n TX buffer. But, if data is bigger than its checked size,
00547  * transmit the data after dividing into the checked size and saving in the Socket n TX buffer.
00548  */
00549 #define Sn_TX_FSR(N)       (  (0x0020 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
00550 
00551 /**
00552  * @ingroup Socket_register_group
00553  * @brief Transmit memory read pointer register address(R)
00554  * @details @ref Sn_TX_RD is initialized by OPEN command. However, if Sn_MR(P[3:0]) is TCP mode(001, it is re-initialized while connecting with TCP.
00555  * After its initialization, it is auto-increased by SEND command.
00556  * SEND command transmits the saved data from the current @ref Sn_TX_RD to the @ref Sn_TX_WR in the Socket n TX Buffer.
00557  * After transmitting the saved data, the SEND command increases the @ref Sn_TX_RD as same as the @ref Sn_TX_WR.
00558  * If its increment value exceeds the maximum value 0xFFFF, (greater than 0x10000 and the carry bit occurs),
00559  * then the carry bit is ignored and will automatically update with the lower 16bits value.
00560  */
00561 #define Sn_TX_RD(N)        (  (0x0022 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
00562 
00563 /**
00564  * @ingroup Socket_register_group
00565  * @brief Transmit memory write pointer register address(R/W)
00566  * @details @ref Sn_TX_WR is initialized by OPEN command. However, if Sn_MR(P[3:0]) is TCP mode(001, it is re-initialized while connecting with TCP.\n
00567  * It should be read or be updated like as follows.\n
00568  * 1. Read the starting address for saving the transmitting data.\n
00569  * 2. Save the transmitting data from the starting address of Socket n TX buffer.\n
00570  * 3. After saving the transmitting data, update @ref Sn_TX_WR to the increased value as many as transmitting data size.
00571  * If the increment value exceeds the maximum value 0xFFFF(greater than 0x10000 and the carry bit occurs),
00572  * then the carry bit is ignored and will automatically update with the lower 16bits value.\n
00573  * 4. Transmit the saved data in Socket n TX Buffer by using SEND/SEND command
00574  */
00575 #define Sn_TX_WR(N)        (  (0x0024 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
00576 
00577 /**
00578  * @ingroup Socket_register_group
00579  * @brief Received data size register(R)
00580  * @details @ref Sn_RX_RSR indicates the data size received and saved in Socket n RX Buffer.
00581  * @ref Sn_RX_RSR does not exceed the @ref Sn_RXBUF_SIZE and is calculated as the difference between
00582  * �Socket n RX Write Pointer (@ref Sn_RX_WR)and �Socket n RX Read Pointer (@ref Sn_RX_RD)
00583  */
00584 #define Sn_RX_RSR(N)       (  (0x0026 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
00585 
00586 /**
00587  * @ingroup Socket_register_group
00588  * @brief Read point of Receive memory(R/W)
00589  * @details @ref Sn_RX_RD is initialized by OPEN command. Make sure to be read or updated as follows.\n
00590  * 1. Read the starting save address of the received data.\n
00591  * 2. Read data from the starting address of Socket n RX Buffer.\n
00592  * 3. After reading the received data, Update @ref Sn_RX_RD to the increased value as many as the reading size.
00593  * If the increment value exceeds the maximum value 0xFFFF, that is, is greater than 0x10000 and the carry bit occurs,
00594  * update with the lower 16bits value ignored the carry bit.\n
00595  * 4. Order RECV command is for notifying the updated @ref Sn_RX_RD to W5500.
00596  */
00597 #define Sn_RX_RD(N)        (  (0x0028 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
00598 
00599 /**
00600  * @ingroup Socket_register_group
00601  * @brief Write point of Receive memory(R)
00602  * @details @ref Sn_RX_WR is initialized by OPEN command and it is auto-increased by the data reception.
00603  * If the increased value exceeds the maximum value 0xFFFF, (greater than 0x10000 and the carry bit occurs),
00604  * then the carry bit is ignored and will automatically update with the lower 16bits value.
00605  */
00606 #define Sn_RX_WR(N)        (  (0x002A << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
00607 
00608 /**
00609  * @ingroup Socket_register_group
00610  * @brief socket interrupt mask register(R)
00611  * @details @ref Sn_IMR masks the interrupt of Socket n.
00612  * Each bit corresponds to each bit of @ref Sn_IR. When a Socket n Interrupt is occurred and the corresponding bit of @ref Sn_IMR is 
00613  * the corresponding bit of @ref Sn_IR becomes  When both the corresponding bit of @ref Sn_IMR and @ref Sn_IR are and the n-th bit of @ref IR is 
00614  * Host is interrupted by asserted INTn PIN to low.
00615  */
00616 #define Sn_IMR(N)          (  (0x002C << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
00617 
00618 /**
00619  * @ingroup Socket_register_group
00620  * @brief Fragment field value in IP header register(R/W)
00621  * @details @ref Sn_FRAG configures the FRAG(Fragment field in IP header).
00622  */
00623 #define Sn_FRAG(N)         (  (0x002D << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
00624 
00625 /**
00626  * @ingroup Socket_register_group
00627  * @brief Keep Alive Timer register(R/W)
00628  * @details @ref Sn_KPALVTR configures the transmitting timer of �KEEP ALIVE(KA)packet of SOCKETn. It is valid only in TCP mode,
00629  * and ignored in other modes. The time unit is 5s.
00630  * KA packet is transmittable after @ref Sn_SR is changed to SOCK_ESTABLISHED and after the data is transmitted or received to/from a peer at least once.
00631  * In case of '@ref Sn_KPALVTR > 0', W5500 automatically transmits KA packet after time-period for checking the TCP connection (Auto-keepalive-process).
00632  * In case of '@ref Sn_KPALVTR = 0', Auto-keep-alive-process will not operate,
00633  * and KA packet can be transmitted by SEND_KEEP command by the host (Manual-keep-alive-process).
00634  * Manual-keep-alive-process is ignored in case of '@ref Sn_KPALVTR > 0'.
00635  */
00636 #define Sn_KPALVTR(N)      (  (0x002F << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
00637 
00638 //#define Sn_TSR(N)          (  (0x0030 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))
00639 
00640 
00641 //----------------------------- W5500 Register values  -----------------------------
00642 
00643 /* MODE register values */
00644 /**
00645  * @brief Reset
00646  * @details If this bit is  All internal registers will be initialized. It will be automatically cleared as after S/W reset.
00647  */
00648 #define MR_RST                       0x80
00649 
00650 /**
00651  * @brief Wake on LAN
00652  * @details 0 : Disable WOL mode\n
00653  * 1 : Enable WOL mode\n
00654  * If WOL mode is enabled and the received magic packet over UDP has been normally processed, the Interrupt PIN (INTn) asserts to low.
00655  * When using WOL mode, the UDP Socket should be opened with any source port number. (Refer to Socket n Mode Register (@ref Sn_MR) for opening Socket.)
00656  * @note The magic packet over UDP supported by W5500 consists of 6 bytes synchronization stream (xFFFFFFFFFFFF and
00657  * 16 times Target MAC address stream in UDP payload. The options such like password are ignored. You can use any UDP source port number for WOL mode.
00658  */
00659 #define MR_WOL                       0x20
00660 
00661 /**
00662  * @brief Ping block
00663  * @details 0 : Disable Ping block\n
00664  * 1 : Enable Ping block\n
00665  * If the bit is  it blocks the response to a ping request.
00666  */
00667 #define MR_PB                        0x10
00668 
00669 /**
00670  * @brief Enable PPPoE
00671  * @details 0 : DisablePPPoE mode\n
00672  * 1 : EnablePPPoE mode\n
00673  * If you use ADSL, this bit should be 
00674  */
00675 #define MR_PPPOE                     0x08
00676 
00677 /**
00678  * @brief Enable UDP_FORCE_ARP CHECHK
00679  * @details 0 : Disable Force ARP mode\n
00680  * 1 : Enable Force ARP mode\n
00681  * In Force ARP mode, It forces on sending ARP Request whenever data is sent.
00682  */
00683 #define MR_FARP                      0x02
00684 
00685 /* IR register values */
00686 /**
00687  * @brief Check IP conflict.
00688  * @details Bit is set as when own source IP address is same with the sender IP address in the received ARP request.
00689  */
00690 #define IR_CONFLICT                  0x80
00691 
00692 /**
00693  * @brief Get the destination unreachable message in UDP sending.
00694  * @details When receiving the ICMP (Destination port unreachable) packet, this bit is set as 
00695  * When this bit is  Destination Information such as IP address and Port number may be checked with the corresponding @ref UIPR & @ref UPORTR.
00696  */
00697 #define IR_UNREACH                   0x40
00698 
00699 /**
00700  * @brief Get the PPPoE close message.
00701  * @details When PPPoE is disconnected during PPPoE mode, this bit is set.
00702  */
00703 #define IR_PPPoE                     0x20
00704 
00705 /**
00706  * @brief Get the magic packet interrupt.
00707  * @details When WOL mode is enabled and receives the magic packet over UDP, this bit is set.
00708  */
00709 #define IR_MP                        0x10
00710 
00711 
00712 /* PHYCFGR register value */
00713 #define PHYCFGR_RST                  ~(1<<7)  //< For PHY reset, must operate AND mask.
00714 #define PHYCFGR_OPMD                 (1<<6)   // Configre PHY with OPMDC value
00715 #define PHYCFGR_OPMDC_ALLA           (7<<3)
00716 #define PHYCFGR_OPMDC_PDOWN          (6<<3)
00717 #define PHYCFGR_OPMDC_NA             (5<<3)
00718 #define PHYCFGR_OPMDC_100FA          (4<<3)
00719 #define PHYCFGR_OPMDC_100F           (3<<3)
00720 #define PHYCFGR_OPMDC_100H           (2<<3)
00721 #define PHYCFGR_OPMDC_10F            (1<<3)
00722 #define PHYCFGR_OPMDC_10H            (0<<3)           
00723 #define PHYCFGR_DPX_FULL             (1<<2)
00724 #define PHYCFGR_DPX_HALF             (0<<2)
00725 #define PHYCFGR_SPD_100              (1<<1)
00726 #define PHYCFGR_SPD_10               (0<<1)
00727 #define PHYCFGR_LNK_ON               (1<<0)
00728 #define PHYCFGR_LNK_OFF              (0<<0)
00729 
00730 /* IMR register values */
00731 /**
00732  * @brief IP Conflict Interrupt Mask.
00733  * @details 0: Disable IP Conflict Interrupt\n
00734  * 1: Enable IP Conflict Interrupt
00735  */
00736 #define IM_IR7                       0x80
00737 
00738 /**
00739  * @brief Destination unreachable Interrupt Mask.
00740  * @details 0: Disable Destination unreachable Interrupt\n
00741  * 1: Enable Destination unreachable Interrupt
00742  */
00743 #define IM_IR6                       0x40
00744 
00745 /**
00746  * @brief PPPoE Close Interrupt Mask.
00747  * @details 0: Disable PPPoE Close Interrupt\n
00748  * 1: Enable PPPoE Close Interrupt
00749  */
00750 #define IM_IR5                       0x20
00751 
00752 /**
00753  * @brief Magic Packet Interrupt Mask.
00754  * @details 0: Disable Magic Packet Interrupt\n
00755  * 1: Enable Magic Packet Interrupt
00756  */
00757 #define IM_IR4                       0x10
00758 
00759 /* Sn_MR Default values */
00760 /**
00761  * @brief Support UDP Multicasting
00762  * @details 0 : disable Multicasting\n
00763  * 1 : enable Multicasting\n
00764  * This bit is applied only during UDP mode(P[3:0] = 010.\n
00765  * To use multicasting, @ref Sn_DIPR & @ref Sn_DPORT should be respectively configured with the multicast group IP address & port number
00766  * before Socket n is opened by OPEN command of @ref Sn_CR.
00767  */
00768 #define Sn_MR_MULTI                  0x80
00769 
00770 /**
00771  * @brief Broadcast block in UDP Multicasting.
00772  * @details 0 : disable Broadcast Blocking\n
00773  * 1 : enable Broadcast Blocking\n
00774  * This bit blocks to receive broadcasting packet during UDP mode(P[3:0] = 010.\m
00775  * In addition, This bit does when MACRAW mode(P[3:0] = 100
00776  */
00777 #define Sn_MR_BCASTB                 0x40
00778 
00779 /**
00780  * @brief No Delayed Ack(TCP), Multicast flag
00781  * @details 0 : Disable No Delayed ACK option\n
00782  * 1 : Enable No Delayed ACK option\n
00783  * This bit is applied only during TCP mode (P[3:0] = 001.\n
00784  * When this bit is  It sends the ACK packet without delay as soon as a Data packet is received from a peer.\n
00785  * When this bit is  It sends the ACK packet after waiting for the timeout time configured by @ref RTR.
00786  */
00787 #define Sn_MR_ND                     0x20
00788 
00789 /**
00790  * @brief Unicast Block in UDP Multicasting
00791  * @details 0 : disable Unicast Blocking\n
00792  * 1 : enable Unicast Blocking\n
00793  * This bit blocks receiving the unicast packet during UDP mode(P[3:0] = 010 and MULTI = 
00794  */
00795 #define Sn_MR_UCASTB                 0x10
00796 
00797 /**
00798  * @brief MAC LAYER RAW SOCK
00799  * @details This configures the protocol mode of Socket n.
00800  * @note MACRAW mode should be only used in Socket 0.
00801  */
00802 #define Sn_MR_MACRAW                 0x04
00803 
00804 //#define Sn_MR_IPRAW                  0x03     /**< IP LAYER RAW SOCK */
00805 
00806 /**
00807  * @brief UDP
00808  * @details This configures the protocol mode of Socket n.
00809  */
00810 #define Sn_MR_UDP                    0x02
00811 
00812 /**
00813  * @brief TCP
00814  * @details This configures the protocol mode of Socket n.
00815  */
00816 #define Sn_MR_TCP                    0x01
00817 
00818 /**
00819  * @brief Unused socket
00820  * @details This configures the protocol mode of Socket n.
00821  */
00822 #define Sn_MR_CLOSE                  0x00
00823 
00824 /* Sn_MR values used with Sn_MR_MACRAW */
00825 /**
00826  * @brief MAC filter enable in @ref Sn_MR_MACRAW mode
00827  * @details 0 : disable MAC Filtering\n
00828  * 1 : enable MAC Filtering\n
00829  * This bit is applied only during MACRAW mode(P[3:0] = 100.\n
00830  * When set as  W5500 can only receive broadcasting packet or packet sent to itself.
00831  * When this bit is  W5500 can receive all packets on Ethernet.
00832  * If user wants to implement Hybrid TCP/IP stack,
00833  * it is recommended that this bit is set as for reducing host overhead to process the all received packets.
00834  */
00835 #define Sn_MR_MFEN                   Sn_MR_MULTI
00836 
00837 /**
00838  * @brief Multicast Blocking in @ref Sn_MR_MACRAW mode
00839  * @details 0 : using IGMP version 2\n
00840  * 1 : using IGMP version 1\n
00841  * This bit is applied only during UDP mode(P[3:0] = 010 and MULTI = 
00842  * It configures the version for IGMP messages (Join/Leave/Report).
00843  */
00844 #define Sn_MR_MMB                    Sn_MR_ND
00845 
00846 /**
00847  * @brief IPv6 packet Blocking in @ref Sn_MR_MACRAW mode
00848  * @details 0 : disable IPv6 Blocking\n
00849  * 1 : enable IPv6 Blocking\n
00850  * This bit is applied only during MACRAW mode (P[3:0] = 100. It blocks to receiving the IPv6 packet.
00851  */
00852 #define Sn_MR_MIP6B                  Sn_MR_UCASTB
00853 
00854 /* Sn_MR value used with Sn_MR_UDP & Sn_MR_MULTI */
00855 /**
00856  * @brief IGMP version used in UDP mulitcasting
00857  * @details 0 : disable Multicast Blocking\n
00858  * 1 : enable Multicast Blocking\n
00859  * This bit is applied only when MACRAW mode(P[3:0] = 100. It blocks to receive the packet with multicast MAC address.
00860  */
00861 #define Sn_MR_MC                     Sn_MR_ND
00862 
00863 /* Sn_MR alternate values */
00864 /**
00865  * @brief For Berkeley Socket API
00866  */
00867 #define SOCK_STREAM                  Sn_MR_TCP
00868 
00869 /**
00870  * @brief For Berkeley Socket API
00871  */
00872 #define SOCK_DGRAM                   Sn_MR_UDP
00873 
00874 
00875 /* Sn_CR values */
00876 /**
00877  * @brief Initialize or open socket
00878  * @details Socket n is initialized and opened according to the protocol selected in Sn_MR(P3:P0).
00879  * The table below shows the value of @ref Sn_SR corresponding to @ref Sn_MR.\n
00880  * <table>
00881  *   <tr>  <td>\b Sn_MR (P[3:0])</td> <td>\b Sn_SR</td>                  </tr>
00882  *   <tr>  <td>Sn_MR_CLOSE  (000</td> <td></td>                      </tr>
00883  *   <tr>  <td>Sn_MR_TCP  (001</td> <td>SOCK_INIT (0x13)</td>        </tr>
00884  *   <tr>  <td>Sn_MR_UDP  (010</td>  <td>SOCK_UDP (0x22)</td>        </tr>
00885  *   <tr>  <td>S0_MR_MACRAW  (100</td>  <td>SOCK_MACRAW (0x02)</td>  </tr>
00886  * </table>
00887  */
00888 #define Sn_CR_OPEN                   0x01
00889 
00890 /**
00891  * @brief Wait connection request in TCP mode(Server mode)
00892  * @details This is valid only in TCP mode (Sn_MR(P3:P0) = Sn_MR_TCP).
00893  * In this mode, Socket n operates as a �TCP serverand waits for  connection-request (SYN packet) from any �TCP client
00894  * The @ref Sn_SR changes the state from SOCK_INIT to SOCKET_LISTEN.
00895  * When a �TCP clientconnection request is successfully established,
00896  * the @ref Sn_SR changes from SOCK_LISTEN to SOCK_ESTABLISHED and the Sn_IR(0) becomes 
00897  * But when a �TCP clientconnection request is failed, Sn_IR(3) becomes and the status of @ref Sn_SR changes to SOCK_CLOSED.
00898  */
00899 #define Sn_CR_LISTEN                 0x02
00900 
00901 /**
00902  * @brief Send connection request in TCP mode(Client mode)
00903  * @details  To connect, a connect-request (SYN packet) is sent to b>TCP server</b>configured by @ref Sn_DIPR & Sn_DPORT(destination address & port).
00904  * If the connect-request is successful, the @ref Sn_SR is changed to @ref SOCK_ESTABLISHED and the Sn_IR(0) becomes \n\n
00905  * The connect-request fails in the following three cases.\n
00906  * 1. When a @b ARPTO occurs (@ref Sn_IR[3] =  ) because destination hardware address is not acquired through the ARP-process.\n
00907  * 2. When a @b SYN/ACK packet is not received and @b TCPTO (Sn_IR(3) =  )\n
00908  * 3. When a @b RST packet is received instead of a @b SYN/ACK packet. In these cases, @ref Sn_SR is changed to @ref SOCK_CLOSED.
00909  * @note This is valid only in TCP mode and operates when Socket n acts as b>TCP client</b>
00910  */
00911 #define Sn_CR_CONNECT                0x04
00912 
00913 /**
00914  * @brief Send closing request in TCP mode
00915  * @details Regardless of b>TCP server</b>or b>TCP client</b> the DISCON command processes the disconnect-process (b>Active close</b>or b>Passive close</b>.\n
00916  * @par Active close
00917  * it transmits disconnect-request(FIN packet) to the connected peer\n
00918  * @par Passive close
00919  * When FIN packet is received from peer, a FIN packet is replied back to the peer.\n
00920  * @details When the disconnect-process is successful (that is, FIN/ACK packet is received successfully), @ref Sn_SR is changed to @ref SOCK_CLOSED.\n
00921  * Otherwise, TCPTO occurs (Sn_IR(3)=)= and then @ref Sn_SR is changed to @ref SOCK_CLOSED.
00922  * @note Valid only in TCP mode.
00923  */
00924 #define Sn_CR_DISCON                 0x08
00925 
00926 /**
00927  * @brief Close socket
00928  * @details Sn_SR is changed to @ref SOCK_CLOSED.
00929  */
00930 #define Sn_CR_CLOSE                  0x10
00931 
00932 /**
00933  * @brief Update TX buffer pointer and send data
00934  * @details SEND transmits all the data in the Socket n TX buffer.\n
00935  * For more details, please refer to Socket n TX Free Size Register (@ref Sn_TX_FSR), Socket n,
00936  * TX Write Pointer Register(@ref Sn_TX_WR), and Socket n TX Read Pointer Register(@ref Sn_TX_RD).
00937  */
00938 #define Sn_CR_SEND                   0x20
00939 
00940 /**
00941  * @brief Send data with MAC address, so without ARP process
00942  * @details The basic operation is same as SEND.\n
00943  * Normally SEND transmits data after destination hardware address is acquired by the automatic ARP-process(Address Resolution Protocol).\n
00944  * But SEND_MAC transmits data without the automatic ARP-process.\n
00945  * In this case, the destination hardware address is acquired from @ref Sn_DHAR configured by host, instead of APR-process.
00946  * @note Valid only in UDP mode.
00947  */
00948 #define Sn_CR_SEND_MAC               0x21
00949 
00950 /**
00951  * @brief Send keep alive message
00952  * @details It checks the connection status by sending 1byte keep-alive packet.\n
00953  * If the peer can not respond to the keep-alive packet during timeout time, the connection is terminated and the timeout interrupt will occur.
00954  * @note Valid only in TCP mode.
00955  */
00956 #define Sn_CR_SEND_KEEP              0x22
00957 
00958 /**
00959  * @brief Update RX buffer pointer and receive data
00960  * @details RECV completes the processing of the received data in Socket n RX Buffer by using a RX read pointer register (@ref Sn_RX_RD).\n
00961  * For more details, refer to Socket n RX Received Size Register (@ref Sn_RX_RSR), Socket n RX Write Pointer Register (@ref Sn_RX_WR),
00962  * and Socket n RX Read Pointer Register (@ref Sn_RX_RD).
00963  */
00964 #define Sn_CR_RECV                   0x40
00965 
00966 /* Sn_IR values */
00967 /**
00968  * @brief SEND_OK Interrupt
00969  * @details This is issued when SEND command is completed.
00970  */
00971 #define Sn_IR_SENDOK                 0x10
00972 
00973 /**
00974  * @brief TIMEOUT Interrupt
00975  * @details This is issued when ARPTO or TCPTO occurs.
00976  */
00977 #define Sn_IR_TIMEOUT                0x08
00978 
00979 /**
00980  * @brief RECV Interrupt
00981  * @details This is issued whenever data is received from a peer.
00982  */
00983 #define Sn_IR_RECV                   0x04
00984 
00985 /**
00986  * @brief DISCON Interrupt
00987  * @details This is issued when FIN or FIN/ACK packet is received from a peer.
00988  */
00989 #define Sn_IR_DISCON                 0x02
00990 
00991 /**
00992  * @brief CON Interrupt
00993  * @details This is issued one time when the connection with peer is successful and then @ref Sn_SR is changed to @ref SOCK_ESTABLISHED.
00994  */
00995 #define Sn_IR_CON                    0x01
00996 
00997 /* Sn_SR values */
00998 /**
00999  * @brief Closed
01000  * @details This indicates that Socket n is released.\N
01001  * When DICON, CLOSE command is ordered, or when a timeout occurs, it is changed to @ref SOCK_CLOSED regardless of previous status.
01002  */
01003 #define SOCK_CLOSED                  0x00
01004 
01005 /**
01006  * @brief Initiate state
01007  * @details This indicates Socket n is opened with TCP mode.\N
01008  * It is changed to @ref SOCK_INIT when Sn_MR(P[3:0]) = 001and OPEN command is ordered.\N
01009  * After @ref SOCK_INIT, user can use LISTEN /CONNECT command.
01010  */
01011 #define SOCK_INIT                    0x13
01012 
01013 /**
01014  * @brief Listen state
01015  * @details This indicates Socket n is operating as b>TCP server</b>mode and waiting for connection-request (SYN packet) from a peer (b>TCP client</b>.\n
01016  * It will change to @ref SOCK_ESTALBLISHED when the connection-request is successfully accepted.\n
01017  * Otherwise it will change to @ref SOCK_CLOSED after TCPTO occurred (Sn_IR(TIMEOUT) = .
01018  */
01019 #define SOCK_LISTEN                  0x14
01020 
01021 /**
01022  * @brief Connection state
01023  * @details This indicates Socket n sent the connect-request packet (SYN packet) to a peer.\n
01024  * It is temporarily shown when @ref Sn_SR is changed from @ref SOCK_INIT to @ref SOCK_ESTABLISHED by CONNECT command.\n
01025  * If connect-accept(SYN/ACK packet) is received from the peer at SOCK_SYNSENT, it changes to @ref SOCK_ESTABLISHED.\n
01026  * Otherwise, it changes to @ref SOCK_CLOSED after TCPTO (@ref Sn_IR[TIMEOUT] =  is occurred.
01027  */
01028 #define SOCK_SYNSENT                 0x15
01029 
01030 /**
01031  * @brief Connection state
01032  * @details It indicates Socket n successfully received the connect-request packet (SYN packet) from a peer.\n
01033  * If socket n sends the response (SYN/ACK  packet) to the peer successfully,  it changes to @ref SOCK_ESTABLISHED. \n
01034  * If not, it changes to @ref SOCK_CLOSED after timeout occurs (@ref Sn_IR[TIMEOUT] = .
01035  */
01036 #define SOCK_SYNRECV                 0x16
01037 
01038 /**
01039  * @brief Success to connect
01040  * @details This indicates the status of the connection of Socket n.\n
01041  * It changes to @ref SOCK_ESTABLISHED when the b>TCP SERVER</b>processed the SYN packet from the b>TCP CLIENT</b>during @ref SOCK_LISTEN, or
01042  * when the CONNECT command is successful.\n
01043  * During @ref SOCK_ESTABLISHED, DATA packet can be transferred using SEND or RECV command.
01044  */
01045 #define SOCK_ESTABLISHED             0x17
01046 
01047 /**
01048  * @brief Closing state
01049  * @details These indicate Socket n is closing.\n
01050  * These are shown in disconnect-process such as active-close and passive-close.\n
01051  * When Disconnect-process is successfully completed, or when timeout occurs, these change to @ref SOCK_CLOSED.
01052  */
01053 #define SOCK_FIN_WAIT                0x18
01054 
01055 /**
01056  * @brief Closing state
01057  * @details These indicate Socket n is closing.\n
01058  * These are shown in disconnect-process such as active-close and passive-close.\n
01059  * When Disconnect-process is successfully completed, or when timeout occurs, these change to @ref SOCK_CLOSED.
01060  */
01061 #define SOCK_CLOSING                 0x1A
01062 
01063 /**
01064  * @brief Closing state
01065  * @details These indicate Socket n is closing.\n
01066  * These are shown in disconnect-process such as active-close and passive-close.\n
01067  * When Disconnect-process is successfully completed, or when timeout occurs, these change to @ref SOCK_CLOSED.
01068  */
01069 #define SOCK_TIME_WAIT               0x1B
01070 
01071 /**
01072  * @brief Closing state
01073  * @details This indicates Socket n received the disconnect-request (FIN packet) from the connected peer.\n
01074  * This is half-closing status, and data can be transferred.\n
01075  * For full-closing, DISCON command is used. But For just-closing, CLOSE command is used.
01076  */
01077 #define SOCK_CLOSE_WAIT              0x1C
01078 
01079 /**
01080  * @brief Closing state
01081  * @details This indicates Socket n is waiting for the response (FIN/ACK packet) to the disconnect-request (FIN packet) by passive-close.\n
01082  * It changes to @ref SOCK_CLOSED when Socket n received the response successfully, or when timeout occurs  (@ref Sn_IR[TIMEOUT] = .
01083  */
01084 #define SOCK_LAST_ACK                0x1D
01085 
01086 /**
01087  * @brief UDP socket
01088  * @details This indicates Socket n is opened in UDP mode(Sn_MR(P[3:0]) = 010.\n
01089  * It changes to SOCK_UPD when Sn_MR(P[3:0]) = 010 and OPEN command is ordered.\n
01090  * Unlike TCP mode, data can be transfered without the connection-process.
01091  */
01092 #define SOCK_UDP                     0x22
01093 
01094 //#define SOCK_IPRAW                   0x32     /**< IP raw mode socket */
01095 
01096 /**
01097  * @brief MAC raw mode socket
01098  * @details This indicates Socket 0 is opened in MACRAW mode (S0_MR(P[3:0]) = 100and is valid only in Socket 0.\n
01099  * It changes to SOCK_MACRAW when S0_MR(P[3:0] = 100and OPEN command is ordered.\n
01100  * Like UDP mode socket, MACRAW mode Socket 0 can transfer a MAC packet (Ethernet frame) without the connection-process.
01101  */
01102 #define SOCK_MACRAW                  0x42
01103 
01104 //#define SOCK_PPPOE                   0x5F
01105 
01106 /* IP PROTOCOL */
01107 #define IPPROTO_IP                   0        //< Dummy for IP 
01108 #define IPPROTO_ICMP                 1        //< Control message protocol
01109 #define IPPROTO_IGMP                 2        //< Internet group management protocol
01110 #define IPPROTO_GGP                  3        //< Gateway^2 (deprecated)
01111 #define IPPROTO_TCP                  6        //< TCP
01112 #define IPPROTO_PUP                  12       //< PUP
01113 #define IPPROTO_UDP                  17       //< UDP
01114 #define IPPROTO_IDP                  22       //< XNS idp
01115 #define IPPROTO_ND                   77       //< UNOFFICIAL net disk protocol
01116 #define IPPROTO_RAW                  255      //< Raw IP packet
01117 
01118 
01119 /**
01120  * @brief Enter a critical section
01121  *
01122  * @details It is provided to protect your shared code which are executed without distribution. \n \n
01123  *
01124  * In non-OS environment, It can be just implemented by disabling whole interrupt.\n
01125  * In OS environment, You can replace it to critical section api supported by OS.
01126  *
01127  * \sa WIZCHIP_READ(), WIZCHIP_WRITE(), WIZCHIP_READ_BUF(), WIZCHIP_WRITE_BUF()
01128  * \sa WIZCHIP_CRITICAL_EXIT()
01129  */
01130 #define WIZCHIP_CRITICAL_ENTER()    WIZCHIP.CRIS._enter()
01131 
01132 /**
01133  * @brief Exit a critical section
01134  *
01135  * @details It is provided to protect your shared code which are executed without distribution. \n\n
01136  *
01137  * In non-OS environment, It can be just implemented by disabling whole interrupt. \n
01138  * In OS environment, You can replace it to critical section api supported by OS.
01139  *
01140  * @sa WIZCHIP_READ(), WIZCHIP_WRITE(), WIZCHIP_READ_BUF(), WIZCHIP_WRITE_BUF()
01141  * @sa WIZCHIP_CRITICAL_ENTER()
01142  */
01143 #define WIZCHIP_CRITICAL_EXIT()     WIZCHIP.CRIS._exit()
01144 
01145 
01146 
01147 ////////////////////////
01148 // Basic I/O Function //
01149 ////////////////////////
01150 
01151 /**
01152  * @ingroup Basic_IO_function
01153  * @brief It reads 1 byte value from a register.
01154  * @param AddrSel Register address
01155  * @return The value of register
01156  */
01157 uint8_t  WIZCHIP_READ (uint32_t AddrSel);
01158 
01159 /**
01160  * @ingroup Basic_IO_function
01161  * @brief It writes 1 byte value to a register.
01162  * @param AddrSel Register address
01163  * @param wb Write data
01164  * @return void
01165  */
01166 void     WIZCHIP_WRITE(uint32_t AddrSel, uint8_t wb );
01167 
01168 /**
01169  * @ingroup Basic_IO_function
01170  * @brief It reads sequence data from registers.
01171  * @param AddrSel Register address
01172  * @param pBuf Pointer buffer to read data
01173  * @param len Data length
01174  */
01175 void     WIZCHIP_READ_BUF (uint32_t AddrSel, uint8_t* pBuf, uint16_t len);
01176 
01177 /**
01178  * @ingroup Basic_IO_function
01179  * @brief It writes sequence data to registers.
01180  * @param AddrSel Register address
01181  * @param pBuf Pointer buffer to write data
01182  * @param len Data length
01183  */
01184 void     WIZCHIP_WRITE_BUF(uint32_t AddrSel, uint8_t* pBuf, uint16_t len);
01185 
01186 /////////////////////////////////
01187 // Common Register I/O function //
01188 /////////////////////////////////
01189 /**
01190  * @ingroup Common_register_access_function
01191  * @brief Set Mode Register
01192  * @param (uint8_t)mr The value to be set.
01193  * @sa getMR()
01194  */
01195 #define setMR(mr) \
01196     WIZCHIP_WRITE(MR,mr)
01197 
01198 
01199 /**
01200  * @ingroup Common_register_access_function
01201  * @brief Get Mode Register
01202  * @return uint8_t. The value of Mode register.
01203  * @sa setMR()
01204  */
01205 #define getMR() \
01206         WIZCHIP_READ(MR)
01207 
01208 /**
01209  * @ingroup Common_register_access_function
01210  * @brief Set gateway IP address
01211  * @param (uint8_t*)gar Pointer variable to set gateway IP address. It should be allocated 4 bytes.
01212  * @sa getGAR()
01213  */
01214 #define setGAR(gar) \
01215         WIZCHIP_WRITE_BUF(GAR,gar,4)
01216 
01217 /**
01218  * @ingroup Common_register_access_function
01219  * @brief Get gateway IP address
01220  * @param (uint8_t*)gar Pointer variable to get gateway IP address. It should be allocated 4 bytes.
01221  * @sa setGAR()
01222  */
01223 #define getGAR(gar) \
01224         WIZCHIP_READ_BUF(GAR,gar,4)
01225 
01226 /**
01227  * @ingroup Common_register_access_function
01228  * @brief Set subnet mask address
01229  * @param (uint8_t*)subr Pointer variable to set subnet mask address. It should be allocated 4 bytes.
01230  * @sa getSUBR()
01231  */
01232 #define setSUBR(subr) \
01233         WIZCHIP_WRITE_BUF(SUBR, subr,4)
01234 
01235 
01236 /**
01237  * @ingroup Common_register_access_function
01238  * @brief Get subnet mask address
01239  * @param (uint8_t*)subr Pointer variable to get subnet mask address. It should be allocated 4 bytes.
01240  * @sa setSUBR()
01241  */
01242 #define getSUBR(subr) \
01243         WIZCHIP_READ_BUF(SUBR, subr, 4)
01244 
01245 /**
01246  * @ingroup Common_register_access_function
01247  * @brief Set local MAC address
01248  * @param (uint8_t*)shar Pointer variable to set local MAC address. It should be allocated 6 bytes.
01249  * @sa getSHAR()
01250  */
01251 #define setSHAR(shar) \
01252         WIZCHIP_WRITE_BUF(SHAR, shar, 6)
01253 
01254 /**
01255  * @ingroup Common_register_access_function
01256  * @brief Get local MAC address
01257  * @param (uint8_t*)shar Pointer variable to get local MAC address. It should be allocated 6 bytes.
01258  * @sa setSHAR()
01259  */
01260 #define getSHAR(shar) \
01261         WIZCHIP_READ_BUF(SHAR, shar, 6)
01262 
01263 /**
01264  * @ingroup Common_register_access_function
01265  * @brief Set local IP address
01266  * @param (uint8_t*)sipr Pointer variable to set local IP address. It should be allocated 4 bytes.
01267  * @sa getSIPR()
01268  */
01269 #define setSIPR(sipr) \
01270         WIZCHIP_WRITE_BUF(SIPR, sipr, 4)
01271 
01272 /**
01273  * @ingroup Common_register_access_function
01274  * @brief Get local IP address
01275  * @param (uint8_t*)sipr Pointer variable to get local IP address. It should be allocated 4 bytes.
01276  * @sa setSIPR()
01277  */
01278 #define getSIPR(sipr) \
01279         WIZCHIP_READ_BUF(SIPR, sipr, 4)
01280 
01281 /**
01282  * @ingroup Common_register_access_function
01283  * @brief Set INTLEVEL register
01284  * @param (uint16_t)intlevel Value to set @ref INTLEVEL register.
01285  * @sa getINTLEVEL()
01286  */
01287 #define setINTLEVEL(intlevel)  {\
01288         WIZCHIP_WRITE(INTLEVEL,   (uint8_t)(intlevel >> 8)); \
01289         WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(INTLEVEL,1), (uint8_t) intlevel); \
01290     }
01291 
01292 
01293 /**
01294  * @ingroup Common_register_access_function
01295  * @brief Get INTLEVEL register
01296  * @return uint16_t. Value of @ref INTLEVEL register.
01297  * @sa setINTLEVEL()
01298  */
01299 #define getINTLEVEL() \
01300         ((WIZCHIP_READ(INTLEVEL) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(INTLEVEL,1)))
01301 
01302 /**
01303  * @ingroup Common_register_access_function
01304  * @brief Set @ref IR register
01305  * @param (uint8_t)ir Value to set @ref IR register.
01306  * @sa getIR()
01307  */
01308 #define setIR(ir) \
01309         WIZCHIP_WRITE(IR, (ir & 0xF0))
01310 
01311 /**
01312  * @ingroup Common_register_access_function
01313  * @brief Get @ref IR register
01314  * @return uint8_t. Value of @ref IR register.
01315  * @sa setIR()
01316  */
01317 #define getIR() \
01318         (WIZCHIP_READ(IR) & 0xF0)
01319 /**
01320  * @ingroup Common_register_access_function
01321  * @brief Set @ref IMR register
01322  * @param (uint8_t)imr Value to set @ref IMR register.
01323  * @sa getIMR()
01324  */
01325 #define setIMR(imr) \
01326         WIZCHIP_WRITE(IMR, imr)
01327 
01328 /**
01329  * @ingroup Common_register_access_function
01330  * @brief Get @ref IMR register
01331  * @return uint8_t. Value of @ref IMR register.
01332  * @sa setIMR()
01333  */
01334 #define getIMR() \
01335         WIZCHIP_READ(IMR)
01336 
01337 
01338 /**
01339  * @ingroup Common_register_access_function
01340  * @brief Set @ref SIR register
01341  * @param (uint8_t)sir Value to set @ref SIR register.
01342  * @sa getSIR()
01343  */
01344 #define setSIR(sir) \
01345         WIZCHIP_WRITE(SIR, sir)
01346 
01347 /**
01348  * @ingroup Common_register_access_function
01349  * @brief Get @ref SIR register
01350  * @return uint8_t. Value of @ref SIR register.
01351  * @sa setSIR()
01352  */
01353 #define getSIR() \
01354         WIZCHIP_READ(SIR)
01355 /**
01356  * @ingroup Common_register_access_function
01357  * @brief Set @ref SIMR register
01358  * @param (uint8_t)simr Value to set @ref SIMR register.
01359  * @sa getSIMR()
01360  */
01361 #define setSIMR(simr) \
01362         WIZCHIP_WRITE(SIMR, simr)
01363 
01364 /**
01365  * @ingroup Common_register_access_function
01366  * @brief Get @ref SIMR register
01367  * @return uint8_t. Value of @ref SIMR register.
01368  * @sa setSIMR()
01369  */
01370 #define getSIMR() \
01371         WIZCHIP_READ(SIMR)
01372 
01373 /**
01374  * @ingroup Common_register_access_function
01375  * @brief Set @ref RTR register
01376  * @param (uint16_t)rtr Value to set @ref RTR register.
01377  * @sa getRTR()
01378  */
01379 #define setRTR(rtr)   {\
01380         WIZCHIP_WRITE(RTR,   (uint8_t)(rtr >> 8)); \
01381         WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(RTR,1), (uint8_t) rtr); \
01382     }
01383 
01384 /**
01385  * @ingroup Common_register_access_function
01386  * @brief Get @ref RTR register
01387  * @return uint16_t. Value of @ref RTR register.
01388  * @sa setRTR()
01389  */
01390 #define getRTR() \
01391         ((WIZCHIP_READ(RTR) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(RTR,1)))
01392 
01393 /**
01394  * @ingroup Common_register_access_function
01395  * @brief Set @ref RCR register
01396  * @param (uint8_t)rcr Value to set @ref RCR register.
01397  * @sa getRCR()
01398  */
01399 #define setRCR(rcr) \
01400         WIZCHIP_WRITE(RCR, rcr)
01401 
01402 /**
01403  * @ingroup Common_register_access_function
01404  * @brief Get @ref RCR register
01405  * @return uint8_t. Value of @ref RCR register.
01406  * @sa setRCR()
01407  */
01408 #define getRCR() \
01409         WIZCHIP_READ(RCR)
01410 
01411 //================================================== test done ===========================================================
01412 
01413 /**
01414  * @ingroup Common_register_access_function
01415  * @brief Set @ref PTIMER register
01416  * @param (uint8_t)ptimer Value to set @ref PTIMER register.
01417  * @sa getPTIMER()
01418  */
01419 #define setPTIMER(ptimer) \
01420         WIZCHIP_WRITE(PTIMER, ptimer)
01421 
01422 /**
01423  * @ingroup Common_register_access_function
01424  * @brief Get @ref PTIMER register
01425  * @return uint8_t. Value of @ref PTIMER register.
01426  * @sa setPTIMER()
01427  */
01428 #define getPTIMER() \
01429         WIZCHIP_READ(PTIMER)
01430 
01431 /**
01432  * @ingroup Common_register_access_function
01433  * @brief Set @ref PMAGIC register
01434  * @param (uint8_t)pmagic Value to set @ref PMAGIC register.
01435  * @sa getPMAGIC()
01436  */
01437 #define setPMAGIC(pmagic) \
01438         WIZCHIP_WRITE(PMAGIC, pmagic)
01439 
01440 /**
01441  * @ingroup Common_register_access_function
01442  * @brief Get @ref PMAGIC register
01443  * @return uint8_t. Value of @ref PMAGIC register.
01444  * @sa setPMAGIC()
01445  */
01446 #define getPMAGIC() \
01447         WIZCHIP_READ(PMAGIC)
01448 
01449 /**
01450  * @ingroup Common_register_access_function
01451  * @brief Set PHAR address
01452  * @param (uint8_t*)phar Pointer variable to set PPP destination MAC register address. It should be allocated 6 bytes.
01453  * @sa getPHAR()
01454  */
01455 #define setPHAR(phar) \
01456         WIZCHIP_WRITE_BUF(PHAR, phar, 6)
01457 
01458 /**
01459  * @ingroup Common_register_access_function
01460  * @brief Get local IP address
01461  * @param (uint8_t*)phar Pointer variable to PPP destination MAC register address. It should be allocated 6 bytes.
01462  * @sa setPHAR()
01463  */
01464 #define getPHAR(phar) \
01465         WIZCHIP_READ_BUF(PHAR, phar, 6)
01466 
01467 /**
01468  * @ingroup Common_register_access_function
01469  * @brief Set @ref PSID register
01470  * @param (uint16_t)psid Value to set @ref PSID register.
01471  * @sa getPSID()
01472  */
01473 #define setPSID(psid)  {\
01474         WIZCHIP_WRITE(PSID,   (uint8_t)(psid >> 8)); \
01475         WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(PSID,1), (uint8_t) psid); \
01476     }
01477 
01478 /**
01479  * @ingroup Common_register_access_function
01480  * @brief Get @ref PSID register
01481  * @return uint16_t. Value of @ref PSID register.
01482  * @sa setPSID()
01483  */
01484 //uint16_t getPSID(void);
01485 #define getPSID() \
01486         ((WIZCHIP_READ(PSID) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(PSID,1)))
01487 
01488 /**
01489  * @ingroup Common_register_access_function
01490  * @brief Set @ref PMRU register
01491  * @param (uint16_t)pmru Value to set @ref PMRU register.
01492  * @sa getPMRU()
01493  */
01494 #define setPMRU(pmru) { \
01495         WIZCHIP_WRITE(PMRU,   (uint8_t)(pmru>>8)); \
01496         WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(PMRU,1), (uint8_t) pmru); \
01497     }
01498 
01499 /**
01500  * @ingroup Common_register_access_function
01501  * @brief Get @ref PMRU register
01502  * @return uint16_t. Value of @ref PMRU register.
01503  * @sa setPMRU()
01504  */
01505 #define getPMRU() \
01506         ((WIZCHIP_READ(PMRU) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(PMRU,1)))
01507 
01508 /**
01509  * @ingroup Common_register_access_function
01510  * @brief Get unreachable IP address
01511  * @param (uint8_t*)uipr Pointer variable to get unreachable IP address. It should be allocated 4 bytes.
01512  */
01513 #define getUIPR(uipr) \
01514         WIZCHIP_READ_BUF(UIPR,uipr,6)
01515 
01516 /**
01517  * @ingroup Common_register_access_function
01518  * @brief Get @ref UPORTR register
01519  * @return uint16_t. Value of @ref UPORTR register.
01520  */
01521 #define getUPORTR() \
01522     ((WIZCHIP_READ(UPORTR) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(UPORTR,1)))
01523 
01524 /**
01525  * @ingroup Common_register_access_function
01526  * @brief Set @ref PHYCFGR register
01527  * @param (uint8_t)phycfgr Value to set @ref PHYCFGR register.
01528  * @sa getPHYCFGR()
01529  */
01530 #define setPHYCFGR(phycfgr) \
01531         WIZCHIP_WRITE(PHYCFGR, phycfgr)
01532 
01533 /**
01534  * @ingroup Common_register_access_function
01535  * @brief Get @ref PHYCFGR register
01536  * @return uint8_t. Value of @ref PHYCFGR register.
01537  * @sa setPHYCFGR()
01538  */
01539 #define getPHYCFGR() \
01540         WIZCHIP_READ(PHYCFGR)
01541 
01542 /**
01543  * @ingroup Common_register_access_function
01544  * @brief Get @ref VERSIONR register
01545  * @return uint8_t. Value of @ref VERSIONR register.
01546  */
01547 #define getVERSIONR() \
01548         WIZCHIP_READ(VERSIONR)
01549 
01550 /////////////////////////////////////
01551 
01552 ///////////////////////////////////
01553 // Socket N register I/O function //
01554 ///////////////////////////////////
01555 /**
01556  * @ingroup Socket_register_access_function
01557  * @brief Set @ref Sn_MR register
01558  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01559  * @param (uint8_t)mr Value to set @ref Sn_MR
01560  * @sa getSn_MR()
01561  */
01562 #define setSn_MR(sn, mr) \
01563         WIZCHIP_WRITE(Sn_MR(sn),mr)
01564 
01565 /**
01566  * @ingroup Socket_register_access_function
01567  * @brief Get @ref Sn_MR register
01568  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01569  * @return uint8_t. Value of @ref Sn_MR.
01570  * @sa setSn_MR()
01571  */
01572 #define getSn_MR(sn) \
01573     WIZCHIP_READ(Sn_MR(sn))
01574 
01575 /**
01576  * @ingroup Socket_register_access_function
01577  * @brief Set @ref Sn_CR register
01578  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01579  * @param (uint8_t)cr Value to set @ref Sn_CR
01580  * @sa getSn_CR()
01581  */
01582 #define setSn_CR(sn, cr) \
01583         WIZCHIP_WRITE(Sn_CR(sn), cr)
01584 
01585 /**
01586  * @ingroup Socket_register_access_function
01587  * @brief Get @ref Sn_CR register
01588  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01589  * @return uint8_t. Value of @ref Sn_CR.
01590  * @sa setSn_CR()
01591  */
01592 #define getSn_CR(sn) \
01593         WIZCHIP_READ(Sn_CR(sn))
01594 
01595 /**
01596  * @ingroup Socket_register_access_function
01597  * @brief Set @ref Sn_IR register
01598  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01599  * @param (uint8_t)ir Value to set @ref Sn_IR
01600  * @sa getSn_IR()
01601  */
01602 #define setSn_IR(sn, ir) \
01603         WIZCHIP_WRITE(Sn_IR(sn), (ir & 0x1F))
01604 
01605 /**
01606  * @ingroup Socket_register_access_function
01607  * @brief Get @ref Sn_IR register
01608  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01609  * @return uint8_t. Value of @ref Sn_IR.
01610  * @sa setSn_IR()
01611  */
01612 #define getSn_IR(sn) \
01613         (WIZCHIP_READ(Sn_IR(sn)) & 0x1F)
01614 
01615 /**
01616  * @ingroup Socket_register_access_function
01617  * @brief Set @ref Sn_IMR register
01618  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01619  * @param (uint8_t)imr Value to set @ref Sn_IMR
01620  * @sa getSn_IMR()
01621  */
01622 #define setSn_IMR(sn, imr) \
01623         WIZCHIP_WRITE(Sn_IMR(sn), (imr & 0x1F))
01624 
01625 /**
01626  * @ingroup Socket_register_access_function
01627  * @brief Get @ref Sn_IMR register
01628  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01629  * @return uint8_t. Value of @ref Sn_IMR.
01630  * @sa setSn_IMR()
01631  */
01632 #define getSn_IMR(sn) \
01633         (WIZCHIP_READ(Sn_IMR(sn)) & 0x1F)
01634 
01635 /**
01636  * @ingroup Socket_register_access_function
01637  * @brief Get @ref Sn_SR register
01638  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01639  * @return uint8_t. Value of @ref Sn_SR.
01640  */
01641 #define getSn_SR(sn) \
01642         WIZCHIP_READ(Sn_SR(sn))
01643 
01644 /**
01645  * @ingroup Socket_register_access_function
01646  * @brief Set @ref Sn_PORT register
01647  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01648  * @param (uint16_t)port Value to set @ref Sn_PORT.
01649  * @sa getSn_PORT()
01650  */
01651 #define setSn_PORT(sn, port)  { \
01652         WIZCHIP_WRITE(Sn_PORT(sn),   (uint8_t)(port >> 8)); \
01653         WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(Sn_PORT(sn),1), (uint8_t) port); \
01654     }
01655 
01656 /**
01657  * @ingroup Socket_register_access_function
01658  * @brief Get @ref Sn_PORT register
01659  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01660  * @return uint16_t. Value of @ref Sn_PORT.
01661  * @sa setSn_PORT()
01662  */
01663 #define getSn_PORT(sn) \
01664         ((WIZCHIP_READ(Sn_PORT(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_PORT(sn),1)))
01665 
01666 /**
01667  * @ingroup Socket_register_access_function
01668  * @brief Set @ref Sn_DHAR register
01669  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01670  * @param (uint8_t*)dhar Pointer variable to set socket n destination hardware address. It should be allocated 6 bytes.
01671  * @sa getSn_DHAR()
01672  */
01673 #define setSn_DHAR(sn, dhar) \
01674         WIZCHIP_WRITE_BUF(Sn_DHAR(sn), dhar, 6)
01675 
01676 /**
01677  * @ingroup Socket_register_access_function
01678  * @brief Get @ref Sn_MR register
01679  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01680  * @param (uint8_t*)dhar Pointer variable to get socket n destination hardware address. It should be allocated 6 bytes.
01681  * @sa setSn_DHAR()
01682  */
01683 #define getSn_DHAR(sn, dhar) \
01684         WIZCHIP_READ_BUF(Sn_DHAR(sn), dhar, 6)
01685 
01686 /**
01687  * @ingroup Socket_register_access_function
01688  * @brief Set @ref Sn_DIPR register
01689  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01690  * @param (uint8_t*)dipr Pointer variable to set socket n destination IP address. It should be allocated 4 bytes.
01691  * @sa getSn_DIPR()
01692  */
01693 #define setSn_DIPR(sn, dipr) \
01694         WIZCHIP_WRITE_BUF(Sn_DIPR(sn), dipr, 4)
01695 
01696 /**
01697  * @ingroup Socket_register_access_function
01698  * @brief Get @ref Sn_DIPR register
01699  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01700  * @param (uint8_t*)dipr Pointer variable to get socket n destination IP address. It should be allocated 4 bytes.
01701  * @sa SetSn_DIPR()
01702  */
01703 #define getSn_DIPR(sn, dipr) \
01704         WIZCHIP_READ_BUF(Sn_DIPR(sn), dipr, 4)
01705 
01706 /**
01707  * @ingroup Socket_register_access_function
01708  * @brief Set @ref Sn_DPORT register
01709  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01710  * @param (uint16_t)dport Value to set @ref Sn_DPORT
01711  * @sa getSn_DPORT()
01712  */
01713 #define setSn_DPORT(sn, dport) { \
01714         WIZCHIP_WRITE(Sn_DPORT(sn),   (uint8_t) (dport>>8)); \
01715         WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(Sn_DPORT(sn),1), (uint8_t)  dport); \
01716     }
01717 
01718 /**
01719  * @ingroup Socket_register_access_function
01720  * @brief Get @ref Sn_DPORT register
01721  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01722  * @return uint16_t. Value of @ref Sn_DPORT.
01723  * @sa setSn_DPORT()
01724  */
01725 #define getSn_DPORT(sn) \
01726         ((WIZCHIP_READ(Sn_DPORT(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_DPORT(sn),1)))
01727 
01728 /**
01729  * @ingroup Socket_register_access_function
01730  * @brief Set @ref Sn_MSSR register
01731  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01732  * @param (uint16_t)mss Value to set @ref Sn_MSSR
01733  * @sa setSn_MSSR()
01734  */
01735 #define setSn_MSSR(sn, mss) { \
01736         WIZCHIP_WRITE(Sn_MSSR(sn),   (uint8_t)(mss>>8)); \
01737         WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(Sn_MSSR(sn),1), (uint8_t) mss); \
01738     }
01739 
01740 /**
01741  * @ingroup Socket_register_access_function
01742  * @brief Get @ref Sn_MSSR register
01743  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01744  * @return uint16_t. Value of @ref Sn_MSSR.
01745  * @sa setSn_MSSR()
01746  */
01747 #define getSn_MSSR(sn) \
01748         ((WIZCHIP_READ(Sn_MSSR(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_MSSR(sn),1)))
01749 
01750 /**
01751  * @ingroup Socket_register_access_function
01752  * @brief Set @ref Sn_TOS register
01753  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01754  * @param (uint8_t)tos Value to set @ref Sn_TOS
01755  * @sa getSn_TOS()
01756  */
01757 #define setSn_TOS(sn, tos) \
01758         WIZCHIP_WRITE(Sn_TOS(sn), tos)
01759 
01760 /**
01761  * @ingroup Socket_register_access_function
01762  * @brief Get @ref Sn_TOS register
01763  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01764  * @return uint8_t. Value of Sn_TOS.
01765  * @sa setSn_TOS()
01766  */
01767 #define getSn_TOS(sn) \
01768         WIZCHIP_READ(Sn_TOS(sn))
01769 
01770 /**
01771  * @ingroup Socket_register_access_function
01772  * @brief Set @ref Sn_TTL register
01773  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01774  * @param (uint8_t)ttl Value to set @ref Sn_TTL
01775  * @sa getSn_TTL()
01776  */
01777 #define setSn_TTL(sn, ttl) \
01778         WIZCHIP_WRITE(Sn_TTL(sn), ttl)
01779 
01780 
01781 /**
01782  * @ingroup Socket_register_access_function
01783  * @brief Get @ref Sn_TTL register
01784  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01785  * @return uint8_t. Value of @ref Sn_TTL.
01786  * @sa setSn_TTL()
01787  */
01788 #define getSn_TTL(sn) \
01789         WIZCHIP_READ(Sn_TTL(sn))
01790 
01791 
01792 /**
01793  * @ingroup Socket_register_access_function
01794  * @brief Set @ref Sn_RXBUF_SIZE register
01795  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01796  * @param (uint8_t)rxbufsize Value to set @ref Sn_RXBUF_SIZE
01797  * @sa getSn_RXBUF_SIZE()
01798  */
01799 #define setSn_RXBUF_SIZE(sn, rxbufsize) \
01800         WIZCHIP_WRITE(Sn_RXBUF_SIZE(sn),rxbufsize)
01801 
01802 
01803 /**
01804  * @ingroup Socket_register_access_function
01805  * @brief Get @ref Sn_RXBUF_SIZE register
01806  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01807  * @return uint8_t. Value of @ref Sn_RXBUF_SIZE.
01808  * @sa setSn_RXBUF_SIZE()
01809  */
01810 #define getSn_RXBUF_SIZE(sn) \
01811         WIZCHIP_READ(Sn_RXBUF_SIZE(sn))
01812 
01813 /**
01814  * @ingroup Socket_register_access_function
01815  * @brief Set @ref Sn_TXBUF_SIZE register
01816  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01817  * @param (uint8_t)txbufsize Value to set @ref Sn_TXBUF_SIZE
01818  * @sa getSn_TXBUF_SIZE()
01819  */
01820 #define setSn_TXBUF_SIZE(sn, txbufsize) \
01821         WIZCHIP_WRITE(Sn_TXBUF_SIZE(sn), txbufsize)
01822 
01823 /**
01824  * @ingroup Socket_register_access_function
01825  * @brief Get @ref Sn_TXBUF_SIZE register
01826  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01827  * @return uint8_t. Value of @ref Sn_TXBUF_SIZE.
01828  * @sa setSn_TXBUF_SIZE()
01829  */
01830 #define getSn_TXBUF_SIZE(sn) \
01831         WIZCHIP_READ(Sn_TXBUF_SIZE(sn))
01832 
01833 /**
01834  * @ingroup Socket_register_access_function
01835  * @brief Get @ref Sn_TX_FSR register
01836  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01837  * @return uint16_t. Value of @ref Sn_TX_FSR.
01838  */
01839 uint16_t getSn_TX_FSR(uint8_t sn);
01840 
01841 /**
01842  * @ingroup Socket_register_access_function
01843  * @brief Get @ref Sn_TX_RD register
01844  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01845  * @return uint16_t. Value of @ref Sn_TX_RD.
01846  */
01847 #define getSn_TX_RD(sn) \
01848         ((WIZCHIP_READ(Sn_TX_RD(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_TX_RD(sn),1)))
01849 
01850 /**
01851  * @ingroup Socket_register_access_function
01852  * @brief Set @ref Sn_TX_WR register
01853  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01854  * @param (uint16_t)txwr Value to set @ref Sn_TX_WR
01855  * @sa GetSn_TX_WR()
01856  */
01857 #define setSn_TX_WR(sn, txwr) { \
01858         WIZCHIP_WRITE(Sn_TX_WR(sn),   (uint8_t)(txwr>>8)); \
01859         WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(Sn_TX_WR(sn),1), (uint8_t) txwr); \
01860         }
01861 
01862 /**
01863  * @ingroup Socket_register_access_function
01864  * @brief Get @ref Sn_TX_WR register
01865  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01866  * @return uint16_t. Value of @ref Sn_TX_WR.
01867  * @sa setSn_TX_WR()
01868  */
01869 #define getSn_TX_WR(sn) \
01870         ((WIZCHIP_READ(Sn_TX_WR(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_TX_WR(sn),1)))
01871 
01872 
01873 /**
01874  * @ingroup Socket_register_access_function
01875  * @brief Get @ref Sn_RX_RSR register
01876  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01877  * @return uint16_t. Value of @ref Sn_RX_RSR.
01878  */
01879 uint16_t getSn_RX_RSR(uint8_t sn);
01880 
01881 
01882 /**
01883  * @ingroup Socket_register_access_function
01884  * @brief Set @ref Sn_RX_RD register
01885  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01886  * @param (uint16_t)rxrd Value to set @ref Sn_RX_RD
01887  * @sa getSn_RX_RD()
01888  */
01889 #define setSn_RX_RD(sn, rxrd) { \
01890         WIZCHIP_WRITE(Sn_RX_RD(sn),   (uint8_t)(rxrd>>8)); \
01891         WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(Sn_RX_RD(sn),1), (uint8_t) rxrd); \
01892     }
01893 
01894 /**
01895  * @ingroup Socket_register_access_function
01896  * @brief Get @ref Sn_RX_RD register
01897  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01898  * @regurn uint16_t. Value of @ref Sn_RX_RD.
01899  * @sa setSn_RX_RD()
01900  */
01901 #define getSn_RX_RD(sn) \
01902         ((WIZCHIP_READ(Sn_RX_RD(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_RX_RD(sn),1)))
01903 
01904 /**
01905  * @ingroup Socket_register_access_function
01906  * @brief Get @ref Sn_RX_WR register
01907  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01908  * @return uint16_t. Value of @ref Sn_RX_WR.
01909  */
01910 #define getSn_RX_WR(sn) \
01911         ((WIZCHIP_READ(Sn_RX_WR(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_RX_WR(sn),1)))
01912 
01913 
01914 /**
01915  * @ingroup Socket_register_access_function
01916  * @brief Set @ref Sn_FRAG register
01917  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01918  * @param (uint16_t)frag Value to set @ref Sn_FRAG
01919  * @sa getSn_FRAD()
01920  */
01921 #define setSn_FRAG(sn, frag) { \
01922         WIZCHIP_WRITE(Sn_FRAG(sn),  (uint8_t)(frag >>8)); \
01923         WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(Sn_FRAG(sn),1), (uint8_t) frag); \
01924     }
01925 
01926 /**
01927  * @ingroup Socket_register_access_function
01928  * @brief Get @ref Sn_FRAG register
01929  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01930  * @return uint16_t. Value of @ref Sn_FRAG.
01931  * @sa setSn_FRAG()
01932  */
01933 #define getSn_FRAG(sn) \
01934         ((WIZCHIP_READ(Sn_FRAG(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_FRAG(sn),1)))
01935 
01936 /**
01937  * @ingroup Socket_register_access_function
01938  * @brief Set @ref Sn_KPALVTR register
01939  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01940  * @param (uint8_t)kpalvt Value to set @ref Sn_KPALVTR
01941  * @sa getSn_KPALVTR()
01942  */
01943 #define setSn_KPALVTR(sn, kpalvt) \
01944         WIZCHIP_WRITE(Sn_KPALVTR(sn), kpalvt)
01945 
01946 /**
01947  * @ingroup Socket_register_access_function
01948  * @brief Get @ref Sn_KPALVTR register
01949  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01950  * @return uint8_t. Value of @ref Sn_KPALVTR.
01951  * @sa setSn_KPALVTR()
01952  */
01953 #define getSn_KPALVTR(sn) \
01954         WIZCHIP_READ(Sn_KPALVTR(sn))
01955 
01956 //////////////////////////////////////
01957 
01958 /////////////////////////////////////
01959 // Sn_TXBUF & Sn_RXBUF IO function //
01960 /////////////////////////////////////
01961 /**  
01962  * @brief Gets the max buffer size of socket sn passed as parameter.
01963  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01964  * @return uint16_t. Value of Socket n RX max buffer size.
01965  */
01966 #define getSn_RxMAX(sn) \
01967         (getSn_RXBUF_SIZE(sn) << 10)
01968 
01969 /**  
01970  * @brief Gets the max buffer size of socket sn passed as parameters.
01971  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01972  * @return uint16_t. Value of Socket n TX max buffer size.
01973  */
01974 //uint16_t getSn_TxMAX(uint8_t sn);
01975 #define getSn_TxMAX(sn) \
01976         (getSn_TXBUF_SIZE(sn) << 10)
01977 
01978 /**
01979  * @ingroup Basic_IO_function
01980  * @brief It copies data to internal TX memory
01981  *
01982  * @details This function reads the Tx write pointer register and after that,
01983  * it copies the <i>wizdata(pointer buffer)</i> of the length of <i>len(variable)</i> bytes to internal TX memory
01984  * and updates the Tx write pointer register.
01985  * This function is being called by send() and sendto() function also.
01986  *
01987  * @note User should read upper byte first and lower byte later to get proper value.
01988  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
01989  * @param wizdata Pointer buffer to write data
01990  * @param len Data length
01991  * @sa wiz_recv_data()
01992  */
01993 void wiz_send_data(uint8_t sn, uint8_t *wizdata, uint16_t len);
01994 
01995 /**
01996  * @ingroup Basic_IO_function
01997  * @brief It copies data to your buffer from internal RX memory
01998  *
01999  * @details This function read the Rx read pointer register and after that,
02000  * it copies the received data from internal RX memory
02001  * to <i>wizdata(pointer variable)</i> of the length of <i>len(variable)</i> bytes.
02002  * This function is being called by recv() also.
02003  *
02004  * @note User should read upper byte first and lower byte later to get proper value.
02005  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
02006  * @param wizdata Pointer buffer to read data
02007  * @param len Data length
02008  * @sa wiz_send_data()
02009  */
02010 void wiz_recv_data(uint8_t sn, uint8_t *wizdata, uint16_t len);
02011 
02012 /**
02013  * @ingroup Basic_IO_function
02014  * @brief It discard the received data in RX memory.
02015  * @details It discards the data of the length of <i>len(variable)</i> bytes in internal RX memory.
02016  * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>.
02017  * @param len Data length
02018  */
02019 void wiz_recv_ignore(uint8_t sn, uint16_t len);
02020 
02021 #endif   // _W5500_H_