Diff: targets/cmsis/TARGET_NXP/TARGET_LPC43XX/TOOLCHAIN_GCC_CR/startup_LPC43xx.cpp

Revision:

256:76fd9a263045

Parent:

67:78dfdb5b4d9e

--- a/targets/cmsis/TARGET_NXP/TARGET_LPC43XX/TOOLCHAIN_GCC_CR/startup_LPC43xx.cpp	Fri Jul 11 10:00:08 2014 +0100
+++ b/targets/cmsis/TARGET_NXP/TARGET_LPC43XX/TOOLCHAIN_GCC_CR/startup_LPC43xx.cpp	Tue Jul 15 07:45:08 2014 +0100
@@ -1,10 +1,10 @@
-// *****************************************************************************
-//   +--+
-//   | ++----+
-//   +-++    |
-//     |     |
-//   +-+--+  |
-//   | +--+--+
+//*****************************************************************************
+//   +--+       
+//   | ++----+   
+//   +-++    |  
+//     |     |  
+//   +-+--+  |   
+//   | +--+--+  
 //   +----+    Copyright (c) 2011-12 Code Red Technologies Ltd.
 //
 // LPC43xx Microcontroller Startup code for use with Red Suite
@@ -12,62 +12,58 @@
 // Version : 120430
 //
 // Software License Agreement
-//
+// 
 // The software is owned by Code Red Technologies and/or its suppliers, and is
-// protected under applicable copyright laws.  All rights are reserved.  Any
-// use in violation of the foregoing restrictions may subject the user to criminal
-// sanctions under applicable laws, as well as to civil liability for the breach
+// protected under applicable copyright laws.  All rights are reserved.  Any 
+// use in violation of the foregoing restrictions may subject the user to criminal 
+// sanctions under applicable laws, as well as to civil liability for the breach 
 // of the terms and conditions of this license.
-//
+// 
 // THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
 // OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
 // MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
 // USE OF THIS SOFTWARE FOR COMMERCIAL DEVELOPMENT AND/OR EDUCATION IS SUBJECT
 // TO A CURRENT END USER LICENSE AGREEMENT (COMMERCIAL OR EDUCATIONAL) WITH
-// CODE RED TECHNOLOGIES LTD.
+// CODE RED TECHNOLOGIES LTD. 
 //
-// *****************************************************************************
-#if defined(__cplusplus)
+//*****************************************************************************
+#if defined (__cplusplus)
 #ifdef __REDLIB__
 #error Redlib does not support C++
 #else
-// *****************************************************************************
+//*****************************************************************************
 //
 // The entry point for the C++ library startup
 //
-// *****************************************************************************
+//*****************************************************************************
 extern "C" {
-extern void __libc_init_array(void);
-
+	extern void __libc_init_array(void);
 }
 #endif
 #endif
 
 #define WEAK __attribute__ ((weak))
-#define ALIAS(f) __attribute__ ((weak, alias(# f)))
+#define ALIAS(f) __attribute__ ((weak, alias (#f)))
 
-//#if defined (__USE_CMSIS)
+// Code Red - if CMSIS is being used, then SystemInit() routine
+// will be called by startup code rather than in application's main()
+#if defined (__USE_CMSIS)
 #include "LPC43xx.h"
-//#endif
-
-#if defined(OS_UCOS_III)
-extern void OS_CPU_PendSVHandler(void);
-extern void OS_CPU_SysTickHandler (void);
 #endif
 
-// *****************************************************************************
-#if defined(__cplusplus)
+//*****************************************************************************
+#if defined (__cplusplus)
 extern "C" {
 #endif
 
-// *****************************************************************************
+//*****************************************************************************
 //
 // Forward declaration of the default handlers. These are aliased.
-// When the application defines a handler (with the same name), this will
+// When the application defines a handler (with the same name), this will 
 // automatically take precedence over these weak definitions
 //
-// *****************************************************************************
-void ResetISR(void);
+//*****************************************************************************
+     void ResetISR(void);
 WEAK void NMI_Handler(void);
 WEAK void HardFault_Handler(void);
 WEAK void MemManage_Handler(void);
@@ -79,18 +75,19 @@
 WEAK void SysTick_Handler(void);
 WEAK void IntDefaultHandler(void);
 
-// *****************************************************************************
+//*****************************************************************************
 //
 // Forward declaration of the specific IRQ handlers. These are aliased
 // to the IntDefaultHandler, which is a 'forever' loop. When the application
-// defines a handler (with the same name), this will automatically take
+// defines a handler (with the same name), this will automatically take 
 // precedence over these weak definitions
 //
-// *****************************************************************************
+//*****************************************************************************
 void DAC_IRQHandler(void) ALIAS(IntDefaultHandler);
-void MX_CORE_IRQHandler(void) ALIAS(IntDefaultHandler);
+void M0CORE_IRQHandler(void) ALIAS(IntDefaultHandler);
 void DMA_IRQHandler(void) ALIAS(IntDefaultHandler);
-void FLASHEEPROM_IRQHandler(void) ALIAS(IntDefaultHandler);
+void EZH_IRQHandler(void) ALIAS(IntDefaultHandler);
+void FLASH_EEPROM_IRQHandler(void) ALIAS(IntDefaultHandler);
 void ETH_IRQHandler(void) ALIAS(IntDefaultHandler);
 void SDIO_IRQHandler(void) ALIAS(IntDefaultHandler);
 void LCD_IRQHandler(void) ALIAS(IntDefaultHandler);
@@ -105,8 +102,8 @@
 void MCPWM_IRQHandler(void) ALIAS(IntDefaultHandler);
 void ADC0_IRQHandler(void) ALIAS(IntDefaultHandler);
 void I2C0_IRQHandler(void) ALIAS(IntDefaultHandler);
+void SPI_IRQHandler (void) ALIAS(IntDefaultHandler);
 void I2C1_IRQHandler(void) ALIAS(IntDefaultHandler);
-void SPI_IRQHandler (void) ALIAS(IntDefaultHandler);
 void ADC1_IRQHandler(void) ALIAS(IntDefaultHandler);
 void SSP0_IRQHandler(void) ALIAS(IntDefaultHandler);
 void SSP1_IRQHandler(void) ALIAS(IntDefaultHandler);
@@ -130,157 +127,130 @@
 void GINT1_IRQHandler(void) ALIAS(IntDefaultHandler);
 void EVRT_IRQHandler(void) ALIAS(IntDefaultHandler);
 void CAN1_IRQHandler(void) ALIAS(IntDefaultHandler);
+void VADC_IRQHandler(void) ALIAS(IntDefaultHandler);
 void ATIMER_IRQHandler(void) ALIAS(IntDefaultHandler);
 void RTC_IRQHandler(void) ALIAS(IntDefaultHandler);
 void WDT_IRQHandler(void) ALIAS(IntDefaultHandler);
+void M0s_IRQHandler(void) ALIAS(IntDefaultHandler);
 void CAN0_IRQHandler(void) ALIAS(IntDefaultHandler);
 void QEI_IRQHandler(void) ALIAS(IntDefaultHandler);
 
-// *****************************************************************************
+
+//*****************************************************************************
 //
 // The entry point for the application.
 // __main() is the entry point for Redlib based applications
 // main() is the entry point for Newlib based applications
 //
-// *****************************************************************************
-#if defined(__REDLIB__)
+//*****************************************************************************
+#if defined (__REDLIB__)
 extern void __main(void);
-
 #endif
 extern int main(void);
-
-// *****************************************************************************
+//*****************************************************************************
 //
 // External declaration for the pointer to the stack top from the Linker Script
 //
-// *****************************************************************************
+//*****************************************************************************
 extern void _vStackTop(void);
 
-// *****************************************************************************
-//
-// Application can define Stack size (If not defined, default stack size will
-// used
-//
-// *****************************************************************************
-#ifndef STACK_SIZE
-#define STACK_SIZE  (0x200)
+//*****************************************************************************
+#if defined (__cplusplus)
+} // extern "C"
 #endif
-
-// *****************************************************************************
-//
-// Application can define Heap size (If not defined, default Heap size will
-// used
-//
-// *****************************************************************************
-#ifndef HEAP_SIZE
-#define HEAP_SIZE   (0x4000)
-#endif
-
-unsigned int __vStack[STACK_SIZE / sizeof(unsigned int)]  __attribute__((section("STACK,\"aw\",%nobits@")));
-unsigned int __vHeap[HEAP_SIZE / sizeof(unsigned int)]  __attribute__((section("HEAP,\"aw\",%nobits@")));
-
-// *****************************************************************************
-#if defined(__cplusplus)
-}	// extern "C"
-#endif
-// *****************************************************************************
+//*****************************************************************************
 //
 // The vector table.
 // This relies on the linker script to place at correct location in memory.
 //
-// *****************************************************************************
-extern void(*const g_pfnVectors[]) (void);
+//*****************************************************************************
+extern void (* const g_pfnVectors[])(void);
 __attribute__ ((section(".isr_vector")))
-void(*const g_pfnVectors[]) (void) = {
-	// Core Level - CM4/CM3
-	&_vStackTop,	                // The initial stack pointer
-	ResetISR,						// The reset handler
-	NMI_Handler,					// The NMI handler
-	HardFault_Handler,				// The hard fault handler
-	MemManage_Handler,				// The MPU fault handler
-	BusFault_Handler,				// The bus fault handler
-	UsageFault_Handler,				// The usage fault handler
-	0,								// Reserved
-	0,								// Reserved
-	0,								// Reserved
-	0,								// Reserved
-	SVC_Handler,					// SVCall handler
-	DebugMon_Handler,				// Debug monitor handler
-	0,								// Reserved
-#if defined(OS_UCOS_III)
-    OS_CPU_PendSVHandler,           // uCOS-III PendSV handler
-    OS_CPU_SysTickHandler,          // uCOS-III SysTick handler
-#else
-	PendSV_Handler,					// The PendSV handler
-	SysTick_Handler,				// The SysTick handler
-#endif
+void (* const g_pfnVectors[])(void) = {
+		// Core Level - CM4
+		&_vStackTop, // The initial stack pointer
+		ResetISR,								// The reset handler
+		NMI_Handler,							// The NMI handler
+		HardFault_Handler,						// The hard fault handler
+		MemManage_Handler,						// The MPU fault handler
+		BusFault_Handler,						// The bus fault handler
+		UsageFault_Handler,						// The usage fault handler
+		0,										// Reserved
+		0,										// Reserved
+		0,										// Reserved
+		0,										// Reserved
+		SVC_Handler,							// SVCall handler
+		DebugMon_Handler,						// Debug monitor handler
+		0,										// Reserved
+		PendSV_Handler,							// The PendSV handler
+		SysTick_Handler,						// The SysTick handler
 
-	// Chip Level - LPC18xx/43xx
-	DAC_IRQHandler,					// 16 D/A Converter
-	MX_CORE_IRQHandler,				// 17 CortexM4/M0 (LPC43XX ONLY)
-	DMA_IRQHandler,					// 18 General Purpose DMA
-	0,								// 19 Reserved
-	FLASHEEPROM_IRQHandler,			// 20 ORed flash Bank A, flash Bank B, EEPROM interrupts
-	ETH_IRQHandler,					// 21 Ethernet
-	SDIO_IRQHandler,				// 22 SD/MMC
-	LCD_IRQHandler,					// 23 LCD
-	USB0_IRQHandler,				// 24 USB0
-	USB1_IRQHandler,				// 25 USB1
-	SCT_IRQHandler,					// 26 State Configurable Timer
-	RIT_IRQHandler,					// 27 Repetitive Interrupt Timer
-	TIMER0_IRQHandler,				// 28 Timer0
-	TIMER1_IRQHandler,				// 29 Timer 1
-	TIMER2_IRQHandler,				// 30 Timer 2
-	TIMER3_IRQHandler,				// 31 Timer 3
-	MCPWM_IRQHandler,				// 32 Motor Control PWM
-	ADC0_IRQHandler,				// 33 A/D Converter 0
-	I2C0_IRQHandler,				// 34 I2C0
-	I2C1_IRQHandler,				// 35 I2C1
-	SPI_IRQHandler,					// 36 SPI (LPC43XX ONLY)
-	ADC1_IRQHandler,				// 37 A/D Converter 1
-	SSP0_IRQHandler,				// 38 SSP0 
-	SSP1_IRQHandler,				// 39 SSP1
-	UART0_IRQHandler,				// 40 UART0
-	UART1_IRQHandler,				// 41 UART1
-	UART2_IRQHandler,				// 42 UART2
-	UART3_IRQHandler,				// 43 USRT3
-	I2S0_IRQHandler,				// 44 I2S0
-	I2S1_IRQHandler,				// 45 I2S1
-	SPIFI_IRQHandler,				// 46 SPI Flash Interface
-	SGPIO_IRQHandler,				// 47 SGPIO (LPC43XX ONLY)
-	GPIO0_IRQHandler,				// 48 GPIO0
-	GPIO1_IRQHandler,				// 49 GPIO1
-	GPIO2_IRQHandler,				// 50 GPIO2
-	GPIO3_IRQHandler,				// 51 GPIO3 
-	GPIO4_IRQHandler,				// 52 GPIO4
-	GPIO5_IRQHandler,				// 53 GPIO5
-	GPIO6_IRQHandler,				// 54 GPIO6
-	GPIO7_IRQHandler,				// 55 GPIO7
-	GINT0_IRQHandler,				// 56 GINT0
-	GINT1_IRQHandler,				// 57 GINT1
-	EVRT_IRQHandler,				// 58 Event Router
-	CAN1_IRQHandler,				// 59 C_CAN1
-	0,								// 60 Reserved
-	0,				                // 61 Reserved 
-	ATIMER_IRQHandler,				// 62 ATIMER
-	RTC_IRQHandler,					// 63 RTC
-	0,								// 64 Reserved
-	WDT_IRQHandler,					// 65 WDT
-	0,								// 66 Reserved
-	CAN0_IRQHandler,				// 67 C_CAN0
-	QEI_IRQHandler,					// 68 QEI
-};
+		// Chip Level - LPC43
+		DAC_IRQHandler,	 			// 16
+		M0CORE_IRQHandler,			// 17
+		DMA_IRQHandler,				// 18
+		EZH_IRQHandler,				// 19
+		FLASH_EEPROM_IRQHandler,	// 20
+		ETH_IRQHandler,				// 21
+		SDIO_IRQHandler,			// 22
+		LCD_IRQHandler,				// 23
+		USB0_IRQHandler,			// 24
+		USB1_IRQHandler,			// 25
+		SCT_IRQHandler,				// 26
+		RIT_IRQHandler,				// 27
+		TIMER0_IRQHandler,			// 28
+		TIMER1_IRQHandler,			// 29
+		TIMER2_IRQHandler,			// 30
+		TIMER3_IRQHandler,			// 31
+		MCPWM_IRQHandler,			// 32
+		ADC0_IRQHandler,			// 33
+		I2C0_IRQHandler,			// 34
+		I2C1_IRQHandler,			// 35
+		SPI_IRQHandler,				// 36
+		ADC1_IRQHandler,			// 37
+		SSP0_IRQHandler,			// 38
+		SSP1_IRQHandler,			// 39
+		UART0_IRQHandler,			// 40
+		UART1_IRQHandler,			// 41
+		UART2_IRQHandler,			// 42
+		UART3_IRQHandler,			// 43
+		I2S0_IRQHandler,			// 44
+		I2S1_IRQHandler,			// 45
+		SPIFI_IRQHandler,			// 46
+		SGPIO_IRQHandler,			// 47
+		GPIO0_IRQHandler,			// 48
+		GPIO1_IRQHandler,			// 49
+		GPIO2_IRQHandler,			// 50
+		GPIO3_IRQHandler,			// 51
+		GPIO4_IRQHandler,			// 52
+		GPIO5_IRQHandler,			// 53
+		GPIO6_IRQHandler,			// 54
+		GPIO7_IRQHandler,			// 55
+		GINT0_IRQHandler,			// 56
+		GINT1_IRQHandler,			// 57
+		EVRT_IRQHandler,			// 58
+		CAN1_IRQHandler,			// 59
+		0,							// 60
+		VADC_IRQHandler,			// 61
+		ATIMER_IRQHandler,			// 62
+		RTC_IRQHandler,				// 63
+		0,							// 64
+		WDT_IRQHandler,				// 65
+		M0s_IRQHandler,				// 66
+		CAN0_IRQHandler,			// 67
+		QEI_IRQHandler,				// 68
+	};
 
-// *****************************************************************************
+//*****************************************************************************
 // Functions to carry out the initialization of RW and BSS data sections. These
 // are written as separate functions rather than being inlined within the
 // ResetISR() function in order to cope with MCUs with multiple banks of
 // memory.
-// *****************************************************************************
+//*****************************************************************************
 __attribute__ ((section(".after_vectors")))
 void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
-	unsigned int *pulDest = (unsigned int *) start;
-	unsigned int *pulSrc = (unsigned int *) romstart;
+	unsigned int *pulDest = (unsigned int*) start;
+	unsigned int *pulSrc = (unsigned int*) romstart;
 	unsigned int loop;
 	for (loop = 0; loop < len; loop = loop + 4)
 		*pulDest++ = *pulSrc++;
@@ -288,49 +258,94 @@
 
 __attribute__ ((section(".after_vectors")))
 void bss_init(unsigned int start, unsigned int len) {
-	unsigned int *pulDest = (unsigned int *) start;
+	unsigned int *pulDest = (unsigned int*) start;
 	unsigned int loop;
 	for (loop = 0; loop < len; loop = loop + 4)
 		*pulDest++ = 0;
 }
 
-// *****************************************************************************
+//*****************************************************************************
 // The following symbols are constructs generated by the linker, indicating
 // the location of various points in the "Global Section Table". This table is
 // created by the linker via the Code Red managed linker script mechanism. It
 // contains the load address, execution address and length of each RW data
 // section and the execution and length of each BSS (zero initialized) section.
-// *****************************************************************************
+//*****************************************************************************
 extern unsigned int __data_section_table;
 extern unsigned int __data_section_table_end;
 extern unsigned int __bss_section_table;
 extern unsigned int __bss_section_table_end;
 
-// *****************************************************************************
+//*****************************************************************************
 // Reset entry point for your code.
 // Sets up a simple runtime environment and initializes the C/C++
 // library.
 //
-// *****************************************************************************
-
-extern "C" void software_init_hook(void) __attribute__((weak));
-
+//*****************************************************************************
 void
 ResetISR(void) {
 
-	//
-	// Copy the data sections from flash to SRAM.
-	//
+// *************************************************************
+// The following conditional block of code manually resets as
+// much of the peripheral set of the LPC43 as possible. This is
+// done because the LPC43 does not provide a means of triggering
+// a full system reset under debugger control, which can cause
+// problems in certain circumstances when debugging.
+//
+// You can prevent this code block being included if you require
+// (for example when creating a final executable which you will
+// not debug) by setting the define 'DONT_RESET_ON_RESTART'.
+//
+#ifndef DONT_RESET_ON_RESTART
+
+	// Disable interrupts
+	__asm volatile ("cpsid i");
+	// equivalent to CMSIS '__disable_irq()' function
+
+	unsigned int *RESET_CONTROL = (unsigned int *) 0x40053100;
+	// LPC_RGU->RESET_CTRL0 @ 0x40053100
+	// LPC_RGU->RESET_CTRL1 @ 0x40053104
+	// Note that we do not use the CMSIS register access mechanism,
+	// as there is no guarantee that the project has been configured
+	// to use CMSIS.
+
+	// Write to LPC_RGU->RESET_CTRL0
+	*(RESET_CONTROL+0) = 0x10DF0000;
+	// GPIO_RST|AES_RST|ETHERNET_RST|SDIO_RST|DMA_RST|
+	// USB1_RST|USB0_RST|LCD_RST
+
+	// Write to LPC_RGU->RESET_CTRL1
+	*(RESET_CONTROL+1) = 0x01DFF7FF;
+	// M0APP_RST|CAN0_RST|CAN1_RST|I2S_RST|SSP1_RST|SSP0_RST|
+	// I2C1_RST|I2C0_RST|UART3_RST|UART1_RST|UART1_RST|UART0_RST|
+	// DAC_RST|ADC1_RST|ADC0_RST|QEI_RST|MOTOCONPWM_RST|SCT_RST|
+	// RITIMER_RST|TIMER3_RST|TIMER2_RST|TIMER1_RST|TIMER0_RST
+
+	// Clear all pending interrupts in the NVIC
+	volatile unsigned int *NVIC_ICPR = (unsigned int *) 0xE000E280;
+	unsigned int irqpendloop;
+	for (irqpendloop = 0; irqpendloop < 8; irqpendloop++) {
+		*(NVIC_ICPR+irqpendloop)= 0xFFFFFFFF;
+	}
+
+	// Reenable interrupts
+	__asm volatile ("cpsie i");
+	// equivalent to CMSIS '__enable_irq()' function
+
+#endif  // ifndef DONT_RESET_ON_RESTART
+// *************************************************************
+
+
+    //
+    // Copy the data sections from flash to SRAM.
+    //
 	unsigned int LoadAddr, ExeAddr, SectionLen;
 	unsigned int *SectionTableAddr;
 
-	/* Call SystemInit() for clocking/memory setup prior to scatter load */
-	SystemInit();
-
 	// Load base address of Global Section Table
 	SectionTableAddr = &__data_section_table;
 
-	// Copy the data sections from flash to SRAM.
+    // Copy the data sections from flash to SRAM.
 	while (SectionTableAddr < &__data_section_table_end) {
 		LoadAddr = *SectionTableAddr++;
 		ExeAddr = *SectionTableAddr++;
@@ -345,107 +360,141 @@
 		bss_init(ExeAddr, SectionLen);
 	}
 
-  if (software_init_hook) // give control to the RTOS
-    software_init_hook(); // this will also call __libc_init_array
-  else {
-    #if defined(__cplusplus)
-    //
-    // Call C++ library initialisation
-    //
-    __libc_init_array();
-    #endif
+#if defined (__VFP_FP__) && !defined (__SOFTFP__)
+/*
+ * Code to enable the Cortex-M4 FPU only included
+ * if appropriate build options have been selected.
+ * Code taken from Section 7.1, Cortex-M4 TRM (DDI0439C)
+ */
+	  // CPACR is located at address 0xE000ED88
+	asm("LDR.W R0, =0xE000ED88");
+	  // Read CPACR
+	asm("LDR R1, [R0]");
+	  // Set bits 20-23 to enable CP10 and CP11 coprocessors
+	asm(" ORR R1, R1, #(0xF << 20)");
+	  // Write back the modified value to the CPACR
+	asm("STR R1, [R0]");
+#endif // (__VFP_FP__) && !(__SOFTFP__)
+
+	// ******************************
+	// Check to see if we are running the code from a non-zero
+    // address (eg RAM, external flash), in which case we need
+    // to modify the VTOR register to tell the CPU that the
+    // vector table is located at a non-0x0 address.
 
-    #if defined(__REDLIB__)
-    // Call the Redlib library, which in turn calls main()
-    __main();
-    #else
-    main();
-    #endif
-  }
+	// Note that we do not use the CMSIS register access mechanism,
+	// as there is no guarantee that the project has been configured
+	// to use CMSIS.
+	unsigned int * pSCB_VTOR = (unsigned int *) 0xE000ED08;
+	if ((unsigned int *)g_pfnVectors!=(unsigned int *) 0x00000000) {
+		// CMSIS : SCB->VTOR = <address of vector table>
+		*pSCB_VTOR = (unsigned int)g_pfnVectors;
+	}
+
+#ifdef __USE_CMSIS
+	SystemInit();
+#endif
+
+#if defined (__cplusplus)
+	//
+	// Call C++ library initialisation
 	//
-	// main() shouldn't return, but if it does, we'll just enter an infinite loop
+	__libc_init_array();
+#endif
+
+#if defined (__REDLIB__)
+	// Call the Redlib library, which in turn calls main()
+	__main() ;
+#else
+	main();
+#endif
+
 	//
-	while (1) {}
+	// main() shouldn't return, but if it does, we'll just enter an infinite loop 
+	//
+	while (1) {
+		;
+	}
 }
 
-// *****************************************************************************
+//*****************************************************************************
 // Default exception handlers. Override the ones here by defining your own
 // handler routines in your application code.
-// *****************************************************************************
+//*****************************************************************************
 __attribute__ ((section(".after_vectors")))
 void NMI_Handler(void)
 {
-	while (1) {}
+    while(1)
+    {
+    }
 }
-
 __attribute__ ((section(".after_vectors")))
 void HardFault_Handler(void)
 {
-	while (1) {}
+    while(1)
+    {
+    }
 }
-
 __attribute__ ((section(".after_vectors")))
 void MemManage_Handler(void)
 {
-	while (1) {}
+    while(1)
+    {
+    }
 }
-
 __attribute__ ((section(".after_vectors")))
 void BusFault_Handler(void)
 {
-	while (1) {}
+    while(1)
+    {
+    }
 }
-
 __attribute__ ((section(".after_vectors")))
 void UsageFault_Handler(void)
 {
-	while (1) {}
+    while(1)
+    {
+    }
 }
-
 __attribute__ ((section(".after_vectors")))
 void SVC_Handler(void)
 {
-	while (1) {}
+    while(1)
+    {
+    }
 }
-
 __attribute__ ((section(".after_vectors")))
 void DebugMon_Handler(void)
 {
-	while (1) {}
+    while(1)
+    {
+    }
 }
-
 __attribute__ ((section(".after_vectors")))
 void PendSV_Handler(void)
 {
-	while (1) {}
+    while(1)
+    {
+    }
 }
-
 __attribute__ ((section(".after_vectors")))
 void SysTick_Handler(void)
 {
-	while (1) {}
+    while(1)
+    {
+    }
 }
 
-// *****************************************************************************
+//*****************************************************************************
 //
 // Processor ends up here if an unexpected interrupt occurs or a specific
 // handler is not present in the application code.
 //
-// *****************************************************************************
+//*****************************************************************************
 __attribute__ ((section(".after_vectors")))
 void IntDefaultHandler(void)
 {
-	while (1) {}
+    while(1)
+    {
+    }
 }
-
-// *****************************************************************************
-//
-// Heap overflow check function required by REDLib_V2 library
-//
-// *****************************************************************************
-extern unsigned int *_pvHeapStart;
-unsigned int __check_heap_overflow (void * new_end_of_heap)
-{
-	return (new_end_of_heap >= (void *)&__vHeap[HEAP_SIZE/sizeof(unsigned int)]);
-}
-