Diff: spi.cpp

Revision:

20:26b1a4570f4b

Parent:

17:af1f2416dd26

--- a/spi.cpp	Wed Sep 29 12:32:10 2021 +0100
+++ b/spi.cpp	Mon Nov 22 22:26:51 2021 +0530
@@ -217,6 +217,56 @@
 	return FAILURE;
 }
 
+
+/**
+ * @brief Transfer (write/read) the number of SPI messages
+ * @param desc - The SPI descriptor
+ * @param msgs - Pointer to SPI messages
+ * @param num_of_msgs - Number of SPI messages
+ * @return SUCCESS in case of success, FAILURE otherwise.
+ * @note Use of this function requires CSB pin to be software controlled
+ */
+int32_t spi_transfer(struct spi_desc *desc, struct spi_msg *msgs,
+		     uint32_t num_of_msgs)
+{
+	mbed::SPI *spi; 			// pointer to new spi instance
+	mbed::DigitalOut *csb;   	// pointer to new CSB instance
+	uint8_t msg_cnt;			// SPI message counter
+
+	if (desc) {
+		if (!((mbed_spi_desc *)desc->extra)->use_sw_csb)
+			return FAILURE;
+
+		spi = (SPI *)(((mbed_spi_desc *)(desc->extra))->spi_port);
+		csb = (DigitalOut *)(((mbed_spi_desc *)(desc->extra))->csb_gpio);
+
+		if (!spi || !csb)
+			return FAILURE;
+
+		for (msg_cnt = 0; msg_cnt < num_of_msgs; msg_cnt++) {
+			csb->write(GPIO_LOW);
+
+			/* Perform synchronous SPI write and read */
+			if (!msgs[msg_cnt].tx_buff) {
+				spi->write(NULL, 0,
+					   (char *)msgs[msg_cnt].rx_buff, msgs[msg_cnt].bytes_number);
+			} else {
+				spi->write((const char *)msgs[msg_cnt].tx_buff, msgs[msg_cnt].bytes_number,
+					   (char *)msgs[msg_cnt].rx_buff, msgs[msg_cnt].bytes_number);
+			}
+
+			if (msgs[msg_cnt].cs_change) {
+				csb->write(GPIO_HIGH);
+			}
+		}
+
+		csb->write(GPIO_HIGH);
+		return SUCCESS;
+	}
+
+	return FAILURE;
+}
+
 #ifdef __cplusplus  // Closing extern c
 }
 #endif //  _cplusplus