...

Dependents:   2doejemplo Labo_TRSE_Drone

Fork of mbed by mbed official

Committer:
jalp89
Date:
Fri Nov 29 09:39:46 2013 +0000
Revision:
71:7ec3cb6bbcc4
Parent:
70:673126e12c73
...

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 70:673126e12c73 1 /**************************************************************************//**
bogdanm 70:673126e12c73 2 * @file core_cm4_simd.h
bogdanm 70:673126e12c73 3 * @brief CMSIS Cortex-M4 SIMD Header File
bogdanm 70:673126e12c73 4 * @version V3.20
bogdanm 70:673126e12c73 5 * @date 25. February 2013
bogdanm 70:673126e12c73 6 *
bogdanm 70:673126e12c73 7 * @note
bogdanm 70:673126e12c73 8 *
bogdanm 70:673126e12c73 9 ******************************************************************************/
bogdanm 70:673126e12c73 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
bogdanm 70:673126e12c73 11
bogdanm 70:673126e12c73 12 All rights reserved.
bogdanm 70:673126e12c73 13 Redistribution and use in source and binary forms, with or without
bogdanm 70:673126e12c73 14 modification, are permitted provided that the following conditions are met:
bogdanm 70:673126e12c73 15 - Redistributions of source code must retain the above copyright
bogdanm 70:673126e12c73 16 notice, this list of conditions and the following disclaimer.
bogdanm 70:673126e12c73 17 - Redistributions in binary form must reproduce the above copyright
bogdanm 70:673126e12c73 18 notice, this list of conditions and the following disclaimer in the
bogdanm 70:673126e12c73 19 documentation and/or other materials provided with the distribution.
bogdanm 70:673126e12c73 20 - Neither the name of ARM nor the names of its contributors may be used
bogdanm 70:673126e12c73 21 to endorse or promote products derived from this software without
bogdanm 70:673126e12c73 22 specific prior written permission.
bogdanm 70:673126e12c73 23 *
bogdanm 70:673126e12c73 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 70:673126e12c73 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 70:673126e12c73 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
bogdanm 70:673126e12c73 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
bogdanm 70:673126e12c73 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
bogdanm 70:673126e12c73 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
bogdanm 70:673126e12c73 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 70:673126e12c73 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 70:673126e12c73 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
bogdanm 70:673126e12c73 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
bogdanm 70:673126e12c73 34 POSSIBILITY OF SUCH DAMAGE.
bogdanm 70:673126e12c73 35 ---------------------------------------------------------------------------*/
bogdanm 70:673126e12c73 36
bogdanm 70:673126e12c73 37
bogdanm 70:673126e12c73 38 #ifdef __cplusplus
bogdanm 70:673126e12c73 39 extern "C" {
bogdanm 70:673126e12c73 40 #endif
bogdanm 70:673126e12c73 41
bogdanm 70:673126e12c73 42 #ifndef __CORE_CM4_SIMD_H
bogdanm 70:673126e12c73 43 #define __CORE_CM4_SIMD_H
bogdanm 70:673126e12c73 44
bogdanm 70:673126e12c73 45
bogdanm 70:673126e12c73 46 /*******************************************************************************
bogdanm 70:673126e12c73 47 * Hardware Abstraction Layer
bogdanm 70:673126e12c73 48 ******************************************************************************/
bogdanm 70:673126e12c73 49
bogdanm 70:673126e12c73 50
bogdanm 70:673126e12c73 51 /* ################### Compiler specific Intrinsics ########################### */
bogdanm 70:673126e12c73 52 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
bogdanm 70:673126e12c73 53 Access to dedicated SIMD instructions
bogdanm 70:673126e12c73 54 @{
bogdanm 70:673126e12c73 55 */
bogdanm 70:673126e12c73 56
bogdanm 70:673126e12c73 57 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
bogdanm 70:673126e12c73 58 /* ARM armcc specific functions */
bogdanm 70:673126e12c73 59
bogdanm 70:673126e12c73 60 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 70:673126e12c73 61 #define __SADD8 __sadd8
bogdanm 70:673126e12c73 62 #define __QADD8 __qadd8
bogdanm 70:673126e12c73 63 #define __SHADD8 __shadd8
bogdanm 70:673126e12c73 64 #define __UADD8 __uadd8
bogdanm 70:673126e12c73 65 #define __UQADD8 __uqadd8
bogdanm 70:673126e12c73 66 #define __UHADD8 __uhadd8
bogdanm 70:673126e12c73 67 #define __SSUB8 __ssub8
bogdanm 70:673126e12c73 68 #define __QSUB8 __qsub8
bogdanm 70:673126e12c73 69 #define __SHSUB8 __shsub8
bogdanm 70:673126e12c73 70 #define __USUB8 __usub8
bogdanm 70:673126e12c73 71 #define __UQSUB8 __uqsub8
bogdanm 70:673126e12c73 72 #define __UHSUB8 __uhsub8
bogdanm 70:673126e12c73 73 #define __SADD16 __sadd16
bogdanm 70:673126e12c73 74 #define __QADD16 __qadd16
bogdanm 70:673126e12c73 75 #define __SHADD16 __shadd16
bogdanm 70:673126e12c73 76 #define __UADD16 __uadd16
bogdanm 70:673126e12c73 77 #define __UQADD16 __uqadd16
bogdanm 70:673126e12c73 78 #define __UHADD16 __uhadd16
bogdanm 70:673126e12c73 79 #define __SSUB16 __ssub16
bogdanm 70:673126e12c73 80 #define __QSUB16 __qsub16
bogdanm 70:673126e12c73 81 #define __SHSUB16 __shsub16
bogdanm 70:673126e12c73 82 #define __USUB16 __usub16
bogdanm 70:673126e12c73 83 #define __UQSUB16 __uqsub16
bogdanm 70:673126e12c73 84 #define __UHSUB16 __uhsub16
bogdanm 70:673126e12c73 85 #define __SASX __sasx
bogdanm 70:673126e12c73 86 #define __QASX __qasx
bogdanm 70:673126e12c73 87 #define __SHASX __shasx
bogdanm 70:673126e12c73 88 #define __UASX __uasx
bogdanm 70:673126e12c73 89 #define __UQASX __uqasx
bogdanm 70:673126e12c73 90 #define __UHASX __uhasx
bogdanm 70:673126e12c73 91 #define __SSAX __ssax
bogdanm 70:673126e12c73 92 #define __QSAX __qsax
bogdanm 70:673126e12c73 93 #define __SHSAX __shsax
bogdanm 70:673126e12c73 94 #define __USAX __usax
bogdanm 70:673126e12c73 95 #define __UQSAX __uqsax
bogdanm 70:673126e12c73 96 #define __UHSAX __uhsax
bogdanm 70:673126e12c73 97 #define __USAD8 __usad8
bogdanm 70:673126e12c73 98 #define __USADA8 __usada8
bogdanm 70:673126e12c73 99 #define __SSAT16 __ssat16
bogdanm 70:673126e12c73 100 #define __USAT16 __usat16
bogdanm 70:673126e12c73 101 #define __UXTB16 __uxtb16
bogdanm 70:673126e12c73 102 #define __UXTAB16 __uxtab16
bogdanm 70:673126e12c73 103 #define __SXTB16 __sxtb16
bogdanm 70:673126e12c73 104 #define __SXTAB16 __sxtab16
bogdanm 70:673126e12c73 105 #define __SMUAD __smuad
bogdanm 70:673126e12c73 106 #define __SMUADX __smuadx
bogdanm 70:673126e12c73 107 #define __SMLAD __smlad
bogdanm 70:673126e12c73 108 #define __SMLADX __smladx
bogdanm 70:673126e12c73 109 #define __SMLALD __smlald
bogdanm 70:673126e12c73 110 #define __SMLALDX __smlaldx
bogdanm 70:673126e12c73 111 #define __SMUSD __smusd
bogdanm 70:673126e12c73 112 #define __SMUSDX __smusdx
bogdanm 70:673126e12c73 113 #define __SMLSD __smlsd
bogdanm 70:673126e12c73 114 #define __SMLSDX __smlsdx
bogdanm 70:673126e12c73 115 #define __SMLSLD __smlsld
bogdanm 70:673126e12c73 116 #define __SMLSLDX __smlsldx
bogdanm 70:673126e12c73 117 #define __SEL __sel
bogdanm 70:673126e12c73 118 #define __QADD __qadd
bogdanm 70:673126e12c73 119 #define __QSUB __qsub
bogdanm 70:673126e12c73 120
bogdanm 70:673126e12c73 121 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
bogdanm 70:673126e12c73 122 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
bogdanm 70:673126e12c73 123
bogdanm 70:673126e12c73 124 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
bogdanm 70:673126e12c73 125 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
bogdanm 70:673126e12c73 126
bogdanm 70:673126e12c73 127 #define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
bogdanm 70:673126e12c73 128 ((int64_t)(ARG3) << 32) ) >> 32))
bogdanm 70:673126e12c73 129
bogdanm 70:673126e12c73 130 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 70:673126e12c73 131
bogdanm 70:673126e12c73 132
bogdanm 70:673126e12c73 133
bogdanm 70:673126e12c73 134 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
bogdanm 70:673126e12c73 135 /* IAR iccarm specific functions */
bogdanm 70:673126e12c73 136
bogdanm 70:673126e12c73 137 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 70:673126e12c73 138 #include <cmsis_iar.h>
bogdanm 70:673126e12c73 139
bogdanm 70:673126e12c73 140 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 70:673126e12c73 141
bogdanm 70:673126e12c73 142
bogdanm 70:673126e12c73 143
bogdanm 70:673126e12c73 144 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
bogdanm 70:673126e12c73 145 /* TI CCS specific functions */
bogdanm 70:673126e12c73 146
bogdanm 70:673126e12c73 147 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 70:673126e12c73 148 #include <cmsis_ccs.h>
bogdanm 70:673126e12c73 149
bogdanm 70:673126e12c73 150 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 70:673126e12c73 151
bogdanm 70:673126e12c73 152
bogdanm 70:673126e12c73 153
bogdanm 70:673126e12c73 154 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
bogdanm 70:673126e12c73 155 /* GNU gcc specific functions */
bogdanm 70:673126e12c73 156
bogdanm 70:673126e12c73 157 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 70:673126e12c73 158 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 159 {
bogdanm 70:673126e12c73 160 uint32_t result;
bogdanm 70:673126e12c73 161
bogdanm 70:673126e12c73 162 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 163 return(result);
bogdanm 70:673126e12c73 164 }
bogdanm 70:673126e12c73 165
bogdanm 70:673126e12c73 166 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 167 {
bogdanm 70:673126e12c73 168 uint32_t result;
bogdanm 70:673126e12c73 169
bogdanm 70:673126e12c73 170 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 171 return(result);
bogdanm 70:673126e12c73 172 }
bogdanm 70:673126e12c73 173
bogdanm 70:673126e12c73 174 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 175 {
bogdanm 70:673126e12c73 176 uint32_t result;
bogdanm 70:673126e12c73 177
bogdanm 70:673126e12c73 178 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 179 return(result);
bogdanm 70:673126e12c73 180 }
bogdanm 70:673126e12c73 181
bogdanm 70:673126e12c73 182 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 183 {
bogdanm 70:673126e12c73 184 uint32_t result;
bogdanm 70:673126e12c73 185
bogdanm 70:673126e12c73 186 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 187 return(result);
bogdanm 70:673126e12c73 188 }
bogdanm 70:673126e12c73 189
bogdanm 70:673126e12c73 190 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 191 {
bogdanm 70:673126e12c73 192 uint32_t result;
bogdanm 70:673126e12c73 193
bogdanm 70:673126e12c73 194 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 195 return(result);
bogdanm 70:673126e12c73 196 }
bogdanm 70:673126e12c73 197
bogdanm 70:673126e12c73 198 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 199 {
bogdanm 70:673126e12c73 200 uint32_t result;
bogdanm 70:673126e12c73 201
bogdanm 70:673126e12c73 202 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 203 return(result);
bogdanm 70:673126e12c73 204 }
bogdanm 70:673126e12c73 205
bogdanm 70:673126e12c73 206
bogdanm 70:673126e12c73 207 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 208 {
bogdanm 70:673126e12c73 209 uint32_t result;
bogdanm 70:673126e12c73 210
bogdanm 70:673126e12c73 211 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 212 return(result);
bogdanm 70:673126e12c73 213 }
bogdanm 70:673126e12c73 214
bogdanm 70:673126e12c73 215 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 216 {
bogdanm 70:673126e12c73 217 uint32_t result;
bogdanm 70:673126e12c73 218
bogdanm 70:673126e12c73 219 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 220 return(result);
bogdanm 70:673126e12c73 221 }
bogdanm 70:673126e12c73 222
bogdanm 70:673126e12c73 223 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 224 {
bogdanm 70:673126e12c73 225 uint32_t result;
bogdanm 70:673126e12c73 226
bogdanm 70:673126e12c73 227 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 228 return(result);
bogdanm 70:673126e12c73 229 }
bogdanm 70:673126e12c73 230
bogdanm 70:673126e12c73 231 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 232 {
bogdanm 70:673126e12c73 233 uint32_t result;
bogdanm 70:673126e12c73 234
bogdanm 70:673126e12c73 235 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 236 return(result);
bogdanm 70:673126e12c73 237 }
bogdanm 70:673126e12c73 238
bogdanm 70:673126e12c73 239 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 240 {
bogdanm 70:673126e12c73 241 uint32_t result;
bogdanm 70:673126e12c73 242
bogdanm 70:673126e12c73 243 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 244 return(result);
bogdanm 70:673126e12c73 245 }
bogdanm 70:673126e12c73 246
bogdanm 70:673126e12c73 247 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 248 {
bogdanm 70:673126e12c73 249 uint32_t result;
bogdanm 70:673126e12c73 250
bogdanm 70:673126e12c73 251 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 252 return(result);
bogdanm 70:673126e12c73 253 }
bogdanm 70:673126e12c73 254
bogdanm 70:673126e12c73 255
bogdanm 70:673126e12c73 256 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 257 {
bogdanm 70:673126e12c73 258 uint32_t result;
bogdanm 70:673126e12c73 259
bogdanm 70:673126e12c73 260 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 261 return(result);
bogdanm 70:673126e12c73 262 }
bogdanm 70:673126e12c73 263
bogdanm 70:673126e12c73 264 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 265 {
bogdanm 70:673126e12c73 266 uint32_t result;
bogdanm 70:673126e12c73 267
bogdanm 70:673126e12c73 268 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 269 return(result);
bogdanm 70:673126e12c73 270 }
bogdanm 70:673126e12c73 271
bogdanm 70:673126e12c73 272 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 273 {
bogdanm 70:673126e12c73 274 uint32_t result;
bogdanm 70:673126e12c73 275
bogdanm 70:673126e12c73 276 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 277 return(result);
bogdanm 70:673126e12c73 278 }
bogdanm 70:673126e12c73 279
bogdanm 70:673126e12c73 280 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 281 {
bogdanm 70:673126e12c73 282 uint32_t result;
bogdanm 70:673126e12c73 283
bogdanm 70:673126e12c73 284 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 285 return(result);
bogdanm 70:673126e12c73 286 }
bogdanm 70:673126e12c73 287
bogdanm 70:673126e12c73 288 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 289 {
bogdanm 70:673126e12c73 290 uint32_t result;
bogdanm 70:673126e12c73 291
bogdanm 70:673126e12c73 292 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 293 return(result);
bogdanm 70:673126e12c73 294 }
bogdanm 70:673126e12c73 295
bogdanm 70:673126e12c73 296 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 297 {
bogdanm 70:673126e12c73 298 uint32_t result;
bogdanm 70:673126e12c73 299
bogdanm 70:673126e12c73 300 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 301 return(result);
bogdanm 70:673126e12c73 302 }
bogdanm 70:673126e12c73 303
bogdanm 70:673126e12c73 304 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 305 {
bogdanm 70:673126e12c73 306 uint32_t result;
bogdanm 70:673126e12c73 307
bogdanm 70:673126e12c73 308 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 309 return(result);
bogdanm 70:673126e12c73 310 }
bogdanm 70:673126e12c73 311
bogdanm 70:673126e12c73 312 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 313 {
bogdanm 70:673126e12c73 314 uint32_t result;
bogdanm 70:673126e12c73 315
bogdanm 70:673126e12c73 316 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 317 return(result);
bogdanm 70:673126e12c73 318 }
bogdanm 70:673126e12c73 319
bogdanm 70:673126e12c73 320 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 321 {
bogdanm 70:673126e12c73 322 uint32_t result;
bogdanm 70:673126e12c73 323
bogdanm 70:673126e12c73 324 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 325 return(result);
bogdanm 70:673126e12c73 326 }
bogdanm 70:673126e12c73 327
bogdanm 70:673126e12c73 328 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 329 {
bogdanm 70:673126e12c73 330 uint32_t result;
bogdanm 70:673126e12c73 331
bogdanm 70:673126e12c73 332 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 333 return(result);
bogdanm 70:673126e12c73 334 }
bogdanm 70:673126e12c73 335
bogdanm 70:673126e12c73 336 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 337 {
bogdanm 70:673126e12c73 338 uint32_t result;
bogdanm 70:673126e12c73 339
bogdanm 70:673126e12c73 340 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 341 return(result);
bogdanm 70:673126e12c73 342 }
bogdanm 70:673126e12c73 343
bogdanm 70:673126e12c73 344 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 345 {
bogdanm 70:673126e12c73 346 uint32_t result;
bogdanm 70:673126e12c73 347
bogdanm 70:673126e12c73 348 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 349 return(result);
bogdanm 70:673126e12c73 350 }
bogdanm 70:673126e12c73 351
bogdanm 70:673126e12c73 352 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 353 {
bogdanm 70:673126e12c73 354 uint32_t result;
bogdanm 70:673126e12c73 355
bogdanm 70:673126e12c73 356 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 357 return(result);
bogdanm 70:673126e12c73 358 }
bogdanm 70:673126e12c73 359
bogdanm 70:673126e12c73 360 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 361 {
bogdanm 70:673126e12c73 362 uint32_t result;
bogdanm 70:673126e12c73 363
bogdanm 70:673126e12c73 364 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 365 return(result);
bogdanm 70:673126e12c73 366 }
bogdanm 70:673126e12c73 367
bogdanm 70:673126e12c73 368 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 369 {
bogdanm 70:673126e12c73 370 uint32_t result;
bogdanm 70:673126e12c73 371
bogdanm 70:673126e12c73 372 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 373 return(result);
bogdanm 70:673126e12c73 374 }
bogdanm 70:673126e12c73 375
bogdanm 70:673126e12c73 376 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 377 {
bogdanm 70:673126e12c73 378 uint32_t result;
bogdanm 70:673126e12c73 379
bogdanm 70:673126e12c73 380 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 381 return(result);
bogdanm 70:673126e12c73 382 }
bogdanm 70:673126e12c73 383
bogdanm 70:673126e12c73 384 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 385 {
bogdanm 70:673126e12c73 386 uint32_t result;
bogdanm 70:673126e12c73 387
bogdanm 70:673126e12c73 388 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 389 return(result);
bogdanm 70:673126e12c73 390 }
bogdanm 70:673126e12c73 391
bogdanm 70:673126e12c73 392 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 393 {
bogdanm 70:673126e12c73 394 uint32_t result;
bogdanm 70:673126e12c73 395
bogdanm 70:673126e12c73 396 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 397 return(result);
bogdanm 70:673126e12c73 398 }
bogdanm 70:673126e12c73 399
bogdanm 70:673126e12c73 400 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 401 {
bogdanm 70:673126e12c73 402 uint32_t result;
bogdanm 70:673126e12c73 403
bogdanm 70:673126e12c73 404 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 405 return(result);
bogdanm 70:673126e12c73 406 }
bogdanm 70:673126e12c73 407
bogdanm 70:673126e12c73 408 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 409 {
bogdanm 70:673126e12c73 410 uint32_t result;
bogdanm 70:673126e12c73 411
bogdanm 70:673126e12c73 412 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 413 return(result);
bogdanm 70:673126e12c73 414 }
bogdanm 70:673126e12c73 415
bogdanm 70:673126e12c73 416 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 417 {
bogdanm 70:673126e12c73 418 uint32_t result;
bogdanm 70:673126e12c73 419
bogdanm 70:673126e12c73 420 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 421 return(result);
bogdanm 70:673126e12c73 422 }
bogdanm 70:673126e12c73 423
bogdanm 70:673126e12c73 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 425 {
bogdanm 70:673126e12c73 426 uint32_t result;
bogdanm 70:673126e12c73 427
bogdanm 70:673126e12c73 428 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 429 return(result);
bogdanm 70:673126e12c73 430 }
bogdanm 70:673126e12c73 431
bogdanm 70:673126e12c73 432 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 433 {
bogdanm 70:673126e12c73 434 uint32_t result;
bogdanm 70:673126e12c73 435
bogdanm 70:673126e12c73 436 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 437 return(result);
bogdanm 70:673126e12c73 438 }
bogdanm 70:673126e12c73 439
bogdanm 70:673126e12c73 440 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 441 {
bogdanm 70:673126e12c73 442 uint32_t result;
bogdanm 70:673126e12c73 443
bogdanm 70:673126e12c73 444 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 445 return(result);
bogdanm 70:673126e12c73 446 }
bogdanm 70:673126e12c73 447
bogdanm 70:673126e12c73 448 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 449 {
bogdanm 70:673126e12c73 450 uint32_t result;
bogdanm 70:673126e12c73 451
bogdanm 70:673126e12c73 452 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 453 return(result);
bogdanm 70:673126e12c73 454 }
bogdanm 70:673126e12c73 455
bogdanm 70:673126e12c73 456 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 70:673126e12c73 457 {
bogdanm 70:673126e12c73 458 uint32_t result;
bogdanm 70:673126e12c73 459
bogdanm 70:673126e12c73 460 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 70:673126e12c73 461 return(result);
bogdanm 70:673126e12c73 462 }
bogdanm 70:673126e12c73 463
bogdanm 70:673126e12c73 464 #define __SSAT16(ARG1,ARG2) \
bogdanm 70:673126e12c73 465 ({ \
bogdanm 70:673126e12c73 466 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 70:673126e12c73 467 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 70:673126e12c73 468 __RES; \
bogdanm 70:673126e12c73 469 })
bogdanm 70:673126e12c73 470
bogdanm 70:673126e12c73 471 #define __USAT16(ARG1,ARG2) \
bogdanm 70:673126e12c73 472 ({ \
bogdanm 70:673126e12c73 473 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 70:673126e12c73 474 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 70:673126e12c73 475 __RES; \
bogdanm 70:673126e12c73 476 })
bogdanm 70:673126e12c73 477
bogdanm 70:673126e12c73 478 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
bogdanm 70:673126e12c73 479 {
bogdanm 70:673126e12c73 480 uint32_t result;
bogdanm 70:673126e12c73 481
bogdanm 70:673126e12c73 482 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
bogdanm 70:673126e12c73 483 return(result);
bogdanm 70:673126e12c73 484 }
bogdanm 70:673126e12c73 485
bogdanm 70:673126e12c73 486 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 487 {
bogdanm 70:673126e12c73 488 uint32_t result;
bogdanm 70:673126e12c73 489
bogdanm 70:673126e12c73 490 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 491 return(result);
bogdanm 70:673126e12c73 492 }
bogdanm 70:673126e12c73 493
bogdanm 70:673126e12c73 494 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
bogdanm 70:673126e12c73 495 {
bogdanm 70:673126e12c73 496 uint32_t result;
bogdanm 70:673126e12c73 497
bogdanm 70:673126e12c73 498 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
bogdanm 70:673126e12c73 499 return(result);
bogdanm 70:673126e12c73 500 }
bogdanm 70:673126e12c73 501
bogdanm 70:673126e12c73 502 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 503 {
bogdanm 70:673126e12c73 504 uint32_t result;
bogdanm 70:673126e12c73 505
bogdanm 70:673126e12c73 506 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 507 return(result);
bogdanm 70:673126e12c73 508 }
bogdanm 70:673126e12c73 509
bogdanm 70:673126e12c73 510 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 511 {
bogdanm 70:673126e12c73 512 uint32_t result;
bogdanm 70:673126e12c73 513
bogdanm 70:673126e12c73 514 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 515 return(result);
bogdanm 70:673126e12c73 516 }
bogdanm 70:673126e12c73 517
bogdanm 70:673126e12c73 518 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 519 {
bogdanm 70:673126e12c73 520 uint32_t result;
bogdanm 70:673126e12c73 521
bogdanm 70:673126e12c73 522 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 523 return(result);
bogdanm 70:673126e12c73 524 }
bogdanm 70:673126e12c73 525
bogdanm 70:673126e12c73 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 70:673126e12c73 527 {
bogdanm 70:673126e12c73 528 uint32_t result;
bogdanm 70:673126e12c73 529
bogdanm 70:673126e12c73 530 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 70:673126e12c73 531 return(result);
bogdanm 70:673126e12c73 532 }
bogdanm 70:673126e12c73 533
bogdanm 70:673126e12c73 534 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 70:673126e12c73 535 {
bogdanm 70:673126e12c73 536 uint32_t result;
bogdanm 70:673126e12c73 537
bogdanm 70:673126e12c73 538 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 70:673126e12c73 539 return(result);
bogdanm 70:673126e12c73 540 }
bogdanm 70:673126e12c73 541
bogdanm 70:673126e12c73 542 #define __SMLALD(ARG1,ARG2,ARG3) \
bogdanm 70:673126e12c73 543 ({ \
bogdanm 70:673126e12c73 544 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
bogdanm 70:673126e12c73 545 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 70:673126e12c73 546 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 70:673126e12c73 547 })
bogdanm 70:673126e12c73 548
bogdanm 70:673126e12c73 549 #define __SMLALDX(ARG1,ARG2,ARG3) \
bogdanm 70:673126e12c73 550 ({ \
bogdanm 70:673126e12c73 551 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
bogdanm 70:673126e12c73 552 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 70:673126e12c73 553 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 70:673126e12c73 554 })
bogdanm 70:673126e12c73 555
bogdanm 70:673126e12c73 556 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 557 {
bogdanm 70:673126e12c73 558 uint32_t result;
bogdanm 70:673126e12c73 559
bogdanm 70:673126e12c73 560 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 561 return(result);
bogdanm 70:673126e12c73 562 }
bogdanm 70:673126e12c73 563
bogdanm 70:673126e12c73 564 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 565 {
bogdanm 70:673126e12c73 566 uint32_t result;
bogdanm 70:673126e12c73 567
bogdanm 70:673126e12c73 568 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 569 return(result);
bogdanm 70:673126e12c73 570 }
bogdanm 70:673126e12c73 571
bogdanm 70:673126e12c73 572 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 70:673126e12c73 573 {
bogdanm 70:673126e12c73 574 uint32_t result;
bogdanm 70:673126e12c73 575
bogdanm 70:673126e12c73 576 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 70:673126e12c73 577 return(result);
bogdanm 70:673126e12c73 578 }
bogdanm 70:673126e12c73 579
bogdanm 70:673126e12c73 580 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 70:673126e12c73 581 {
bogdanm 70:673126e12c73 582 uint32_t result;
bogdanm 70:673126e12c73 583
bogdanm 70:673126e12c73 584 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 70:673126e12c73 585 return(result);
bogdanm 70:673126e12c73 586 }
bogdanm 70:673126e12c73 587
bogdanm 70:673126e12c73 588 #define __SMLSLD(ARG1,ARG2,ARG3) \
bogdanm 70:673126e12c73 589 ({ \
bogdanm 70:673126e12c73 590 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
bogdanm 70:673126e12c73 591 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 70:673126e12c73 592 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 70:673126e12c73 593 })
bogdanm 70:673126e12c73 594
bogdanm 70:673126e12c73 595 #define __SMLSLDX(ARG1,ARG2,ARG3) \
bogdanm 70:673126e12c73 596 ({ \
bogdanm 70:673126e12c73 597 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
bogdanm 70:673126e12c73 598 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 70:673126e12c73 599 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 70:673126e12c73 600 })
bogdanm 70:673126e12c73 601
bogdanm 70:673126e12c73 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 603 {
bogdanm 70:673126e12c73 604 uint32_t result;
bogdanm 70:673126e12c73 605
bogdanm 70:673126e12c73 606 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 607 return(result);
bogdanm 70:673126e12c73 608 }
bogdanm 70:673126e12c73 609
bogdanm 70:673126e12c73 610 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 611 {
bogdanm 70:673126e12c73 612 uint32_t result;
bogdanm 70:673126e12c73 613
bogdanm 70:673126e12c73 614 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 615 return(result);
bogdanm 70:673126e12c73 616 }
bogdanm 70:673126e12c73 617
bogdanm 70:673126e12c73 618 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB(uint32_t op1, uint32_t op2)
bogdanm 70:673126e12c73 619 {
bogdanm 70:673126e12c73 620 uint32_t result;
bogdanm 70:673126e12c73 621
bogdanm 70:673126e12c73 622 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 70:673126e12c73 623 return(result);
bogdanm 70:673126e12c73 624 }
bogdanm 70:673126e12c73 625
bogdanm 70:673126e12c73 626 #define __PKHBT(ARG1,ARG2,ARG3) \
bogdanm 70:673126e12c73 627 ({ \
bogdanm 70:673126e12c73 628 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
bogdanm 70:673126e12c73 629 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
bogdanm 70:673126e12c73 630 __RES; \
bogdanm 70:673126e12c73 631 })
bogdanm 70:673126e12c73 632
bogdanm 70:673126e12c73 633 #define __PKHTB(ARG1,ARG2,ARG3) \
bogdanm 70:673126e12c73 634 ({ \
bogdanm 70:673126e12c73 635 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
bogdanm 70:673126e12c73 636 if (ARG3 == 0) \
bogdanm 70:673126e12c73 637 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
bogdanm 70:673126e12c73 638 else \
bogdanm 70:673126e12c73 639 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
bogdanm 70:673126e12c73 640 __RES; \
bogdanm 70:673126e12c73 641 })
bogdanm 70:673126e12c73 642
bogdanm 70:673126e12c73 643 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
bogdanm 70:673126e12c73 644 {
bogdanm 70:673126e12c73 645 int32_t result;
bogdanm 70:673126e12c73 646
bogdanm 70:673126e12c73 647 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
bogdanm 70:673126e12c73 648 return(result);
bogdanm 70:673126e12c73 649 }
bogdanm 70:673126e12c73 650
bogdanm 70:673126e12c73 651 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 70:673126e12c73 652
bogdanm 70:673126e12c73 653
bogdanm 70:673126e12c73 654
bogdanm 70:673126e12c73 655 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
bogdanm 70:673126e12c73 656 /* TASKING carm specific functions */
bogdanm 70:673126e12c73 657
bogdanm 70:673126e12c73 658
bogdanm 70:673126e12c73 659 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 70:673126e12c73 660 /* not yet supported */
bogdanm 70:673126e12c73 661 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 70:673126e12c73 662
bogdanm 70:673126e12c73 663
bogdanm 70:673126e12c73 664 #endif
bogdanm 70:673126e12c73 665
bogdanm 70:673126e12c73 666 /*@} end of group CMSIS_SIMD_intrinsics */
bogdanm 70:673126e12c73 667
bogdanm 70:673126e12c73 668
bogdanm 70:673126e12c73 669 #endif /* __CORE_CM4_SIMD_H */
bogdanm 70:673126e12c73 670
bogdanm 70:673126e12c73 671 #ifdef __cplusplus
bogdanm 70:673126e12c73 672 }
bogdanm 70:673126e12c73 673 #endif