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TARGET_LPC2368/core_cmInstr.h@71:7ec3cb6bbcc4, 2013-11-29 (annotated)

Committer:
jalp89
Date:
Fri Nov 29 09:39:46 2013 +0000
Revision:
71:7ec3cb6bbcc4
Parent:
64:e3affc9e7238 
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bogdanm 64:e3affc9e7238 1 /**************************************************************************//**
bogdanm 64:e3affc9e7238 2 * @file core_cmInstr.h
bogdanm 64:e3affc9e7238 3 * @brief CMSIS Cortex-M Core Instruction Access Header File
bogdanm 64:e3affc9e7238 4 * @version V3.20
bogdanm 64:e3affc9e7238 5 * @date 05. March 2013
bogdanm 64:e3affc9e7238 6 *
bogdanm 64:e3affc9e7238 7 * @note
bogdanm 64:e3affc9e7238 8 *
bogdanm 64:e3affc9e7238 9 ******************************************************************************/
bogdanm 64:e3affc9e7238 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
bogdanm 64:e3affc9e7238 11
bogdanm 64:e3affc9e7238 12 All rights reserved.
bogdanm 64:e3affc9e7238 13 Redistribution and use in source and binary forms, with or without
bogdanm 64:e3affc9e7238 14 modification, are permitted provided that the following conditions are met:
bogdanm 64:e3affc9e7238 15 - Redistributions of source code must retain the above copyright
bogdanm 64:e3affc9e7238 16 notice, this list of conditions and the following disclaimer.
bogdanm 64:e3affc9e7238 17 - Redistributions in binary form must reproduce the above copyright
bogdanm 64:e3affc9e7238 18 notice, this list of conditions and the following disclaimer in the
bogdanm 64:e3affc9e7238 19 documentation and/or other materials provided with the distribution.
bogdanm 64:e3affc9e7238 20 - Neither the name of ARM nor the names of its contributors may be used
bogdanm 64:e3affc9e7238 21 to endorse or promote products derived from this software without
bogdanm 64:e3affc9e7238 22 specific prior written permission.
bogdanm 64:e3affc9e7238 23 *
bogdanm 64:e3affc9e7238 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 64:e3affc9e7238 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 64:e3affc9e7238 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
bogdanm 64:e3affc9e7238 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
bogdanm 64:e3affc9e7238 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
bogdanm 64:e3affc9e7238 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
bogdanm 64:e3affc9e7238 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 64:e3affc9e7238 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 64:e3affc9e7238 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
bogdanm 64:e3affc9e7238 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
bogdanm 64:e3affc9e7238 34 POSSIBILITY OF SUCH DAMAGE.
bogdanm 64:e3affc9e7238 35 ---------------------------------------------------------------------------*/
bogdanm 64:e3affc9e7238 36
bogdanm 64:e3affc9e7238 37
bogdanm 64:e3affc9e7238 38 #ifndef __CORE_CMINSTR_H
bogdanm 64:e3affc9e7238 39 #define __CORE_CMINSTR_H
bogdanm 64:e3affc9e7238 40
bogdanm 64:e3affc9e7238 41
bogdanm 64:e3affc9e7238 42 /* ########################## Core Instruction Access ######################### */
bogdanm 64:e3affc9e7238 43 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
bogdanm 64:e3affc9e7238 44 Access to dedicated instructions
bogdanm 64:e3affc9e7238 45 @{
bogdanm 64:e3affc9e7238 46 */
bogdanm 64:e3affc9e7238 47
bogdanm 64:e3affc9e7238 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
bogdanm 64:e3affc9e7238 49 /* ARM armcc specific functions */
bogdanm 64:e3affc9e7238 50
bogdanm 64:e3affc9e7238 51 #if (__ARMCC_VERSION < 400677)
bogdanm 64:e3affc9e7238 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
bogdanm 64:e3affc9e7238 53 #endif
bogdanm 64:e3affc9e7238 54
bogdanm 64:e3affc9e7238 55
bogdanm 64:e3affc9e7238 56 /** \brief No Operation
bogdanm 64:e3affc9e7238 57
bogdanm 64:e3affc9e7238 58 No Operation does nothing. This instruction can be used for code alignment purposes.
bogdanm 64:e3affc9e7238 59 */
bogdanm 64:e3affc9e7238 60 #define __NOP __nop
bogdanm 64:e3affc9e7238 61
bogdanm 64:e3affc9e7238 62
bogdanm 64:e3affc9e7238 63 /** \brief Wait For Interrupt
bogdanm 64:e3affc9e7238 64
bogdanm 64:e3affc9e7238 65 Wait For Interrupt is a hint instruction that suspends execution
bogdanm 64:e3affc9e7238 66 until one of a number of events occurs.
bogdanm 64:e3affc9e7238 67 */
bogdanm 64:e3affc9e7238 68 #define __WFI __wfi
bogdanm 64:e3affc9e7238 69
bogdanm 64:e3affc9e7238 70
bogdanm 64:e3affc9e7238 71 /** \brief Wait For Event
bogdanm 64:e3affc9e7238 72
bogdanm 64:e3affc9e7238 73 Wait For Event is a hint instruction that permits the processor to enter
bogdanm 64:e3affc9e7238 74 a low-power state until one of a number of events occurs.
bogdanm 64:e3affc9e7238 75 */
bogdanm 64:e3affc9e7238 76 #define __WFE __wfe
bogdanm 64:e3affc9e7238 77
bogdanm 64:e3affc9e7238 78
bogdanm 64:e3affc9e7238 79 /** \brief Send Event
bogdanm 64:e3affc9e7238 80
bogdanm 64:e3affc9e7238 81 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
bogdanm 64:e3affc9e7238 82 */
bogdanm 64:e3affc9e7238 83 #define __SEV __sev
bogdanm 64:e3affc9e7238 84
bogdanm 64:e3affc9e7238 85
bogdanm 64:e3affc9e7238 86 /** \brief Instruction Synchronization Barrier
bogdanm 64:e3affc9e7238 87
bogdanm 64:e3affc9e7238 88 Instruction Synchronization Barrier flushes the pipeline in the processor,
bogdanm 64:e3affc9e7238 89 so that all instructions following the ISB are fetched from cache or
bogdanm 64:e3affc9e7238 90 memory, after the instruction has been completed.
bogdanm 64:e3affc9e7238 91 */
bogdanm 64:e3affc9e7238 92 #define __ISB() __isb(0xF)
bogdanm 64:e3affc9e7238 93
bogdanm 64:e3affc9e7238 94
bogdanm 64:e3affc9e7238 95 /** \brief Data Synchronization Barrier
bogdanm 64:e3affc9e7238 96
bogdanm 64:e3affc9e7238 97 This function acts as a special kind of Data Memory Barrier.
bogdanm 64:e3affc9e7238 98 It completes when all explicit memory accesses before this instruction complete.
bogdanm 64:e3affc9e7238 99 */
bogdanm 64:e3affc9e7238 100 #define __DSB() __dsb(0xF)
bogdanm 64:e3affc9e7238 101
bogdanm 64:e3affc9e7238 102
bogdanm 64:e3affc9e7238 103 /** \brief Data Memory Barrier
bogdanm 64:e3affc9e7238 104
bogdanm 64:e3affc9e7238 105 This function ensures the apparent order of the explicit memory operations before
bogdanm 64:e3affc9e7238 106 and after the instruction, without ensuring their completion.
bogdanm 64:e3affc9e7238 107 */
bogdanm 64:e3affc9e7238 108 #define __DMB() __dmb(0xF)
bogdanm 64:e3affc9e7238 109
bogdanm 64:e3affc9e7238 110
bogdanm 64:e3affc9e7238 111 /** \brief Reverse byte order (32 bit)
bogdanm 64:e3affc9e7238 112
bogdanm 64:e3affc9e7238 113 This function reverses the byte order in integer value.
bogdanm 64:e3affc9e7238 114
bogdanm 64:e3affc9e7238 115 \param [in] value Value to reverse
bogdanm 64:e3affc9e7238 116 \return Reversed value
bogdanm 64:e3affc9e7238 117 */
bogdanm 64:e3affc9e7238 118 #define __REV __rev
bogdanm 64:e3affc9e7238 119
bogdanm 64:e3affc9e7238 120
bogdanm 64:e3affc9e7238 121 /** \brief Reverse byte order (16 bit)
bogdanm 64:e3affc9e7238 122
bogdanm 64:e3affc9e7238 123 This function reverses the byte order in two unsigned short values.
bogdanm 64:e3affc9e7238 124
bogdanm 64:e3affc9e7238 125 \param [in] value Value to reverse
bogdanm 64:e3affc9e7238 126 \return Reversed value
bogdanm 64:e3affc9e7238 127 */
bogdanm 64:e3affc9e7238 128 #ifndef __NO_EMBEDDED_ASM
bogdanm 64:e3affc9e7238 129 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
bogdanm 64:e3affc9e7238 130 {
bogdanm 64:e3affc9e7238 131 rev16 r0, r0
bogdanm 64:e3affc9e7238 132 bx lr
bogdanm 64:e3affc9e7238 133 }
bogdanm 64:e3affc9e7238 134 #endif
bogdanm 64:e3affc9e7238 135
bogdanm 64:e3affc9e7238 136 /** \brief Reverse byte order in signed short value
bogdanm 64:e3affc9e7238 137
bogdanm 64:e3affc9e7238 138 This function reverses the byte order in a signed short value with sign extension to integer.
bogdanm 64:e3affc9e7238 139
bogdanm 64:e3affc9e7238 140 \param [in] value Value to reverse
bogdanm 64:e3affc9e7238 141 \return Reversed value
bogdanm 64:e3affc9e7238 142 */
bogdanm 64:e3affc9e7238 143 #ifndef __NO_EMBEDDED_ASM
bogdanm 64:e3affc9e7238 144 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
bogdanm 64:e3affc9e7238 145 {
bogdanm 64:e3affc9e7238 146 revsh r0, r0
bogdanm 64:e3affc9e7238 147 bx lr
bogdanm 64:e3affc9e7238 148 }
bogdanm 64:e3affc9e7238 149 #endif
bogdanm 64:e3affc9e7238 150
bogdanm 64:e3affc9e7238 151
bogdanm 64:e3affc9e7238 152 /** \brief Rotate Right in unsigned value (32 bit)
bogdanm 64:e3affc9e7238 153
bogdanm 64:e3affc9e7238 154 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
bogdanm 64:e3affc9e7238 155
bogdanm 64:e3affc9e7238 156 \param [in] value Value to rotate
bogdanm 64:e3affc9e7238 157 \param [in] value Number of Bits to rotate
bogdanm 64:e3affc9e7238 158 \return Rotated value
bogdanm 64:e3affc9e7238 159 */
bogdanm 64:e3affc9e7238 160 #define __ROR __ror
bogdanm 64:e3affc9e7238 161
bogdanm 64:e3affc9e7238 162
bogdanm 64:e3affc9e7238 163 /** \brief Breakpoint
bogdanm 64:e3affc9e7238 164
bogdanm 64:e3affc9e7238 165 This function causes the processor to enter Debug state.
bogdanm 64:e3affc9e7238 166 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
bogdanm 64:e3affc9e7238 167
bogdanm 64:e3affc9e7238 168 \param [in] value is ignored by the processor.
bogdanm 64:e3affc9e7238 169 If required, a debugger can use it to store additional information about the breakpoint.
bogdanm 64:e3affc9e7238 170 */
bogdanm 64:e3affc9e7238 171 #define __BKPT(value) __breakpoint(value)
bogdanm 64:e3affc9e7238 172
bogdanm 64:e3affc9e7238 173
bogdanm 64:e3affc9e7238 174 #if (__CORTEX_M >= 0x03)
bogdanm 64:e3affc9e7238 175
bogdanm 64:e3affc9e7238 176 /** \brief Reverse bit order of value
bogdanm 64:e3affc9e7238 177
bogdanm 64:e3affc9e7238 178 This function reverses the bit order of the given value.
bogdanm 64:e3affc9e7238 179
bogdanm 64:e3affc9e7238 180 \param [in] value Value to reverse
bogdanm 64:e3affc9e7238 181 \return Reversed value
bogdanm 64:e3affc9e7238 182 */
bogdanm 64:e3affc9e7238 183 #define __RBIT __rbit
bogdanm 64:e3affc9e7238 184
bogdanm 64:e3affc9e7238 185
bogdanm 64:e3affc9e7238 186 /** \brief LDR Exclusive (8 bit)
bogdanm 64:e3affc9e7238 187
bogdanm 64:e3affc9e7238 188 This function performs a exclusive LDR command for 8 bit value.
bogdanm 64:e3affc9e7238 189
bogdanm 64:e3affc9e7238 190 \param [in] ptr Pointer to data
bogdanm 64:e3affc9e7238 191 \return value of type uint8_t at (*ptr)
bogdanm 64:e3affc9e7238 192 */
bogdanm 64:e3affc9e7238 193 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
bogdanm 64:e3affc9e7238 194
bogdanm 64:e3affc9e7238 195
bogdanm 64:e3affc9e7238 196 /** \brief LDR Exclusive (16 bit)
bogdanm 64:e3affc9e7238 197
bogdanm 64:e3affc9e7238 198 This function performs a exclusive LDR command for 16 bit values.
bogdanm 64:e3affc9e7238 199
bogdanm 64:e3affc9e7238 200 \param [in] ptr Pointer to data
bogdanm 64:e3affc9e7238 201 \return value of type uint16_t at (*ptr)
bogdanm 64:e3affc9e7238 202 */
bogdanm 64:e3affc9e7238 203 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
bogdanm 64:e3affc9e7238 204
bogdanm 64:e3affc9e7238 205
bogdanm 64:e3affc9e7238 206 /** \brief LDR Exclusive (32 bit)
bogdanm 64:e3affc9e7238 207
bogdanm 64:e3affc9e7238 208 This function performs a exclusive LDR command for 32 bit values.
bogdanm 64:e3affc9e7238 209
bogdanm 64:e3affc9e7238 210 \param [in] ptr Pointer to data
bogdanm 64:e3affc9e7238 211 \return value of type uint32_t at (*ptr)
bogdanm 64:e3affc9e7238 212 */
bogdanm 64:e3affc9e7238 213 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
bogdanm 64:e3affc9e7238 214
bogdanm 64:e3affc9e7238 215
bogdanm 64:e3affc9e7238 216 /** \brief STR Exclusive (8 bit)
bogdanm 64:e3affc9e7238 217
bogdanm 64:e3affc9e7238 218 This function performs a exclusive STR command for 8 bit values.
bogdanm 64:e3affc9e7238 219
bogdanm 64:e3affc9e7238 220 \param [in] value Value to store
bogdanm 64:e3affc9e7238 221 \param [in] ptr Pointer to location
bogdanm 64:e3affc9e7238 222 \return 0 Function succeeded
bogdanm 64:e3affc9e7238 223 \return 1 Function failed
bogdanm 64:e3affc9e7238 224 */
bogdanm 64:e3affc9e7238 225 #define __STREXB(value, ptr) __strex(value, ptr)
bogdanm 64:e3affc9e7238 226
bogdanm 64:e3affc9e7238 227
bogdanm 64:e3affc9e7238 228 /** \brief STR Exclusive (16 bit)
bogdanm 64:e3affc9e7238 229
bogdanm 64:e3affc9e7238 230 This function performs a exclusive STR command for 16 bit values.
bogdanm 64:e3affc9e7238 231
bogdanm 64:e3affc9e7238 232 \param [in] value Value to store
bogdanm 64:e3affc9e7238 233 \param [in] ptr Pointer to location
bogdanm 64:e3affc9e7238 234 \return 0 Function succeeded
bogdanm 64:e3affc9e7238 235 \return 1 Function failed
bogdanm 64:e3affc9e7238 236 */
bogdanm 64:e3affc9e7238 237 #define __STREXH(value, ptr) __strex(value, ptr)
bogdanm 64:e3affc9e7238 238
bogdanm 64:e3affc9e7238 239
bogdanm 64:e3affc9e7238 240 /** \brief STR Exclusive (32 bit)
bogdanm 64:e3affc9e7238 241
bogdanm 64:e3affc9e7238 242 This function performs a exclusive STR command for 32 bit values.
bogdanm 64:e3affc9e7238 243
bogdanm 64:e3affc9e7238 244 \param [in] value Value to store
bogdanm 64:e3affc9e7238 245 \param [in] ptr Pointer to location
bogdanm 64:e3affc9e7238 246 \return 0 Function succeeded
bogdanm 64:e3affc9e7238 247 \return 1 Function failed
bogdanm 64:e3affc9e7238 248 */
bogdanm 64:e3affc9e7238 249 #define __STREXW(value, ptr) __strex(value, ptr)
bogdanm 64:e3affc9e7238 250
bogdanm 64:e3affc9e7238 251
bogdanm 64:e3affc9e7238 252 /** \brief Remove the exclusive lock
bogdanm 64:e3affc9e7238 253
bogdanm 64:e3affc9e7238 254 This function removes the exclusive lock which is created by LDREX.
bogdanm 64:e3affc9e7238 255
bogdanm 64:e3affc9e7238 256 */
bogdanm 64:e3affc9e7238 257 #define __CLREX __clrex
bogdanm 64:e3affc9e7238 258
bogdanm 64:e3affc9e7238 259
bogdanm 64:e3affc9e7238 260 /** \brief Signed Saturate
bogdanm 64:e3affc9e7238 261
bogdanm 64:e3affc9e7238 262 This function saturates a signed value.
bogdanm 64:e3affc9e7238 263
bogdanm 64:e3affc9e7238 264 \param [in] value Value to be saturated
bogdanm 64:e3affc9e7238 265 \param [in] sat Bit position to saturate to (1..32)
bogdanm 64:e3affc9e7238 266 \return Saturated value
bogdanm 64:e3affc9e7238 267 */
bogdanm 64:e3affc9e7238 268 #define __SSAT __ssat
bogdanm 64:e3affc9e7238 269
bogdanm 64:e3affc9e7238 270
bogdanm 64:e3affc9e7238 271 /** \brief Unsigned Saturate
bogdanm 64:e3affc9e7238 272
bogdanm 64:e3affc9e7238 273 This function saturates an unsigned value.
bogdanm 64:e3affc9e7238 274
bogdanm 64:e3affc9e7238 275 \param [in] value Value to be saturated
bogdanm 64:e3affc9e7238 276 \param [in] sat Bit position to saturate to (0..31)
bogdanm 64:e3affc9e7238 277 \return Saturated value
bogdanm 64:e3affc9e7238 278 */
bogdanm 64:e3affc9e7238 279 #define __USAT __usat
bogdanm 64:e3affc9e7238 280
bogdanm 64:e3affc9e7238 281
bogdanm 64:e3affc9e7238 282 /** \brief Count leading zeros
bogdanm 64:e3affc9e7238 283
bogdanm 64:e3affc9e7238 284 This function counts the number of leading zeros of a data value.
bogdanm 64:e3affc9e7238 285
bogdanm 64:e3affc9e7238 286 \param [in] value Value to count the leading zeros
bogdanm 64:e3affc9e7238 287 \return number of leading zeros in value
bogdanm 64:e3affc9e7238 288 */
bogdanm 64:e3affc9e7238 289 #define __CLZ __clz
bogdanm 64:e3affc9e7238 290
bogdanm 64:e3affc9e7238 291 #endif /* (__CORTEX_M >= 0x03) */
bogdanm 64:e3affc9e7238 292
bogdanm 64:e3affc9e7238 293
bogdanm 64:e3affc9e7238 294
bogdanm 64:e3affc9e7238 295 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
bogdanm 64:e3affc9e7238 296 /* IAR iccarm specific functions */
bogdanm 64:e3affc9e7238 297
bogdanm 64:e3affc9e7238 298 #include <cmsis_iar.h>
bogdanm 64:e3affc9e7238 299
bogdanm 64:e3affc9e7238 300
bogdanm 64:e3affc9e7238 301 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
bogdanm 64:e3affc9e7238 302 /* TI CCS specific functions */
bogdanm 64:e3affc9e7238 303
bogdanm 64:e3affc9e7238 304 #include <cmsis_ccs.h>
bogdanm 64:e3affc9e7238 305
bogdanm 64:e3affc9e7238 306
bogdanm 64:e3affc9e7238 307 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
bogdanm 64:e3affc9e7238 308 /* GNU gcc specific functions */
bogdanm 64:e3affc9e7238 309
bogdanm 64:e3affc9e7238 310 /* Define macros for porting to both thumb1 and thumb2.
bogdanm 64:e3affc9e7238 311 * For thumb1, use low register (r0-r7), specified by constrant "l"
bogdanm 64:e3affc9e7238 312 * Otherwise, use general registers, specified by constrant "r" */
bogdanm 64:e3affc9e7238 313 #if defined (__thumb__) && !defined (__thumb2__)
bogdanm 64:e3affc9e7238 314 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
bogdanm 64:e3affc9e7238 315 #define __CMSIS_GCC_USE_REG(r) "l" (r)
bogdanm 64:e3affc9e7238 316 #else
bogdanm 64:e3affc9e7238 317 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
bogdanm 64:e3affc9e7238 318 #define __CMSIS_GCC_USE_REG(r) "r" (r)
bogdanm 64:e3affc9e7238 319 #endif
bogdanm 64:e3affc9e7238 320
bogdanm 64:e3affc9e7238 321 /** \brief No Operation
bogdanm 64:e3affc9e7238 322
bogdanm 64:e3affc9e7238 323 No Operation does nothing. This instruction can be used for code alignment purposes.
bogdanm 64:e3affc9e7238 324 */
bogdanm 64:e3affc9e7238 325 __attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void)
bogdanm 64:e3affc9e7238 326 {
bogdanm 64:e3affc9e7238 327 __ASM volatile ("nop");
bogdanm 64:e3affc9e7238 328 }
bogdanm 64:e3affc9e7238 329
bogdanm 64:e3affc9e7238 330
bogdanm 64:e3affc9e7238 331 /** \brief Wait For Interrupt
bogdanm 64:e3affc9e7238 332
bogdanm 64:e3affc9e7238 333 Wait For Interrupt is a hint instruction that suspends execution
bogdanm 64:e3affc9e7238 334 until one of a number of events occurs.
bogdanm 64:e3affc9e7238 335 */
bogdanm 64:e3affc9e7238 336 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void)
bogdanm 64:e3affc9e7238 337 {
bogdanm 64:e3affc9e7238 338 __ASM volatile ("wfi");
bogdanm 64:e3affc9e7238 339 }
bogdanm 64:e3affc9e7238 340
bogdanm 64:e3affc9e7238 341
bogdanm 64:e3affc9e7238 342 /** \brief Wait For Event
bogdanm 64:e3affc9e7238 343
bogdanm 64:e3affc9e7238 344 Wait For Event is a hint instruction that permits the processor to enter
bogdanm 64:e3affc9e7238 345 a low-power state until one of a number of events occurs.
bogdanm 64:e3affc9e7238 346 */
bogdanm 64:e3affc9e7238 347 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void)
bogdanm 64:e3affc9e7238 348 {
bogdanm 64:e3affc9e7238 349 __ASM volatile ("wfe");
bogdanm 64:e3affc9e7238 350 }
bogdanm 64:e3affc9e7238 351
bogdanm 64:e3affc9e7238 352
bogdanm 64:e3affc9e7238 353 /** \brief Send Event
bogdanm 64:e3affc9e7238 354
bogdanm 64:e3affc9e7238 355 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
bogdanm 64:e3affc9e7238 356 */
bogdanm 64:e3affc9e7238 357 __attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void)
bogdanm 64:e3affc9e7238 358 {
bogdanm 64:e3affc9e7238 359 __ASM volatile ("sev");
bogdanm 64:e3affc9e7238 360 }
bogdanm 64:e3affc9e7238 361
bogdanm 64:e3affc9e7238 362
bogdanm 64:e3affc9e7238 363 /** \brief Instruction Synchronization Barrier
bogdanm 64:e3affc9e7238 364
bogdanm 64:e3affc9e7238 365 Instruction Synchronization Barrier flushes the pipeline in the processor,
bogdanm 64:e3affc9e7238 366 so that all instructions following the ISB are fetched from cache or
bogdanm 64:e3affc9e7238 367 memory, after the instruction has been completed.
bogdanm 64:e3affc9e7238 368 */
bogdanm 64:e3affc9e7238 369 __attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void)
bogdanm 64:e3affc9e7238 370 {
bogdanm 64:e3affc9e7238 371 __ASM volatile ("isb");
bogdanm 64:e3affc9e7238 372 }
bogdanm 64:e3affc9e7238 373
bogdanm 64:e3affc9e7238 374
bogdanm 64:e3affc9e7238 375 /** \brief Data Synchronization Barrier
bogdanm 64:e3affc9e7238 376
bogdanm 64:e3affc9e7238 377 This function acts as a special kind of Data Memory Barrier.
bogdanm 64:e3affc9e7238 378 It completes when all explicit memory accesses before this instruction complete.
bogdanm 64:e3affc9e7238 379 */
bogdanm 64:e3affc9e7238 380 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void)
bogdanm 64:e3affc9e7238 381 {
bogdanm 64:e3affc9e7238 382 __ASM volatile ("dsb");
bogdanm 64:e3affc9e7238 383 }
bogdanm 64:e3affc9e7238 384
bogdanm 64:e3affc9e7238 385
bogdanm 64:e3affc9e7238 386 /** \brief Data Memory Barrier
bogdanm 64:e3affc9e7238 387
bogdanm 64:e3affc9e7238 388 This function ensures the apparent order of the explicit memory operations before
bogdanm 64:e3affc9e7238 389 and after the instruction, without ensuring their completion.
bogdanm 64:e3affc9e7238 390 */
bogdanm 64:e3affc9e7238 391 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void)
bogdanm 64:e3affc9e7238 392 {
bogdanm 64:e3affc9e7238 393 __ASM volatile ("dmb");
bogdanm 64:e3affc9e7238 394 }
bogdanm 64:e3affc9e7238 395
bogdanm 64:e3affc9e7238 396
bogdanm 64:e3affc9e7238 397 /** \brief Reverse byte order (32 bit)
bogdanm 64:e3affc9e7238 398
bogdanm 64:e3affc9e7238 399 This function reverses the byte order in integer value.
bogdanm 64:e3affc9e7238 400
bogdanm 64:e3affc9e7238 401 \param [in] value Value to reverse
bogdanm 64:e3affc9e7238 402 \return Reversed value
bogdanm 64:e3affc9e7238 403 */
bogdanm 64:e3affc9e7238 404 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value)
bogdanm 64:e3affc9e7238 405 {
bogdanm 64:e3affc9e7238 406 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
bogdanm 64:e3affc9e7238 407 return __builtin_bswap32(value);
bogdanm 64:e3affc9e7238 408 #else
bogdanm 64:e3affc9e7238 409 uint32_t result;
bogdanm 64:e3affc9e7238 410
bogdanm 64:e3affc9e7238 411 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
bogdanm 64:e3affc9e7238 412 return(result);
bogdanm 64:e3affc9e7238 413 #endif
bogdanm 64:e3affc9e7238 414 }
bogdanm 64:e3affc9e7238 415
bogdanm 64:e3affc9e7238 416
bogdanm 64:e3affc9e7238 417 /** \brief Reverse byte order (16 bit)
bogdanm 64:e3affc9e7238 418
bogdanm 64:e3affc9e7238 419 This function reverses the byte order in two unsigned short values.
bogdanm 64:e3affc9e7238 420
bogdanm 64:e3affc9e7238 421 \param [in] value Value to reverse
bogdanm 64:e3affc9e7238 422 \return Reversed value
bogdanm 64:e3affc9e7238 423 */
bogdanm 64:e3affc9e7238 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value)
bogdanm 64:e3affc9e7238 425 {
bogdanm 64:e3affc9e7238 426 uint32_t result;
bogdanm 64:e3affc9e7238 427
bogdanm 64:e3affc9e7238 428 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
bogdanm 64:e3affc9e7238 429 return(result);
bogdanm 64:e3affc9e7238 430 }
bogdanm 64:e3affc9e7238 431
bogdanm 64:e3affc9e7238 432
bogdanm 64:e3affc9e7238 433 /** \brief Reverse byte order in signed short value
bogdanm 64:e3affc9e7238 434
bogdanm 64:e3affc9e7238 435 This function reverses the byte order in a signed short value with sign extension to integer.
bogdanm 64:e3affc9e7238 436
bogdanm 64:e3affc9e7238 437 \param [in] value Value to reverse
bogdanm 64:e3affc9e7238 438 \return Reversed value
bogdanm 64:e3affc9e7238 439 */
bogdanm 64:e3affc9e7238 440 __attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value)
bogdanm 64:e3affc9e7238 441 {
bogdanm 64:e3affc9e7238 442 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
bogdanm 64:e3affc9e7238 443 return (short)__builtin_bswap16(value);
bogdanm 64:e3affc9e7238 444 #else
bogdanm 64:e3affc9e7238 445 uint32_t result;
bogdanm 64:e3affc9e7238 446
bogdanm 64:e3affc9e7238 447 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
bogdanm 64:e3affc9e7238 448 return(result);
bogdanm 64:e3affc9e7238 449 #endif
bogdanm 64:e3affc9e7238 450 }
bogdanm 64:e3affc9e7238 451
bogdanm 64:e3affc9e7238 452
bogdanm 64:e3affc9e7238 453 /** \brief Rotate Right in unsigned value (32 bit)
bogdanm 64:e3affc9e7238 454
bogdanm 64:e3affc9e7238 455 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
bogdanm 64:e3affc9e7238 456
bogdanm 64:e3affc9e7238 457 \param [in] value Value to rotate
bogdanm 64:e3affc9e7238 458 \param [in] value Number of Bits to rotate
bogdanm 64:e3affc9e7238 459 \return Rotated value
bogdanm 64:e3affc9e7238 460 */
bogdanm 64:e3affc9e7238 461 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 462 {
bogdanm 64:e3affc9e7238 463 return (op1 >> op2) | (op1 << (32 - op2));
bogdanm 64:e3affc9e7238 464 }
bogdanm 64:e3affc9e7238 465
bogdanm 64:e3affc9e7238 466
bogdanm 64:e3affc9e7238 467 /** \brief Breakpoint
bogdanm 64:e3affc9e7238 468
bogdanm 64:e3affc9e7238 469 This function causes the processor to enter Debug state.
bogdanm 64:e3affc9e7238 470 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
bogdanm 64:e3affc9e7238 471
bogdanm 64:e3affc9e7238 472 \param [in] value is ignored by the processor.
bogdanm 64:e3affc9e7238 473 If required, a debugger can use it to store additional information about the breakpoint.
bogdanm 64:e3affc9e7238 474 */
bogdanm 64:e3affc9e7238 475 #define __BKPT(value) __ASM volatile ("bkpt "#value)
bogdanm 64:e3affc9e7238 476
bogdanm 64:e3affc9e7238 477
bogdanm 64:e3affc9e7238 478 #if (__CORTEX_M >= 0x03)
bogdanm 64:e3affc9e7238 479
bogdanm 64:e3affc9e7238 480 /** \brief Reverse bit order of value
bogdanm 64:e3affc9e7238 481
bogdanm 64:e3affc9e7238 482 This function reverses the bit order of the given value.
bogdanm 64:e3affc9e7238 483
bogdanm 64:e3affc9e7238 484 \param [in] value Value to reverse
bogdanm 64:e3affc9e7238 485 \return Reversed value
bogdanm 64:e3affc9e7238 486 */
bogdanm 64:e3affc9e7238 487 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
bogdanm 64:e3affc9e7238 488 {
bogdanm 64:e3affc9e7238 489 uint32_t result;
bogdanm 64:e3affc9e7238 490
bogdanm 64:e3affc9e7238 491 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
bogdanm 64:e3affc9e7238 492 return(result);
bogdanm 64:e3affc9e7238 493 }
bogdanm 64:e3affc9e7238 494
bogdanm 64:e3affc9e7238 495
bogdanm 64:e3affc9e7238 496 /** \brief LDR Exclusive (8 bit)
bogdanm 64:e3affc9e7238 497
bogdanm 64:e3affc9e7238 498 This function performs a exclusive LDR command for 8 bit value.
bogdanm 64:e3affc9e7238 499
bogdanm 64:e3affc9e7238 500 \param [in] ptr Pointer to data
bogdanm 64:e3affc9e7238 501 \return value of type uint8_t at (*ptr)
bogdanm 64:e3affc9e7238 502 */
bogdanm 64:e3affc9e7238 503 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
bogdanm 64:e3affc9e7238 504 {
bogdanm 64:e3affc9e7238 505 uint32_t result;
bogdanm 64:e3affc9e7238 506
bogdanm 64:e3affc9e7238 507 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
bogdanm 64:e3affc9e7238 508 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
bogdanm 64:e3affc9e7238 509 #else
bogdanm 64:e3affc9e7238 510 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
bogdanm 64:e3affc9e7238 511 accepted by assembler. So has to use following less efficient pattern.
bogdanm 64:e3affc9e7238 512 */
bogdanm 64:e3affc9e7238 513 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
bogdanm 64:e3affc9e7238 514 #endif
bogdanm 64:e3affc9e7238 515 return(result);
bogdanm 64:e3affc9e7238 516 }
bogdanm 64:e3affc9e7238 517
bogdanm 64:e3affc9e7238 518
bogdanm 64:e3affc9e7238 519 /** \brief LDR Exclusive (16 bit)
bogdanm 64:e3affc9e7238 520
bogdanm 64:e3affc9e7238 521 This function performs a exclusive LDR command for 16 bit values.
bogdanm 64:e3affc9e7238 522
bogdanm 64:e3affc9e7238 523 \param [in] ptr Pointer to data
bogdanm 64:e3affc9e7238 524 \return value of type uint16_t at (*ptr)
bogdanm 64:e3affc9e7238 525 */
bogdanm 64:e3affc9e7238 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
bogdanm 64:e3affc9e7238 527 {
bogdanm 64:e3affc9e7238 528 uint32_t result;
bogdanm 64:e3affc9e7238 529
bogdanm 64:e3affc9e7238 530 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
bogdanm 64:e3affc9e7238 531 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
bogdanm 64:e3affc9e7238 532 #else
bogdanm 64:e3affc9e7238 533 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
bogdanm 64:e3affc9e7238 534 accepted by assembler. So has to use following less efficient pattern.
bogdanm 64:e3affc9e7238 535 */
bogdanm 64:e3affc9e7238 536 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
bogdanm 64:e3affc9e7238 537 #endif
bogdanm 64:e3affc9e7238 538 return(result);
bogdanm 64:e3affc9e7238 539 }
bogdanm 64:e3affc9e7238 540
bogdanm 64:e3affc9e7238 541
bogdanm 64:e3affc9e7238 542 /** \brief LDR Exclusive (32 bit)
bogdanm 64:e3affc9e7238 543
bogdanm 64:e3affc9e7238 544 This function performs a exclusive LDR command for 32 bit values.
bogdanm 64:e3affc9e7238 545
bogdanm 64:e3affc9e7238 546 \param [in] ptr Pointer to data
bogdanm 64:e3affc9e7238 547 \return value of type uint32_t at (*ptr)
bogdanm 64:e3affc9e7238 548 */
bogdanm 64:e3affc9e7238 549 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
bogdanm 64:e3affc9e7238 550 {
bogdanm 64:e3affc9e7238 551 uint32_t result;
bogdanm 64:e3affc9e7238 552
bogdanm 64:e3affc9e7238 553 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
bogdanm 64:e3affc9e7238 554 return(result);
bogdanm 64:e3affc9e7238 555 }
bogdanm 64:e3affc9e7238 556
bogdanm 64:e3affc9e7238 557
bogdanm 64:e3affc9e7238 558 /** \brief STR Exclusive (8 bit)
bogdanm 64:e3affc9e7238 559
bogdanm 64:e3affc9e7238 560 This function performs a exclusive STR command for 8 bit values.
bogdanm 64:e3affc9e7238 561
bogdanm 64:e3affc9e7238 562 \param [in] value Value to store
bogdanm 64:e3affc9e7238 563 \param [in] ptr Pointer to location
bogdanm 64:e3affc9e7238 564 \return 0 Function succeeded
bogdanm 64:e3affc9e7238 565 \return 1 Function failed
bogdanm 64:e3affc9e7238 566 */
bogdanm 64:e3affc9e7238 567 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
bogdanm 64:e3affc9e7238 568 {
bogdanm 64:e3affc9e7238 569 uint32_t result;
bogdanm 64:e3affc9e7238 570
bogdanm 64:e3affc9e7238 571 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
bogdanm 64:e3affc9e7238 572 return(result);
bogdanm 64:e3affc9e7238 573 }
bogdanm 64:e3affc9e7238 574
bogdanm 64:e3affc9e7238 575
bogdanm 64:e3affc9e7238 576 /** \brief STR Exclusive (16 bit)
bogdanm 64:e3affc9e7238 577
bogdanm 64:e3affc9e7238 578 This function performs a exclusive STR command for 16 bit values.
bogdanm 64:e3affc9e7238 579
bogdanm 64:e3affc9e7238 580 \param [in] value Value to store
bogdanm 64:e3affc9e7238 581 \param [in] ptr Pointer to location
bogdanm 64:e3affc9e7238 582 \return 0 Function succeeded
bogdanm 64:e3affc9e7238 583 \return 1 Function failed
bogdanm 64:e3affc9e7238 584 */
bogdanm 64:e3affc9e7238 585 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
bogdanm 64:e3affc9e7238 586 {
bogdanm 64:e3affc9e7238 587 uint32_t result;
bogdanm 64:e3affc9e7238 588
bogdanm 64:e3affc9e7238 589 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
bogdanm 64:e3affc9e7238 590 return(result);
bogdanm 64:e3affc9e7238 591 }
bogdanm 64:e3affc9e7238 592
bogdanm 64:e3affc9e7238 593
bogdanm 64:e3affc9e7238 594 /** \brief STR Exclusive (32 bit)
bogdanm 64:e3affc9e7238 595
bogdanm 64:e3affc9e7238 596 This function performs a exclusive STR command for 32 bit values.
bogdanm 64:e3affc9e7238 597
bogdanm 64:e3affc9e7238 598 \param [in] value Value to store
bogdanm 64:e3affc9e7238 599 \param [in] ptr Pointer to location
bogdanm 64:e3affc9e7238 600 \return 0 Function succeeded
bogdanm 64:e3affc9e7238 601 \return 1 Function failed
bogdanm 64:e3affc9e7238 602 */
bogdanm 64:e3affc9e7238 603 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
bogdanm 64:e3affc9e7238 604 {
bogdanm 64:e3affc9e7238 605 uint32_t result;
bogdanm 64:e3affc9e7238 606
bogdanm 64:e3affc9e7238 607 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
bogdanm 64:e3affc9e7238 608 return(result);
bogdanm 64:e3affc9e7238 609 }
bogdanm 64:e3affc9e7238 610
bogdanm 64:e3affc9e7238 611
bogdanm 64:e3affc9e7238 612 /** \brief Remove the exclusive lock
bogdanm 64:e3affc9e7238 613
bogdanm 64:e3affc9e7238 614 This function removes the exclusive lock which is created by LDREX.
bogdanm 64:e3affc9e7238 615
bogdanm 64:e3affc9e7238 616 */
bogdanm 64:e3affc9e7238 617 __attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void)
bogdanm 64:e3affc9e7238 618 {
bogdanm 64:e3affc9e7238 619 __ASM volatile ("clrex" ::: "memory");
bogdanm 64:e3affc9e7238 620 }
bogdanm 64:e3affc9e7238 621
bogdanm 64:e3affc9e7238 622
bogdanm 64:e3affc9e7238 623 /** \brief Signed Saturate
bogdanm 64:e3affc9e7238 624
bogdanm 64:e3affc9e7238 625 This function saturates a signed value.
bogdanm 64:e3affc9e7238 626
bogdanm 64:e3affc9e7238 627 \param [in] value Value to be saturated
bogdanm 64:e3affc9e7238 628 \param [in] sat Bit position to saturate to (1..32)
bogdanm 64:e3affc9e7238 629 \return Saturated value
bogdanm 64:e3affc9e7238 630 */
bogdanm 64:e3affc9e7238 631 #define __SSAT(ARG1,ARG2) \
bogdanm 64:e3affc9e7238 632 ({ \
bogdanm 64:e3affc9e7238 633 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 64:e3affc9e7238 634 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 64:e3affc9e7238 635 __RES; \
bogdanm 64:e3affc9e7238 636 })
bogdanm 64:e3affc9e7238 637
bogdanm 64:e3affc9e7238 638
bogdanm 64:e3affc9e7238 639 /** \brief Unsigned Saturate
bogdanm 64:e3affc9e7238 640
bogdanm 64:e3affc9e7238 641 This function saturates an unsigned value.
bogdanm 64:e3affc9e7238 642
bogdanm 64:e3affc9e7238 643 \param [in] value Value to be saturated
bogdanm 64:e3affc9e7238 644 \param [in] sat Bit position to saturate to (0..31)
bogdanm 64:e3affc9e7238 645 \return Saturated value
bogdanm 64:e3affc9e7238 646 */
bogdanm 64:e3affc9e7238 647 #define __USAT(ARG1,ARG2) \
bogdanm 64:e3affc9e7238 648 ({ \
bogdanm 64:e3affc9e7238 649 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 64:e3affc9e7238 650 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 64:e3affc9e7238 651 __RES; \
bogdanm 64:e3affc9e7238 652 })
bogdanm 64:e3affc9e7238 653
bogdanm 64:e3affc9e7238 654
bogdanm 64:e3affc9e7238 655 /** \brief Count leading zeros
bogdanm 64:e3affc9e7238 656
bogdanm 64:e3affc9e7238 657 This function counts the number of leading zeros of a data value.
bogdanm 64:e3affc9e7238 658
bogdanm 64:e3affc9e7238 659 \param [in] value Value to count the leading zeros
bogdanm 64:e3affc9e7238 660 \return number of leading zeros in value
bogdanm 64:e3affc9e7238 661 */
bogdanm 64:e3affc9e7238 662 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value)
bogdanm 64:e3affc9e7238 663 {
bogdanm 64:e3affc9e7238 664 uint32_t result;
bogdanm 64:e3affc9e7238 665
bogdanm 64:e3affc9e7238 666 __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
bogdanm 64:e3affc9e7238 667 return(result);
bogdanm 64:e3affc9e7238 668 }
bogdanm 64:e3affc9e7238 669
bogdanm 64:e3affc9e7238 670 #endif /* (__CORTEX_M >= 0x03) */
bogdanm 64:e3affc9e7238 671
bogdanm 64:e3affc9e7238 672
bogdanm 64:e3affc9e7238 673
bogdanm 64:e3affc9e7238 674
bogdanm 64:e3affc9e7238 675 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
bogdanm 64:e3affc9e7238 676 /* TASKING carm specific functions */
bogdanm 64:e3affc9e7238 677
bogdanm 64:e3affc9e7238 678 /*
bogdanm 64:e3affc9e7238 679 * The CMSIS functions have been implemented as intrinsics in the compiler.
bogdanm 64:e3affc9e7238 680 * Please use "carm -?i" to get an up to date list of all intrinsics,
bogdanm 64:e3affc9e7238 681 * Including the CMSIS ones.
bogdanm 64:e3affc9e7238 682 */
bogdanm 64:e3affc9e7238 683
bogdanm 64:e3affc9e7238 684 #endif
bogdanm 64:e3affc9e7238 685
bogdanm 64:e3affc9e7238 686 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
bogdanm 64:e3affc9e7238 687
bogdanm 64:e3affc9e7238 688 #endif /* __CORE_CMINSTR_H */