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TARGET_LPC1114/core_cmInstr.h@71:7ec3cb6bbcc4, 2013-11-29 (annotated)

Committer:
jalp89
Date:
Fri Nov 29 09:39:46 2013 +0000
Revision:
71:7ec3cb6bbcc4
Parent:
66:9c8f0e3462fb 
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bogdanm 66:9c8f0e3462fb 1 /**************************************************************************//**
bogdanm 66:9c8f0e3462fb 2 * @file core_cmInstr.h
bogdanm 66:9c8f0e3462fb 3 * @brief CMSIS Cortex-M Core Instruction Access Header File
bogdanm 66:9c8f0e3462fb 4 * @version V3.20
bogdanm 66:9c8f0e3462fb 5 * @date 05. March 2013
bogdanm 66:9c8f0e3462fb 6 *
bogdanm 66:9c8f0e3462fb 7 * @note
bogdanm 66:9c8f0e3462fb 8 *
bogdanm 66:9c8f0e3462fb 9 ******************************************************************************/
bogdanm 66:9c8f0e3462fb 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
bogdanm 66:9c8f0e3462fb 11
bogdanm 66:9c8f0e3462fb 12 All rights reserved.
bogdanm 66:9c8f0e3462fb 13 Redistribution and use in source and binary forms, with or without
bogdanm 66:9c8f0e3462fb 14 modification, are permitted provided that the following conditions are met:
bogdanm 66:9c8f0e3462fb 15 - Redistributions of source code must retain the above copyright
bogdanm 66:9c8f0e3462fb 16 notice, this list of conditions and the following disclaimer.
bogdanm 66:9c8f0e3462fb 17 - Redistributions in binary form must reproduce the above copyright
bogdanm 66:9c8f0e3462fb 18 notice, this list of conditions and the following disclaimer in the
bogdanm 66:9c8f0e3462fb 19 documentation and/or other materials provided with the distribution.
bogdanm 66:9c8f0e3462fb 20 - Neither the name of ARM nor the names of its contributors may be used
bogdanm 66:9c8f0e3462fb 21 to endorse or promote products derived from this software without
bogdanm 66:9c8f0e3462fb 22 specific prior written permission.
bogdanm 66:9c8f0e3462fb 23 *
bogdanm 66:9c8f0e3462fb 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 66:9c8f0e3462fb 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 66:9c8f0e3462fb 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
bogdanm 66:9c8f0e3462fb 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
bogdanm 66:9c8f0e3462fb 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
bogdanm 66:9c8f0e3462fb 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
bogdanm 66:9c8f0e3462fb 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 66:9c8f0e3462fb 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 66:9c8f0e3462fb 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
bogdanm 66:9c8f0e3462fb 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
bogdanm 66:9c8f0e3462fb 34 POSSIBILITY OF SUCH DAMAGE.
bogdanm 66:9c8f0e3462fb 35 ---------------------------------------------------------------------------*/
bogdanm 66:9c8f0e3462fb 36
bogdanm 66:9c8f0e3462fb 37
bogdanm 66:9c8f0e3462fb 38 #ifndef __CORE_CMINSTR_H
bogdanm 66:9c8f0e3462fb 39 #define __CORE_CMINSTR_H
bogdanm 66:9c8f0e3462fb 40
bogdanm 66:9c8f0e3462fb 41
bogdanm 66:9c8f0e3462fb 42 /* ########################## Core Instruction Access ######################### */
bogdanm 66:9c8f0e3462fb 43 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
bogdanm 66:9c8f0e3462fb 44 Access to dedicated instructions
bogdanm 66:9c8f0e3462fb 45 @{
bogdanm 66:9c8f0e3462fb 46 */
bogdanm 66:9c8f0e3462fb 47
bogdanm 66:9c8f0e3462fb 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
bogdanm 66:9c8f0e3462fb 49 /* ARM armcc specific functions */
bogdanm 66:9c8f0e3462fb 50
bogdanm 66:9c8f0e3462fb 51 #if (__ARMCC_VERSION < 400677)
bogdanm 66:9c8f0e3462fb 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
bogdanm 66:9c8f0e3462fb 53 #endif
bogdanm 66:9c8f0e3462fb 54
bogdanm 66:9c8f0e3462fb 55
bogdanm 66:9c8f0e3462fb 56 /** \brief No Operation
bogdanm 66:9c8f0e3462fb 57
bogdanm 66:9c8f0e3462fb 58 No Operation does nothing. This instruction can be used for code alignment purposes.
bogdanm 66:9c8f0e3462fb 59 */
bogdanm 66:9c8f0e3462fb 60 #define __NOP __nop
bogdanm 66:9c8f0e3462fb 61
bogdanm 66:9c8f0e3462fb 62
bogdanm 66:9c8f0e3462fb 63 /** \brief Wait For Interrupt
bogdanm 66:9c8f0e3462fb 64
bogdanm 66:9c8f0e3462fb 65 Wait For Interrupt is a hint instruction that suspends execution
bogdanm 66:9c8f0e3462fb 66 until one of a number of events occurs.
bogdanm 66:9c8f0e3462fb 67 */
bogdanm 66:9c8f0e3462fb 68 #define __WFI __wfi
bogdanm 66:9c8f0e3462fb 69
bogdanm 66:9c8f0e3462fb 70
bogdanm 66:9c8f0e3462fb 71 /** \brief Wait For Event
bogdanm 66:9c8f0e3462fb 72
bogdanm 66:9c8f0e3462fb 73 Wait For Event is a hint instruction that permits the processor to enter
bogdanm 66:9c8f0e3462fb 74 a low-power state until one of a number of events occurs.
bogdanm 66:9c8f0e3462fb 75 */
bogdanm 66:9c8f0e3462fb 76 #define __WFE __wfe
bogdanm 66:9c8f0e3462fb 77
bogdanm 66:9c8f0e3462fb 78
bogdanm 66:9c8f0e3462fb 79 /** \brief Send Event
bogdanm 66:9c8f0e3462fb 80
bogdanm 66:9c8f0e3462fb 81 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
bogdanm 66:9c8f0e3462fb 82 */
bogdanm 66:9c8f0e3462fb 83 #define __SEV __sev
bogdanm 66:9c8f0e3462fb 84
bogdanm 66:9c8f0e3462fb 85
bogdanm 66:9c8f0e3462fb 86 /** \brief Instruction Synchronization Barrier
bogdanm 66:9c8f0e3462fb 87
bogdanm 66:9c8f0e3462fb 88 Instruction Synchronization Barrier flushes the pipeline in the processor,
bogdanm 66:9c8f0e3462fb 89 so that all instructions following the ISB are fetched from cache or
bogdanm 66:9c8f0e3462fb 90 memory, after the instruction has been completed.
bogdanm 66:9c8f0e3462fb 91 */
bogdanm 66:9c8f0e3462fb 92 #define __ISB() __isb(0xF)
bogdanm 66:9c8f0e3462fb 93
bogdanm 66:9c8f0e3462fb 94
bogdanm 66:9c8f0e3462fb 95 /** \brief Data Synchronization Barrier
bogdanm 66:9c8f0e3462fb 96
bogdanm 66:9c8f0e3462fb 97 This function acts as a special kind of Data Memory Barrier.
bogdanm 66:9c8f0e3462fb 98 It completes when all explicit memory accesses before this instruction complete.
bogdanm 66:9c8f0e3462fb 99 */
bogdanm 66:9c8f0e3462fb 100 #define __DSB() __dsb(0xF)
bogdanm 66:9c8f0e3462fb 101
bogdanm 66:9c8f0e3462fb 102
bogdanm 66:9c8f0e3462fb 103 /** \brief Data Memory Barrier
bogdanm 66:9c8f0e3462fb 104
bogdanm 66:9c8f0e3462fb 105 This function ensures the apparent order of the explicit memory operations before
bogdanm 66:9c8f0e3462fb 106 and after the instruction, without ensuring their completion.
bogdanm 66:9c8f0e3462fb 107 */
bogdanm 66:9c8f0e3462fb 108 #define __DMB() __dmb(0xF)
bogdanm 66:9c8f0e3462fb 109
bogdanm 66:9c8f0e3462fb 110
bogdanm 66:9c8f0e3462fb 111 /** \brief Reverse byte order (32 bit)
bogdanm 66:9c8f0e3462fb 112
bogdanm 66:9c8f0e3462fb 113 This function reverses the byte order in integer value.
bogdanm 66:9c8f0e3462fb 114
bogdanm 66:9c8f0e3462fb 115 \param [in] value Value to reverse
bogdanm 66:9c8f0e3462fb 116 \return Reversed value
bogdanm 66:9c8f0e3462fb 117 */
bogdanm 66:9c8f0e3462fb 118 #define __REV __rev
bogdanm 66:9c8f0e3462fb 119
bogdanm 66:9c8f0e3462fb 120
bogdanm 66:9c8f0e3462fb 121 /** \brief Reverse byte order (16 bit)
bogdanm 66:9c8f0e3462fb 122
bogdanm 66:9c8f0e3462fb 123 This function reverses the byte order in two unsigned short values.
bogdanm 66:9c8f0e3462fb 124
bogdanm 66:9c8f0e3462fb 125 \param [in] value Value to reverse
bogdanm 66:9c8f0e3462fb 126 \return Reversed value
bogdanm 66:9c8f0e3462fb 127 */
bogdanm 66:9c8f0e3462fb 128 #ifndef __NO_EMBEDDED_ASM
bogdanm 66:9c8f0e3462fb 129 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
bogdanm 66:9c8f0e3462fb 130 {
bogdanm 66:9c8f0e3462fb 131 rev16 r0, r0
bogdanm 66:9c8f0e3462fb 132 bx lr
bogdanm 66:9c8f0e3462fb 133 }
bogdanm 66:9c8f0e3462fb 134 #endif
bogdanm 66:9c8f0e3462fb 135
bogdanm 66:9c8f0e3462fb 136 /** \brief Reverse byte order in signed short value
bogdanm 66:9c8f0e3462fb 137
bogdanm 66:9c8f0e3462fb 138 This function reverses the byte order in a signed short value with sign extension to integer.
bogdanm 66:9c8f0e3462fb 139
bogdanm 66:9c8f0e3462fb 140 \param [in] value Value to reverse
bogdanm 66:9c8f0e3462fb 141 \return Reversed value
bogdanm 66:9c8f0e3462fb 142 */
bogdanm 66:9c8f0e3462fb 143 #ifndef __NO_EMBEDDED_ASM
bogdanm 66:9c8f0e3462fb 144 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
bogdanm 66:9c8f0e3462fb 145 {
bogdanm 66:9c8f0e3462fb 146 revsh r0, r0
bogdanm 66:9c8f0e3462fb 147 bx lr
bogdanm 66:9c8f0e3462fb 148 }
bogdanm 66:9c8f0e3462fb 149 #endif
bogdanm 66:9c8f0e3462fb 150
bogdanm 66:9c8f0e3462fb 151
bogdanm 66:9c8f0e3462fb 152 /** \brief Rotate Right in unsigned value (32 bit)
bogdanm 66:9c8f0e3462fb 153
bogdanm 66:9c8f0e3462fb 154 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
bogdanm 66:9c8f0e3462fb 155
bogdanm 66:9c8f0e3462fb 156 \param [in] value Value to rotate
bogdanm 66:9c8f0e3462fb 157 \param [in] value Number of Bits to rotate
bogdanm 66:9c8f0e3462fb 158 \return Rotated value
bogdanm 66:9c8f0e3462fb 159 */
bogdanm 66:9c8f0e3462fb 160 #define __ROR __ror
bogdanm 66:9c8f0e3462fb 161
bogdanm 66:9c8f0e3462fb 162
bogdanm 66:9c8f0e3462fb 163 /** \brief Breakpoint
bogdanm 66:9c8f0e3462fb 164
bogdanm 66:9c8f0e3462fb 165 This function causes the processor to enter Debug state.
bogdanm 66:9c8f0e3462fb 166 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
bogdanm 66:9c8f0e3462fb 167
bogdanm 66:9c8f0e3462fb 168 \param [in] value is ignored by the processor.
bogdanm 66:9c8f0e3462fb 169 If required, a debugger can use it to store additional information about the breakpoint.
bogdanm 66:9c8f0e3462fb 170 */
bogdanm 66:9c8f0e3462fb 171 #define __BKPT(value) __breakpoint(value)
bogdanm 66:9c8f0e3462fb 172
bogdanm 66:9c8f0e3462fb 173
bogdanm 66:9c8f0e3462fb 174 #if (__CORTEX_M >= 0x03)
bogdanm 66:9c8f0e3462fb 175
bogdanm 66:9c8f0e3462fb 176 /** \brief Reverse bit order of value
bogdanm 66:9c8f0e3462fb 177
bogdanm 66:9c8f0e3462fb 178 This function reverses the bit order of the given value.
bogdanm 66:9c8f0e3462fb 179
bogdanm 66:9c8f0e3462fb 180 \param [in] value Value to reverse
bogdanm 66:9c8f0e3462fb 181 \return Reversed value
bogdanm 66:9c8f0e3462fb 182 */
bogdanm 66:9c8f0e3462fb 183 #define __RBIT __rbit
bogdanm 66:9c8f0e3462fb 184
bogdanm 66:9c8f0e3462fb 185
bogdanm 66:9c8f0e3462fb 186 /** \brief LDR Exclusive (8 bit)
bogdanm 66:9c8f0e3462fb 187
bogdanm 66:9c8f0e3462fb 188 This function performs a exclusive LDR command for 8 bit value.
bogdanm 66:9c8f0e3462fb 189
bogdanm 66:9c8f0e3462fb 190 \param [in] ptr Pointer to data
bogdanm 66:9c8f0e3462fb 191 \return value of type uint8_t at (*ptr)
bogdanm 66:9c8f0e3462fb 192 */
bogdanm 66:9c8f0e3462fb 193 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
bogdanm 66:9c8f0e3462fb 194
bogdanm 66:9c8f0e3462fb 195
bogdanm 66:9c8f0e3462fb 196 /** \brief LDR Exclusive (16 bit)
bogdanm 66:9c8f0e3462fb 197
bogdanm 66:9c8f0e3462fb 198 This function performs a exclusive LDR command for 16 bit values.
bogdanm 66:9c8f0e3462fb 199
bogdanm 66:9c8f0e3462fb 200 \param [in] ptr Pointer to data
bogdanm 66:9c8f0e3462fb 201 \return value of type uint16_t at (*ptr)
bogdanm 66:9c8f0e3462fb 202 */
bogdanm 66:9c8f0e3462fb 203 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
bogdanm 66:9c8f0e3462fb 204
bogdanm 66:9c8f0e3462fb 205
bogdanm 66:9c8f0e3462fb 206 /** \brief LDR Exclusive (32 bit)
bogdanm 66:9c8f0e3462fb 207
bogdanm 66:9c8f0e3462fb 208 This function performs a exclusive LDR command for 32 bit values.
bogdanm 66:9c8f0e3462fb 209
bogdanm 66:9c8f0e3462fb 210 \param [in] ptr Pointer to data
bogdanm 66:9c8f0e3462fb 211 \return value of type uint32_t at (*ptr)
bogdanm 66:9c8f0e3462fb 212 */
bogdanm 66:9c8f0e3462fb 213 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
bogdanm 66:9c8f0e3462fb 214
bogdanm 66:9c8f0e3462fb 215
bogdanm 66:9c8f0e3462fb 216 /** \brief STR Exclusive (8 bit)
bogdanm 66:9c8f0e3462fb 217
bogdanm 66:9c8f0e3462fb 218 This function performs a exclusive STR command for 8 bit values.
bogdanm 66:9c8f0e3462fb 219
bogdanm 66:9c8f0e3462fb 220 \param [in] value Value to store
bogdanm 66:9c8f0e3462fb 221 \param [in] ptr Pointer to location
bogdanm 66:9c8f0e3462fb 222 \return 0 Function succeeded
bogdanm 66:9c8f0e3462fb 223 \return 1 Function failed
bogdanm 66:9c8f0e3462fb 224 */
bogdanm 66:9c8f0e3462fb 225 #define __STREXB(value, ptr) __strex(value, ptr)
bogdanm 66:9c8f0e3462fb 226
bogdanm 66:9c8f0e3462fb 227
bogdanm 66:9c8f0e3462fb 228 /** \brief STR Exclusive (16 bit)
bogdanm 66:9c8f0e3462fb 229
bogdanm 66:9c8f0e3462fb 230 This function performs a exclusive STR command for 16 bit values.
bogdanm 66:9c8f0e3462fb 231
bogdanm 66:9c8f0e3462fb 232 \param [in] value Value to store
bogdanm 66:9c8f0e3462fb 233 \param [in] ptr Pointer to location
bogdanm 66:9c8f0e3462fb 234 \return 0 Function succeeded
bogdanm 66:9c8f0e3462fb 235 \return 1 Function failed
bogdanm 66:9c8f0e3462fb 236 */
bogdanm 66:9c8f0e3462fb 237 #define __STREXH(value, ptr) __strex(value, ptr)
bogdanm 66:9c8f0e3462fb 238
bogdanm 66:9c8f0e3462fb 239
bogdanm 66:9c8f0e3462fb 240 /** \brief STR Exclusive (32 bit)
bogdanm 66:9c8f0e3462fb 241
bogdanm 66:9c8f0e3462fb 242 This function performs a exclusive STR command for 32 bit values.
bogdanm 66:9c8f0e3462fb 243
bogdanm 66:9c8f0e3462fb 244 \param [in] value Value to store
bogdanm 66:9c8f0e3462fb 245 \param [in] ptr Pointer to location
bogdanm 66:9c8f0e3462fb 246 \return 0 Function succeeded
bogdanm 66:9c8f0e3462fb 247 \return 1 Function failed
bogdanm 66:9c8f0e3462fb 248 */
bogdanm 66:9c8f0e3462fb 249 #define __STREXW(value, ptr) __strex(value, ptr)
bogdanm 66:9c8f0e3462fb 250
bogdanm 66:9c8f0e3462fb 251
bogdanm 66:9c8f0e3462fb 252 /** \brief Remove the exclusive lock
bogdanm 66:9c8f0e3462fb 253
bogdanm 66:9c8f0e3462fb 254 This function removes the exclusive lock which is created by LDREX.
bogdanm 66:9c8f0e3462fb 255
bogdanm 66:9c8f0e3462fb 256 */
bogdanm 66:9c8f0e3462fb 257 #define __CLREX __clrex
bogdanm 66:9c8f0e3462fb 258
bogdanm 66:9c8f0e3462fb 259
bogdanm 66:9c8f0e3462fb 260 /** \brief Signed Saturate
bogdanm 66:9c8f0e3462fb 261
bogdanm 66:9c8f0e3462fb 262 This function saturates a signed value.
bogdanm 66:9c8f0e3462fb 263
bogdanm 66:9c8f0e3462fb 264 \param [in] value Value to be saturated
bogdanm 66:9c8f0e3462fb 265 \param [in] sat Bit position to saturate to (1..32)
bogdanm 66:9c8f0e3462fb 266 \return Saturated value
bogdanm 66:9c8f0e3462fb 267 */
bogdanm 66:9c8f0e3462fb 268 #define __SSAT __ssat
bogdanm 66:9c8f0e3462fb 269
bogdanm 66:9c8f0e3462fb 270
bogdanm 66:9c8f0e3462fb 271 /** \brief Unsigned Saturate
bogdanm 66:9c8f0e3462fb 272
bogdanm 66:9c8f0e3462fb 273 This function saturates an unsigned value.
bogdanm 66:9c8f0e3462fb 274
bogdanm 66:9c8f0e3462fb 275 \param [in] value Value to be saturated
bogdanm 66:9c8f0e3462fb 276 \param [in] sat Bit position to saturate to (0..31)
bogdanm 66:9c8f0e3462fb 277 \return Saturated value
bogdanm 66:9c8f0e3462fb 278 */
bogdanm 66:9c8f0e3462fb 279 #define __USAT __usat
bogdanm 66:9c8f0e3462fb 280
bogdanm 66:9c8f0e3462fb 281
bogdanm 66:9c8f0e3462fb 282 /** \brief Count leading zeros
bogdanm 66:9c8f0e3462fb 283
bogdanm 66:9c8f0e3462fb 284 This function counts the number of leading zeros of a data value.
bogdanm 66:9c8f0e3462fb 285
bogdanm 66:9c8f0e3462fb 286 \param [in] value Value to count the leading zeros
bogdanm 66:9c8f0e3462fb 287 \return number of leading zeros in value
bogdanm 66:9c8f0e3462fb 288 */
bogdanm 66:9c8f0e3462fb 289 #define __CLZ __clz
bogdanm 66:9c8f0e3462fb 290
bogdanm 66:9c8f0e3462fb 291 #endif /* (__CORTEX_M >= 0x03) */
bogdanm 66:9c8f0e3462fb 292
bogdanm 66:9c8f0e3462fb 293
bogdanm 66:9c8f0e3462fb 294
bogdanm 66:9c8f0e3462fb 295 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
bogdanm 66:9c8f0e3462fb 296 /* IAR iccarm specific functions */
bogdanm 66:9c8f0e3462fb 297
bogdanm 66:9c8f0e3462fb 298 #include <cmsis_iar.h>
bogdanm 66:9c8f0e3462fb 299
bogdanm 66:9c8f0e3462fb 300
bogdanm 66:9c8f0e3462fb 301 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
bogdanm 66:9c8f0e3462fb 302 /* TI CCS specific functions */
bogdanm 66:9c8f0e3462fb 303
bogdanm 66:9c8f0e3462fb 304 #include <cmsis_ccs.h>
bogdanm 66:9c8f0e3462fb 305
bogdanm 66:9c8f0e3462fb 306
bogdanm 66:9c8f0e3462fb 307 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
bogdanm 66:9c8f0e3462fb 308 /* GNU gcc specific functions */
bogdanm 66:9c8f0e3462fb 309
bogdanm 66:9c8f0e3462fb 310 /* Define macros for porting to both thumb1 and thumb2.
bogdanm 66:9c8f0e3462fb 311 * For thumb1, use low register (r0-r7), specified by constrant "l"
bogdanm 66:9c8f0e3462fb 312 * Otherwise, use general registers, specified by constrant "r" */
bogdanm 66:9c8f0e3462fb 313 #if defined (__thumb__) && !defined (__thumb2__)
bogdanm 66:9c8f0e3462fb 314 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
bogdanm 66:9c8f0e3462fb 315 #define __CMSIS_GCC_USE_REG(r) "l" (r)
bogdanm 66:9c8f0e3462fb 316 #else
bogdanm 66:9c8f0e3462fb 317 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
bogdanm 66:9c8f0e3462fb 318 #define __CMSIS_GCC_USE_REG(r) "r" (r)
bogdanm 66:9c8f0e3462fb 319 #endif
bogdanm 66:9c8f0e3462fb 320
bogdanm 66:9c8f0e3462fb 321 /** \brief No Operation
bogdanm 66:9c8f0e3462fb 322
bogdanm 66:9c8f0e3462fb 323 No Operation does nothing. This instruction can be used for code alignment purposes.
bogdanm 66:9c8f0e3462fb 324 */
bogdanm 66:9c8f0e3462fb 325 __attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void)
bogdanm 66:9c8f0e3462fb 326 {
bogdanm 66:9c8f0e3462fb 327 __ASM volatile ("nop");
bogdanm 66:9c8f0e3462fb 328 }
bogdanm 66:9c8f0e3462fb 329
bogdanm 66:9c8f0e3462fb 330
bogdanm 66:9c8f0e3462fb 331 /** \brief Wait For Interrupt
bogdanm 66:9c8f0e3462fb 332
bogdanm 66:9c8f0e3462fb 333 Wait For Interrupt is a hint instruction that suspends execution
bogdanm 66:9c8f0e3462fb 334 until one of a number of events occurs.
bogdanm 66:9c8f0e3462fb 335 */
bogdanm 66:9c8f0e3462fb 336 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void)
bogdanm 66:9c8f0e3462fb 337 {
bogdanm 66:9c8f0e3462fb 338 __ASM volatile ("wfi");
bogdanm 66:9c8f0e3462fb 339 }
bogdanm 66:9c8f0e3462fb 340
bogdanm 66:9c8f0e3462fb 341
bogdanm 66:9c8f0e3462fb 342 /** \brief Wait For Event
bogdanm 66:9c8f0e3462fb 343
bogdanm 66:9c8f0e3462fb 344 Wait For Event is a hint instruction that permits the processor to enter
bogdanm 66:9c8f0e3462fb 345 a low-power state until one of a number of events occurs.
bogdanm 66:9c8f0e3462fb 346 */
bogdanm 66:9c8f0e3462fb 347 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void)
bogdanm 66:9c8f0e3462fb 348 {
bogdanm 66:9c8f0e3462fb 349 __ASM volatile ("wfe");
bogdanm 66:9c8f0e3462fb 350 }
bogdanm 66:9c8f0e3462fb 351
bogdanm 66:9c8f0e3462fb 352
bogdanm 66:9c8f0e3462fb 353 /** \brief Send Event
bogdanm 66:9c8f0e3462fb 354
bogdanm 66:9c8f0e3462fb 355 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
bogdanm 66:9c8f0e3462fb 356 */
bogdanm 66:9c8f0e3462fb 357 __attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void)
bogdanm 66:9c8f0e3462fb 358 {
bogdanm 66:9c8f0e3462fb 359 __ASM volatile ("sev");
bogdanm 66:9c8f0e3462fb 360 }
bogdanm 66:9c8f0e3462fb 361
bogdanm 66:9c8f0e3462fb 362
bogdanm 66:9c8f0e3462fb 363 /** \brief Instruction Synchronization Barrier
bogdanm 66:9c8f0e3462fb 364
bogdanm 66:9c8f0e3462fb 365 Instruction Synchronization Barrier flushes the pipeline in the processor,
bogdanm 66:9c8f0e3462fb 366 so that all instructions following the ISB are fetched from cache or
bogdanm 66:9c8f0e3462fb 367 memory, after the instruction has been completed.
bogdanm 66:9c8f0e3462fb 368 */
bogdanm 66:9c8f0e3462fb 369 __attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void)
bogdanm 66:9c8f0e3462fb 370 {
bogdanm 66:9c8f0e3462fb 371 __ASM volatile ("isb");
bogdanm 66:9c8f0e3462fb 372 }
bogdanm 66:9c8f0e3462fb 373
bogdanm 66:9c8f0e3462fb 374
bogdanm 66:9c8f0e3462fb 375 /** \brief Data Synchronization Barrier
bogdanm 66:9c8f0e3462fb 376
bogdanm 66:9c8f0e3462fb 377 This function acts as a special kind of Data Memory Barrier.
bogdanm 66:9c8f0e3462fb 378 It completes when all explicit memory accesses before this instruction complete.
bogdanm 66:9c8f0e3462fb 379 */
bogdanm 66:9c8f0e3462fb 380 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void)
bogdanm 66:9c8f0e3462fb 381 {
bogdanm 66:9c8f0e3462fb 382 __ASM volatile ("dsb");
bogdanm 66:9c8f0e3462fb 383 }
bogdanm 66:9c8f0e3462fb 384
bogdanm 66:9c8f0e3462fb 385
bogdanm 66:9c8f0e3462fb 386 /** \brief Data Memory Barrier
bogdanm 66:9c8f0e3462fb 387
bogdanm 66:9c8f0e3462fb 388 This function ensures the apparent order of the explicit memory operations before
bogdanm 66:9c8f0e3462fb 389 and after the instruction, without ensuring their completion.
bogdanm 66:9c8f0e3462fb 390 */
bogdanm 66:9c8f0e3462fb 391 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void)
bogdanm 66:9c8f0e3462fb 392 {
bogdanm 66:9c8f0e3462fb 393 __ASM volatile ("dmb");
bogdanm 66:9c8f0e3462fb 394 }
bogdanm 66:9c8f0e3462fb 395
bogdanm 66:9c8f0e3462fb 396
bogdanm 66:9c8f0e3462fb 397 /** \brief Reverse byte order (32 bit)
bogdanm 66:9c8f0e3462fb 398
bogdanm 66:9c8f0e3462fb 399 This function reverses the byte order in integer value.
bogdanm 66:9c8f0e3462fb 400
bogdanm 66:9c8f0e3462fb 401 \param [in] value Value to reverse
bogdanm 66:9c8f0e3462fb 402 \return Reversed value
bogdanm 66:9c8f0e3462fb 403 */
bogdanm 66:9c8f0e3462fb 404 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value)
bogdanm 66:9c8f0e3462fb 405 {
bogdanm 66:9c8f0e3462fb 406 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
bogdanm 66:9c8f0e3462fb 407 return __builtin_bswap32(value);
bogdanm 66:9c8f0e3462fb 408 #else
bogdanm 66:9c8f0e3462fb 409 uint32_t result;
bogdanm 66:9c8f0e3462fb 410
bogdanm 66:9c8f0e3462fb 411 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
bogdanm 66:9c8f0e3462fb 412 return(result);
bogdanm 66:9c8f0e3462fb 413 #endif
bogdanm 66:9c8f0e3462fb 414 }
bogdanm 66:9c8f0e3462fb 415
bogdanm 66:9c8f0e3462fb 416
bogdanm 66:9c8f0e3462fb 417 /** \brief Reverse byte order (16 bit)
bogdanm 66:9c8f0e3462fb 418
bogdanm 66:9c8f0e3462fb 419 This function reverses the byte order in two unsigned short values.
bogdanm 66:9c8f0e3462fb 420
bogdanm 66:9c8f0e3462fb 421 \param [in] value Value to reverse
bogdanm 66:9c8f0e3462fb 422 \return Reversed value
bogdanm 66:9c8f0e3462fb 423 */
bogdanm 66:9c8f0e3462fb 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value)
bogdanm 66:9c8f0e3462fb 425 {
bogdanm 66:9c8f0e3462fb 426 uint32_t result;
bogdanm 66:9c8f0e3462fb 427
bogdanm 66:9c8f0e3462fb 428 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
bogdanm 66:9c8f0e3462fb 429 return(result);
bogdanm 66:9c8f0e3462fb 430 }
bogdanm 66:9c8f0e3462fb 431
bogdanm 66:9c8f0e3462fb 432
bogdanm 66:9c8f0e3462fb 433 /** \brief Reverse byte order in signed short value
bogdanm 66:9c8f0e3462fb 434
bogdanm 66:9c8f0e3462fb 435 This function reverses the byte order in a signed short value with sign extension to integer.
bogdanm 66:9c8f0e3462fb 436
bogdanm 66:9c8f0e3462fb 437 \param [in] value Value to reverse
bogdanm 66:9c8f0e3462fb 438 \return Reversed value
bogdanm 66:9c8f0e3462fb 439 */
bogdanm 66:9c8f0e3462fb 440 __attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value)
bogdanm 66:9c8f0e3462fb 441 {
bogdanm 66:9c8f0e3462fb 442 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
bogdanm 66:9c8f0e3462fb 443 return (short)__builtin_bswap16(value);
bogdanm 66:9c8f0e3462fb 444 #else
bogdanm 66:9c8f0e3462fb 445 uint32_t result;
bogdanm 66:9c8f0e3462fb 446
bogdanm 66:9c8f0e3462fb 447 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
bogdanm 66:9c8f0e3462fb 448 return(result);
bogdanm 66:9c8f0e3462fb 449 #endif
bogdanm 66:9c8f0e3462fb 450 }
bogdanm 66:9c8f0e3462fb 451
bogdanm 66:9c8f0e3462fb 452
bogdanm 66:9c8f0e3462fb 453 /** \brief Rotate Right in unsigned value (32 bit)
bogdanm 66:9c8f0e3462fb 454
bogdanm 66:9c8f0e3462fb 455 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
bogdanm 66:9c8f0e3462fb 456
bogdanm 66:9c8f0e3462fb 457 \param [in] value Value to rotate
bogdanm 66:9c8f0e3462fb 458 \param [in] value Number of Bits to rotate
bogdanm 66:9c8f0e3462fb 459 \return Rotated value
bogdanm 66:9c8f0e3462fb 460 */
bogdanm 66:9c8f0e3462fb 461 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 462 {
bogdanm 66:9c8f0e3462fb 463 return (op1 >> op2) | (op1 << (32 - op2));
bogdanm 66:9c8f0e3462fb 464 }
bogdanm 66:9c8f0e3462fb 465
bogdanm 66:9c8f0e3462fb 466
bogdanm 66:9c8f0e3462fb 467 /** \brief Breakpoint
bogdanm 66:9c8f0e3462fb 468
bogdanm 66:9c8f0e3462fb 469 This function causes the processor to enter Debug state.
bogdanm 66:9c8f0e3462fb 470 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
bogdanm 66:9c8f0e3462fb 471
bogdanm 66:9c8f0e3462fb 472 \param [in] value is ignored by the processor.
bogdanm 66:9c8f0e3462fb 473 If required, a debugger can use it to store additional information about the breakpoint.
bogdanm 66:9c8f0e3462fb 474 */
bogdanm 66:9c8f0e3462fb 475 #define __BKPT(value) __ASM volatile ("bkpt "#value)
bogdanm 66:9c8f0e3462fb 476
bogdanm 66:9c8f0e3462fb 477
bogdanm 66:9c8f0e3462fb 478 #if (__CORTEX_M >= 0x03)
bogdanm 66:9c8f0e3462fb 479
bogdanm 66:9c8f0e3462fb 480 /** \brief Reverse bit order of value
bogdanm 66:9c8f0e3462fb 481
bogdanm 66:9c8f0e3462fb 482 This function reverses the bit order of the given value.
bogdanm 66:9c8f0e3462fb 483
bogdanm 66:9c8f0e3462fb 484 \param [in] value Value to reverse
bogdanm 66:9c8f0e3462fb 485 \return Reversed value
bogdanm 66:9c8f0e3462fb 486 */
bogdanm 66:9c8f0e3462fb 487 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
bogdanm 66:9c8f0e3462fb 488 {
bogdanm 66:9c8f0e3462fb 489 uint32_t result;
bogdanm 66:9c8f0e3462fb 490
bogdanm 66:9c8f0e3462fb 491 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
bogdanm 66:9c8f0e3462fb 492 return(result);
bogdanm 66:9c8f0e3462fb 493 }
bogdanm 66:9c8f0e3462fb 494
bogdanm 66:9c8f0e3462fb 495
bogdanm 66:9c8f0e3462fb 496 /** \brief LDR Exclusive (8 bit)
bogdanm 66:9c8f0e3462fb 497
bogdanm 66:9c8f0e3462fb 498 This function performs a exclusive LDR command for 8 bit value.
bogdanm 66:9c8f0e3462fb 499
bogdanm 66:9c8f0e3462fb 500 \param [in] ptr Pointer to data
bogdanm 66:9c8f0e3462fb 501 \return value of type uint8_t at (*ptr)
bogdanm 66:9c8f0e3462fb 502 */
bogdanm 66:9c8f0e3462fb 503 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
bogdanm 66:9c8f0e3462fb 504 {
bogdanm 66:9c8f0e3462fb 505 uint32_t result;
bogdanm 66:9c8f0e3462fb 506
bogdanm 66:9c8f0e3462fb 507 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
bogdanm 66:9c8f0e3462fb 508 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
bogdanm 66:9c8f0e3462fb 509 #else
bogdanm 66:9c8f0e3462fb 510 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
bogdanm 66:9c8f0e3462fb 511 accepted by assembler. So has to use following less efficient pattern.
bogdanm 66:9c8f0e3462fb 512 */
bogdanm 66:9c8f0e3462fb 513 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
bogdanm 66:9c8f0e3462fb 514 #endif
bogdanm 66:9c8f0e3462fb 515 return(result);
bogdanm 66:9c8f0e3462fb 516 }
bogdanm 66:9c8f0e3462fb 517
bogdanm 66:9c8f0e3462fb 518
bogdanm 66:9c8f0e3462fb 519 /** \brief LDR Exclusive (16 bit)
bogdanm 66:9c8f0e3462fb 520
bogdanm 66:9c8f0e3462fb 521 This function performs a exclusive LDR command for 16 bit values.
bogdanm 66:9c8f0e3462fb 522
bogdanm 66:9c8f0e3462fb 523 \param [in] ptr Pointer to data
bogdanm 66:9c8f0e3462fb 524 \return value of type uint16_t at (*ptr)
bogdanm 66:9c8f0e3462fb 525 */
bogdanm 66:9c8f0e3462fb 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
bogdanm 66:9c8f0e3462fb 527 {
bogdanm 66:9c8f0e3462fb 528 uint32_t result;
bogdanm 66:9c8f0e3462fb 529
bogdanm 66:9c8f0e3462fb 530 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
bogdanm 66:9c8f0e3462fb 531 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
bogdanm 66:9c8f0e3462fb 532 #else
bogdanm 66:9c8f0e3462fb 533 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
bogdanm 66:9c8f0e3462fb 534 accepted by assembler. So has to use following less efficient pattern.
bogdanm 66:9c8f0e3462fb 535 */
bogdanm 66:9c8f0e3462fb 536 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
bogdanm 66:9c8f0e3462fb 537 #endif
bogdanm 66:9c8f0e3462fb 538 return(result);
bogdanm 66:9c8f0e3462fb 539 }
bogdanm 66:9c8f0e3462fb 540
bogdanm 66:9c8f0e3462fb 541
bogdanm 66:9c8f0e3462fb 542 /** \brief LDR Exclusive (32 bit)
bogdanm 66:9c8f0e3462fb 543
bogdanm 66:9c8f0e3462fb 544 This function performs a exclusive LDR command for 32 bit values.
bogdanm 66:9c8f0e3462fb 545
bogdanm 66:9c8f0e3462fb 546 \param [in] ptr Pointer to data
bogdanm 66:9c8f0e3462fb 547 \return value of type uint32_t at (*ptr)
bogdanm 66:9c8f0e3462fb 548 */
bogdanm 66:9c8f0e3462fb 549 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
bogdanm 66:9c8f0e3462fb 550 {
bogdanm 66:9c8f0e3462fb 551 uint32_t result;
bogdanm 66:9c8f0e3462fb 552
bogdanm 66:9c8f0e3462fb 553 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
bogdanm 66:9c8f0e3462fb 554 return(result);
bogdanm 66:9c8f0e3462fb 555 }
bogdanm 66:9c8f0e3462fb 556
bogdanm 66:9c8f0e3462fb 557
bogdanm 66:9c8f0e3462fb 558 /** \brief STR Exclusive (8 bit)
bogdanm 66:9c8f0e3462fb 559
bogdanm 66:9c8f0e3462fb 560 This function performs a exclusive STR command for 8 bit values.
bogdanm 66:9c8f0e3462fb 561
bogdanm 66:9c8f0e3462fb 562 \param [in] value Value to store
bogdanm 66:9c8f0e3462fb 563 \param [in] ptr Pointer to location
bogdanm 66:9c8f0e3462fb 564 \return 0 Function succeeded
bogdanm 66:9c8f0e3462fb 565 \return 1 Function failed
bogdanm 66:9c8f0e3462fb 566 */
bogdanm 66:9c8f0e3462fb 567 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
bogdanm 66:9c8f0e3462fb 568 {
bogdanm 66:9c8f0e3462fb 569 uint32_t result;
bogdanm 66:9c8f0e3462fb 570
bogdanm 66:9c8f0e3462fb 571 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
bogdanm 66:9c8f0e3462fb 572 return(result);
bogdanm 66:9c8f0e3462fb 573 }
bogdanm 66:9c8f0e3462fb 574
bogdanm 66:9c8f0e3462fb 575
bogdanm 66:9c8f0e3462fb 576 /** \brief STR Exclusive (16 bit)
bogdanm 66:9c8f0e3462fb 577
bogdanm 66:9c8f0e3462fb 578 This function performs a exclusive STR command for 16 bit values.
bogdanm 66:9c8f0e3462fb 579
bogdanm 66:9c8f0e3462fb 580 \param [in] value Value to store
bogdanm 66:9c8f0e3462fb 581 \param [in] ptr Pointer to location
bogdanm 66:9c8f0e3462fb 582 \return 0 Function succeeded
bogdanm 66:9c8f0e3462fb 583 \return 1 Function failed
bogdanm 66:9c8f0e3462fb 584 */
bogdanm 66:9c8f0e3462fb 585 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
bogdanm 66:9c8f0e3462fb 586 {
bogdanm 66:9c8f0e3462fb 587 uint32_t result;
bogdanm 66:9c8f0e3462fb 588
bogdanm 66:9c8f0e3462fb 589 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
bogdanm 66:9c8f0e3462fb 590 return(result);
bogdanm 66:9c8f0e3462fb 591 }
bogdanm 66:9c8f0e3462fb 592
bogdanm 66:9c8f0e3462fb 593
bogdanm 66:9c8f0e3462fb 594 /** \brief STR Exclusive (32 bit)
bogdanm 66:9c8f0e3462fb 595
bogdanm 66:9c8f0e3462fb 596 This function performs a exclusive STR command for 32 bit values.
bogdanm 66:9c8f0e3462fb 597
bogdanm 66:9c8f0e3462fb 598 \param [in] value Value to store
bogdanm 66:9c8f0e3462fb 599 \param [in] ptr Pointer to location
bogdanm 66:9c8f0e3462fb 600 \return 0 Function succeeded
bogdanm 66:9c8f0e3462fb 601 \return 1 Function failed
bogdanm 66:9c8f0e3462fb 602 */
bogdanm 66:9c8f0e3462fb 603 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
bogdanm 66:9c8f0e3462fb 604 {
bogdanm 66:9c8f0e3462fb 605 uint32_t result;
bogdanm 66:9c8f0e3462fb 606
bogdanm 66:9c8f0e3462fb 607 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
bogdanm 66:9c8f0e3462fb 608 return(result);
bogdanm 66:9c8f0e3462fb 609 }
bogdanm 66:9c8f0e3462fb 610
bogdanm 66:9c8f0e3462fb 611
bogdanm 66:9c8f0e3462fb 612 /** \brief Remove the exclusive lock
bogdanm 66:9c8f0e3462fb 613
bogdanm 66:9c8f0e3462fb 614 This function removes the exclusive lock which is created by LDREX.
bogdanm 66:9c8f0e3462fb 615
bogdanm 66:9c8f0e3462fb 616 */
bogdanm 66:9c8f0e3462fb 617 __attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void)
bogdanm 66:9c8f0e3462fb 618 {
bogdanm 66:9c8f0e3462fb 619 __ASM volatile ("clrex" ::: "memory");
bogdanm 66:9c8f0e3462fb 620 }
bogdanm 66:9c8f0e3462fb 621
bogdanm 66:9c8f0e3462fb 622
bogdanm 66:9c8f0e3462fb 623 /** \brief Signed Saturate
bogdanm 66:9c8f0e3462fb 624
bogdanm 66:9c8f0e3462fb 625 This function saturates a signed value.
bogdanm 66:9c8f0e3462fb 626
bogdanm 66:9c8f0e3462fb 627 \param [in] value Value to be saturated
bogdanm 66:9c8f0e3462fb 628 \param [in] sat Bit position to saturate to (1..32)
bogdanm 66:9c8f0e3462fb 629 \return Saturated value
bogdanm 66:9c8f0e3462fb 630 */
bogdanm 66:9c8f0e3462fb 631 #define __SSAT(ARG1,ARG2) \
bogdanm 66:9c8f0e3462fb 632 ({ \
bogdanm 66:9c8f0e3462fb 633 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 66:9c8f0e3462fb 634 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 66:9c8f0e3462fb 635 __RES; \
bogdanm 66:9c8f0e3462fb 636 })
bogdanm 66:9c8f0e3462fb 637
bogdanm 66:9c8f0e3462fb 638
bogdanm 66:9c8f0e3462fb 639 /** \brief Unsigned Saturate
bogdanm 66:9c8f0e3462fb 640
bogdanm 66:9c8f0e3462fb 641 This function saturates an unsigned value.
bogdanm 66:9c8f0e3462fb 642
bogdanm 66:9c8f0e3462fb 643 \param [in] value Value to be saturated
bogdanm 66:9c8f0e3462fb 644 \param [in] sat Bit position to saturate to (0..31)
bogdanm 66:9c8f0e3462fb 645 \return Saturated value
bogdanm 66:9c8f0e3462fb 646 */
bogdanm 66:9c8f0e3462fb 647 #define __USAT(ARG1,ARG2) \
bogdanm 66:9c8f0e3462fb 648 ({ \
bogdanm 66:9c8f0e3462fb 649 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 66:9c8f0e3462fb 650 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 66:9c8f0e3462fb 651 __RES; \
bogdanm 66:9c8f0e3462fb 652 })
bogdanm 66:9c8f0e3462fb 653
bogdanm 66:9c8f0e3462fb 654
bogdanm 66:9c8f0e3462fb 655 /** \brief Count leading zeros
bogdanm 66:9c8f0e3462fb 656
bogdanm 66:9c8f0e3462fb 657 This function counts the number of leading zeros of a data value.
bogdanm 66:9c8f0e3462fb 658
bogdanm 66:9c8f0e3462fb 659 \param [in] value Value to count the leading zeros
bogdanm 66:9c8f0e3462fb 660 \return number of leading zeros in value
bogdanm 66:9c8f0e3462fb 661 */
bogdanm 66:9c8f0e3462fb 662 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value)
bogdanm 66:9c8f0e3462fb 663 {
bogdanm 66:9c8f0e3462fb 664 uint32_t result;
bogdanm 66:9c8f0e3462fb 665
bogdanm 66:9c8f0e3462fb 666 __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
bogdanm 66:9c8f0e3462fb 667 return(result);
bogdanm 66:9c8f0e3462fb 668 }
bogdanm 66:9c8f0e3462fb 669
bogdanm 66:9c8f0e3462fb 670 #endif /* (__CORTEX_M >= 0x03) */
bogdanm 66:9c8f0e3462fb 671
bogdanm 66:9c8f0e3462fb 672
bogdanm 66:9c8f0e3462fb 673
bogdanm 66:9c8f0e3462fb 674
bogdanm 66:9c8f0e3462fb 675 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
bogdanm 66:9c8f0e3462fb 676 /* TASKING carm specific functions */
bogdanm 66:9c8f0e3462fb 677
bogdanm 66:9c8f0e3462fb 678 /*
bogdanm 66:9c8f0e3462fb 679 * The CMSIS functions have been implemented as intrinsics in the compiler.
bogdanm 66:9c8f0e3462fb 680 * Please use "carm -?i" to get an up to date list of all intrinsics,
bogdanm 66:9c8f0e3462fb 681 * Including the CMSIS ones.
bogdanm 66:9c8f0e3462fb 682 */
bogdanm 66:9c8f0e3462fb 683
bogdanm 66:9c8f0e3462fb 684 #endif
bogdanm 66:9c8f0e3462fb 685
bogdanm 66:9c8f0e3462fb 686 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
bogdanm 66:9c8f0e3462fb 687
bogdanm 66:9c8f0e3462fb 688 #endif /* __CORE_CMINSTR_H */