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TARGET_LPC1114/core_cm4_simd.h@71:7ec3cb6bbcc4, 2013-11-29 (annotated)

Committer:
jalp89
Date:
Fri Nov 29 09:39:46 2013 +0000
Revision:
71:7ec3cb6bbcc4
Parent:
66:9c8f0e3462fb 
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Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 66:9c8f0e3462fb 1 /**************************************************************************//**
bogdanm 66:9c8f0e3462fb 2 * @file core_cm4_simd.h
bogdanm 66:9c8f0e3462fb 3 * @brief CMSIS Cortex-M4 SIMD Header File
bogdanm 66:9c8f0e3462fb 4 * @version V3.20
bogdanm 66:9c8f0e3462fb 5 * @date 25. February 2013
bogdanm 66:9c8f0e3462fb 6 *
bogdanm 66:9c8f0e3462fb 7 * @note
bogdanm 66:9c8f0e3462fb 8 *
bogdanm 66:9c8f0e3462fb 9 ******************************************************************************/
bogdanm 66:9c8f0e3462fb 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
bogdanm 66:9c8f0e3462fb 11
bogdanm 66:9c8f0e3462fb 12 All rights reserved.
bogdanm 66:9c8f0e3462fb 13 Redistribution and use in source and binary forms, with or without
bogdanm 66:9c8f0e3462fb 14 modification, are permitted provided that the following conditions are met:
bogdanm 66:9c8f0e3462fb 15 - Redistributions of source code must retain the above copyright
bogdanm 66:9c8f0e3462fb 16 notice, this list of conditions and the following disclaimer.
bogdanm 66:9c8f0e3462fb 17 - Redistributions in binary form must reproduce the above copyright
bogdanm 66:9c8f0e3462fb 18 notice, this list of conditions and the following disclaimer in the
bogdanm 66:9c8f0e3462fb 19 documentation and/or other materials provided with the distribution.
bogdanm 66:9c8f0e3462fb 20 - Neither the name of ARM nor the names of its contributors may be used
bogdanm 66:9c8f0e3462fb 21 to endorse or promote products derived from this software without
bogdanm 66:9c8f0e3462fb 22 specific prior written permission.
bogdanm 66:9c8f0e3462fb 23 *
bogdanm 66:9c8f0e3462fb 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 66:9c8f0e3462fb 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 66:9c8f0e3462fb 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
bogdanm 66:9c8f0e3462fb 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
bogdanm 66:9c8f0e3462fb 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
bogdanm 66:9c8f0e3462fb 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
bogdanm 66:9c8f0e3462fb 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 66:9c8f0e3462fb 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 66:9c8f0e3462fb 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
bogdanm 66:9c8f0e3462fb 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
bogdanm 66:9c8f0e3462fb 34 POSSIBILITY OF SUCH DAMAGE.
bogdanm 66:9c8f0e3462fb 35 ---------------------------------------------------------------------------*/
bogdanm 66:9c8f0e3462fb 36
bogdanm 66:9c8f0e3462fb 37
bogdanm 66:9c8f0e3462fb 38 #ifdef __cplusplus
bogdanm 66:9c8f0e3462fb 39 extern "C" {
bogdanm 66:9c8f0e3462fb 40 #endif
bogdanm 66:9c8f0e3462fb 41
bogdanm 66:9c8f0e3462fb 42 #ifndef __CORE_CM4_SIMD_H
bogdanm 66:9c8f0e3462fb 43 #define __CORE_CM4_SIMD_H
bogdanm 66:9c8f0e3462fb 44
bogdanm 66:9c8f0e3462fb 45
bogdanm 66:9c8f0e3462fb 46 /*******************************************************************************
bogdanm 66:9c8f0e3462fb 47 * Hardware Abstraction Layer
bogdanm 66:9c8f0e3462fb 48 ******************************************************************************/
bogdanm 66:9c8f0e3462fb 49
bogdanm 66:9c8f0e3462fb 50
bogdanm 66:9c8f0e3462fb 51 /* ################### Compiler specific Intrinsics ########################### */
bogdanm 66:9c8f0e3462fb 52 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
bogdanm 66:9c8f0e3462fb 53 Access to dedicated SIMD instructions
bogdanm 66:9c8f0e3462fb 54 @{
bogdanm 66:9c8f0e3462fb 55 */
bogdanm 66:9c8f0e3462fb 56
bogdanm 66:9c8f0e3462fb 57 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
bogdanm 66:9c8f0e3462fb 58 /* ARM armcc specific functions */
bogdanm 66:9c8f0e3462fb 59
bogdanm 66:9c8f0e3462fb 60 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 66:9c8f0e3462fb 61 #define __SADD8 __sadd8
bogdanm 66:9c8f0e3462fb 62 #define __QADD8 __qadd8
bogdanm 66:9c8f0e3462fb 63 #define __SHADD8 __shadd8
bogdanm 66:9c8f0e3462fb 64 #define __UADD8 __uadd8
bogdanm 66:9c8f0e3462fb 65 #define __UQADD8 __uqadd8
bogdanm 66:9c8f0e3462fb 66 #define __UHADD8 __uhadd8
bogdanm 66:9c8f0e3462fb 67 #define __SSUB8 __ssub8
bogdanm 66:9c8f0e3462fb 68 #define __QSUB8 __qsub8
bogdanm 66:9c8f0e3462fb 69 #define __SHSUB8 __shsub8
bogdanm 66:9c8f0e3462fb 70 #define __USUB8 __usub8
bogdanm 66:9c8f0e3462fb 71 #define __UQSUB8 __uqsub8
bogdanm 66:9c8f0e3462fb 72 #define __UHSUB8 __uhsub8
bogdanm 66:9c8f0e3462fb 73 #define __SADD16 __sadd16
bogdanm 66:9c8f0e3462fb 74 #define __QADD16 __qadd16
bogdanm 66:9c8f0e3462fb 75 #define __SHADD16 __shadd16
bogdanm 66:9c8f0e3462fb 76 #define __UADD16 __uadd16
bogdanm 66:9c8f0e3462fb 77 #define __UQADD16 __uqadd16
bogdanm 66:9c8f0e3462fb 78 #define __UHADD16 __uhadd16
bogdanm 66:9c8f0e3462fb 79 #define __SSUB16 __ssub16
bogdanm 66:9c8f0e3462fb 80 #define __QSUB16 __qsub16
bogdanm 66:9c8f0e3462fb 81 #define __SHSUB16 __shsub16
bogdanm 66:9c8f0e3462fb 82 #define __USUB16 __usub16
bogdanm 66:9c8f0e3462fb 83 #define __UQSUB16 __uqsub16
bogdanm 66:9c8f0e3462fb 84 #define __UHSUB16 __uhsub16
bogdanm 66:9c8f0e3462fb 85 #define __SASX __sasx
bogdanm 66:9c8f0e3462fb 86 #define __QASX __qasx
bogdanm 66:9c8f0e3462fb 87 #define __SHASX __shasx
bogdanm 66:9c8f0e3462fb 88 #define __UASX __uasx
bogdanm 66:9c8f0e3462fb 89 #define __UQASX __uqasx
bogdanm 66:9c8f0e3462fb 90 #define __UHASX __uhasx
bogdanm 66:9c8f0e3462fb 91 #define __SSAX __ssax
bogdanm 66:9c8f0e3462fb 92 #define __QSAX __qsax
bogdanm 66:9c8f0e3462fb 93 #define __SHSAX __shsax
bogdanm 66:9c8f0e3462fb 94 #define __USAX __usax
bogdanm 66:9c8f0e3462fb 95 #define __UQSAX __uqsax
bogdanm 66:9c8f0e3462fb 96 #define __UHSAX __uhsax
bogdanm 66:9c8f0e3462fb 97 #define __USAD8 __usad8
bogdanm 66:9c8f0e3462fb 98 #define __USADA8 __usada8
bogdanm 66:9c8f0e3462fb 99 #define __SSAT16 __ssat16
bogdanm 66:9c8f0e3462fb 100 #define __USAT16 __usat16
bogdanm 66:9c8f0e3462fb 101 #define __UXTB16 __uxtb16
bogdanm 66:9c8f0e3462fb 102 #define __UXTAB16 __uxtab16
bogdanm 66:9c8f0e3462fb 103 #define __SXTB16 __sxtb16
bogdanm 66:9c8f0e3462fb 104 #define __SXTAB16 __sxtab16
bogdanm 66:9c8f0e3462fb 105 #define __SMUAD __smuad
bogdanm 66:9c8f0e3462fb 106 #define __SMUADX __smuadx
bogdanm 66:9c8f0e3462fb 107 #define __SMLAD __smlad
bogdanm 66:9c8f0e3462fb 108 #define __SMLADX __smladx
bogdanm 66:9c8f0e3462fb 109 #define __SMLALD __smlald
bogdanm 66:9c8f0e3462fb 110 #define __SMLALDX __smlaldx
bogdanm 66:9c8f0e3462fb 111 #define __SMUSD __smusd
bogdanm 66:9c8f0e3462fb 112 #define __SMUSDX __smusdx
bogdanm 66:9c8f0e3462fb 113 #define __SMLSD __smlsd
bogdanm 66:9c8f0e3462fb 114 #define __SMLSDX __smlsdx
bogdanm 66:9c8f0e3462fb 115 #define __SMLSLD __smlsld
bogdanm 66:9c8f0e3462fb 116 #define __SMLSLDX __smlsldx
bogdanm 66:9c8f0e3462fb 117 #define __SEL __sel
bogdanm 66:9c8f0e3462fb 118 #define __QADD __qadd
bogdanm 66:9c8f0e3462fb 119 #define __QSUB __qsub
bogdanm 66:9c8f0e3462fb 120
bogdanm 66:9c8f0e3462fb 121 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
bogdanm 66:9c8f0e3462fb 122 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
bogdanm 66:9c8f0e3462fb 123
bogdanm 66:9c8f0e3462fb 124 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
bogdanm 66:9c8f0e3462fb 125 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
bogdanm 66:9c8f0e3462fb 126
bogdanm 66:9c8f0e3462fb 127 #define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
bogdanm 66:9c8f0e3462fb 128 ((int64_t)(ARG3) << 32) ) >> 32))
bogdanm 66:9c8f0e3462fb 129
bogdanm 66:9c8f0e3462fb 130 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 66:9c8f0e3462fb 131
bogdanm 66:9c8f0e3462fb 132
bogdanm 66:9c8f0e3462fb 133
bogdanm 66:9c8f0e3462fb 134 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
bogdanm 66:9c8f0e3462fb 135 /* IAR iccarm specific functions */
bogdanm 66:9c8f0e3462fb 136
bogdanm 66:9c8f0e3462fb 137 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 66:9c8f0e3462fb 138 #include <cmsis_iar.h>
bogdanm 66:9c8f0e3462fb 139
bogdanm 66:9c8f0e3462fb 140 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 66:9c8f0e3462fb 141
bogdanm 66:9c8f0e3462fb 142
bogdanm 66:9c8f0e3462fb 143
bogdanm 66:9c8f0e3462fb 144 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
bogdanm 66:9c8f0e3462fb 145 /* TI CCS specific functions */
bogdanm 66:9c8f0e3462fb 146
bogdanm 66:9c8f0e3462fb 147 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 66:9c8f0e3462fb 148 #include <cmsis_ccs.h>
bogdanm 66:9c8f0e3462fb 149
bogdanm 66:9c8f0e3462fb 150 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 66:9c8f0e3462fb 151
bogdanm 66:9c8f0e3462fb 152
bogdanm 66:9c8f0e3462fb 153
bogdanm 66:9c8f0e3462fb 154 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
bogdanm 66:9c8f0e3462fb 155 /* GNU gcc specific functions */
bogdanm 66:9c8f0e3462fb 156
bogdanm 66:9c8f0e3462fb 157 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 66:9c8f0e3462fb 158 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 159 {
bogdanm 66:9c8f0e3462fb 160 uint32_t result;
bogdanm 66:9c8f0e3462fb 161
bogdanm 66:9c8f0e3462fb 162 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 163 return(result);
bogdanm 66:9c8f0e3462fb 164 }
bogdanm 66:9c8f0e3462fb 165
bogdanm 66:9c8f0e3462fb 166 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 167 {
bogdanm 66:9c8f0e3462fb 168 uint32_t result;
bogdanm 66:9c8f0e3462fb 169
bogdanm 66:9c8f0e3462fb 170 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 171 return(result);
bogdanm 66:9c8f0e3462fb 172 }
bogdanm 66:9c8f0e3462fb 173
bogdanm 66:9c8f0e3462fb 174 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 175 {
bogdanm 66:9c8f0e3462fb 176 uint32_t result;
bogdanm 66:9c8f0e3462fb 177
bogdanm 66:9c8f0e3462fb 178 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 179 return(result);
bogdanm 66:9c8f0e3462fb 180 }
bogdanm 66:9c8f0e3462fb 181
bogdanm 66:9c8f0e3462fb 182 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 183 {
bogdanm 66:9c8f0e3462fb 184 uint32_t result;
bogdanm 66:9c8f0e3462fb 185
bogdanm 66:9c8f0e3462fb 186 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 187 return(result);
bogdanm 66:9c8f0e3462fb 188 }
bogdanm 66:9c8f0e3462fb 189
bogdanm 66:9c8f0e3462fb 190 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 191 {
bogdanm 66:9c8f0e3462fb 192 uint32_t result;
bogdanm 66:9c8f0e3462fb 193
bogdanm 66:9c8f0e3462fb 194 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 195 return(result);
bogdanm 66:9c8f0e3462fb 196 }
bogdanm 66:9c8f0e3462fb 197
bogdanm 66:9c8f0e3462fb 198 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 199 {
bogdanm 66:9c8f0e3462fb 200 uint32_t result;
bogdanm 66:9c8f0e3462fb 201
bogdanm 66:9c8f0e3462fb 202 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 203 return(result);
bogdanm 66:9c8f0e3462fb 204 }
bogdanm 66:9c8f0e3462fb 205
bogdanm 66:9c8f0e3462fb 206
bogdanm 66:9c8f0e3462fb 207 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 208 {
bogdanm 66:9c8f0e3462fb 209 uint32_t result;
bogdanm 66:9c8f0e3462fb 210
bogdanm 66:9c8f0e3462fb 211 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 212 return(result);
bogdanm 66:9c8f0e3462fb 213 }
bogdanm 66:9c8f0e3462fb 214
bogdanm 66:9c8f0e3462fb 215 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 216 {
bogdanm 66:9c8f0e3462fb 217 uint32_t result;
bogdanm 66:9c8f0e3462fb 218
bogdanm 66:9c8f0e3462fb 219 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 220 return(result);
bogdanm 66:9c8f0e3462fb 221 }
bogdanm 66:9c8f0e3462fb 222
bogdanm 66:9c8f0e3462fb 223 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 224 {
bogdanm 66:9c8f0e3462fb 225 uint32_t result;
bogdanm 66:9c8f0e3462fb 226
bogdanm 66:9c8f0e3462fb 227 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 228 return(result);
bogdanm 66:9c8f0e3462fb 229 }
bogdanm 66:9c8f0e3462fb 230
bogdanm 66:9c8f0e3462fb 231 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 232 {
bogdanm 66:9c8f0e3462fb 233 uint32_t result;
bogdanm 66:9c8f0e3462fb 234
bogdanm 66:9c8f0e3462fb 235 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 236 return(result);
bogdanm 66:9c8f0e3462fb 237 }
bogdanm 66:9c8f0e3462fb 238
bogdanm 66:9c8f0e3462fb 239 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 240 {
bogdanm 66:9c8f0e3462fb 241 uint32_t result;
bogdanm 66:9c8f0e3462fb 242
bogdanm 66:9c8f0e3462fb 243 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 244 return(result);
bogdanm 66:9c8f0e3462fb 245 }
bogdanm 66:9c8f0e3462fb 246
bogdanm 66:9c8f0e3462fb 247 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 248 {
bogdanm 66:9c8f0e3462fb 249 uint32_t result;
bogdanm 66:9c8f0e3462fb 250
bogdanm 66:9c8f0e3462fb 251 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 252 return(result);
bogdanm 66:9c8f0e3462fb 253 }
bogdanm 66:9c8f0e3462fb 254
bogdanm 66:9c8f0e3462fb 255
bogdanm 66:9c8f0e3462fb 256 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 257 {
bogdanm 66:9c8f0e3462fb 258 uint32_t result;
bogdanm 66:9c8f0e3462fb 259
bogdanm 66:9c8f0e3462fb 260 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 261 return(result);
bogdanm 66:9c8f0e3462fb 262 }
bogdanm 66:9c8f0e3462fb 263
bogdanm 66:9c8f0e3462fb 264 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 265 {
bogdanm 66:9c8f0e3462fb 266 uint32_t result;
bogdanm 66:9c8f0e3462fb 267
bogdanm 66:9c8f0e3462fb 268 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 269 return(result);
bogdanm 66:9c8f0e3462fb 270 }
bogdanm 66:9c8f0e3462fb 271
bogdanm 66:9c8f0e3462fb 272 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 273 {
bogdanm 66:9c8f0e3462fb 274 uint32_t result;
bogdanm 66:9c8f0e3462fb 275
bogdanm 66:9c8f0e3462fb 276 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 277 return(result);
bogdanm 66:9c8f0e3462fb 278 }
bogdanm 66:9c8f0e3462fb 279
bogdanm 66:9c8f0e3462fb 280 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 281 {
bogdanm 66:9c8f0e3462fb 282 uint32_t result;
bogdanm 66:9c8f0e3462fb 283
bogdanm 66:9c8f0e3462fb 284 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 285 return(result);
bogdanm 66:9c8f0e3462fb 286 }
bogdanm 66:9c8f0e3462fb 287
bogdanm 66:9c8f0e3462fb 288 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 289 {
bogdanm 66:9c8f0e3462fb 290 uint32_t result;
bogdanm 66:9c8f0e3462fb 291
bogdanm 66:9c8f0e3462fb 292 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 293 return(result);
bogdanm 66:9c8f0e3462fb 294 }
bogdanm 66:9c8f0e3462fb 295
bogdanm 66:9c8f0e3462fb 296 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 297 {
bogdanm 66:9c8f0e3462fb 298 uint32_t result;
bogdanm 66:9c8f0e3462fb 299
bogdanm 66:9c8f0e3462fb 300 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 301 return(result);
bogdanm 66:9c8f0e3462fb 302 }
bogdanm 66:9c8f0e3462fb 303
bogdanm 66:9c8f0e3462fb 304 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 305 {
bogdanm 66:9c8f0e3462fb 306 uint32_t result;
bogdanm 66:9c8f0e3462fb 307
bogdanm 66:9c8f0e3462fb 308 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 309 return(result);
bogdanm 66:9c8f0e3462fb 310 }
bogdanm 66:9c8f0e3462fb 311
bogdanm 66:9c8f0e3462fb 312 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 313 {
bogdanm 66:9c8f0e3462fb 314 uint32_t result;
bogdanm 66:9c8f0e3462fb 315
bogdanm 66:9c8f0e3462fb 316 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 317 return(result);
bogdanm 66:9c8f0e3462fb 318 }
bogdanm 66:9c8f0e3462fb 319
bogdanm 66:9c8f0e3462fb 320 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 321 {
bogdanm 66:9c8f0e3462fb 322 uint32_t result;
bogdanm 66:9c8f0e3462fb 323
bogdanm 66:9c8f0e3462fb 324 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 325 return(result);
bogdanm 66:9c8f0e3462fb 326 }
bogdanm 66:9c8f0e3462fb 327
bogdanm 66:9c8f0e3462fb 328 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 329 {
bogdanm 66:9c8f0e3462fb 330 uint32_t result;
bogdanm 66:9c8f0e3462fb 331
bogdanm 66:9c8f0e3462fb 332 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 333 return(result);
bogdanm 66:9c8f0e3462fb 334 }
bogdanm 66:9c8f0e3462fb 335
bogdanm 66:9c8f0e3462fb 336 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 337 {
bogdanm 66:9c8f0e3462fb 338 uint32_t result;
bogdanm 66:9c8f0e3462fb 339
bogdanm 66:9c8f0e3462fb 340 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 341 return(result);
bogdanm 66:9c8f0e3462fb 342 }
bogdanm 66:9c8f0e3462fb 343
bogdanm 66:9c8f0e3462fb 344 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 345 {
bogdanm 66:9c8f0e3462fb 346 uint32_t result;
bogdanm 66:9c8f0e3462fb 347
bogdanm 66:9c8f0e3462fb 348 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 349 return(result);
bogdanm 66:9c8f0e3462fb 350 }
bogdanm 66:9c8f0e3462fb 351
bogdanm 66:9c8f0e3462fb 352 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 353 {
bogdanm 66:9c8f0e3462fb 354 uint32_t result;
bogdanm 66:9c8f0e3462fb 355
bogdanm 66:9c8f0e3462fb 356 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 357 return(result);
bogdanm 66:9c8f0e3462fb 358 }
bogdanm 66:9c8f0e3462fb 359
bogdanm 66:9c8f0e3462fb 360 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 361 {
bogdanm 66:9c8f0e3462fb 362 uint32_t result;
bogdanm 66:9c8f0e3462fb 363
bogdanm 66:9c8f0e3462fb 364 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 365 return(result);
bogdanm 66:9c8f0e3462fb 366 }
bogdanm 66:9c8f0e3462fb 367
bogdanm 66:9c8f0e3462fb 368 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 369 {
bogdanm 66:9c8f0e3462fb 370 uint32_t result;
bogdanm 66:9c8f0e3462fb 371
bogdanm 66:9c8f0e3462fb 372 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 373 return(result);
bogdanm 66:9c8f0e3462fb 374 }
bogdanm 66:9c8f0e3462fb 375
bogdanm 66:9c8f0e3462fb 376 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 377 {
bogdanm 66:9c8f0e3462fb 378 uint32_t result;
bogdanm 66:9c8f0e3462fb 379
bogdanm 66:9c8f0e3462fb 380 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 381 return(result);
bogdanm 66:9c8f0e3462fb 382 }
bogdanm 66:9c8f0e3462fb 383
bogdanm 66:9c8f0e3462fb 384 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 385 {
bogdanm 66:9c8f0e3462fb 386 uint32_t result;
bogdanm 66:9c8f0e3462fb 387
bogdanm 66:9c8f0e3462fb 388 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 389 return(result);
bogdanm 66:9c8f0e3462fb 390 }
bogdanm 66:9c8f0e3462fb 391
bogdanm 66:9c8f0e3462fb 392 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 393 {
bogdanm 66:9c8f0e3462fb 394 uint32_t result;
bogdanm 66:9c8f0e3462fb 395
bogdanm 66:9c8f0e3462fb 396 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 397 return(result);
bogdanm 66:9c8f0e3462fb 398 }
bogdanm 66:9c8f0e3462fb 399
bogdanm 66:9c8f0e3462fb 400 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 401 {
bogdanm 66:9c8f0e3462fb 402 uint32_t result;
bogdanm 66:9c8f0e3462fb 403
bogdanm 66:9c8f0e3462fb 404 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 405 return(result);
bogdanm 66:9c8f0e3462fb 406 }
bogdanm 66:9c8f0e3462fb 407
bogdanm 66:9c8f0e3462fb 408 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 409 {
bogdanm 66:9c8f0e3462fb 410 uint32_t result;
bogdanm 66:9c8f0e3462fb 411
bogdanm 66:9c8f0e3462fb 412 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 413 return(result);
bogdanm 66:9c8f0e3462fb 414 }
bogdanm 66:9c8f0e3462fb 415
bogdanm 66:9c8f0e3462fb 416 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 417 {
bogdanm 66:9c8f0e3462fb 418 uint32_t result;
bogdanm 66:9c8f0e3462fb 419
bogdanm 66:9c8f0e3462fb 420 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 421 return(result);
bogdanm 66:9c8f0e3462fb 422 }
bogdanm 66:9c8f0e3462fb 423
bogdanm 66:9c8f0e3462fb 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 425 {
bogdanm 66:9c8f0e3462fb 426 uint32_t result;
bogdanm 66:9c8f0e3462fb 427
bogdanm 66:9c8f0e3462fb 428 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 429 return(result);
bogdanm 66:9c8f0e3462fb 430 }
bogdanm 66:9c8f0e3462fb 431
bogdanm 66:9c8f0e3462fb 432 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 433 {
bogdanm 66:9c8f0e3462fb 434 uint32_t result;
bogdanm 66:9c8f0e3462fb 435
bogdanm 66:9c8f0e3462fb 436 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 437 return(result);
bogdanm 66:9c8f0e3462fb 438 }
bogdanm 66:9c8f0e3462fb 439
bogdanm 66:9c8f0e3462fb 440 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 441 {
bogdanm 66:9c8f0e3462fb 442 uint32_t result;
bogdanm 66:9c8f0e3462fb 443
bogdanm 66:9c8f0e3462fb 444 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 445 return(result);
bogdanm 66:9c8f0e3462fb 446 }
bogdanm 66:9c8f0e3462fb 447
bogdanm 66:9c8f0e3462fb 448 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 449 {
bogdanm 66:9c8f0e3462fb 450 uint32_t result;
bogdanm 66:9c8f0e3462fb 451
bogdanm 66:9c8f0e3462fb 452 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 453 return(result);
bogdanm 66:9c8f0e3462fb 454 }
bogdanm 66:9c8f0e3462fb 455
bogdanm 66:9c8f0e3462fb 456 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 66:9c8f0e3462fb 457 {
bogdanm 66:9c8f0e3462fb 458 uint32_t result;
bogdanm 66:9c8f0e3462fb 459
bogdanm 66:9c8f0e3462fb 460 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 66:9c8f0e3462fb 461 return(result);
bogdanm 66:9c8f0e3462fb 462 }
bogdanm 66:9c8f0e3462fb 463
bogdanm 66:9c8f0e3462fb 464 #define __SSAT16(ARG1,ARG2) \
bogdanm 66:9c8f0e3462fb 465 ({ \
bogdanm 66:9c8f0e3462fb 466 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 66:9c8f0e3462fb 467 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 66:9c8f0e3462fb 468 __RES; \
bogdanm 66:9c8f0e3462fb 469 })
bogdanm 66:9c8f0e3462fb 470
bogdanm 66:9c8f0e3462fb 471 #define __USAT16(ARG1,ARG2) \
bogdanm 66:9c8f0e3462fb 472 ({ \
bogdanm 66:9c8f0e3462fb 473 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 66:9c8f0e3462fb 474 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 66:9c8f0e3462fb 475 __RES; \
bogdanm 66:9c8f0e3462fb 476 })
bogdanm 66:9c8f0e3462fb 477
bogdanm 66:9c8f0e3462fb 478 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
bogdanm 66:9c8f0e3462fb 479 {
bogdanm 66:9c8f0e3462fb 480 uint32_t result;
bogdanm 66:9c8f0e3462fb 481
bogdanm 66:9c8f0e3462fb 482 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
bogdanm 66:9c8f0e3462fb 483 return(result);
bogdanm 66:9c8f0e3462fb 484 }
bogdanm 66:9c8f0e3462fb 485
bogdanm 66:9c8f0e3462fb 486 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 487 {
bogdanm 66:9c8f0e3462fb 488 uint32_t result;
bogdanm 66:9c8f0e3462fb 489
bogdanm 66:9c8f0e3462fb 490 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 491 return(result);
bogdanm 66:9c8f0e3462fb 492 }
bogdanm 66:9c8f0e3462fb 493
bogdanm 66:9c8f0e3462fb 494 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
bogdanm 66:9c8f0e3462fb 495 {
bogdanm 66:9c8f0e3462fb 496 uint32_t result;
bogdanm 66:9c8f0e3462fb 497
bogdanm 66:9c8f0e3462fb 498 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
bogdanm 66:9c8f0e3462fb 499 return(result);
bogdanm 66:9c8f0e3462fb 500 }
bogdanm 66:9c8f0e3462fb 501
bogdanm 66:9c8f0e3462fb 502 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 503 {
bogdanm 66:9c8f0e3462fb 504 uint32_t result;
bogdanm 66:9c8f0e3462fb 505
bogdanm 66:9c8f0e3462fb 506 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 507 return(result);
bogdanm 66:9c8f0e3462fb 508 }
bogdanm 66:9c8f0e3462fb 509
bogdanm 66:9c8f0e3462fb 510 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 511 {
bogdanm 66:9c8f0e3462fb 512 uint32_t result;
bogdanm 66:9c8f0e3462fb 513
bogdanm 66:9c8f0e3462fb 514 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 515 return(result);
bogdanm 66:9c8f0e3462fb 516 }
bogdanm 66:9c8f0e3462fb 517
bogdanm 66:9c8f0e3462fb 518 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 519 {
bogdanm 66:9c8f0e3462fb 520 uint32_t result;
bogdanm 66:9c8f0e3462fb 521
bogdanm 66:9c8f0e3462fb 522 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 523 return(result);
bogdanm 66:9c8f0e3462fb 524 }
bogdanm 66:9c8f0e3462fb 525
bogdanm 66:9c8f0e3462fb 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 66:9c8f0e3462fb 527 {
bogdanm 66:9c8f0e3462fb 528 uint32_t result;
bogdanm 66:9c8f0e3462fb 529
bogdanm 66:9c8f0e3462fb 530 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 66:9c8f0e3462fb 531 return(result);
bogdanm 66:9c8f0e3462fb 532 }
bogdanm 66:9c8f0e3462fb 533
bogdanm 66:9c8f0e3462fb 534 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 66:9c8f0e3462fb 535 {
bogdanm 66:9c8f0e3462fb 536 uint32_t result;
bogdanm 66:9c8f0e3462fb 537
bogdanm 66:9c8f0e3462fb 538 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 66:9c8f0e3462fb 539 return(result);
bogdanm 66:9c8f0e3462fb 540 }
bogdanm 66:9c8f0e3462fb 541
bogdanm 66:9c8f0e3462fb 542 #define __SMLALD(ARG1,ARG2,ARG3) \
bogdanm 66:9c8f0e3462fb 543 ({ \
bogdanm 66:9c8f0e3462fb 544 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
bogdanm 66:9c8f0e3462fb 545 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 66:9c8f0e3462fb 546 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 66:9c8f0e3462fb 547 })
bogdanm 66:9c8f0e3462fb 548
bogdanm 66:9c8f0e3462fb 549 #define __SMLALDX(ARG1,ARG2,ARG3) \
bogdanm 66:9c8f0e3462fb 550 ({ \
bogdanm 66:9c8f0e3462fb 551 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
bogdanm 66:9c8f0e3462fb 552 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 66:9c8f0e3462fb 553 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 66:9c8f0e3462fb 554 })
bogdanm 66:9c8f0e3462fb 555
bogdanm 66:9c8f0e3462fb 556 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 557 {
bogdanm 66:9c8f0e3462fb 558 uint32_t result;
bogdanm 66:9c8f0e3462fb 559
bogdanm 66:9c8f0e3462fb 560 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 561 return(result);
bogdanm 66:9c8f0e3462fb 562 }
bogdanm 66:9c8f0e3462fb 563
bogdanm 66:9c8f0e3462fb 564 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 565 {
bogdanm 66:9c8f0e3462fb 566 uint32_t result;
bogdanm 66:9c8f0e3462fb 567
bogdanm 66:9c8f0e3462fb 568 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 569 return(result);
bogdanm 66:9c8f0e3462fb 570 }
bogdanm 66:9c8f0e3462fb 571
bogdanm 66:9c8f0e3462fb 572 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 66:9c8f0e3462fb 573 {
bogdanm 66:9c8f0e3462fb 574 uint32_t result;
bogdanm 66:9c8f0e3462fb 575
bogdanm 66:9c8f0e3462fb 576 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 66:9c8f0e3462fb 577 return(result);
bogdanm 66:9c8f0e3462fb 578 }
bogdanm 66:9c8f0e3462fb 579
bogdanm 66:9c8f0e3462fb 580 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 66:9c8f0e3462fb 581 {
bogdanm 66:9c8f0e3462fb 582 uint32_t result;
bogdanm 66:9c8f0e3462fb 583
bogdanm 66:9c8f0e3462fb 584 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 66:9c8f0e3462fb 585 return(result);
bogdanm 66:9c8f0e3462fb 586 }
bogdanm 66:9c8f0e3462fb 587
bogdanm 66:9c8f0e3462fb 588 #define __SMLSLD(ARG1,ARG2,ARG3) \
bogdanm 66:9c8f0e3462fb 589 ({ \
bogdanm 66:9c8f0e3462fb 590 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
bogdanm 66:9c8f0e3462fb 591 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 66:9c8f0e3462fb 592 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 66:9c8f0e3462fb 593 })
bogdanm 66:9c8f0e3462fb 594
bogdanm 66:9c8f0e3462fb 595 #define __SMLSLDX(ARG1,ARG2,ARG3) \
bogdanm 66:9c8f0e3462fb 596 ({ \
bogdanm 66:9c8f0e3462fb 597 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
bogdanm 66:9c8f0e3462fb 598 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 66:9c8f0e3462fb 599 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 66:9c8f0e3462fb 600 })
bogdanm 66:9c8f0e3462fb 601
bogdanm 66:9c8f0e3462fb 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 603 {
bogdanm 66:9c8f0e3462fb 604 uint32_t result;
bogdanm 66:9c8f0e3462fb 605
bogdanm 66:9c8f0e3462fb 606 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 607 return(result);
bogdanm 66:9c8f0e3462fb 608 }
bogdanm 66:9c8f0e3462fb 609
bogdanm 66:9c8f0e3462fb 610 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 611 {
bogdanm 66:9c8f0e3462fb 612 uint32_t result;
bogdanm 66:9c8f0e3462fb 613
bogdanm 66:9c8f0e3462fb 614 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 615 return(result);
bogdanm 66:9c8f0e3462fb 616 }
bogdanm 66:9c8f0e3462fb 617
bogdanm 66:9c8f0e3462fb 618 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB(uint32_t op1, uint32_t op2)
bogdanm 66:9c8f0e3462fb 619 {
bogdanm 66:9c8f0e3462fb 620 uint32_t result;
bogdanm 66:9c8f0e3462fb 621
bogdanm 66:9c8f0e3462fb 622 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 66:9c8f0e3462fb 623 return(result);
bogdanm 66:9c8f0e3462fb 624 }
bogdanm 66:9c8f0e3462fb 625
bogdanm 66:9c8f0e3462fb 626 #define __PKHBT(ARG1,ARG2,ARG3) \
bogdanm 66:9c8f0e3462fb 627 ({ \
bogdanm 66:9c8f0e3462fb 628 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
bogdanm 66:9c8f0e3462fb 629 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
bogdanm 66:9c8f0e3462fb 630 __RES; \
bogdanm 66:9c8f0e3462fb 631 })
bogdanm 66:9c8f0e3462fb 632
bogdanm 66:9c8f0e3462fb 633 #define __PKHTB(ARG1,ARG2,ARG3) \
bogdanm 66:9c8f0e3462fb 634 ({ \
bogdanm 66:9c8f0e3462fb 635 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
bogdanm 66:9c8f0e3462fb 636 if (ARG3 == 0) \
bogdanm 66:9c8f0e3462fb 637 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
bogdanm 66:9c8f0e3462fb 638 else \
bogdanm 66:9c8f0e3462fb 639 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
bogdanm 66:9c8f0e3462fb 640 __RES; \
bogdanm 66:9c8f0e3462fb 641 })
bogdanm 66:9c8f0e3462fb 642
bogdanm 66:9c8f0e3462fb 643 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
bogdanm 66:9c8f0e3462fb 644 {
bogdanm 66:9c8f0e3462fb 645 int32_t result;
bogdanm 66:9c8f0e3462fb 646
bogdanm 66:9c8f0e3462fb 647 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
bogdanm 66:9c8f0e3462fb 648 return(result);
bogdanm 66:9c8f0e3462fb 649 }
bogdanm 66:9c8f0e3462fb 650
bogdanm 66:9c8f0e3462fb 651 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 66:9c8f0e3462fb 652
bogdanm 66:9c8f0e3462fb 653
bogdanm 66:9c8f0e3462fb 654
bogdanm 66:9c8f0e3462fb 655 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
bogdanm 66:9c8f0e3462fb 656 /* TASKING carm specific functions */
bogdanm 66:9c8f0e3462fb 657
bogdanm 66:9c8f0e3462fb 658
bogdanm 66:9c8f0e3462fb 659 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 66:9c8f0e3462fb 660 /* not yet supported */
bogdanm 66:9c8f0e3462fb 661 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 66:9c8f0e3462fb 662
bogdanm 66:9c8f0e3462fb 663
bogdanm 66:9c8f0e3462fb 664 #endif
bogdanm 66:9c8f0e3462fb 665
bogdanm 66:9c8f0e3462fb 666 /*@} end of group CMSIS_SIMD_intrinsics */
bogdanm 66:9c8f0e3462fb 667
bogdanm 66:9c8f0e3462fb 668
bogdanm 66:9c8f0e3462fb 669 #endif /* __CORE_CM4_SIMD_H */
bogdanm 66:9c8f0e3462fb 670
bogdanm 66:9c8f0e3462fb 671 #ifdef __cplusplus
bogdanm 66:9c8f0e3462fb 672 }
bogdanm 66:9c8f0e3462fb 673 #endif