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targets/cmsis/TARGET_STM/TARGET_STM32L4/stm32l4xx_ll_fmc.c@637:ed69428d4850, 2015-12-22 (annotated)

Committer:
jaerts
Date:
Tue Dec 22 13:22:16 2015 +0000
Revision:
637:ed69428d4850
Parent:
610:813dcc80987e 
Add very shady LPC1768 CAN Filter implementation

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 610:813dcc80987e 1 /**
mbed_official 610:813dcc80987e 2 ******************************************************************************
mbed_official 610:813dcc80987e 3 * @file stm32l4xx_ll_fmc.c
mbed_official 610:813dcc80987e 4 * @author MCD Application Team
mbed_official 610:813dcc80987e 5 * @version V1.0.0
mbed_official 610:813dcc80987e 6 * @date 26-June-2015
mbed_official 610:813dcc80987e 7 * @brief FMC Low Layer HAL module driver.
mbed_official 610:813dcc80987e 8 * This file provides firmware functions to manage the following
mbed_official 610:813dcc80987e 9 * functionalities of the Flexible Memory Controller (FMC) peripheral memories:
mbed_official 610:813dcc80987e 10 * + Initialization/de-initialization functions
mbed_official 610:813dcc80987e 11 * + Peripheral Control functions
mbed_official 610:813dcc80987e 12 * + Peripheral State functions
mbed_official 610:813dcc80987e 13 *
mbed_official 610:813dcc80987e 14 @verbatim
mbed_official 610:813dcc80987e 15 ==============================================================================
mbed_official 610:813dcc80987e 16 ##### FMC peripheral features #####
mbed_official 610:813dcc80987e 17 ==============================================================================
mbed_official 610:813dcc80987e 18 [..] The Flexible memory controller (FMC) includes following memory controllers:
mbed_official 610:813dcc80987e 19 (+) The NOR/PSRAM memory controller
mbed_official 610:813dcc80987e 20 (+) The NAND memory controller
mbed_official 610:813dcc80987e 21
mbed_official 610:813dcc80987e 22 [..] The FMC functional block makes the interface with synchronous and asynchronous static
mbed_official 610:813dcc80987e 23 memories and 16-bit PC memory cards. Its main purposes are:
mbed_official 610:813dcc80987e 24 (+) to translate AHB transactions into the appropriate external device protocol.
mbed_official 610:813dcc80987e 25 (+) to meet the access time requirements of the external memory devices.
mbed_official 610:813dcc80987e 26
mbed_official 610:813dcc80987e 27 [..] All external memories share the addresses, data and control signals with the controller.
mbed_official 610:813dcc80987e 28 Each external device is accessed by means of a unique Chip Select. The FMC performs
mbed_official 610:813dcc80987e 29 only one access at a time to an external device.
mbed_official 610:813dcc80987e 30 The main features of the FMC controller are the following:
mbed_official 610:813dcc80987e 31 (+) Interface with static-memory mapped devices including:
mbed_official 610:813dcc80987e 32 (++) Static random access memory (SRAM).
mbed_official 610:813dcc80987e 33 (++) NOR Flash memory.
mbed_official 610:813dcc80987e 34 (++) PSRAM (4 memory banks).
mbed_official 610:813dcc80987e 35 (++) Two banks of NAND Flash memory with ECC hardware to check up to 8 Kbytes of
mbed_official 610:813dcc80987e 36 data
mbed_official 610:813dcc80987e 37 (+) Independent Chip Select control for each memory bank
mbed_official 610:813dcc80987e 38 (+) Independent configuration for each memory bank
mbed_official 610:813dcc80987e 39
mbed_official 610:813dcc80987e 40 @endverbatim
mbed_official 610:813dcc80987e 41 ******************************************************************************
mbed_official 610:813dcc80987e 42 * @attention
mbed_official 610:813dcc80987e 43 *
mbed_official 610:813dcc80987e 44 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official 610:813dcc80987e 45 *
mbed_official 610:813dcc80987e 46 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 610:813dcc80987e 47 * are permitted provided that the following conditions are met:
mbed_official 610:813dcc80987e 48 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 610:813dcc80987e 49 * this list of conditions and the following disclaimer.
mbed_official 610:813dcc80987e 50 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 610:813dcc80987e 51 * this list of conditions and the following disclaimer in the documentation
mbed_official 610:813dcc80987e 52 * and/or other materials provided with the distribution.
mbed_official 610:813dcc80987e 53 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 610:813dcc80987e 54 * may be used to endorse or promote products derived from this software
mbed_official 610:813dcc80987e 55 * without specific prior written permission.
mbed_official 610:813dcc80987e 56 *
mbed_official 610:813dcc80987e 57 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 610:813dcc80987e 58 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 610:813dcc80987e 59 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 610:813dcc80987e 60 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 610:813dcc80987e 61 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 610:813dcc80987e 62 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 610:813dcc80987e 63 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 610:813dcc80987e 64 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 610:813dcc80987e 65 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 610:813dcc80987e 66 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 610:813dcc80987e 67 *
mbed_official 610:813dcc80987e 68 ******************************************************************************
mbed_official 610:813dcc80987e 69 */
mbed_official 610:813dcc80987e 70
mbed_official 610:813dcc80987e 71 /* Includes ------------------------------------------------------------------*/
mbed_official 610:813dcc80987e 72 #include "stm32l4xx_hal.h"
mbed_official 610:813dcc80987e 73
mbed_official 610:813dcc80987e 74 /** @addtogroup STM32L4xx_HAL_Driver
mbed_official 610:813dcc80987e 75 * @{
mbed_official 610:813dcc80987e 76 */
mbed_official 610:813dcc80987e 77
mbed_official 610:813dcc80987e 78 #if defined (HAL_SRAM_MODULE_ENABLED) || defined(HAL_NOR_MODULE_ENABLED) || defined(HAL_NAND_MODULE_ENABLED)
mbed_official 610:813dcc80987e 79
mbed_official 610:813dcc80987e 80 /** @defgroup FMC_LL FMC Low Layer
mbed_official 610:813dcc80987e 81 * @brief FMC driver modules
mbed_official 610:813dcc80987e 82 * @{
mbed_official 610:813dcc80987e 83 */
mbed_official 610:813dcc80987e 84
mbed_official 610:813dcc80987e 85 /* Private typedef -----------------------------------------------------------*/
mbed_official 610:813dcc80987e 86 /* Private define ------------------------------------------------------------*/
mbed_official 610:813dcc80987e 87 /** @defgroup FMC_LL_Private_Constants FMC Low Layer Private Constants
mbed_official 610:813dcc80987e 88 * @{
mbed_official 610:813dcc80987e 89 */
mbed_official 610:813dcc80987e 90
mbed_official 610:813dcc80987e 91 /* ----------------------- FMC registers bit mask --------------------------- */
mbed_official 610:813dcc80987e 92 /* --- BCRx Register ---*/
mbed_official 610:813dcc80987e 93 /* BCRx register clear mask */
mbed_official 610:813dcc80987e 94 #define BCRx_CLEAR_MASK ((uint32_t)(FMC_BCRx_MBKEN | FMC_BCRx_MUXEN |\
mbed_official 610:813dcc80987e 95 FMC_BCRx_MTYP | FMC_BCRx_MWID |\
mbed_official 610:813dcc80987e 96 FMC_BCRx_FACCEN | FMC_BCRx_BURSTEN |\
mbed_official 610:813dcc80987e 97 FMC_BCRx_WAITPOL | FMC_BCRx_WAITCFG |\
mbed_official 610:813dcc80987e 98 FMC_BCRx_WREN | FMC_BCRx_WAITEN |\
mbed_official 610:813dcc80987e 99 FMC_BCRx_EXTMOD | FMC_BCRx_ASYNCWAIT |\
mbed_official 610:813dcc80987e 100 FMC_BCRx_CPSIZE | FMC_BCRx_CBURSTRW))
mbed_official 610:813dcc80987e 101 /* --- BTRx Register ---*/
mbed_official 610:813dcc80987e 102 /* BTRx register clear mask */
mbed_official 610:813dcc80987e 103 #define BTRx_CLEAR_MASK ((uint32_t)(FMC_BTRx_ADDSET | FMC_BTRx_ADDHLD |\
mbed_official 610:813dcc80987e 104 FMC_BTRx_DATAST | FMC_BTRx_BUSTURN |\
mbed_official 610:813dcc80987e 105 FMC_BTRx_CLKDIV | FMC_BTRx_DATLAT |\
mbed_official 610:813dcc80987e 106 FMC_BTRx_ACCMOD))
mbed_official 610:813dcc80987e 107
mbed_official 610:813dcc80987e 108 /* --- BWTRx Register ---*/
mbed_official 610:813dcc80987e 109 /* BWTRx register clear mask */
mbed_official 610:813dcc80987e 110 #define BWTRx_CLEAR_MASK ((uint32_t)(FMC_BWTRx_ADDSET | FMC_BWTRx_ADDHLD |\
mbed_official 610:813dcc80987e 111 FMC_BWTRx_DATAST | FMC_BWTRx_ACCMOD))
mbed_official 610:813dcc80987e 112
mbed_official 610:813dcc80987e 113 /* --- PCR Register ---*/
mbed_official 610:813dcc80987e 114 /* PCR register clear mask */
mbed_official 610:813dcc80987e 115 #define PCR_CLEAR_MASK ((uint32_t)(FMC_PCR_PWAITEN | FMC_PCR_PBKEN |\
mbed_official 610:813dcc80987e 116 FMC_PCR_PTYP | FMC_PCR_PWID |\
mbed_official 610:813dcc80987e 117 FMC_PCR_ECCEN | FMC_PCR_TCLR |\
mbed_official 610:813dcc80987e 118 FMC_PCR_TAR | FMC_PCR_ECCPS))
mbed_official 610:813dcc80987e 119
mbed_official 610:813dcc80987e 120 /* --- SR Register ---*/
mbed_official 610:813dcc80987e 121 /* SR register clear mask */
mbed_official 610:813dcc80987e 122 #define SR_CLEAR_MASK ((uint32_t)(FMC_SR_FEMPT))
mbed_official 610:813dcc80987e 123
mbed_official 610:813dcc80987e 124 /* --- PMEM Register ---*/
mbed_official 610:813dcc80987e 125 /* PMEM register clear mask */
mbed_official 610:813dcc80987e 126 #define PMEM_CLEAR_MASK ((uint32_t)(FMC_PMEM_MEMSET | FMC_PMEM_MEMWAIT |\
mbed_official 610:813dcc80987e 127 FMC_PMEM_MEMHOLD | FMC_PMEM_MEMHIZ))
mbed_official 610:813dcc80987e 128
mbed_official 610:813dcc80987e 129 /* --- PATT Register ---*/
mbed_official 610:813dcc80987e 130 /* PATT register clear mask */
mbed_official 610:813dcc80987e 131 #define PATT_CLEAR_MASK ((uint32_t)(FMC_PATT_ATTSET | FMC_PATT_ATTWAIT |\
mbed_official 610:813dcc80987e 132 FMC_PATT_ATTHOLD | FMC_PATT_ATTHIZ))
mbed_official 610:813dcc80987e 133 /**
mbed_official 610:813dcc80987e 134 * @}
mbed_official 610:813dcc80987e 135 */
mbed_official 610:813dcc80987e 136
mbed_official 610:813dcc80987e 137 /* Private macro -------------------------------------------------------------*/
mbed_official 610:813dcc80987e 138 /** @defgroup FMC_LL_Private_Macros FMC Low Layer Private Macros
mbed_official 610:813dcc80987e 139 * @{
mbed_official 610:813dcc80987e 140 */
mbed_official 610:813dcc80987e 141
mbed_official 610:813dcc80987e 142 /**
mbed_official 610:813dcc80987e 143 * @}
mbed_official 610:813dcc80987e 144 */
mbed_official 610:813dcc80987e 145
mbed_official 610:813dcc80987e 146 /* Private variables ---------------------------------------------------------*/
mbed_official 610:813dcc80987e 147 /* Private function prototypes -----------------------------------------------*/
mbed_official 610:813dcc80987e 148 /* Exported functions --------------------------------------------------------*/
mbed_official 610:813dcc80987e 149
mbed_official 610:813dcc80987e 150 /** @defgroup FMC_LL_Exported_Functions FMC Low Layer Exported Functions
mbed_official 610:813dcc80987e 151 * @{
mbed_official 610:813dcc80987e 152 */
mbed_official 610:813dcc80987e 153
mbed_official 610:813dcc80987e 154 /** @defgroup FMC_LL_Exported_Functions_NORSRAM FMC Low Layer NOR SRAM Exported Functions
mbed_official 610:813dcc80987e 155 * @brief NORSRAM Controller functions
mbed_official 610:813dcc80987e 156 *
mbed_official 610:813dcc80987e 157 @verbatim
mbed_official 610:813dcc80987e 158 ==============================================================================
mbed_official 610:813dcc80987e 159 ##### How to use NORSRAM device driver #####
mbed_official 610:813dcc80987e 160 ==============================================================================
mbed_official 610:813dcc80987e 161
mbed_official 610:813dcc80987e 162 [..]
mbed_official 610:813dcc80987e 163 This driver contains a set of APIs to interface with the FMC NORSRAM banks in order
mbed_official 610:813dcc80987e 164 to run the NORSRAM external devices.
mbed_official 610:813dcc80987e 165
mbed_official 610:813dcc80987e 166 (+) FMC NORSRAM bank reset using the function FMC_NORSRAM_DeInit()
mbed_official 610:813dcc80987e 167 (+) FMC NORSRAM bank control configuration using the function FMC_NORSRAM_Init()
mbed_official 610:813dcc80987e 168 (+) FMC NORSRAM bank timing configuration using the function FMC_NORSRAM_Timing_Init()
mbed_official 610:813dcc80987e 169 (+) FMC NORSRAM bank extended timing configuration using the function
mbed_official 610:813dcc80987e 170 FMC_NORSRAM_Extended_Timing_Init()
mbed_official 610:813dcc80987e 171 (+) FMC NORSRAM bank enable/disable write operation using the functions
mbed_official 610:813dcc80987e 172 FMC_NORSRAM_WriteOperation_Enable()/FMC_NORSRAM_WriteOperation_Disable()
mbed_official 610:813dcc80987e 173
mbed_official 610:813dcc80987e 174
mbed_official 610:813dcc80987e 175 @endverbatim
mbed_official 610:813dcc80987e 176 * @{
mbed_official 610:813dcc80987e 177 */
mbed_official 610:813dcc80987e 178
mbed_official 610:813dcc80987e 179 /** @defgroup FMC_LL_NORSRAM_Exported_Functions_Group1 Initialization and de-initialization functions
mbed_official 610:813dcc80987e 180 * @brief Initialization and Configuration functions
mbed_official 610:813dcc80987e 181 *
mbed_official 610:813dcc80987e 182 @verbatim
mbed_official 610:813dcc80987e 183 ==============================================================================
mbed_official 610:813dcc80987e 184 ##### Initialization and de-initialization functions #####
mbed_official 610:813dcc80987e 185 ==============================================================================
mbed_official 610:813dcc80987e 186 [..]
mbed_official 610:813dcc80987e 187 This section provides functions allowing to:
mbed_official 610:813dcc80987e 188 (+) Initialize and configure the FMC NORSRAM interface
mbed_official 610:813dcc80987e 189 (+) De-initialize the FMC NORSRAM interface
mbed_official 610:813dcc80987e 190 (+) Configure the FMC clock and associated GPIOs
mbed_official 610:813dcc80987e 191
mbed_official 610:813dcc80987e 192 @endverbatim
mbed_official 610:813dcc80987e 193 * @{
mbed_official 610:813dcc80987e 194 */
mbed_official 610:813dcc80987e 195
mbed_official 610:813dcc80987e 196 /**
mbed_official 610:813dcc80987e 197 * @brief Initialize the FMC_NORSRAM device according to the specified
mbed_official 610:813dcc80987e 198 * control parameters in the FMC_NORSRAM_InitTypeDef
mbed_official 610:813dcc80987e 199 * @param Device: Pointer to NORSRAM device instance
mbed_official 610:813dcc80987e 200 * @param Init: Pointer to NORSRAM Initialization structure
mbed_official 610:813dcc80987e 201 * @retval HAL status
mbed_official 610:813dcc80987e 202 */
mbed_official 610:813dcc80987e 203 HAL_StatusTypeDef FMC_NORSRAM_Init(FMC_NORSRAM_TypeDef *Device, FMC_NORSRAM_InitTypeDef* Init)
mbed_official 610:813dcc80987e 204 {
mbed_official 610:813dcc80987e 205 /* Check the parameters */
mbed_official 610:813dcc80987e 206 assert_param(IS_FMC_NORSRAM_DEVICE(Device));
mbed_official 610:813dcc80987e 207 assert_param(IS_FMC_NORSRAM_BANK(Init->NSBank));
mbed_official 610:813dcc80987e 208 assert_param(IS_FMC_MUX(Init->DataAddressMux));
mbed_official 610:813dcc80987e 209 assert_param(IS_FMC_MEMORY(Init->MemoryType));
mbed_official 610:813dcc80987e 210 assert_param(IS_FMC_NORSRAM_MEMORY_WIDTH(Init->MemoryDataWidth));
mbed_official 610:813dcc80987e 211 assert_param(IS_FMC_BURSTMODE(Init->BurstAccessMode));
mbed_official 610:813dcc80987e 212 assert_param(IS_FMC_WAIT_POLARITY(Init->WaitSignalPolarity));
mbed_official 610:813dcc80987e 213 assert_param(IS_FMC_WAIT_SIGNAL_ACTIVE(Init->WaitSignalActive));
mbed_official 610:813dcc80987e 214 assert_param(IS_FMC_WRITE_OPERATION(Init->WriteOperation));
mbed_official 610:813dcc80987e 215 assert_param(IS_FMC_WAITE_SIGNAL(Init->WaitSignal));
mbed_official 610:813dcc80987e 216 assert_param(IS_FMC_EXTENDED_MODE(Init->ExtendedMode));
mbed_official 610:813dcc80987e 217 assert_param(IS_FMC_ASYNWAIT(Init->AsynchronousWait));
mbed_official 610:813dcc80987e 218 assert_param(IS_FMC_WRITE_BURST(Init->WriteBurst));
mbed_official 610:813dcc80987e 219 assert_param(IS_FMC_CONTINOUS_CLOCK(Init->ContinuousClock));
mbed_official 610:813dcc80987e 220 assert_param(IS_FMC_WRITE_FIFO(Init->WriteFifo));
mbed_official 610:813dcc80987e 221 assert_param(IS_FMC_PAGESIZE(Init->PageSize));
mbed_official 610:813dcc80987e 222
mbed_official 610:813dcc80987e 223 /* Set NORSRAM device control parameters */
mbed_official 610:813dcc80987e 224 if(Init->MemoryType == FMC_MEMORY_TYPE_NOR)
mbed_official 610:813dcc80987e 225 {
mbed_official 610:813dcc80987e 226 MODIFY_REG(Device->BTCR[Init->NSBank], BCRx_CLEAR_MASK, (uint32_t)(FMC_NORSRAM_FLASH_ACCESS_ENABLE |\
mbed_official 610:813dcc80987e 227 Init->DataAddressMux |\
mbed_official 610:813dcc80987e 228 Init->MemoryType |\
mbed_official 610:813dcc80987e 229 Init->MemoryDataWidth |\
mbed_official 610:813dcc80987e 230 Init->BurstAccessMode |\
mbed_official 610:813dcc80987e 231 Init->WaitSignalPolarity |\
mbed_official 610:813dcc80987e 232 Init->WaitSignalActive |\
mbed_official 610:813dcc80987e 233 Init->WriteOperation |\
mbed_official 610:813dcc80987e 234 Init->WaitSignal |\
mbed_official 610:813dcc80987e 235 Init->ExtendedMode |\
mbed_official 610:813dcc80987e 236 Init->AsynchronousWait |\
mbed_official 610:813dcc80987e 237 Init->WriteBurst |\
mbed_official 610:813dcc80987e 238 Init->ContinuousClock |\
mbed_official 610:813dcc80987e 239 Init->WriteFifo |\
mbed_official 610:813dcc80987e 240 Init->PageSize)
mbed_official 610:813dcc80987e 241 );
mbed_official 610:813dcc80987e 242 }
mbed_official 610:813dcc80987e 243 else
mbed_official 610:813dcc80987e 244 {
mbed_official 610:813dcc80987e 245 MODIFY_REG(Device->BTCR[Init->NSBank], BCRx_CLEAR_MASK, (uint32_t)(FMC_NORSRAM_FLASH_ACCESS_DISABLE |\
mbed_official 610:813dcc80987e 246 Init->DataAddressMux |\
mbed_official 610:813dcc80987e 247 Init->MemoryType |\
mbed_official 610:813dcc80987e 248 Init->MemoryDataWidth |\
mbed_official 610:813dcc80987e 249 Init->BurstAccessMode |\
mbed_official 610:813dcc80987e 250 Init->WaitSignalPolarity |\
mbed_official 610:813dcc80987e 251 Init->WaitSignalActive |\
mbed_official 610:813dcc80987e 252 Init->WriteOperation |\
mbed_official 610:813dcc80987e 253 Init->WaitSignal |\
mbed_official 610:813dcc80987e 254 Init->ExtendedMode |\
mbed_official 610:813dcc80987e 255 Init->AsynchronousWait |\
mbed_official 610:813dcc80987e 256 Init->WriteBurst |\
mbed_official 610:813dcc80987e 257 Init->ContinuousClock |\
mbed_official 610:813dcc80987e 258 Init->WriteFifo |\
mbed_official 610:813dcc80987e 259 Init->PageSize)
mbed_official 610:813dcc80987e 260 );
mbed_official 610:813dcc80987e 261 }
mbed_official 610:813dcc80987e 262
mbed_official 610:813dcc80987e 263 /* Specific bits on bank1 register for bank2..4 */
mbed_official 610:813dcc80987e 264 if(Init->NSBank != FMC_NORSRAM_BANK1)
mbed_official 610:813dcc80987e 265 {
mbed_official 610:813dcc80987e 266 /* Configure Write FIFO mode when Write Fifo is enabled for bank2..4 */
mbed_official 610:813dcc80987e 267 SET_BIT(Device->BTCR[FMC_NORSRAM_BANK1], (uint32_t)(Init->WriteFifo));
mbed_official 610:813dcc80987e 268
mbed_official 610:813dcc80987e 269 /* Configure synchronous mode when Continuous clock is enabled for bank2..4 */
mbed_official 610:813dcc80987e 270 if(Init->ContinuousClock == FMC_CONTINUOUS_CLOCK_SYNC_ASYNC)
mbed_official 610:813dcc80987e 271 {
mbed_official 610:813dcc80987e 272 Init->BurstAccessMode = FMC_BURST_ACCESS_MODE_ENABLE;
mbed_official 610:813dcc80987e 273 MODIFY_REG(Device->BTCR[FMC_NORSRAM_BANK1], FMC_BCRx_BURSTEN | FMC_BCR1_CCLKEN, (uint32_t)(Init->BurstAccessMode |\
mbed_official 610:813dcc80987e 274 Init->ContinuousClock));
mbed_official 610:813dcc80987e 275 }
mbed_official 610:813dcc80987e 276 }
mbed_official 610:813dcc80987e 277
mbed_official 610:813dcc80987e 278 return HAL_OK;
mbed_official 610:813dcc80987e 279 }
mbed_official 610:813dcc80987e 280
mbed_official 610:813dcc80987e 281
mbed_official 610:813dcc80987e 282 /**
mbed_official 610:813dcc80987e 283 * @brief DeInitialize the FMC_NORSRAM peripheral
mbed_official 610:813dcc80987e 284 * @param Device: Pointer to NORSRAM device instance
mbed_official 610:813dcc80987e 285 * @param ExDevice: Pointer to NORSRAM extended mode device instance
mbed_official 610:813dcc80987e 286 * @param Bank: NORSRAM bank number
mbed_official 610:813dcc80987e 287 * @retval HAL status
mbed_official 610:813dcc80987e 288 */
mbed_official 610:813dcc80987e 289 HAL_StatusTypeDef FMC_NORSRAM_DeInit(FMC_NORSRAM_TypeDef *Device, FMC_NORSRAM_EXTENDED_TypeDef *ExDevice, uint32_t Bank)
mbed_official 610:813dcc80987e 290 {
mbed_official 610:813dcc80987e 291 /* Check the parameters */
mbed_official 610:813dcc80987e 292 assert_param(IS_FMC_NORSRAM_DEVICE(Device));
mbed_official 610:813dcc80987e 293 assert_param(IS_FMC_NORSRAM_EXTENDED_DEVICE(ExDevice));
mbed_official 610:813dcc80987e 294 assert_param(IS_FMC_NORSRAM_BANK(Bank));
mbed_official 610:813dcc80987e 295
mbed_official 610:813dcc80987e 296 /* Disable the FMC_NORSRAM device */
mbed_official 610:813dcc80987e 297 __FMC_NORSRAM_DISABLE(Device, Bank);
mbed_official 610:813dcc80987e 298
mbed_official 610:813dcc80987e 299 /* De-initialize the FMC_NORSRAM device */
mbed_official 610:813dcc80987e 300 /* FMC_NORSRAM_BANK1 */
mbed_official 610:813dcc80987e 301 if(Bank == FMC_NORSRAM_BANK1)
mbed_official 610:813dcc80987e 302 {
mbed_official 610:813dcc80987e 303 Device->BTCR[Bank] = 0x000030DB;
mbed_official 610:813dcc80987e 304 }
mbed_official 610:813dcc80987e 305 /* FMC_NORSRAM_BANK2, FMC_NORSRAM_BANK3 or FMC_NORSRAM_BANK4 */
mbed_official 610:813dcc80987e 306 else
mbed_official 610:813dcc80987e 307 {
mbed_official 610:813dcc80987e 308 Device->BTCR[Bank] = 0x000030D2;
mbed_official 610:813dcc80987e 309 }
mbed_official 610:813dcc80987e 310
mbed_official 610:813dcc80987e 311 Device->BTCR[Bank + 1] = 0x0FFFFFFF;
mbed_official 610:813dcc80987e 312 ExDevice->BWTR[Bank] = 0x0FFFFFFF;
mbed_official 610:813dcc80987e 313
mbed_official 610:813dcc80987e 314 return HAL_OK;
mbed_official 610:813dcc80987e 315 }
mbed_official 610:813dcc80987e 316
mbed_official 610:813dcc80987e 317
mbed_official 610:813dcc80987e 318 /**
mbed_official 610:813dcc80987e 319 * @brief Initialize the FMC_NORSRAM Timing according to the specified
mbed_official 610:813dcc80987e 320 * parameters in the FMC_NORSRAM_TimingTypeDef
mbed_official 610:813dcc80987e 321 * @param Device: Pointer to NORSRAM device instance
mbed_official 610:813dcc80987e 322 * @param Timing: Pointer to NORSRAM Timing structure
mbed_official 610:813dcc80987e 323 * @param Bank: NORSRAM bank number
mbed_official 610:813dcc80987e 324 * @retval HAL status
mbed_official 610:813dcc80987e 325 */
mbed_official 610:813dcc80987e 326 HAL_StatusTypeDef FMC_NORSRAM_Timing_Init(FMC_NORSRAM_TypeDef *Device, FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank)
mbed_official 610:813dcc80987e 327 {
mbed_official 610:813dcc80987e 328 uint32_t tmpr = 0;
mbed_official 610:813dcc80987e 329
mbed_official 610:813dcc80987e 330 /* Check the parameters */
mbed_official 610:813dcc80987e 331 assert_param(IS_FMC_NORSRAM_DEVICE(Device));
mbed_official 610:813dcc80987e 332 assert_param(IS_FMC_ADDRESS_SETUP_TIME(Timing->AddressSetupTime));
mbed_official 610:813dcc80987e 333 assert_param(IS_FMC_ADDRESS_HOLD_TIME(Timing->AddressHoldTime));
mbed_official 610:813dcc80987e 334 assert_param(IS_FMC_DATASETUP_TIME(Timing->DataSetupTime));
mbed_official 610:813dcc80987e 335 assert_param(IS_FMC_TURNAROUND_TIME(Timing->BusTurnAroundDuration));
mbed_official 610:813dcc80987e 336 assert_param(IS_FMC_CLK_DIV(Timing->CLKDivision));
mbed_official 610:813dcc80987e 337 assert_param(IS_FMC_DATA_LATENCY(Timing->DataLatency));
mbed_official 610:813dcc80987e 338 assert_param(IS_FMC_ACCESS_MODE(Timing->AccessMode));
mbed_official 610:813dcc80987e 339 assert_param(IS_FMC_NORSRAM_BANK(Bank));
mbed_official 610:813dcc80987e 340
mbed_official 610:813dcc80987e 341 /* Set FMC_NORSRAM device timing parameters */
mbed_official 610:813dcc80987e 342 MODIFY_REG(Device->BTCR[Bank + 1], \
mbed_official 610:813dcc80987e 343 BTRx_CLEAR_MASK, \
mbed_official 610:813dcc80987e 344 (uint32_t)(Timing->AddressSetupTime |\
mbed_official 610:813dcc80987e 345 ((Timing->AddressHoldTime) << POSITION_VAL(FMC_BTRx_ADDHLD)) |\
mbed_official 610:813dcc80987e 346 ((Timing->DataSetupTime) << POSITION_VAL(FMC_BTRx_DATAST)) |\
mbed_official 610:813dcc80987e 347 ((Timing->BusTurnAroundDuration) << POSITION_VAL(FMC_BTRx_BUSTURN)) |\
mbed_official 610:813dcc80987e 348 (((Timing->CLKDivision)-1) << POSITION_VAL(FMC_BTRx_CLKDIV)) |\
mbed_official 610:813dcc80987e 349 (((Timing->DataLatency)-2) << POSITION_VAL(FMC_BTRx_DATLAT)) |\
mbed_official 610:813dcc80987e 350 (Timing->AccessMode)));
mbed_official 610:813dcc80987e 351
mbed_official 610:813dcc80987e 352 /* Configure Clock division value (in NORSRAM bank 1) when continuous clock is enabled */
mbed_official 610:813dcc80987e 353 if(HAL_IS_BIT_SET(Device->BTCR[FMC_NORSRAM_BANK1], FMC_BCR1_CCLKEN))
mbed_official 610:813dcc80987e 354 {
mbed_official 610:813dcc80987e 355 tmpr = (uint32_t)(Device->BTCR[FMC_NORSRAM_BANK1 + 1] & ~(((uint32_t)0x0F) << POSITION_VAL(FMC_BTRx_CLKDIV)));
mbed_official 610:813dcc80987e 356 tmpr |= (uint32_t)(((Timing->CLKDivision)-1) << POSITION_VAL(FMC_BTRx_CLKDIV));
mbed_official 610:813dcc80987e 357 MODIFY_REG(Device->BTCR[FMC_NORSRAM_BANK1 + 1], FMC_BTRx_CLKDIV, tmpr);
mbed_official 610:813dcc80987e 358 }
mbed_official 610:813dcc80987e 359
mbed_official 610:813dcc80987e 360 return HAL_OK;
mbed_official 610:813dcc80987e 361 }
mbed_official 610:813dcc80987e 362
mbed_official 610:813dcc80987e 363 /**
mbed_official 610:813dcc80987e 364 * @brief Initialize the FMC_NORSRAM Extended mode Timing according to the specified
mbed_official 610:813dcc80987e 365 * parameters in the FMC_NORSRAM_TimingTypeDef
mbed_official 610:813dcc80987e 366 * @param Device: Pointer to NORSRAM device instance
mbed_official 610:813dcc80987e 367 * @param Timing: Pointer to NORSRAM Timing structure
mbed_official 610:813dcc80987e 368 * @param Bank: NORSRAM bank number
mbed_official 610:813dcc80987e 369 * @param ExtendedMode: FMC Extended Mode
mbed_official 610:813dcc80987e 370 * This parameter can be one of the following values:
mbed_official 610:813dcc80987e 371 * @arg FMC_EXTENDED_MODE_DISABLE
mbed_official 610:813dcc80987e 372 * @arg FMC_EXTENDED_MODE_ENABLE
mbed_official 610:813dcc80987e 373 * @retval HAL status
mbed_official 610:813dcc80987e 374 */
mbed_official 610:813dcc80987e 375 HAL_StatusTypeDef FMC_NORSRAM_Extended_Timing_Init(FMC_NORSRAM_EXTENDED_TypeDef *Device, FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, uint32_t ExtendedMode)
mbed_official 610:813dcc80987e 376 {
mbed_official 610:813dcc80987e 377 /* Check the parameters */
mbed_official 610:813dcc80987e 378 assert_param(IS_FMC_EXTENDED_MODE(ExtendedMode));
mbed_official 610:813dcc80987e 379
mbed_official 610:813dcc80987e 380 /* Set NORSRAM device timing register for write configuration, if extended mode is used */
mbed_official 610:813dcc80987e 381 if(ExtendedMode == FMC_EXTENDED_MODE_ENABLE)
mbed_official 610:813dcc80987e 382 {
mbed_official 610:813dcc80987e 383 /* Check the parameters */
mbed_official 610:813dcc80987e 384 assert_param(IS_FMC_NORSRAM_EXTENDED_DEVICE(Device));
mbed_official 610:813dcc80987e 385 assert_param(IS_FMC_ADDRESS_SETUP_TIME(Timing->AddressSetupTime));
mbed_official 610:813dcc80987e 386 assert_param(IS_FMC_ADDRESS_HOLD_TIME(Timing->AddressHoldTime));
mbed_official 610:813dcc80987e 387 assert_param(IS_FMC_DATASETUP_TIME(Timing->DataSetupTime));
mbed_official 610:813dcc80987e 388 assert_param(IS_FMC_ACCESS_MODE(Timing->AccessMode));
mbed_official 610:813dcc80987e 389 assert_param(IS_FMC_NORSRAM_BANK(Bank));
mbed_official 610:813dcc80987e 390
mbed_official 610:813dcc80987e 391 /* Set NORSRAM device timing register for write configuration, if extended mode is used */
mbed_official 610:813dcc80987e 392 MODIFY_REG(Device->BWTR[Bank], \
mbed_official 610:813dcc80987e 393 BWTRx_CLEAR_MASK, \
mbed_official 610:813dcc80987e 394 (uint32_t)(Timing->AddressSetupTime |\
mbed_official 610:813dcc80987e 395 ((Timing->AddressHoldTime) << POSITION_VAL(FMC_BTRx_ADDHLD)) |\
mbed_official 610:813dcc80987e 396 ((Timing->DataSetupTime) << POSITION_VAL(FMC_BTRx_DATAST)) |\
mbed_official 610:813dcc80987e 397 (Timing->AccessMode)));
mbed_official 610:813dcc80987e 398 }
mbed_official 610:813dcc80987e 399 else
mbed_official 610:813dcc80987e 400 {
mbed_official 610:813dcc80987e 401 Device->BWTR[Bank] = 0x0FFFFFFF;
mbed_official 610:813dcc80987e 402 }
mbed_official 610:813dcc80987e 403
mbed_official 610:813dcc80987e 404 return HAL_OK;
mbed_official 610:813dcc80987e 405 }
mbed_official 610:813dcc80987e 406
mbed_official 610:813dcc80987e 407
mbed_official 610:813dcc80987e 408 /**
mbed_official 610:813dcc80987e 409 * @}
mbed_official 610:813dcc80987e 410 */
mbed_official 610:813dcc80987e 411
mbed_official 610:813dcc80987e 412
mbed_official 610:813dcc80987e 413 /** @defgroup FMC_NORSRAM_Exported_Functions_Group2 Peripheral Control functions
mbed_official 610:813dcc80987e 414 * @brief management functions
mbed_official 610:813dcc80987e 415 *
mbed_official 610:813dcc80987e 416 @verbatim
mbed_official 610:813dcc80987e 417 ==============================================================================
mbed_official 610:813dcc80987e 418 ##### FMC_NORSRAM Control functions #####
mbed_official 610:813dcc80987e 419 ==============================================================================
mbed_official 610:813dcc80987e 420 [..]
mbed_official 610:813dcc80987e 421 This subsection provides a set of functions allowing to control dynamically
mbed_official 610:813dcc80987e 422 the FMC NORSRAM interface.
mbed_official 610:813dcc80987e 423
mbed_official 610:813dcc80987e 424 @endverbatim
mbed_official 610:813dcc80987e 425 * @{
mbed_official 610:813dcc80987e 426 */
mbed_official 610:813dcc80987e 427
mbed_official 610:813dcc80987e 428 /**
mbed_official 610:813dcc80987e 429 * @brief Enables dynamically FMC_NORSRAM write operation.
mbed_official 610:813dcc80987e 430 * @param Device: Pointer to NORSRAM device instance
mbed_official 610:813dcc80987e 431 * @param Bank: NORSRAM bank number
mbed_official 610:813dcc80987e 432 * @retval HAL status
mbed_official 610:813dcc80987e 433 */
mbed_official 610:813dcc80987e 434 HAL_StatusTypeDef FMC_NORSRAM_WriteOperation_Enable(FMC_NORSRAM_TypeDef *Device, uint32_t Bank)
mbed_official 610:813dcc80987e 435 {
mbed_official 610:813dcc80987e 436 /* Check the parameters */
mbed_official 610:813dcc80987e 437 assert_param(IS_FMC_NORSRAM_DEVICE(Device));
mbed_official 610:813dcc80987e 438 assert_param(IS_FMC_NORSRAM_BANK(Bank));
mbed_official 610:813dcc80987e 439
mbed_official 610:813dcc80987e 440 /* Enable write operation */
mbed_official 610:813dcc80987e 441 SET_BIT(Device->BTCR[Bank], FMC_WRITE_OPERATION_ENABLE);
mbed_official 610:813dcc80987e 442
mbed_official 610:813dcc80987e 443 return HAL_OK;
mbed_official 610:813dcc80987e 444 }
mbed_official 610:813dcc80987e 445
mbed_official 610:813dcc80987e 446 /**
mbed_official 610:813dcc80987e 447 * @brief Disables dynamically FMC_NORSRAM write operation.
mbed_official 610:813dcc80987e 448 * @param Device: Pointer to NORSRAM device instance
mbed_official 610:813dcc80987e 449 * @param Bank: NORSRAM bank number
mbed_official 610:813dcc80987e 450 * @retval HAL status
mbed_official 610:813dcc80987e 451 */
mbed_official 610:813dcc80987e 452 HAL_StatusTypeDef FMC_NORSRAM_WriteOperation_Disable(FMC_NORSRAM_TypeDef *Device, uint32_t Bank)
mbed_official 610:813dcc80987e 453 {
mbed_official 610:813dcc80987e 454 /* Check the parameters */
mbed_official 610:813dcc80987e 455 assert_param(IS_FMC_NORSRAM_DEVICE(Device));
mbed_official 610:813dcc80987e 456 assert_param(IS_FMC_NORSRAM_BANK(Bank));
mbed_official 610:813dcc80987e 457
mbed_official 610:813dcc80987e 458 /* Disable write operation */
mbed_official 610:813dcc80987e 459 CLEAR_BIT(Device->BTCR[Bank], FMC_WRITE_OPERATION_ENABLE);
mbed_official 610:813dcc80987e 460
mbed_official 610:813dcc80987e 461 return HAL_OK;
mbed_official 610:813dcc80987e 462 }
mbed_official 610:813dcc80987e 463
mbed_official 610:813dcc80987e 464 /**
mbed_official 610:813dcc80987e 465 * @}
mbed_official 610:813dcc80987e 466 */
mbed_official 610:813dcc80987e 467
mbed_official 610:813dcc80987e 468 /**
mbed_official 610:813dcc80987e 469 * @}
mbed_official 610:813dcc80987e 470 */
mbed_official 610:813dcc80987e 471
mbed_official 610:813dcc80987e 472 /** @defgroup FMC_LL_Exported_Functions_NAND FMC Low Layer NAND Exported Functions
mbed_official 610:813dcc80987e 473 * @brief NAND Controller functions
mbed_official 610:813dcc80987e 474 *
mbed_official 610:813dcc80987e 475 @verbatim
mbed_official 610:813dcc80987e 476 ==============================================================================
mbed_official 610:813dcc80987e 477 ##### How to use NAND device driver #####
mbed_official 610:813dcc80987e 478 ==============================================================================
mbed_official 610:813dcc80987e 479 [..]
mbed_official 610:813dcc80987e 480 This driver contains a set of APIs to interface with the FMC NAND banks in order
mbed_official 610:813dcc80987e 481 to run the NAND external devices.
mbed_official 610:813dcc80987e 482
mbed_official 610:813dcc80987e 483 (+) FMC NAND bank reset using the function FMC_NAND_DeInit()
mbed_official 610:813dcc80987e 484 (+) FMC NAND bank control configuration using the function FMC_NAND_Init()
mbed_official 610:813dcc80987e 485 (+) FMC NAND bank common space timing configuration using the function
mbed_official 610:813dcc80987e 486 FMC_NAND_CommonSpace_Timing_Init()
mbed_official 610:813dcc80987e 487 (+) FMC NAND bank attribute space timing configuration using the function
mbed_official 610:813dcc80987e 488 FMC_NAND_AttributeSpace_Timing_Init()
mbed_official 610:813dcc80987e 489 (+) FMC NAND bank enable/disable ECC correction feature using the functions
mbed_official 610:813dcc80987e 490 FMC_NAND_ECC_Enable()/FMC_NAND_ECC_Disable()
mbed_official 610:813dcc80987e 491 (+) FMC NAND bank get ECC correction code using the function FMC_NAND_GetECC()
mbed_official 610:813dcc80987e 492
mbed_official 610:813dcc80987e 493 @endverbatim
mbed_official 610:813dcc80987e 494 * @{
mbed_official 610:813dcc80987e 495 */
mbed_official 610:813dcc80987e 496
mbed_official 610:813dcc80987e 497 /** @defgroup FMC_LL_NAND_Exported_Functions_Group1 Initialization and de-initialization functions
mbed_official 610:813dcc80987e 498 * @brief Initialization and Configuration functions
mbed_official 610:813dcc80987e 499 *
mbed_official 610:813dcc80987e 500 @verbatim
mbed_official 610:813dcc80987e 501 ==============================================================================
mbed_official 610:813dcc80987e 502 ##### Initialization and de-initialization functions #####
mbed_official 610:813dcc80987e 503 ==============================================================================
mbed_official 610:813dcc80987e 504 [..]
mbed_official 610:813dcc80987e 505 This section provides functions allowing to:
mbed_official 610:813dcc80987e 506 (+) Initialize and configure the FMC NAND interface
mbed_official 610:813dcc80987e 507 (+) De-initialize the FMC NAND interface
mbed_official 610:813dcc80987e 508 (+) Configure the FMC clock and associated GPIOs
mbed_official 610:813dcc80987e 509
mbed_official 610:813dcc80987e 510 @endverbatim
mbed_official 610:813dcc80987e 511 * @{
mbed_official 610:813dcc80987e 512 */
mbed_official 610:813dcc80987e 513
mbed_official 610:813dcc80987e 514 /**
mbed_official 610:813dcc80987e 515 * @brief Initializes the FMC_NAND device according to the specified
mbed_official 610:813dcc80987e 516 * control parameters in the FMC_NAND_HandleTypeDef
mbed_official 610:813dcc80987e 517 * @param Device: Pointer to NAND device instance
mbed_official 610:813dcc80987e 518 * @param Init: Pointer to NAND Initialization structure
mbed_official 610:813dcc80987e 519 * @retval HAL status
mbed_official 610:813dcc80987e 520 */
mbed_official 610:813dcc80987e 521 HAL_StatusTypeDef FMC_NAND_Init(FMC_NAND_TypeDef *Device, FMC_NAND_InitTypeDef *Init)
mbed_official 610:813dcc80987e 522 {
mbed_official 610:813dcc80987e 523 /* Check the parameters */
mbed_official 610:813dcc80987e 524 assert_param(IS_FMC_NAND_DEVICE(Device));
mbed_official 610:813dcc80987e 525 assert_param(IS_FMC_NAND_BANK(Init->NandBank));
mbed_official 610:813dcc80987e 526 assert_param(IS_FMC_WAIT_FEATURE(Init->Waitfeature));
mbed_official 610:813dcc80987e 527 assert_param(IS_FMC_NAND_MEMORY_WIDTH(Init->MemoryDataWidth));
mbed_official 610:813dcc80987e 528 assert_param(IS_FMC_ECC_STATE(Init->EccComputation));
mbed_official 610:813dcc80987e 529 assert_param(IS_FMC_ECCPAGE_SIZE(Init->ECCPageSize));
mbed_official 610:813dcc80987e 530 assert_param(IS_FMC_TCLR_TIME(Init->TCLRSetupTime));
mbed_official 610:813dcc80987e 531 assert_param(IS_FMC_TAR_TIME(Init->TARSetupTime));
mbed_official 610:813dcc80987e 532
mbed_official 610:813dcc80987e 533 /* Set NAND device control parameters */
mbed_official 610:813dcc80987e 534 /* NAND bank 3 registers configuration */
mbed_official 610:813dcc80987e 535 MODIFY_REG(Device->PCR, PCR_CLEAR_MASK, (Init->Waitfeature |\
mbed_official 610:813dcc80987e 536 FMC_PCR_MEMORY_TYPE_NAND |\
mbed_official 610:813dcc80987e 537 Init->MemoryDataWidth |\
mbed_official 610:813dcc80987e 538 Init->EccComputation |\
mbed_official 610:813dcc80987e 539 Init->ECCPageSize |\
mbed_official 610:813dcc80987e 540 ((Init->TCLRSetupTime) << POSITION_VAL(FMC_PCR_TCLR)) |\
mbed_official 610:813dcc80987e 541 ((Init->TARSetupTime) << POSITION_VAL(FMC_PCR_TAR))));
mbed_official 610:813dcc80987e 542
mbed_official 610:813dcc80987e 543 return HAL_OK;
mbed_official 610:813dcc80987e 544
mbed_official 610:813dcc80987e 545 }
mbed_official 610:813dcc80987e 546
mbed_official 610:813dcc80987e 547 /**
mbed_official 610:813dcc80987e 548 * @brief Initializes the FMC_NAND Common space Timing according to the specified
mbed_official 610:813dcc80987e 549 * parameters in the FMC_NAND_PCC_TimingTypeDef
mbed_official 610:813dcc80987e 550 * @param Device: Pointer to NAND device instance
mbed_official 610:813dcc80987e 551 * @param Timing: Pointer to NAND timing structure
mbed_official 610:813dcc80987e 552 * @param Bank: NAND bank number
mbed_official 610:813dcc80987e 553 * @retval HAL status
mbed_official 610:813dcc80987e 554 */
mbed_official 610:813dcc80987e 555 HAL_StatusTypeDef FMC_NAND_CommonSpace_Timing_Init(FMC_NAND_TypeDef *Device, FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank)
mbed_official 610:813dcc80987e 556 {
mbed_official 610:813dcc80987e 557 /* Check the parameters */
mbed_official 610:813dcc80987e 558 assert_param(IS_FMC_NAND_DEVICE(Device));
mbed_official 610:813dcc80987e 559 assert_param(IS_FMC_SETUP_TIME(Timing->SetupTime));
mbed_official 610:813dcc80987e 560 assert_param(IS_FMC_WAIT_TIME(Timing->WaitSetupTime));
mbed_official 610:813dcc80987e 561 assert_param(IS_FMC_HOLD_TIME(Timing->HoldSetupTime));
mbed_official 610:813dcc80987e 562 assert_param(IS_FMC_HIZ_TIME(Timing->HiZSetupTime));
mbed_official 610:813dcc80987e 563 assert_param(IS_FMC_NAND_BANK(Bank));
mbed_official 610:813dcc80987e 564
mbed_official 610:813dcc80987e 565 /* Set FMC_NAND device timing parameters */
mbed_official 610:813dcc80987e 566 /* NAND bank 3 registers configuration */
mbed_official 610:813dcc80987e 567 MODIFY_REG(Device->PMEM, PMEM_CLEAR_MASK, (Timing->SetupTime |\
mbed_official 610:813dcc80987e 568 ((Timing->WaitSetupTime) << POSITION_VAL(FMC_PMEM_MEMWAIT)) |\
mbed_official 610:813dcc80987e 569 ((Timing->HoldSetupTime) << POSITION_VAL(FMC_PMEM_MEMHOLD)) |\
mbed_official 610:813dcc80987e 570 ((Timing->HiZSetupTime) << POSITION_VAL(FMC_PMEM_MEMHIZ))));
mbed_official 610:813dcc80987e 571
mbed_official 610:813dcc80987e 572 return HAL_OK;
mbed_official 610:813dcc80987e 573 }
mbed_official 610:813dcc80987e 574
mbed_official 610:813dcc80987e 575 /**
mbed_official 610:813dcc80987e 576 * @brief Initializes the FMC_NAND Attribute space Timing according to the specified
mbed_official 610:813dcc80987e 577 * parameters in the FMC_NAND_PCC_TimingTypeDef
mbed_official 610:813dcc80987e 578 * @param Device: Pointer to NAND device instance
mbed_official 610:813dcc80987e 579 * @param Timing: Pointer to NAND timing structure
mbed_official 610:813dcc80987e 580 * @param Bank: NAND bank number
mbed_official 610:813dcc80987e 581 * @retval HAL status
mbed_official 610:813dcc80987e 582 */
mbed_official 610:813dcc80987e 583 HAL_StatusTypeDef FMC_NAND_AttributeSpace_Timing_Init(FMC_NAND_TypeDef *Device, FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank)
mbed_official 610:813dcc80987e 584 {
mbed_official 610:813dcc80987e 585 /* Check the parameters */
mbed_official 610:813dcc80987e 586 assert_param(IS_FMC_NAND_DEVICE(Device));
mbed_official 610:813dcc80987e 587 assert_param(IS_FMC_SETUP_TIME(Timing->SetupTime));
mbed_official 610:813dcc80987e 588 assert_param(IS_FMC_WAIT_TIME(Timing->WaitSetupTime));
mbed_official 610:813dcc80987e 589 assert_param(IS_FMC_HOLD_TIME(Timing->HoldSetupTime));
mbed_official 610:813dcc80987e 590 assert_param(IS_FMC_HIZ_TIME(Timing->HiZSetupTime));
mbed_official 610:813dcc80987e 591 assert_param(IS_FMC_NAND_BANK(Bank));
mbed_official 610:813dcc80987e 592
mbed_official 610:813dcc80987e 593 /* Set FMC_NAND device timing parameters */
mbed_official 610:813dcc80987e 594 /* NAND bank 3 registers configuration */
mbed_official 610:813dcc80987e 595 MODIFY_REG(Device->PATT, PATT_CLEAR_MASK, (Timing->SetupTime |\
mbed_official 610:813dcc80987e 596 ((Timing->WaitSetupTime) << POSITION_VAL(FMC_PMEM_MEMWAIT)) |\
mbed_official 610:813dcc80987e 597 ((Timing->HoldSetupTime) << POSITION_VAL(FMC_PMEM_MEMHOLD)) |\
mbed_official 610:813dcc80987e 598 ((Timing->HiZSetupTime) << POSITION_VAL(FMC_PMEM_MEMHIZ))));
mbed_official 610:813dcc80987e 599
mbed_official 610:813dcc80987e 600 return HAL_OK;
mbed_official 610:813dcc80987e 601 }
mbed_official 610:813dcc80987e 602
mbed_official 610:813dcc80987e 603
mbed_official 610:813dcc80987e 604 /**
mbed_official 610:813dcc80987e 605 * @brief DeInitialize the FMC_NAND device
mbed_official 610:813dcc80987e 606 * @param Device: Pointer to NAND device instance
mbed_official 610:813dcc80987e 607 * @param Bank: NAND bank number
mbed_official 610:813dcc80987e 608 * @retval HAL status
mbed_official 610:813dcc80987e 609 */
mbed_official 610:813dcc80987e 610 HAL_StatusTypeDef FMC_NAND_DeInit(FMC_NAND_TypeDef *Device, uint32_t Bank)
mbed_official 610:813dcc80987e 611 {
mbed_official 610:813dcc80987e 612 /* Check the parameters */
mbed_official 610:813dcc80987e 613 assert_param(IS_FMC_NAND_DEVICE(Device));
mbed_official 610:813dcc80987e 614 assert_param(IS_FMC_NAND_BANK(Bank));
mbed_official 610:813dcc80987e 615
mbed_official 610:813dcc80987e 616 /* Disable the NAND Bank */
mbed_official 610:813dcc80987e 617 __FMC_NAND_DISABLE(Device, Bank);
mbed_official 610:813dcc80987e 618
mbed_official 610:813dcc80987e 619 /* Set the FMC_NAND_BANK registers to their reset values */
mbed_official 610:813dcc80987e 620 WRITE_REG(Device->PCR, 0x00000018);
mbed_official 610:813dcc80987e 621 WRITE_REG(Device->SR, 0x00000040);
mbed_official 610:813dcc80987e 622 WRITE_REG(Device->PMEM, 0xFCFCFCFC);
mbed_official 610:813dcc80987e 623 WRITE_REG(Device->PATT, 0xFCFCFCFC);
mbed_official 610:813dcc80987e 624
mbed_official 610:813dcc80987e 625 return HAL_OK;
mbed_official 610:813dcc80987e 626 }
mbed_official 610:813dcc80987e 627
mbed_official 610:813dcc80987e 628 /**
mbed_official 610:813dcc80987e 629 * @}
mbed_official 610:813dcc80987e 630 */
mbed_official 610:813dcc80987e 631
mbed_official 610:813dcc80987e 632
mbed_official 610:813dcc80987e 633 /** @defgroup FMC_LL_NAND_Exported_Functions_Group2 FMC Low Layer Peripheral Control functions
mbed_official 610:813dcc80987e 634 * @brief management functions
mbed_official 610:813dcc80987e 635 *
mbed_official 610:813dcc80987e 636 @verbatim
mbed_official 610:813dcc80987e 637 ==============================================================================
mbed_official 610:813dcc80987e 638 ##### FMC_NAND Control functions #####
mbed_official 610:813dcc80987e 639 ==============================================================================
mbed_official 610:813dcc80987e 640 [..]
mbed_official 610:813dcc80987e 641 This subsection provides a set of functions allowing to control dynamically
mbed_official 610:813dcc80987e 642 the FMC NAND interface.
mbed_official 610:813dcc80987e 643
mbed_official 610:813dcc80987e 644 @endverbatim
mbed_official 610:813dcc80987e 645 * @{
mbed_official 610:813dcc80987e 646 */
mbed_official 610:813dcc80987e 647
mbed_official 610:813dcc80987e 648
mbed_official 610:813dcc80987e 649 /**
mbed_official 610:813dcc80987e 650 * @brief Enables dynamically FMC_NAND ECC feature.
mbed_official 610:813dcc80987e 651 * @param Device: Pointer to NAND device instance
mbed_official 610:813dcc80987e 652 * @param Bank: NAND bank number
mbed_official 610:813dcc80987e 653 * @retval HAL status
mbed_official 610:813dcc80987e 654 */
mbed_official 610:813dcc80987e 655 HAL_StatusTypeDef FMC_NAND_ECC_Enable(FMC_NAND_TypeDef *Device, uint32_t Bank)
mbed_official 610:813dcc80987e 656 {
mbed_official 610:813dcc80987e 657 /* Check the parameters */
mbed_official 610:813dcc80987e 658 assert_param(IS_FMC_NAND_DEVICE(Device));
mbed_official 610:813dcc80987e 659 assert_param(IS_FMC_NAND_BANK(Bank));
mbed_official 610:813dcc80987e 660
mbed_official 610:813dcc80987e 661 /* Enable ECC feature */
mbed_official 610:813dcc80987e 662 SET_BIT(Device->PCR, FMC_PCR_ECCEN);
mbed_official 610:813dcc80987e 663
mbed_official 610:813dcc80987e 664 return HAL_OK;
mbed_official 610:813dcc80987e 665 }
mbed_official 610:813dcc80987e 666
mbed_official 610:813dcc80987e 667
mbed_official 610:813dcc80987e 668 /**
mbed_official 610:813dcc80987e 669 * @brief Disables dynamically FMC_NAND ECC feature.
mbed_official 610:813dcc80987e 670 * @param Device: Pointer to NAND device instance
mbed_official 610:813dcc80987e 671 * @param Bank: NAND bank number
mbed_official 610:813dcc80987e 672 * @retval HAL status
mbed_official 610:813dcc80987e 673 */
mbed_official 610:813dcc80987e 674 HAL_StatusTypeDef FMC_NAND_ECC_Disable(FMC_NAND_TypeDef *Device, uint32_t Bank)
mbed_official 610:813dcc80987e 675 {
mbed_official 610:813dcc80987e 676 /* Check the parameters */
mbed_official 610:813dcc80987e 677 assert_param(IS_FMC_NAND_DEVICE(Device));
mbed_official 610:813dcc80987e 678 assert_param(IS_FMC_NAND_BANK(Bank));
mbed_official 610:813dcc80987e 679
mbed_official 610:813dcc80987e 680 /* Disable ECC feature */
mbed_official 610:813dcc80987e 681 CLEAR_BIT(Device->PCR, FMC_PCR_ECCEN);
mbed_official 610:813dcc80987e 682
mbed_official 610:813dcc80987e 683 return HAL_OK;
mbed_official 610:813dcc80987e 684 }
mbed_official 610:813dcc80987e 685
mbed_official 610:813dcc80987e 686 /**
mbed_official 610:813dcc80987e 687 * @brief Disables dynamically FMC_NAND ECC feature.
mbed_official 610:813dcc80987e 688 * @param Device: Pointer to NAND device instance
mbed_official 610:813dcc80987e 689 * @param ECCval: Pointer to ECC value
mbed_official 610:813dcc80987e 690 * @param Bank: NAND bank number
mbed_official 610:813dcc80987e 691 * @param Timeout: Timeout wait value
mbed_official 610:813dcc80987e 692 * @retval HAL status
mbed_official 610:813dcc80987e 693 */
mbed_official 610:813dcc80987e 694 HAL_StatusTypeDef FMC_NAND_GetECC(FMC_NAND_TypeDef *Device, uint32_t *ECCval, uint32_t Bank, uint32_t Timeout)
mbed_official 610:813dcc80987e 695 {
mbed_official 610:813dcc80987e 696 uint32_t tickstart = 0;
mbed_official 610:813dcc80987e 697
mbed_official 610:813dcc80987e 698 /* Check the parameters */
mbed_official 610:813dcc80987e 699 assert_param(IS_FMC_NAND_DEVICE(Device));
mbed_official 610:813dcc80987e 700 assert_param(IS_FMC_NAND_BANK(Bank));
mbed_official 610:813dcc80987e 701
mbed_official 610:813dcc80987e 702 /* Get tick */
mbed_official 610:813dcc80987e 703 tickstart = HAL_GetTick();
mbed_official 610:813dcc80987e 704
mbed_official 610:813dcc80987e 705 /* Wait until FIFO is empty */
mbed_official 610:813dcc80987e 706 while(__FMC_NAND_GET_FLAG(Device, Bank, FMC_FLAG_FEMPT) == RESET)
mbed_official 610:813dcc80987e 707 {
mbed_official 610:813dcc80987e 708 /* Check for the Timeout */
mbed_official 610:813dcc80987e 709 if(Timeout != HAL_MAX_DELAY)
mbed_official 610:813dcc80987e 710 {
mbed_official 610:813dcc80987e 711 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
mbed_official 610:813dcc80987e 712 {
mbed_official 610:813dcc80987e 713 return HAL_TIMEOUT;
mbed_official 610:813dcc80987e 714 }
mbed_official 610:813dcc80987e 715 }
mbed_official 610:813dcc80987e 716 }
mbed_official 610:813dcc80987e 717
mbed_official 610:813dcc80987e 718 /* Get the ECCR register value */
mbed_official 610:813dcc80987e 719 *ECCval = (uint32_t)Device->ECCR;
mbed_official 610:813dcc80987e 720
mbed_official 610:813dcc80987e 721 return HAL_OK;
mbed_official 610:813dcc80987e 722 }
mbed_official 610:813dcc80987e 723
mbed_official 610:813dcc80987e 724 /**
mbed_official 610:813dcc80987e 725 * @}
mbed_official 610:813dcc80987e 726 */
mbed_official 610:813dcc80987e 727
mbed_official 610:813dcc80987e 728 /**
mbed_official 610:813dcc80987e 729 * @}
mbed_official 610:813dcc80987e 730 */
mbed_official 610:813dcc80987e 731
mbed_official 610:813dcc80987e 732 /**
mbed_official 610:813dcc80987e 733 * @}
mbed_official 610:813dcc80987e 734 */
mbed_official 610:813dcc80987e 735
mbed_official 610:813dcc80987e 736 /**
mbed_official 610:813dcc80987e 737 * @}
mbed_official 610:813dcc80987e 738 */
mbed_official 610:813dcc80987e 739
mbed_official 610:813dcc80987e 740 /**
mbed_official 610:813dcc80987e 741 * @}
mbed_official 610:813dcc80987e 742 */
mbed_official 610:813dcc80987e 743
mbed_official 610:813dcc80987e 744 #endif /* HAL_FMC_MODULE_ENABLED */
mbed_official 610:813dcc80987e 745
mbed_official 610:813dcc80987e 746 /**
mbed_official 610:813dcc80987e 747 * @}
mbed_official 610:813dcc80987e 748 */
mbed_official 610:813dcc80987e 749
mbed_official 610:813dcc80987e 750 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/