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targets/cmsis/TARGET_STM/TARGET_STM32L4/stm32l4xx_hal_spi.c@637:ed69428d4850, 2015-12-22 (annotated)

Committer:
jaerts
Date:
Tue Dec 22 13:22:16 2015 +0000
Revision:
637:ed69428d4850
Parent:
610:813dcc80987e 
Add very shady LPC1768 CAN Filter implementation

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 610:813dcc80987e 1 /**
mbed_official 610:813dcc80987e 2 ******************************************************************************
mbed_official 610:813dcc80987e 3 * @file stm32l4xx_hal_spi.c
mbed_official 610:813dcc80987e 4 * @author MCD Application Team
mbed_official 610:813dcc80987e 5 * @version V1.0.0
mbed_official 610:813dcc80987e 6 * @date 26-June-2015
mbed_official 610:813dcc80987e 7 * @brief SPI HAL module driver.
mbed_official 610:813dcc80987e 8 * This file provides firmware functions to manage the following
mbed_official 610:813dcc80987e 9 * functionalities of the Serial Peripheral Interface (SPI) peripheral:
mbed_official 610:813dcc80987e 10 * + Initialization and de-initialization functions
mbed_official 610:813dcc80987e 11 * + IO operation functions
mbed_official 610:813dcc80987e 12 * + Peripheral Control functions
mbed_official 610:813dcc80987e 13 * + Peripheral State functions
mbed_official 610:813dcc80987e 14 *
mbed_official 610:813dcc80987e 15 @verbatim
mbed_official 610:813dcc80987e 16 ==============================================================================
mbed_official 610:813dcc80987e 17 ##### How to use this driver #####
mbed_official 610:813dcc80987e 18 ==============================================================================
mbed_official 610:813dcc80987e 19 [..]
mbed_official 610:813dcc80987e 20 The SPI HAL driver can be used as follows:
mbed_official 610:813dcc80987e 21
mbed_official 610:813dcc80987e 22 (#) Declare a SPI_HandleTypeDef handle structure, for example:
mbed_official 610:813dcc80987e 23 SPI_HandleTypeDef hspi;
mbed_official 610:813dcc80987e 24
mbed_official 610:813dcc80987e 25 (#)Initialize the SPI low level resources by implementing the HAL_SPI_MspInit() API:
mbed_official 610:813dcc80987e 26 (##) Enable the SPIx interface clock
mbed_official 610:813dcc80987e 27 (##) SPI pins configuration
mbed_official 610:813dcc80987e 28 (+++) Enable the clock for the SPI GPIOs
mbed_official 610:813dcc80987e 29 (+++) Configure these SPI pins as alternate function push-pull
mbed_official 610:813dcc80987e 30 (##) NVIC configuration if you need to use interrupt process
mbed_official 610:813dcc80987e 31 (+++) Configure the SPIx interrupt priority
mbed_official 610:813dcc80987e 32 (+++) Enable the NVIC SPI IRQ handle
mbed_official 610:813dcc80987e 33 (##) DMA Configuration if you need to use DMA process
mbed_official 610:813dcc80987e 34 (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive channel
mbed_official 610:813dcc80987e 35 (+++) Enable the DMAx clock
mbed_official 610:813dcc80987e 36 (+++) Configure the DMA handle parameters
mbed_official 610:813dcc80987e 37 (+++) Configure the DMA Tx or Rx channel
mbed_official 610:813dcc80987e 38 (+++) Associate the initialized hdma_tx handle to the hspi DMA Tx or Rx handle
mbed_official 610:813dcc80987e 39 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx channel
mbed_official 610:813dcc80987e 40
mbed_official 610:813dcc80987e 41 (#) Program the Mode, BidirectionalMode , Data size, Baudrate Prescaler, NSS
mbed_official 610:813dcc80987e 42 management, Clock polarity and phase, FirstBit and CRC configuration in the hspi Init structure.
mbed_official 610:813dcc80987e 43
mbed_official 610:813dcc80987e 44 (#) Initialize the SPI registers by calling the HAL_SPI_Init() API:
mbed_official 610:813dcc80987e 45 (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
mbed_official 610:813dcc80987e 46 by calling the customized HAL_SPI_MspInit() API.
mbed_official 610:813dcc80987e 47 [..]
mbed_official 610:813dcc80987e 48 Circular mode restriction:
mbed_official 610:813dcc80987e 49 (#) The DMA circular mode cannot be used when the SPI is configured in these modes:
mbed_official 610:813dcc80987e 50 (##) Master 2Lines RxOnly
mbed_official 610:813dcc80987e 51 (##) Master 1Line Rx
mbed_official 610:813dcc80987e 52 (#) The CRC feature is not managed when the DMA circular mode is enabled
mbed_official 610:813dcc80987e 53 (#) When the SPI DMA Pause/Stop features are used, we must use the following APIs
mbed_official 610:813dcc80987e 54 the HAL_SPI_DMAPause()/ HAL_SPI_DMAStop() only under the SPI callbacks
mbed_official 610:813dcc80987e 55
mbed_official 610:813dcc80987e 56 @endverbatim
mbed_official 610:813dcc80987e 57 ******************************************************************************
mbed_official 610:813dcc80987e 58 * @attention
mbed_official 610:813dcc80987e 59 *
mbed_official 610:813dcc80987e 60 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official 610:813dcc80987e 61 *
mbed_official 610:813dcc80987e 62 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 610:813dcc80987e 63 * are permitted provided that the following conditions are met:
mbed_official 610:813dcc80987e 64 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 610:813dcc80987e 65 * this list of conditions and the following disclaimer.
mbed_official 610:813dcc80987e 66 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 610:813dcc80987e 67 * this list of conditions and the following disclaimer in the documentation
mbed_official 610:813dcc80987e 68 * and/or other materials provided with the distribution.
mbed_official 610:813dcc80987e 69 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 610:813dcc80987e 70 * may be used to endorse or promote products derived from this software
mbed_official 610:813dcc80987e 71 * without specific prior written permission.
mbed_official 610:813dcc80987e 72 *
mbed_official 610:813dcc80987e 73 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 610:813dcc80987e 74 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 610:813dcc80987e 75 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 610:813dcc80987e 76 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 610:813dcc80987e 77 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 610:813dcc80987e 78 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 610:813dcc80987e 79 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 610:813dcc80987e 80 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 610:813dcc80987e 81 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 610:813dcc80987e 82 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 610:813dcc80987e 83 *
mbed_official 610:813dcc80987e 84 ******************************************************************************
mbed_official 610:813dcc80987e 85 */
mbed_official 610:813dcc80987e 86
mbed_official 610:813dcc80987e 87 /* Includes ------------------------------------------------------------------*/
mbed_official 610:813dcc80987e 88 #include "stm32l4xx_hal.h"
mbed_official 610:813dcc80987e 89
mbed_official 610:813dcc80987e 90 /** @addtogroup STM32L4xx_HAL_Driver
mbed_official 610:813dcc80987e 91 * @{
mbed_official 610:813dcc80987e 92 */
mbed_official 610:813dcc80987e 93
mbed_official 610:813dcc80987e 94 /** @defgroup SPI SPI
mbed_official 610:813dcc80987e 95 * @brief SPI HAL module driver
mbed_official 610:813dcc80987e 96 * @{
mbed_official 610:813dcc80987e 97 */
mbed_official 610:813dcc80987e 98 #ifdef HAL_SPI_MODULE_ENABLED
mbed_official 610:813dcc80987e 99
mbed_official 610:813dcc80987e 100 /* Private typedef -----------------------------------------------------------*/
mbed_official 610:813dcc80987e 101 /* Private defines -----------------------------------------------------------*/
mbed_official 610:813dcc80987e 102 /** @defgroup SPI_Private_Constants SPI Private Constants
mbed_official 610:813dcc80987e 103 * @{
mbed_official 610:813dcc80987e 104 */
mbed_official 610:813dcc80987e 105 #define SPI_DEFAULT_TIMEOUT 50
mbed_official 610:813dcc80987e 106 /**
mbed_official 610:813dcc80987e 107 * @}
mbed_official 610:813dcc80987e 108 */
mbed_official 610:813dcc80987e 109
mbed_official 610:813dcc80987e 110 /* Private macros ------------------------------------------------------------*/
mbed_official 610:813dcc80987e 111 /* Private variables ---------------------------------------------------------*/
mbed_official 610:813dcc80987e 112 /* Private function prototypes -----------------------------------------------*/
mbed_official 610:813dcc80987e 113 /** @defgroup SPI_Private_Functions SPI Private Functions
mbed_official 610:813dcc80987e 114 * @{
mbed_official 610:813dcc80987e 115 */
mbed_official 610:813dcc80987e 116 static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma);
mbed_official 610:813dcc80987e 117 static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
mbed_official 610:813dcc80987e 118 static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma);
mbed_official 610:813dcc80987e 119 static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma);
mbed_official 610:813dcc80987e 120 static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma);
mbed_official 610:813dcc80987e 121 static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma);
mbed_official 610:813dcc80987e 122 static void SPI_DMAError(DMA_HandleTypeDef *hdma);
mbed_official 610:813dcc80987e 123 static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, uint32_t State, uint32_t Timeout);
mbed_official 610:813dcc80987e 124 static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Fifo, uint32_t State, uint32_t Timeout);
mbed_official 610:813dcc80987e 125 static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
mbed_official 610:813dcc80987e 126 static void SPI_TxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
mbed_official 610:813dcc80987e 127 static void SPI_RxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
mbed_official 610:813dcc80987e 128 static void SPI_RxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi);
mbed_official 610:813dcc80987e 129 static void SPI_RxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
mbed_official 610:813dcc80987e 130 static void SPI_RxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi);
mbed_official 610:813dcc80987e 131 static void SPI_2linesRxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
mbed_official 610:813dcc80987e 132 static void SPI_2linesRxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi);
mbed_official 610:813dcc80987e 133 static void SPI_2linesTxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
mbed_official 610:813dcc80987e 134 static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
mbed_official 610:813dcc80987e 135 static void SPI_2linesRxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
mbed_official 610:813dcc80987e 136 static void SPI_2linesRxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi);
mbed_official 610:813dcc80987e 137 static void SPI_CloseRxTx_ISR(SPI_HandleTypeDef *hspi);
mbed_official 610:813dcc80987e 138 static void SPI_CloseRx_ISR(SPI_HandleTypeDef *hspi);
mbed_official 610:813dcc80987e 139 static void SPI_CloseTx_ISR(SPI_HandleTypeDef *hspi);
mbed_official 610:813dcc80987e 140 static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout);
mbed_official 610:813dcc80987e 141 static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout);
mbed_official 610:813dcc80987e 142 /**
mbed_official 610:813dcc80987e 143 * @}
mbed_official 610:813dcc80987e 144 */
mbed_official 610:813dcc80987e 145
mbed_official 610:813dcc80987e 146 /* Exported functions ---------------------------------------------------------*/
mbed_official 610:813dcc80987e 147
mbed_official 610:813dcc80987e 148 /** @defgroup SPI_Exported_Functions SPI Exported Functions
mbed_official 610:813dcc80987e 149 * @{
mbed_official 610:813dcc80987e 150 */
mbed_official 610:813dcc80987e 151
mbed_official 610:813dcc80987e 152 /** @defgroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions
mbed_official 610:813dcc80987e 153 * @brief Initialization and Configuration functions
mbed_official 610:813dcc80987e 154 *
mbed_official 610:813dcc80987e 155 @verbatim
mbed_official 610:813dcc80987e 156 ===============================================================================
mbed_official 610:813dcc80987e 157 ##### Initialization and de-initialization functions #####
mbed_official 610:813dcc80987e 158 ===============================================================================
mbed_official 610:813dcc80987e 159 [..] This subsection provides a set of functions allowing to initialize and
mbed_official 610:813dcc80987e 160 de-initialize the SPIx peripheral:
mbed_official 610:813dcc80987e 161
mbed_official 610:813dcc80987e 162 (+) User must implement HAL_SPI_MspInit() function in which he configures
mbed_official 610:813dcc80987e 163 all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
mbed_official 610:813dcc80987e 164
mbed_official 610:813dcc80987e 165 (+) Call the function HAL_SPI_Init() to configure the selected device with
mbed_official 610:813dcc80987e 166 the selected configuration:
mbed_official 610:813dcc80987e 167 (++) Mode
mbed_official 610:813dcc80987e 168 (++) Direction
mbed_official 610:813dcc80987e 169 (++) Data Size
mbed_official 610:813dcc80987e 170 (++) Clock Polarity and Phase
mbed_official 610:813dcc80987e 171 (++) NSS Management
mbed_official 610:813dcc80987e 172 (++) BaudRate Prescaler
mbed_official 610:813dcc80987e 173 (++) FirstBit
mbed_official 610:813dcc80987e 174 (++) TIMode
mbed_official 610:813dcc80987e 175 (++) CRC Calculation
mbed_official 610:813dcc80987e 176 (++) CRC Polynomial if CRC enabled
mbed_official 610:813dcc80987e 177 (++) CRC Length, used only with Data8 and Data16
mbed_official 610:813dcc80987e 178 (++) FIFO reception threshold
mbed_official 610:813dcc80987e 179
mbed_official 610:813dcc80987e 180 (+) Call the function HAL_SPI_DeInit() to restore the default configuration
mbed_official 610:813dcc80987e 181 of the selected SPIx peripheral.
mbed_official 610:813dcc80987e 182
mbed_official 610:813dcc80987e 183 @endverbatim
mbed_official 610:813dcc80987e 184 * @{
mbed_official 610:813dcc80987e 185 */
mbed_official 610:813dcc80987e 186
mbed_official 610:813dcc80987e 187 /**
mbed_official 610:813dcc80987e 188 * @brief Initialize the SPI according to the specified parameters
mbed_official 610:813dcc80987e 189 * in the SPI_InitTypeDef and initialize the associated handle.
mbed_official 610:813dcc80987e 190 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 191 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 192 * @retval HAL status
mbed_official 610:813dcc80987e 193 */
mbed_official 610:813dcc80987e 194 HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
mbed_official 610:813dcc80987e 195 {
mbed_official 610:813dcc80987e 196 uint32_t frxth;
mbed_official 610:813dcc80987e 197
mbed_official 610:813dcc80987e 198 /* Check the SPI handle allocation */
mbed_official 610:813dcc80987e 199 if(hspi == NULL)
mbed_official 610:813dcc80987e 200 {
mbed_official 610:813dcc80987e 201 return HAL_ERROR;
mbed_official 610:813dcc80987e 202 }
mbed_official 610:813dcc80987e 203
mbed_official 610:813dcc80987e 204 /* Check the parameters */
mbed_official 610:813dcc80987e 205 assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance));
mbed_official 610:813dcc80987e 206 assert_param(IS_SPI_MODE(hspi->Init.Mode));
mbed_official 610:813dcc80987e 207 assert_param(IS_SPI_DIRECTION(hspi->Init.Direction));
mbed_official 610:813dcc80987e 208 assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize));
mbed_official 610:813dcc80987e 209 assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity));
mbed_official 610:813dcc80987e 210 assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase));
mbed_official 610:813dcc80987e 211 assert_param(IS_SPI_NSS(hspi->Init.NSS));
mbed_official 610:813dcc80987e 212 assert_param(IS_SPI_NSSP(hspi->Init.NSSPMode));
mbed_official 610:813dcc80987e 213 assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
mbed_official 610:813dcc80987e 214 assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit));
mbed_official 610:813dcc80987e 215 assert_param(IS_SPI_TIMODE(hspi->Init.TIMode));
mbed_official 610:813dcc80987e 216 assert_param(IS_SPI_CRC_CALCULATION(hspi->Init.CRCCalculation));
mbed_official 610:813dcc80987e 217 assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
mbed_official 610:813dcc80987e 218 assert_param(IS_SPI_CRC_LENGTH(hspi->Init.CRCLength));
mbed_official 610:813dcc80987e 219
mbed_official 610:813dcc80987e 220 if(hspi->State == HAL_SPI_STATE_RESET)
mbed_official 610:813dcc80987e 221 {
mbed_official 610:813dcc80987e 222 /* Allocate lock resource and initialize it */
mbed_official 610:813dcc80987e 223 hspi->Lock = HAL_UNLOCKED;
mbed_official 610:813dcc80987e 224
mbed_official 610:813dcc80987e 225 /* Init the low level hardware : GPIO, CLOCK, NVIC... */
mbed_official 610:813dcc80987e 226 HAL_SPI_MspInit(hspi);
mbed_official 610:813dcc80987e 227 }
mbed_official 610:813dcc80987e 228
mbed_official 610:813dcc80987e 229 hspi->State = HAL_SPI_STATE_BUSY;
mbed_official 610:813dcc80987e 230
mbed_official 610:813dcc80987e 231 /* Disable the selected SPI peripheral */
mbed_official 610:813dcc80987e 232 __HAL_SPI_DISABLE(hspi);
mbed_official 610:813dcc80987e 233
mbed_official 610:813dcc80987e 234 /* Align by default the rs fifo threshold on the data size */
mbed_official 610:813dcc80987e 235 if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
mbed_official 610:813dcc80987e 236 {
mbed_official 610:813dcc80987e 237 frxth = SPI_RXFIFO_THRESHOLD_HF;
mbed_official 610:813dcc80987e 238 }
mbed_official 610:813dcc80987e 239 else
mbed_official 610:813dcc80987e 240 {
mbed_official 610:813dcc80987e 241 frxth = SPI_RXFIFO_THRESHOLD_QF;
mbed_official 610:813dcc80987e 242 }
mbed_official 610:813dcc80987e 243
mbed_official 610:813dcc80987e 244 /* CRC calculation is valid only for 16Bit and 8 Bit */
mbed_official 610:813dcc80987e 245 if(( hspi->Init.DataSize != SPI_DATASIZE_16BIT ) && ( hspi->Init.DataSize != SPI_DATASIZE_8BIT ))
mbed_official 610:813dcc80987e 246 {
mbed_official 610:813dcc80987e 247 /* CRC must be disabled */
mbed_official 610:813dcc80987e 248 hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
mbed_official 610:813dcc80987e 249 }
mbed_official 610:813dcc80987e 250
mbed_official 610:813dcc80987e 251 /* Align the CRC Length on the data size */
mbed_official 610:813dcc80987e 252 if( hspi->Init.CRCLength == SPI_CRC_LENGTH_DATASIZE)
mbed_official 610:813dcc80987e 253 {
mbed_official 610:813dcc80987e 254 /* CRC Length aligned on the data size : value set by default */
mbed_official 610:813dcc80987e 255 if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
mbed_official 610:813dcc80987e 256 {
mbed_official 610:813dcc80987e 257 hspi->Init.CRCLength = SPI_CRC_LENGTH_16BIT;
mbed_official 610:813dcc80987e 258 }
mbed_official 610:813dcc80987e 259 else
mbed_official 610:813dcc80987e 260 {
mbed_official 610:813dcc80987e 261 hspi->Init.CRCLength = SPI_CRC_LENGTH_8BIT;
mbed_official 610:813dcc80987e 262 }
mbed_official 610:813dcc80987e 263 }
mbed_official 610:813dcc80987e 264
mbed_official 610:813dcc80987e 265 /*---------------------------- SPIx CR1 & CR2 Configuration ------------------------*/
mbed_official 610:813dcc80987e 266 /* Configure : SPI Mode, Communication Mode, Clock polarity and phase, NSS management,
mbed_official 610:813dcc80987e 267 Communication speed, First bit, CRC calculation state, CRC Length */
mbed_official 610:813dcc80987e 268 hspi->Instance->CR1 = (hspi->Init.Mode | hspi->Init.Direction |
mbed_official 610:813dcc80987e 269 hspi->Init.CLKPolarity | hspi->Init.CLKPhase | (hspi->Init.NSS & SPI_CR1_SSM) |
mbed_official 610:813dcc80987e 270 hspi->Init.BaudRatePrescaler | hspi->Init.FirstBit | hspi->Init.CRCCalculation);
mbed_official 610:813dcc80987e 271
mbed_official 610:813dcc80987e 272 if( hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT)
mbed_official 610:813dcc80987e 273 {
mbed_official 610:813dcc80987e 274 hspi->Instance->CR1|= SPI_CR1_CRCL;
mbed_official 610:813dcc80987e 275 }
mbed_official 610:813dcc80987e 276
mbed_official 610:813dcc80987e 277 /* Configure : NSS management */
mbed_official 610:813dcc80987e 278 /* Configure : Rx Fifo Threshold */
mbed_official 610:813dcc80987e 279 hspi->Instance->CR2 = (((hspi->Init.NSS >> 16) & SPI_CR2_SSOE) | hspi->Init.TIMode | hspi->Init.NSSPMode |
mbed_official 610:813dcc80987e 280 hspi->Init.DataSize ) | frxth;
mbed_official 610:813dcc80987e 281
mbed_official 610:813dcc80987e 282 /*---------------------------- SPIx CRCPOLY Configuration --------------------*/
mbed_official 610:813dcc80987e 283 /* Configure : CRC Polynomial */
mbed_official 610:813dcc80987e 284 hspi->Instance->CRCPR = hspi->Init.CRCPolynomial;
mbed_official 610:813dcc80987e 285
mbed_official 610:813dcc80987e 286 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
mbed_official 610:813dcc80987e 287 hspi->State= HAL_SPI_STATE_READY;
mbed_official 610:813dcc80987e 288
mbed_official 610:813dcc80987e 289 return HAL_OK;
mbed_official 610:813dcc80987e 290 }
mbed_official 610:813dcc80987e 291
mbed_official 610:813dcc80987e 292 /**
mbed_official 610:813dcc80987e 293 * @brief DeInitialize the SPI peripheral.
mbed_official 610:813dcc80987e 294 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 295 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 296 * @retval HAL status
mbed_official 610:813dcc80987e 297 */
mbed_official 610:813dcc80987e 298 HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi)
mbed_official 610:813dcc80987e 299 {
mbed_official 610:813dcc80987e 300 /* Check the SPI handle allocation */
mbed_official 610:813dcc80987e 301 if(hspi == NULL)
mbed_official 610:813dcc80987e 302 {
mbed_official 610:813dcc80987e 303 return HAL_ERROR;
mbed_official 610:813dcc80987e 304 }
mbed_official 610:813dcc80987e 305
mbed_official 610:813dcc80987e 306 /* Check the parameters */
mbed_official 610:813dcc80987e 307 assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance));
mbed_official 610:813dcc80987e 308 hspi->State = HAL_SPI_STATE_BUSY;
mbed_official 610:813dcc80987e 309
mbed_official 610:813dcc80987e 310 /* Disable the SPI Peripheral Clock */
mbed_official 610:813dcc80987e 311 __HAL_SPI_DISABLE(hspi);
mbed_official 610:813dcc80987e 312
mbed_official 610:813dcc80987e 313 /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
mbed_official 610:813dcc80987e 314 HAL_SPI_MspDeInit(hspi);
mbed_official 610:813dcc80987e 315
mbed_official 610:813dcc80987e 316 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
mbed_official 610:813dcc80987e 317 hspi->State = HAL_SPI_STATE_RESET;
mbed_official 610:813dcc80987e 318
mbed_official 610:813dcc80987e 319 __HAL_UNLOCK(hspi);
mbed_official 610:813dcc80987e 320
mbed_official 610:813dcc80987e 321 return HAL_OK;
mbed_official 610:813dcc80987e 322 }
mbed_official 610:813dcc80987e 323
mbed_official 610:813dcc80987e 324 /**
mbed_official 610:813dcc80987e 325 * @brief Initialize the SPI MSP.
mbed_official 610:813dcc80987e 326 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 327 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 328 * @retval None
mbed_official 610:813dcc80987e 329 */
mbed_official 610:813dcc80987e 330 __weak void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi)
mbed_official 610:813dcc80987e 331 {
mbed_official 610:813dcc80987e 332 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 333 the HAL_SPI_MspInit should be implemented in the user file
mbed_official 610:813dcc80987e 334 */
mbed_official 610:813dcc80987e 335 }
mbed_official 610:813dcc80987e 336
mbed_official 610:813dcc80987e 337 /**
mbed_official 610:813dcc80987e 338 * @brief DeInitialize the SPI MSP.
mbed_official 610:813dcc80987e 339 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 340 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 341 * @retval None
mbed_official 610:813dcc80987e 342 */
mbed_official 610:813dcc80987e 343 __weak void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi)
mbed_official 610:813dcc80987e 344 {
mbed_official 610:813dcc80987e 345 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 346 the HAL_SPI_MspDeInit should be implemented in the user file
mbed_official 610:813dcc80987e 347 */
mbed_official 610:813dcc80987e 348 }
mbed_official 610:813dcc80987e 349
mbed_official 610:813dcc80987e 350 /**
mbed_official 610:813dcc80987e 351 * @}
mbed_official 610:813dcc80987e 352 */
mbed_official 610:813dcc80987e 353
mbed_official 610:813dcc80987e 354 /** @defgroup SPI_Exported_Functions_Group2 IO operation functions
mbed_official 610:813dcc80987e 355 * @brief Data transfers functions
mbed_official 610:813dcc80987e 356 *
mbed_official 610:813dcc80987e 357 @verbatim
mbed_official 610:813dcc80987e 358 ==============================================================================
mbed_official 610:813dcc80987e 359 ##### IO operation functions #####
mbed_official 610:813dcc80987e 360 ===============================================================================
mbed_official 610:813dcc80987e 361 [..]
mbed_official 610:813dcc80987e 362 This subsection provides a set of functions allowing to manage the SPI
mbed_official 610:813dcc80987e 363 data transfers.
mbed_official 610:813dcc80987e 364
mbed_official 610:813dcc80987e 365 [..] The SPI supports master and slave mode :
mbed_official 610:813dcc80987e 366
mbed_official 610:813dcc80987e 367 (#) There are two modes of transfer:
mbed_official 610:813dcc80987e 368 (++) Blocking mode: The communication is performed in polling mode.
mbed_official 610:813dcc80987e 369 The HAL status of all data processing is returned by the same function
mbed_official 610:813dcc80987e 370 after finishing transfer.
mbed_official 610:813dcc80987e 371 (++) No-Blocking mode: The communication is performed using Interrupts
mbed_official 610:813dcc80987e 372 or DMA, These APIs return the HAL status.
mbed_official 610:813dcc80987e 373 The end of the data processing will be indicated through the
mbed_official 610:813dcc80987e 374 dedicated SPI IRQ when using Interrupt mode or the DMA IRQ when
mbed_official 610:813dcc80987e 375 using DMA mode.
mbed_official 610:813dcc80987e 376 The HAL_SPI_TxCpltCallback(), HAL_SPI_RxCpltCallback() and HAL_SPI_TxRxCpltCallback() user callbacks
mbed_official 610:813dcc80987e 377 will be executed respectively at the end of the transmit or Receive process
mbed_official 610:813dcc80987e 378 The HAL_SPI_ErrorCallback()user callback will be executed when a communication error is detected
mbed_official 610:813dcc80987e 379
mbed_official 610:813dcc80987e 380 (#) APIs provided for these 2 transfer modes (Blocking mode or Non blocking mode using either Interrupt or DMA)
mbed_official 610:813dcc80987e 381 exist for 1Line (simplex) and 2Lines (full duplex) modes.
mbed_official 610:813dcc80987e 382
mbed_official 610:813dcc80987e 383 @endverbatim
mbed_official 610:813dcc80987e 384 * @{
mbed_official 610:813dcc80987e 385 */
mbed_official 610:813dcc80987e 386
mbed_official 610:813dcc80987e 387 /**
mbed_official 610:813dcc80987e 388 * @brief Transmit an amount of data in blocking mode.
mbed_official 610:813dcc80987e 389 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 390 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 391 * @param pData: pointer to data buffer
mbed_official 610:813dcc80987e 392 * @param Size: amount of data to be sent
mbed_official 610:813dcc80987e 393 * @param Timeout: Timeout duration
mbed_official 610:813dcc80987e 394 * @retval HAL status
mbed_official 610:813dcc80987e 395 */
mbed_official 610:813dcc80987e 396 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
mbed_official 610:813dcc80987e 397 {
mbed_official 610:813dcc80987e 398 uint32_t tickstart = HAL_GetTick();
mbed_official 610:813dcc80987e 399 HAL_StatusTypeDef errorcode = HAL_OK;
mbed_official 610:813dcc80987e 400
mbed_official 610:813dcc80987e 401 assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
mbed_official 610:813dcc80987e 402
mbed_official 610:813dcc80987e 403 /* Process Locked */
mbed_official 610:813dcc80987e 404 __HAL_LOCK(hspi);
mbed_official 610:813dcc80987e 405
mbed_official 610:813dcc80987e 406 if(hspi->State != HAL_SPI_STATE_READY)
mbed_official 610:813dcc80987e 407 {
mbed_official 610:813dcc80987e 408 errorcode = HAL_BUSY;
mbed_official 610:813dcc80987e 409 goto error;
mbed_official 610:813dcc80987e 410 }
mbed_official 610:813dcc80987e 411
mbed_official 610:813dcc80987e 412 if((pData == NULL ) || (Size == 0))
mbed_official 610:813dcc80987e 413 {
mbed_official 610:813dcc80987e 414 errorcode = HAL_ERROR;
mbed_official 610:813dcc80987e 415 goto error;
mbed_official 610:813dcc80987e 416 }
mbed_official 610:813dcc80987e 417
mbed_official 610:813dcc80987e 418 /* Set the transaction information */
mbed_official 610:813dcc80987e 419 hspi->State = HAL_SPI_STATE_BUSY_TX;
mbed_official 610:813dcc80987e 420 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
mbed_official 610:813dcc80987e 421 hspi->pTxBuffPtr = pData;
mbed_official 610:813dcc80987e 422 hspi->TxXferSize = Size;
mbed_official 610:813dcc80987e 423 hspi->TxXferCount = Size;
mbed_official 610:813dcc80987e 424 hspi->pRxBuffPtr = (uint8_t *)NULL;
mbed_official 610:813dcc80987e 425 hspi->RxXferSize = 0;
mbed_official 610:813dcc80987e 426 hspi->RxXferCount = 0;
mbed_official 610:813dcc80987e 427
mbed_official 610:813dcc80987e 428 /* Configure communication direction : 1Line */
mbed_official 610:813dcc80987e 429 if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
mbed_official 610:813dcc80987e 430 {
mbed_official 610:813dcc80987e 431 SPI_1LINE_TX(hspi);
mbed_official 610:813dcc80987e 432 }
mbed_official 610:813dcc80987e 433
mbed_official 610:813dcc80987e 434 /* Reset CRC Calculation */
mbed_official 610:813dcc80987e 435 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
mbed_official 610:813dcc80987e 436 {
mbed_official 610:813dcc80987e 437 SPI_RESET_CRC(hspi);
mbed_official 610:813dcc80987e 438 }
mbed_official 610:813dcc80987e 439
mbed_official 610:813dcc80987e 440 /* Check if the SPI is already enabled */
mbed_official 610:813dcc80987e 441 if((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
mbed_official 610:813dcc80987e 442 {
mbed_official 610:813dcc80987e 443 /* Enable SPI peripheral */
mbed_official 610:813dcc80987e 444 __HAL_SPI_ENABLE(hspi);
mbed_official 610:813dcc80987e 445 }
mbed_official 610:813dcc80987e 446
mbed_official 610:813dcc80987e 447 /* Transmit data in 16 Bit mode */
mbed_official 610:813dcc80987e 448 if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
mbed_official 610:813dcc80987e 449 {
mbed_official 610:813dcc80987e 450 /* Transmit data in 16 Bit mode */
mbed_official 610:813dcc80987e 451 while (hspi->TxXferCount > 0)
mbed_official 610:813dcc80987e 452 {
mbed_official 610:813dcc80987e 453 /* Wait until TXE flag is set to send data */
mbed_official 610:813dcc80987e 454 if((hspi->Instance->SR & SPI_FLAG_TXE) == SPI_FLAG_TXE)
mbed_official 610:813dcc80987e 455 {
mbed_official 610:813dcc80987e 456 hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
mbed_official 610:813dcc80987e 457 hspi->pTxBuffPtr += sizeof(uint16_t);
mbed_official 610:813dcc80987e 458 hspi->TxXferCount--;
mbed_official 610:813dcc80987e 459 }
mbed_official 610:813dcc80987e 460 else
mbed_official 610:813dcc80987e 461 {
mbed_official 610:813dcc80987e 462 /* Timeout management */
mbed_official 610:813dcc80987e 463 if((Timeout == 0) || ((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick()-tickstart) >= Timeout)))
mbed_official 610:813dcc80987e 464 {
mbed_official 610:813dcc80987e 465 errorcode = HAL_TIMEOUT;
mbed_official 610:813dcc80987e 466 goto error;
mbed_official 610:813dcc80987e 467 }
mbed_official 610:813dcc80987e 468 }
mbed_official 610:813dcc80987e 469 }
mbed_official 610:813dcc80987e 470 }
mbed_official 610:813dcc80987e 471 /* Transmit data in 8 Bit mode */
mbed_official 610:813dcc80987e 472 else
mbed_official 610:813dcc80987e 473 {
mbed_official 610:813dcc80987e 474 while (hspi->TxXferCount > 0)
mbed_official 610:813dcc80987e 475 {
mbed_official 610:813dcc80987e 476 /* Wait until TXE flag is set to send data */
mbed_official 610:813dcc80987e 477 if((hspi->Instance->SR & SPI_FLAG_TXE) == SPI_FLAG_TXE)
mbed_official 610:813dcc80987e 478 {
mbed_official 610:813dcc80987e 479 if(hspi->TxXferCount > 1)
mbed_official 610:813dcc80987e 480 {
mbed_official 610:813dcc80987e 481 /* write on the data register in packing mode */
mbed_official 610:813dcc80987e 482 hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
mbed_official 610:813dcc80987e 483 hspi->pTxBuffPtr += sizeof(uint16_t);
mbed_official 610:813dcc80987e 484 hspi->TxXferCount -= 2;
mbed_official 610:813dcc80987e 485 }
mbed_official 610:813dcc80987e 486 else
mbed_official 610:813dcc80987e 487 {
mbed_official 610:813dcc80987e 488 *((__IO uint8_t*)&hspi->Instance->DR) = (*hspi->pTxBuffPtr++);
mbed_official 610:813dcc80987e 489 hspi->TxXferCount--;
mbed_official 610:813dcc80987e 490 }
mbed_official 610:813dcc80987e 491 }
mbed_official 610:813dcc80987e 492 else
mbed_official 610:813dcc80987e 493 {
mbed_official 610:813dcc80987e 494 /* Timeout management */
mbed_official 610:813dcc80987e 495 if((Timeout == 0) || ((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick()-tickstart) >= Timeout)))
mbed_official 610:813dcc80987e 496 {
mbed_official 610:813dcc80987e 497 errorcode = HAL_TIMEOUT;
mbed_official 610:813dcc80987e 498 goto error;
mbed_official 610:813dcc80987e 499 }
mbed_official 610:813dcc80987e 500 }
mbed_official 610:813dcc80987e 501 }
mbed_official 610:813dcc80987e 502 }
mbed_official 610:813dcc80987e 503
mbed_official 610:813dcc80987e 504 /* Enable CRC Transmission */
mbed_official 610:813dcc80987e 505 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
mbed_official 610:813dcc80987e 506 {
mbed_official 610:813dcc80987e 507 hspi->Instance->CR1|= SPI_CR1_CRCNEXT;
mbed_official 610:813dcc80987e 508 }
mbed_official 610:813dcc80987e 509
mbed_official 610:813dcc80987e 510 /* Check the end of the transaction */
mbed_official 610:813dcc80987e 511 if(SPI_EndRxTxTransaction(hspi,Timeout) != HAL_OK)
mbed_official 610:813dcc80987e 512 {
mbed_official 610:813dcc80987e 513 hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
mbed_official 610:813dcc80987e 514 }
mbed_official 610:813dcc80987e 515
mbed_official 610:813dcc80987e 516 /* Clear overrun flag in 2 Lines communication mode because received is not read */
mbed_official 610:813dcc80987e 517 if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
mbed_official 610:813dcc80987e 518 {
mbed_official 610:813dcc80987e 519 __HAL_SPI_CLEAR_OVRFLAG(hspi);
mbed_official 610:813dcc80987e 520 }
mbed_official 610:813dcc80987e 521
mbed_official 610:813dcc80987e 522 if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
mbed_official 610:813dcc80987e 523 {
mbed_official 610:813dcc80987e 524 errorcode = HAL_ERROR;
mbed_official 610:813dcc80987e 525 }
mbed_official 610:813dcc80987e 526
mbed_official 610:813dcc80987e 527 error:
mbed_official 610:813dcc80987e 528 hspi->State = HAL_SPI_STATE_READY;
mbed_official 610:813dcc80987e 529 /* Process Unlocked */
mbed_official 610:813dcc80987e 530 __HAL_UNLOCK(hspi);
mbed_official 610:813dcc80987e 531 return errorcode;
mbed_official 610:813dcc80987e 532 }
mbed_official 610:813dcc80987e 533
mbed_official 610:813dcc80987e 534 /**
mbed_official 610:813dcc80987e 535 * @brief Receive an amount of data in blocking mode.
mbed_official 610:813dcc80987e 536 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 537 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 538 * @param pData: pointer to data buffer
mbed_official 610:813dcc80987e 539 * @param Size: amount of data to be received
mbed_official 610:813dcc80987e 540 * @param Timeout: Timeout duration
mbed_official 610:813dcc80987e 541 * @retval HAL status
mbed_official 610:813dcc80987e 542 */
mbed_official 610:813dcc80987e 543 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
mbed_official 610:813dcc80987e 544 {
mbed_official 610:813dcc80987e 545 __IO uint16_t tmpreg;
mbed_official 610:813dcc80987e 546 uint32_t tickstart = HAL_GetTick();
mbed_official 610:813dcc80987e 547 HAL_StatusTypeDef errorcode = HAL_OK;
mbed_official 610:813dcc80987e 548
mbed_official 610:813dcc80987e 549 if((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
mbed_official 610:813dcc80987e 550 {
mbed_official 610:813dcc80987e 551 /* the receive process is not supported in 2Lines direction master mode */
mbed_official 610:813dcc80987e 552 /* in this case we call the TransmitReceive process */
mbed_official 610:813dcc80987e 553 /* Process Locked */
mbed_official 610:813dcc80987e 554 return HAL_SPI_TransmitReceive(hspi,pData,pData,Size,Timeout);
mbed_official 610:813dcc80987e 555 }
mbed_official 610:813dcc80987e 556
mbed_official 610:813dcc80987e 557 /* Process Locked */
mbed_official 610:813dcc80987e 558 __HAL_LOCK(hspi);
mbed_official 610:813dcc80987e 559
mbed_official 610:813dcc80987e 560 if(hspi->State != HAL_SPI_STATE_READY)
mbed_official 610:813dcc80987e 561 {
mbed_official 610:813dcc80987e 562 errorcode = HAL_BUSY;
mbed_official 610:813dcc80987e 563 goto error;
mbed_official 610:813dcc80987e 564 }
mbed_official 610:813dcc80987e 565
mbed_official 610:813dcc80987e 566 if((pData == NULL ) || (Size == 0))
mbed_official 610:813dcc80987e 567 {
mbed_official 610:813dcc80987e 568 errorcode = HAL_ERROR;
mbed_official 610:813dcc80987e 569 goto error;
mbed_official 610:813dcc80987e 570 }
mbed_official 610:813dcc80987e 571
mbed_official 610:813dcc80987e 572 hspi->State = HAL_SPI_STATE_BUSY_RX;
mbed_official 610:813dcc80987e 573 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
mbed_official 610:813dcc80987e 574 hspi->pRxBuffPtr = pData;
mbed_official 610:813dcc80987e 575 hspi->RxXferSize = Size;
mbed_official 610:813dcc80987e 576 hspi->RxXferCount = Size;
mbed_official 610:813dcc80987e 577 hspi->pTxBuffPtr = (uint8_t *)NULL;
mbed_official 610:813dcc80987e 578 hspi->TxXferSize = 0;
mbed_official 610:813dcc80987e 579 hspi->TxXferCount = 0;
mbed_official 610:813dcc80987e 580
mbed_official 610:813dcc80987e 581 /* Reset CRC Calculation */
mbed_official 610:813dcc80987e 582 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
mbed_official 610:813dcc80987e 583 {
mbed_official 610:813dcc80987e 584 SPI_RESET_CRC(hspi);
mbed_official 610:813dcc80987e 585 /* this is done to handle the CRCNEXT before the latest data */
mbed_official 610:813dcc80987e 586 hspi->RxXferCount--;
mbed_official 610:813dcc80987e 587 }
mbed_official 610:813dcc80987e 588
mbed_official 610:813dcc80987e 589 /* Set the Rx Fido threshold */
mbed_official 610:813dcc80987e 590 if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
mbed_official 610:813dcc80987e 591 {
mbed_official 610:813dcc80987e 592 /* set fiforxthresold according the reception data length: 16bit */
mbed_official 610:813dcc80987e 593 CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
mbed_official 610:813dcc80987e 594 }
mbed_official 610:813dcc80987e 595 else
mbed_official 610:813dcc80987e 596 {
mbed_official 610:813dcc80987e 597 /* set fiforxthresold according the reception data length: 8bit */
mbed_official 610:813dcc80987e 598 SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
mbed_official 610:813dcc80987e 599 }
mbed_official 610:813dcc80987e 600
mbed_official 610:813dcc80987e 601 /* Configure communication direction 1Line and enabled SPI if needed */
mbed_official 610:813dcc80987e 602 if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
mbed_official 610:813dcc80987e 603 {
mbed_official 610:813dcc80987e 604 SPI_1LINE_RX(hspi);
mbed_official 610:813dcc80987e 605 }
mbed_official 610:813dcc80987e 606
mbed_official 610:813dcc80987e 607 /* Check if the SPI is already enabled */
mbed_official 610:813dcc80987e 608 if((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
mbed_official 610:813dcc80987e 609 {
mbed_official 610:813dcc80987e 610 /* Enable SPI peripheral */
mbed_official 610:813dcc80987e 611 __HAL_SPI_ENABLE(hspi);
mbed_official 610:813dcc80987e 612 }
mbed_official 610:813dcc80987e 613
mbed_official 610:813dcc80987e 614 if(hspi->Init.DataSize <= SPI_DATASIZE_8BIT)
mbed_official 610:813dcc80987e 615 {
mbed_official 610:813dcc80987e 616 /* Transfer loop */
mbed_official 610:813dcc80987e 617 while(hspi->RxXferCount > 0)
mbed_official 610:813dcc80987e 618 {
mbed_official 610:813dcc80987e 619 /* Check the RXNE flag */
mbed_official 610:813dcc80987e 620 if((hspi->Instance->SR & SPI_FLAG_RXNE) == SPI_FLAG_RXNE)
mbed_official 610:813dcc80987e 621 {
mbed_official 610:813dcc80987e 622 /* read the received data */
mbed_official 610:813dcc80987e 623 (*hspi->pRxBuffPtr++)= *(__IO uint8_t *)&hspi->Instance->DR;
mbed_official 610:813dcc80987e 624 hspi->RxXferCount--;
mbed_official 610:813dcc80987e 625 }
mbed_official 610:813dcc80987e 626 else
mbed_official 610:813dcc80987e 627 {
mbed_official 610:813dcc80987e 628 /* Timeout management */
mbed_official 610:813dcc80987e 629 if((Timeout == 0) || ((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick()-tickstart) >= Timeout)))
mbed_official 610:813dcc80987e 630 {
mbed_official 610:813dcc80987e 631 errorcode = HAL_TIMEOUT;
mbed_official 610:813dcc80987e 632 goto error;
mbed_official 610:813dcc80987e 633 }
mbed_official 610:813dcc80987e 634 }
mbed_official 610:813dcc80987e 635 }
mbed_official 610:813dcc80987e 636 }
mbed_official 610:813dcc80987e 637 else
mbed_official 610:813dcc80987e 638 {
mbed_official 610:813dcc80987e 639 /* Transfer loop */
mbed_official 610:813dcc80987e 640 while(hspi->RxXferCount > 0)
mbed_official 610:813dcc80987e 641 {
mbed_official 610:813dcc80987e 642 /* Check the RXNE flag */
mbed_official 610:813dcc80987e 643 if((hspi->Instance->SR & SPI_FLAG_RXNE) == SPI_FLAG_RXNE)
mbed_official 610:813dcc80987e 644 {
mbed_official 610:813dcc80987e 645 *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
mbed_official 610:813dcc80987e 646 hspi->pRxBuffPtr += sizeof(uint16_t);
mbed_official 610:813dcc80987e 647 hspi->RxXferCount--;
mbed_official 610:813dcc80987e 648 }
mbed_official 610:813dcc80987e 649 else
mbed_official 610:813dcc80987e 650 {
mbed_official 610:813dcc80987e 651 /* Timeout management */
mbed_official 610:813dcc80987e 652 if((Timeout == 0) || ((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick()-tickstart) >= Timeout)))
mbed_official 610:813dcc80987e 653 {
mbed_official 610:813dcc80987e 654 errorcode = HAL_TIMEOUT;
mbed_official 610:813dcc80987e 655 goto error;
mbed_official 610:813dcc80987e 656 }
mbed_official 610:813dcc80987e 657 }
mbed_official 610:813dcc80987e 658 }
mbed_official 610:813dcc80987e 659 }
mbed_official 610:813dcc80987e 660
mbed_official 610:813dcc80987e 661 /* Handle the CRC Transmission */
mbed_official 610:813dcc80987e 662 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
mbed_official 610:813dcc80987e 663 {
mbed_official 610:813dcc80987e 664 /* freeze the CRC before the latest data */
mbed_official 610:813dcc80987e 665 hspi->Instance->CR1|= SPI_CR1_CRCNEXT;
mbed_official 610:813dcc80987e 666
mbed_official 610:813dcc80987e 667 /* Read the latest data */
mbed_official 610:813dcc80987e 668 if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, Timeout) != HAL_OK)
mbed_official 610:813dcc80987e 669 {
mbed_official 610:813dcc80987e 670 /* the latest data has not been received */
mbed_official 610:813dcc80987e 671 errorcode = HAL_TIMEOUT;
mbed_official 610:813dcc80987e 672 goto error;
mbed_official 610:813dcc80987e 673 }
mbed_official 610:813dcc80987e 674
mbed_official 610:813dcc80987e 675 /* Receive last data in 16 Bit mode */
mbed_official 610:813dcc80987e 676 if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
mbed_official 610:813dcc80987e 677 {
mbed_official 610:813dcc80987e 678 *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
mbed_official 610:813dcc80987e 679 }
mbed_official 610:813dcc80987e 680 /* Receive last data in 8 Bit mode */
mbed_official 610:813dcc80987e 681 else
mbed_official 610:813dcc80987e 682 {
mbed_official 610:813dcc80987e 683 *hspi->pRxBuffPtr = *(__IO uint8_t *)&hspi->Instance->DR;
mbed_official 610:813dcc80987e 684 }
mbed_official 610:813dcc80987e 685
mbed_official 610:813dcc80987e 686 /* Wait until TXE flag */
mbed_official 610:813dcc80987e 687 if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, Timeout) != HAL_OK)
mbed_official 610:813dcc80987e 688 {
mbed_official 610:813dcc80987e 689 /* Flag Error*/
mbed_official 610:813dcc80987e 690 hspi->ErrorCode = HAL_SPI_ERROR_CRC;
mbed_official 610:813dcc80987e 691 errorcode = HAL_TIMEOUT;
mbed_official 610:813dcc80987e 692 goto error;
mbed_official 610:813dcc80987e 693 }
mbed_official 610:813dcc80987e 694
mbed_official 610:813dcc80987e 695 if(hspi->Init.DataSize == SPI_DATASIZE_16BIT)
mbed_official 610:813dcc80987e 696 {
mbed_official 610:813dcc80987e 697 tmpreg = hspi->Instance->DR;
mbed_official 610:813dcc80987e 698 UNUSED(tmpreg); /* To avoid GCC warning */
mbed_official 610:813dcc80987e 699 }
mbed_official 610:813dcc80987e 700 else
mbed_official 610:813dcc80987e 701 {
mbed_official 610:813dcc80987e 702 tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
mbed_official 610:813dcc80987e 703 UNUSED(tmpreg); /* To avoid GCC warning */
mbed_official 610:813dcc80987e 704
mbed_official 610:813dcc80987e 705 if((hspi->Init.DataSize == SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT))
mbed_official 610:813dcc80987e 706 {
mbed_official 610:813dcc80987e 707 if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, Timeout) != HAL_OK)
mbed_official 610:813dcc80987e 708 {
mbed_official 610:813dcc80987e 709 /* Error on the CRC reception */
mbed_official 610:813dcc80987e 710 hspi->ErrorCode = HAL_SPI_ERROR_CRC;
mbed_official 610:813dcc80987e 711 errorcode = HAL_TIMEOUT;
mbed_official 610:813dcc80987e 712 goto error;
mbed_official 610:813dcc80987e 713 }
mbed_official 610:813dcc80987e 714 tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
mbed_official 610:813dcc80987e 715 UNUSED(tmpreg); /* To avoid GCC warning */
mbed_official 610:813dcc80987e 716 }
mbed_official 610:813dcc80987e 717 }
mbed_official 610:813dcc80987e 718 }
mbed_official 610:813dcc80987e 719
mbed_official 610:813dcc80987e 720 /* Check the end of the transaction */
mbed_official 610:813dcc80987e 721 if(SPI_EndRxTransaction(hspi,Timeout) != HAL_OK)
mbed_official 610:813dcc80987e 722 {
mbed_official 610:813dcc80987e 723 hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
mbed_official 610:813dcc80987e 724 }
mbed_official 610:813dcc80987e 725
mbed_official 610:813dcc80987e 726 /* Check if CRC error occurred */
mbed_official 610:813dcc80987e 727 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
mbed_official 610:813dcc80987e 728 {
mbed_official 610:813dcc80987e 729 hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
mbed_official 610:813dcc80987e 730 __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
mbed_official 610:813dcc80987e 731 }
mbed_official 610:813dcc80987e 732
mbed_official 610:813dcc80987e 733 if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
mbed_official 610:813dcc80987e 734 {
mbed_official 610:813dcc80987e 735 errorcode = HAL_ERROR;
mbed_official 610:813dcc80987e 736 }
mbed_official 610:813dcc80987e 737
mbed_official 610:813dcc80987e 738 error :
mbed_official 610:813dcc80987e 739 hspi->State = HAL_SPI_STATE_READY;
mbed_official 610:813dcc80987e 740 __HAL_UNLOCK(hspi);
mbed_official 610:813dcc80987e 741 return errorcode;
mbed_official 610:813dcc80987e 742 }
mbed_official 610:813dcc80987e 743
mbed_official 610:813dcc80987e 744 /**
mbed_official 610:813dcc80987e 745 * @brief Transmit and Receive an amount of data in blocking mode.
mbed_official 610:813dcc80987e 746 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 747 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 748 * @param pTxData: pointer to transmission data buffer
mbed_official 610:813dcc80987e 749 * @param pRxData: pointer to reception data buffer
mbed_official 610:813dcc80987e 750 * @param Size: amount of data to be sent and received
mbed_official 610:813dcc80987e 751 * @param Timeout: Timeout duration
mbed_official 610:813dcc80987e 752 * @retval HAL status
mbed_official 610:813dcc80987e 753 */
mbed_official 610:813dcc80987e 754 HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
mbed_official 610:813dcc80987e 755 {
mbed_official 610:813dcc80987e 756 __IO uint16_t tmpreg;
mbed_official 610:813dcc80987e 757 uint32_t tickstart = HAL_GetTick();
mbed_official 610:813dcc80987e 758 HAL_StatusTypeDef errorcode = HAL_OK;
mbed_official 610:813dcc80987e 759
mbed_official 610:813dcc80987e 760 assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
mbed_official 610:813dcc80987e 761
mbed_official 610:813dcc80987e 762 /* Process Locked */
mbed_official 610:813dcc80987e 763 __HAL_LOCK(hspi);
mbed_official 610:813dcc80987e 764
mbed_official 610:813dcc80987e 765 if(hspi->State != HAL_SPI_STATE_READY)
mbed_official 610:813dcc80987e 766 {
mbed_official 610:813dcc80987e 767 errorcode = HAL_BUSY;
mbed_official 610:813dcc80987e 768 goto error;
mbed_official 610:813dcc80987e 769 }
mbed_official 610:813dcc80987e 770
mbed_official 610:813dcc80987e 771 if((pTxData == NULL) || (pRxData == NULL) || (Size == 0))
mbed_official 610:813dcc80987e 772 {
mbed_official 610:813dcc80987e 773 errorcode = HAL_ERROR;
mbed_official 610:813dcc80987e 774 goto error;
mbed_official 610:813dcc80987e 775 }
mbed_official 610:813dcc80987e 776
mbed_official 610:813dcc80987e 777 hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
mbed_official 610:813dcc80987e 778 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
mbed_official 610:813dcc80987e 779 hspi->pRxBuffPtr = pRxData;
mbed_official 610:813dcc80987e 780 hspi->RxXferCount = Size;
mbed_official 610:813dcc80987e 781 hspi->RxXferSize = Size;
mbed_official 610:813dcc80987e 782 hspi->pTxBuffPtr = pTxData;
mbed_official 610:813dcc80987e 783 hspi->TxXferCount = Size;
mbed_official 610:813dcc80987e 784 hspi->TxXferSize = Size;
mbed_official 610:813dcc80987e 785
mbed_official 610:813dcc80987e 786 /* Reset CRC Calculation */
mbed_official 610:813dcc80987e 787 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
mbed_official 610:813dcc80987e 788 {
mbed_official 610:813dcc80987e 789 SPI_RESET_CRC(hspi);
mbed_official 610:813dcc80987e 790 }
mbed_official 610:813dcc80987e 791
mbed_official 610:813dcc80987e 792 /* Set the Rx Fido threshold */
mbed_official 610:813dcc80987e 793 if((hspi->Init.DataSize > SPI_DATASIZE_8BIT) || (hspi->RxXferCount > 1))
mbed_official 610:813dcc80987e 794 {
mbed_official 610:813dcc80987e 795 /* set fiforxthreshold according the reception data length: 16bit */
mbed_official 610:813dcc80987e 796 CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
mbed_official 610:813dcc80987e 797 }
mbed_official 610:813dcc80987e 798 else
mbed_official 610:813dcc80987e 799 {
mbed_official 610:813dcc80987e 800 /* set fiforxthreshold according the reception data length: 8bit */
mbed_official 610:813dcc80987e 801 SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
mbed_official 610:813dcc80987e 802 }
mbed_official 610:813dcc80987e 803
mbed_official 610:813dcc80987e 804 /* Check if the SPI is already enabled */
mbed_official 610:813dcc80987e 805 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
mbed_official 610:813dcc80987e 806 {
mbed_official 610:813dcc80987e 807 /* Enable SPI peripheral */
mbed_official 610:813dcc80987e 808 __HAL_SPI_ENABLE(hspi);
mbed_official 610:813dcc80987e 809 }
mbed_official 610:813dcc80987e 810
mbed_official 610:813dcc80987e 811 /* Transmit and Receive data in 16 Bit mode */
mbed_official 610:813dcc80987e 812 if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
mbed_official 610:813dcc80987e 813 {
mbed_official 610:813dcc80987e 814 while ((hspi->TxXferCount > 0 ) || (hspi->RxXferCount > 0))
mbed_official 610:813dcc80987e 815 {
mbed_official 610:813dcc80987e 816 /* Check TXE flag */
mbed_official 610:813dcc80987e 817 if((hspi->TxXferCount > 0) && ((hspi->Instance->SR & SPI_FLAG_TXE) == SPI_FLAG_TXE))
mbed_official 610:813dcc80987e 818 {
mbed_official 610:813dcc80987e 819 hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
mbed_official 610:813dcc80987e 820 hspi->pTxBuffPtr += sizeof(uint16_t);
mbed_official 610:813dcc80987e 821 hspi->TxXferCount--;
mbed_official 610:813dcc80987e 822
mbed_official 610:813dcc80987e 823 /* Enable CRC Transmission */
mbed_official 610:813dcc80987e 824 if((hspi->TxXferCount == 0) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
mbed_official 610:813dcc80987e 825 {
mbed_official 610:813dcc80987e 826 hspi->Instance->CR1|= SPI_CR1_CRCNEXT;
mbed_official 610:813dcc80987e 827 }
mbed_official 610:813dcc80987e 828 }
mbed_official 610:813dcc80987e 829
mbed_official 610:813dcc80987e 830 /* Check RXNE flag */
mbed_official 610:813dcc80987e 831 if((hspi->RxXferCount > 0) && ((hspi->Instance->SR & SPI_FLAG_RXNE) == SPI_FLAG_RXNE))
mbed_official 610:813dcc80987e 832 {
mbed_official 610:813dcc80987e 833 *((uint16_t *)hspi->pRxBuffPtr) = hspi->Instance->DR;
mbed_official 610:813dcc80987e 834 hspi->pRxBuffPtr += sizeof(uint16_t);
mbed_official 610:813dcc80987e 835 hspi->RxXferCount--;
mbed_official 610:813dcc80987e 836 }
mbed_official 610:813dcc80987e 837 if((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick()-tickstart) >= Timeout))
mbed_official 610:813dcc80987e 838 {
mbed_official 610:813dcc80987e 839 errorcode = HAL_TIMEOUT;
mbed_official 610:813dcc80987e 840 goto error;
mbed_official 610:813dcc80987e 841 }
mbed_official 610:813dcc80987e 842 }
mbed_official 610:813dcc80987e 843 }
mbed_official 610:813dcc80987e 844 /* Transmit and Receive data in 8 Bit mode */
mbed_official 610:813dcc80987e 845 else
mbed_official 610:813dcc80987e 846 {
mbed_official 610:813dcc80987e 847 while((hspi->TxXferCount > 0) || (hspi->RxXferCount > 0))
mbed_official 610:813dcc80987e 848 {
mbed_official 610:813dcc80987e 849 /* check TXE flag */
mbed_official 610:813dcc80987e 850 if((hspi->TxXferCount > 0) && ((hspi->Instance->SR & SPI_FLAG_TXE) == SPI_FLAG_TXE))
mbed_official 610:813dcc80987e 851 {
mbed_official 610:813dcc80987e 852 if(hspi->TxXferCount > 1)
mbed_official 610:813dcc80987e 853 {
mbed_official 610:813dcc80987e 854 hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
mbed_official 610:813dcc80987e 855 hspi->pTxBuffPtr += sizeof(uint16_t);
mbed_official 610:813dcc80987e 856 hspi->TxXferCount -= 2;
mbed_official 610:813dcc80987e 857 }
mbed_official 610:813dcc80987e 858 else
mbed_official 610:813dcc80987e 859 {
mbed_official 610:813dcc80987e 860 *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr++);
mbed_official 610:813dcc80987e 861 hspi->TxXferCount--;
mbed_official 610:813dcc80987e 862 }
mbed_official 610:813dcc80987e 863
mbed_official 610:813dcc80987e 864 /* Enable CRC Transmission */
mbed_official 610:813dcc80987e 865 if((hspi->TxXferCount == 0) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
mbed_official 610:813dcc80987e 866 {
mbed_official 610:813dcc80987e 867 hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
mbed_official 610:813dcc80987e 868 }
mbed_official 610:813dcc80987e 869 }
mbed_official 610:813dcc80987e 870
mbed_official 610:813dcc80987e 871 /* Wait until RXNE flag is reset */
mbed_official 610:813dcc80987e 872 if((hspi->RxXferCount > 0) && ((hspi->Instance->SR & SPI_FLAG_RXNE) == SPI_FLAG_RXNE))
mbed_official 610:813dcc80987e 873 {
mbed_official 610:813dcc80987e 874 if(hspi->RxXferCount > 1)
mbed_official 610:813dcc80987e 875 {
mbed_official 610:813dcc80987e 876 *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
mbed_official 610:813dcc80987e 877 hspi->pRxBuffPtr += sizeof(uint16_t);
mbed_official 610:813dcc80987e 878 hspi->RxXferCount -= 2;
mbed_official 610:813dcc80987e 879 if(hspi->RxXferCount <= 1)
mbed_official 610:813dcc80987e 880 {
mbed_official 610:813dcc80987e 881 /* set fiforxthresold before to switch on 8 bit data size */
mbed_official 610:813dcc80987e 882 SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
mbed_official 610:813dcc80987e 883 }
mbed_official 610:813dcc80987e 884 }
mbed_official 610:813dcc80987e 885 else
mbed_official 610:813dcc80987e 886 {
mbed_official 610:813dcc80987e 887 (*hspi->pRxBuffPtr++) = *(__IO uint8_t *)&hspi->Instance->DR;
mbed_official 610:813dcc80987e 888 hspi->RxXferCount--;
mbed_official 610:813dcc80987e 889 }
mbed_official 610:813dcc80987e 890 }
mbed_official 610:813dcc80987e 891 if((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick()-tickstart) >= Timeout))
mbed_official 610:813dcc80987e 892 {
mbed_official 610:813dcc80987e 893 errorcode = HAL_TIMEOUT;
mbed_official 610:813dcc80987e 894 goto error;
mbed_official 610:813dcc80987e 895 }
mbed_official 610:813dcc80987e 896 }
mbed_official 610:813dcc80987e 897 }
mbed_official 610:813dcc80987e 898
mbed_official 610:813dcc80987e 899 /* Read CRC from DR to close CRC calculation process */
mbed_official 610:813dcc80987e 900 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
mbed_official 610:813dcc80987e 901 {
mbed_official 610:813dcc80987e 902 /* Wait until TXE flag */
mbed_official 610:813dcc80987e 903 if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, Timeout) != HAL_OK)
mbed_official 610:813dcc80987e 904 {
mbed_official 610:813dcc80987e 905 /* Error on the CRC reception */
mbed_official 610:813dcc80987e 906 hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
mbed_official 610:813dcc80987e 907 errorcode = HAL_TIMEOUT;
mbed_official 610:813dcc80987e 908 goto error;
mbed_official 610:813dcc80987e 909 }
mbed_official 610:813dcc80987e 910
mbed_official 610:813dcc80987e 911 if(hspi->Init.DataSize == SPI_DATASIZE_16BIT)
mbed_official 610:813dcc80987e 912 {
mbed_official 610:813dcc80987e 913 tmpreg = hspi->Instance->DR;
mbed_official 610:813dcc80987e 914 UNUSED(tmpreg); /* To avoid GCC warning */
mbed_official 610:813dcc80987e 915 }
mbed_official 610:813dcc80987e 916 else
mbed_official 610:813dcc80987e 917 {
mbed_official 610:813dcc80987e 918 tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
mbed_official 610:813dcc80987e 919 UNUSED(tmpreg); /* To avoid GCC warning */
mbed_official 610:813dcc80987e 920
mbed_official 610:813dcc80987e 921 if(hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT)
mbed_official 610:813dcc80987e 922 {
mbed_official 610:813dcc80987e 923 if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, Timeout) != HAL_OK)
mbed_official 610:813dcc80987e 924 {
mbed_official 610:813dcc80987e 925 /* Error on the CRC reception */
mbed_official 610:813dcc80987e 926 hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
mbed_official 610:813dcc80987e 927 errorcode = HAL_TIMEOUT;
mbed_official 610:813dcc80987e 928 goto error;
mbed_official 610:813dcc80987e 929 }
mbed_official 610:813dcc80987e 930 tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
mbed_official 610:813dcc80987e 931 UNUSED(tmpreg); /* To avoid GCC warning */
mbed_official 610:813dcc80987e 932 }
mbed_official 610:813dcc80987e 933 }
mbed_official 610:813dcc80987e 934 }
mbed_official 610:813dcc80987e 935
mbed_official 610:813dcc80987e 936 /* Check if CRC error occurred */
mbed_official 610:813dcc80987e 937 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
mbed_official 610:813dcc80987e 938 {
mbed_official 610:813dcc80987e 939 hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
mbed_official 610:813dcc80987e 940 /* Clear CRC Flag */
mbed_official 610:813dcc80987e 941 __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
mbed_official 610:813dcc80987e 942
mbed_official 610:813dcc80987e 943 errorcode = HAL_ERROR;
mbed_official 610:813dcc80987e 944 }
mbed_official 610:813dcc80987e 945
mbed_official 610:813dcc80987e 946 /* Check the end of the transaction */
mbed_official 610:813dcc80987e 947 if(SPI_EndRxTxTransaction(hspi,Timeout) != HAL_OK)
mbed_official 610:813dcc80987e 948 {
mbed_official 610:813dcc80987e 949 hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
mbed_official 610:813dcc80987e 950 }
mbed_official 610:813dcc80987e 951
mbed_official 610:813dcc80987e 952 if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
mbed_official 610:813dcc80987e 953 {
mbed_official 610:813dcc80987e 954 errorcode = HAL_ERROR;
mbed_official 610:813dcc80987e 955 }
mbed_official 610:813dcc80987e 956
mbed_official 610:813dcc80987e 957 error :
mbed_official 610:813dcc80987e 958 hspi->State = HAL_SPI_STATE_READY;
mbed_official 610:813dcc80987e 959 __HAL_UNLOCK(hspi);
mbed_official 610:813dcc80987e 960 return errorcode;
mbed_official 610:813dcc80987e 961 }
mbed_official 610:813dcc80987e 962
mbed_official 610:813dcc80987e 963 /**
mbed_official 610:813dcc80987e 964 * @brief Transmit an amount of data in non-blocking mode with Interrupt.
mbed_official 610:813dcc80987e 965 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 966 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 967 * @param pData: pointer to data buffer
mbed_official 610:813dcc80987e 968 * @param Size: amount of data to be sent
mbed_official 610:813dcc80987e 969 * @retval HAL status
mbed_official 610:813dcc80987e 970 */
mbed_official 610:813dcc80987e 971 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
mbed_official 610:813dcc80987e 972 {
mbed_official 610:813dcc80987e 973 HAL_StatusTypeDef errorcode = HAL_OK;
mbed_official 610:813dcc80987e 974 assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
mbed_official 610:813dcc80987e 975
mbed_official 610:813dcc80987e 976 /* Process Locked */
mbed_official 610:813dcc80987e 977 __HAL_LOCK(hspi);
mbed_official 610:813dcc80987e 978
mbed_official 610:813dcc80987e 979 if((pData == NULL) || (Size == 0))
mbed_official 610:813dcc80987e 980 {
mbed_official 610:813dcc80987e 981 errorcode = HAL_ERROR;
mbed_official 610:813dcc80987e 982 goto error;
mbed_official 610:813dcc80987e 983 }
mbed_official 610:813dcc80987e 984
mbed_official 610:813dcc80987e 985 if(hspi->State != HAL_SPI_STATE_READY)
mbed_official 610:813dcc80987e 986 {
mbed_official 610:813dcc80987e 987 errorcode = HAL_BUSY;
mbed_official 610:813dcc80987e 988 goto error;
mbed_official 610:813dcc80987e 989 }
mbed_official 610:813dcc80987e 990
mbed_official 610:813dcc80987e 991 /* prepare the transfer */
mbed_official 610:813dcc80987e 992 hspi->State = HAL_SPI_STATE_BUSY_TX;
mbed_official 610:813dcc80987e 993 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
mbed_official 610:813dcc80987e 994 hspi->pTxBuffPtr = pData;
mbed_official 610:813dcc80987e 995 hspi->TxXferSize = Size;
mbed_official 610:813dcc80987e 996 hspi->TxXferCount = Size;
mbed_official 610:813dcc80987e 997 hspi->pRxBuffPtr = (uint8_t *)NULL;
mbed_official 610:813dcc80987e 998 hspi->RxXferSize = 0;
mbed_official 610:813dcc80987e 999 hspi->RxXferCount = 0;
mbed_official 610:813dcc80987e 1000 hspi->RxISR = NULL;
mbed_official 610:813dcc80987e 1001
mbed_official 610:813dcc80987e 1002 /* Set the function for IT treatment */
mbed_official 610:813dcc80987e 1003 if(hspi->Init.DataSize > SPI_DATASIZE_8BIT )
mbed_official 610:813dcc80987e 1004 {
mbed_official 610:813dcc80987e 1005 hspi->TxISR = SPI_TxISR_16BIT;
mbed_official 610:813dcc80987e 1006 }
mbed_official 610:813dcc80987e 1007 else
mbed_official 610:813dcc80987e 1008 {
mbed_official 610:813dcc80987e 1009 hspi->TxISR = SPI_TxISR_8BIT;
mbed_official 610:813dcc80987e 1010 }
mbed_official 610:813dcc80987e 1011
mbed_official 610:813dcc80987e 1012 /* Configure communication direction : 1Line */
mbed_official 610:813dcc80987e 1013 if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
mbed_official 610:813dcc80987e 1014 {
mbed_official 610:813dcc80987e 1015 SPI_1LINE_TX(hspi);
mbed_official 610:813dcc80987e 1016 }
mbed_official 610:813dcc80987e 1017
mbed_official 610:813dcc80987e 1018 /* Reset CRC Calculation */
mbed_official 610:813dcc80987e 1019 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
mbed_official 610:813dcc80987e 1020 {
mbed_official 610:813dcc80987e 1021 SPI_RESET_CRC(hspi);
mbed_official 610:813dcc80987e 1022 }
mbed_official 610:813dcc80987e 1023
mbed_official 610:813dcc80987e 1024 /* Enable TXE and ERR interrupt */
mbed_official 610:813dcc80987e 1025 __HAL_SPI_ENABLE_IT(hspi,(SPI_IT_TXE));
mbed_official 610:813dcc80987e 1026
mbed_official 610:813dcc80987e 1027
mbed_official 610:813dcc80987e 1028 /* Check if the SPI is already enabled */
mbed_official 610:813dcc80987e 1029 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
mbed_official 610:813dcc80987e 1030 {
mbed_official 610:813dcc80987e 1031 /* Enable SPI peripheral */
mbed_official 610:813dcc80987e 1032 __HAL_SPI_ENABLE(hspi);
mbed_official 610:813dcc80987e 1033 }
mbed_official 610:813dcc80987e 1034
mbed_official 610:813dcc80987e 1035 error :
mbed_official 610:813dcc80987e 1036 __HAL_UNLOCK(hspi);
mbed_official 610:813dcc80987e 1037 return errorcode;
mbed_official 610:813dcc80987e 1038 }
mbed_official 610:813dcc80987e 1039
mbed_official 610:813dcc80987e 1040 /**
mbed_official 610:813dcc80987e 1041 * @brief Receive an amount of data in non-blocking mode with Interrupt.
mbed_official 610:813dcc80987e 1042 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 1043 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 1044 * @param pData: pointer to data buffer
mbed_official 610:813dcc80987e 1045 * @param Size: amount of data to be sent
mbed_official 610:813dcc80987e 1046 * @retval HAL status
mbed_official 610:813dcc80987e 1047 */
mbed_official 610:813dcc80987e 1048 HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
mbed_official 610:813dcc80987e 1049 {
mbed_official 610:813dcc80987e 1050 HAL_StatusTypeDef errorcode = HAL_OK;
mbed_official 610:813dcc80987e 1051
mbed_official 610:813dcc80987e 1052 /* Process Locked */
mbed_official 610:813dcc80987e 1053 __HAL_LOCK(hspi);
mbed_official 610:813dcc80987e 1054
mbed_official 610:813dcc80987e 1055 if(hspi->State != HAL_SPI_STATE_READY)
mbed_official 610:813dcc80987e 1056 {
mbed_official 610:813dcc80987e 1057 errorcode = HAL_BUSY;
mbed_official 610:813dcc80987e 1058 goto error;
mbed_official 610:813dcc80987e 1059 }
mbed_official 610:813dcc80987e 1060 if((pData == NULL) || (Size == 0))
mbed_official 610:813dcc80987e 1061 {
mbed_official 610:813dcc80987e 1062 errorcode = HAL_ERROR;
mbed_official 610:813dcc80987e 1063 goto error;
mbed_official 610:813dcc80987e 1064 }
mbed_official 610:813dcc80987e 1065
mbed_official 610:813dcc80987e 1066 /* Configure communication */
mbed_official 610:813dcc80987e 1067 hspi->State = HAL_SPI_STATE_BUSY_RX;
mbed_official 610:813dcc80987e 1068 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
mbed_official 610:813dcc80987e 1069 hspi->pRxBuffPtr = pData;
mbed_official 610:813dcc80987e 1070 hspi->RxXferSize = Size;
mbed_official 610:813dcc80987e 1071 hspi->RxXferCount = Size;
mbed_official 610:813dcc80987e 1072 hspi->pTxBuffPtr = (uint8_t *)NULL;
mbed_official 610:813dcc80987e 1073 hspi->TxXferSize = 0;
mbed_official 610:813dcc80987e 1074 hspi->TxXferCount = 0;
mbed_official 610:813dcc80987e 1075
mbed_official 610:813dcc80987e 1076 if((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
mbed_official 610:813dcc80987e 1077 {
mbed_official 610:813dcc80987e 1078 /* Process Unlocked */
mbed_official 610:813dcc80987e 1079 __HAL_UNLOCK(hspi);
mbed_official 610:813dcc80987e 1080 /* the receive process is not supported in 2Lines direction master mode */
mbed_official 610:813dcc80987e 1081 /* in this we call the TransmitReceive process */
mbed_official 610:813dcc80987e 1082 return HAL_SPI_TransmitReceive_IT(hspi,pData,pData,Size);
mbed_official 610:813dcc80987e 1083 }
mbed_official 610:813dcc80987e 1084
mbed_official 610:813dcc80987e 1085 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
mbed_official 610:813dcc80987e 1086 {
mbed_official 610:813dcc80987e 1087 hspi->CRCSize = 1;
mbed_official 610:813dcc80987e 1088 if((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT))
mbed_official 610:813dcc80987e 1089 {
mbed_official 610:813dcc80987e 1090 hspi->CRCSize = 2;
mbed_official 610:813dcc80987e 1091 }
mbed_official 610:813dcc80987e 1092 }
mbed_official 610:813dcc80987e 1093 else
mbed_official 610:813dcc80987e 1094 {
mbed_official 610:813dcc80987e 1095 hspi->CRCSize = 0;
mbed_official 610:813dcc80987e 1096 }
mbed_official 610:813dcc80987e 1097
mbed_official 610:813dcc80987e 1098 hspi->TxISR = NULL;
mbed_official 610:813dcc80987e 1099 /* check the data size to adapt Rx threshold and the set the function for IT treatment */
mbed_official 610:813dcc80987e 1100 if(hspi->Init.DataSize > SPI_DATASIZE_8BIT )
mbed_official 610:813dcc80987e 1101 {
mbed_official 610:813dcc80987e 1102 /* set fiforxthresold according the reception data length: 16 bit */
mbed_official 610:813dcc80987e 1103 CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
mbed_official 610:813dcc80987e 1104 hspi->RxISR = SPI_RxISR_16BIT;
mbed_official 610:813dcc80987e 1105 }
mbed_official 610:813dcc80987e 1106 else
mbed_official 610:813dcc80987e 1107 {
mbed_official 610:813dcc80987e 1108 /* set fiforxthresold according the reception data length: 8 bit */
mbed_official 610:813dcc80987e 1109 SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
mbed_official 610:813dcc80987e 1110 hspi->RxISR = SPI_RxISR_8BIT;
mbed_official 610:813dcc80987e 1111 }
mbed_official 610:813dcc80987e 1112
mbed_official 610:813dcc80987e 1113 /* Configure communication direction : 1Line */
mbed_official 610:813dcc80987e 1114 if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
mbed_official 610:813dcc80987e 1115 {
mbed_official 610:813dcc80987e 1116 SPI_1LINE_RX(hspi);
mbed_official 610:813dcc80987e 1117 }
mbed_official 610:813dcc80987e 1118
mbed_official 610:813dcc80987e 1119 /* Reset CRC Calculation */
mbed_official 610:813dcc80987e 1120 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
mbed_official 610:813dcc80987e 1121 {
mbed_official 610:813dcc80987e 1122 SPI_RESET_CRC(hspi);
mbed_official 610:813dcc80987e 1123 }
mbed_official 610:813dcc80987e 1124
mbed_official 610:813dcc80987e 1125 /* Enable TXE and ERR interrupt */
mbed_official 610:813dcc80987e 1126 __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
mbed_official 610:813dcc80987e 1127
mbed_official 610:813dcc80987e 1128 /* Check if the SPI is already enabled */
mbed_official 610:813dcc80987e 1129 if((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
mbed_official 610:813dcc80987e 1130 {
mbed_official 610:813dcc80987e 1131 /* Enable SPI peripheral */
mbed_official 610:813dcc80987e 1132 __HAL_SPI_ENABLE(hspi);
mbed_official 610:813dcc80987e 1133 }
mbed_official 610:813dcc80987e 1134
mbed_official 610:813dcc80987e 1135 error :
mbed_official 610:813dcc80987e 1136 /* Process Unlocked */
mbed_official 610:813dcc80987e 1137 __HAL_UNLOCK(hspi);
mbed_official 610:813dcc80987e 1138 return errorcode;
mbed_official 610:813dcc80987e 1139 }
mbed_official 610:813dcc80987e 1140
mbed_official 610:813dcc80987e 1141 /**
mbed_official 610:813dcc80987e 1142 * @brief Transmit and Receive an amount of data in non-blocking mode with Interrupt.
mbed_official 610:813dcc80987e 1143 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 1144 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 1145 * @param pTxData: pointer to transmission data buffer
mbed_official 610:813dcc80987e 1146 * @param pRxData: pointer to reception data buffer
mbed_official 610:813dcc80987e 1147 * @param Size: amount of data to be sent and received
mbed_official 610:813dcc80987e 1148 * @retval HAL status
mbed_official 610:813dcc80987e 1149 */
mbed_official 610:813dcc80987e 1150 HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
mbed_official 610:813dcc80987e 1151 {
mbed_official 610:813dcc80987e 1152 HAL_StatusTypeDef errorcode = HAL_OK;
mbed_official 610:813dcc80987e 1153 assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
mbed_official 610:813dcc80987e 1154
mbed_official 610:813dcc80987e 1155 /* Process locked */
mbed_official 610:813dcc80987e 1156 __HAL_LOCK(hspi);
mbed_official 610:813dcc80987e 1157
mbed_official 610:813dcc80987e 1158 if(!((hspi->State == HAL_SPI_STATE_READY) || \
mbed_official 610:813dcc80987e 1159 ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->State == HAL_SPI_STATE_BUSY_RX))))
mbed_official 610:813dcc80987e 1160 {
mbed_official 610:813dcc80987e 1161 errorcode = HAL_BUSY;
mbed_official 610:813dcc80987e 1162 goto error;
mbed_official 610:813dcc80987e 1163 }
mbed_official 610:813dcc80987e 1164
mbed_official 610:813dcc80987e 1165 if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
mbed_official 610:813dcc80987e 1166 {
mbed_official 610:813dcc80987e 1167 errorcode = HAL_ERROR;
mbed_official 610:813dcc80987e 1168 goto error;
mbed_official 610:813dcc80987e 1169 }
mbed_official 610:813dcc80987e 1170
mbed_official 610:813dcc80987e 1171 hspi->CRCSize = 0;
mbed_official 610:813dcc80987e 1172 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
mbed_official 610:813dcc80987e 1173 {
mbed_official 610:813dcc80987e 1174 hspi->CRCSize = 1;
mbed_official 610:813dcc80987e 1175 if((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT))
mbed_official 610:813dcc80987e 1176 {
mbed_official 610:813dcc80987e 1177 hspi->CRCSize = 2;
mbed_official 610:813dcc80987e 1178 }
mbed_official 610:813dcc80987e 1179 }
mbed_official 610:813dcc80987e 1180
mbed_official 610:813dcc80987e 1181 if(hspi->State != HAL_SPI_STATE_BUSY_RX)
mbed_official 610:813dcc80987e 1182 {
mbed_official 610:813dcc80987e 1183 hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
mbed_official 610:813dcc80987e 1184 }
mbed_official 610:813dcc80987e 1185
mbed_official 610:813dcc80987e 1186 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
mbed_official 610:813dcc80987e 1187 hspi->pTxBuffPtr = pTxData;
mbed_official 610:813dcc80987e 1188 hspi->TxXferSize = Size;
mbed_official 610:813dcc80987e 1189 hspi->TxXferCount = Size;
mbed_official 610:813dcc80987e 1190 hspi->pRxBuffPtr = pRxData;
mbed_official 610:813dcc80987e 1191 hspi->RxXferSize = Size;
mbed_official 610:813dcc80987e 1192 hspi->RxXferCount = Size;
mbed_official 610:813dcc80987e 1193
mbed_official 610:813dcc80987e 1194 /* Set the function for IT treatment */
mbed_official 610:813dcc80987e 1195 if(hspi->Init.DataSize > SPI_DATASIZE_8BIT )
mbed_official 610:813dcc80987e 1196 {
mbed_official 610:813dcc80987e 1197 hspi->RxISR = SPI_2linesRxISR_16BIT;
mbed_official 610:813dcc80987e 1198 hspi->TxISR = SPI_2linesTxISR_16BIT;
mbed_official 610:813dcc80987e 1199 }
mbed_official 610:813dcc80987e 1200 else
mbed_official 610:813dcc80987e 1201 {
mbed_official 610:813dcc80987e 1202 hspi->RxISR = SPI_2linesRxISR_8BIT;
mbed_official 610:813dcc80987e 1203 hspi->TxISR = SPI_2linesTxISR_8BIT;
mbed_official 610:813dcc80987e 1204 }
mbed_official 610:813dcc80987e 1205
mbed_official 610:813dcc80987e 1206 /* Reset CRC Calculation */
mbed_official 610:813dcc80987e 1207 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
mbed_official 610:813dcc80987e 1208 {
mbed_official 610:813dcc80987e 1209 SPI_RESET_CRC(hspi);
mbed_official 610:813dcc80987e 1210 }
mbed_official 610:813dcc80987e 1211
mbed_official 610:813dcc80987e 1212 /* check if packing mode is enabled and if there is more than 2 data to receive */
mbed_official 610:813dcc80987e 1213 if((hspi->Init.DataSize > SPI_DATASIZE_8BIT) || (hspi->RxXferCount >= 2))
mbed_official 610:813dcc80987e 1214 {
mbed_official 610:813dcc80987e 1215 /* set fiforxthresold according the reception data length: 16 bit */
mbed_official 610:813dcc80987e 1216 CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
mbed_official 610:813dcc80987e 1217 }
mbed_official 610:813dcc80987e 1218 else
mbed_official 610:813dcc80987e 1219 {
mbed_official 610:813dcc80987e 1220 /* set fiforxthresold according the reception data length: 8 bit */
mbed_official 610:813dcc80987e 1221 SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
mbed_official 610:813dcc80987e 1222 }
mbed_official 610:813dcc80987e 1223
mbed_official 610:813dcc80987e 1224 /* Enable TXE, RXNE and ERR interrupt */
mbed_official 610:813dcc80987e 1225 __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
mbed_official 610:813dcc80987e 1226
mbed_official 610:813dcc80987e 1227 /* Check if the SPI is already enabled */
mbed_official 610:813dcc80987e 1228 if((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
mbed_official 610:813dcc80987e 1229 {
mbed_official 610:813dcc80987e 1230 /* Enable SPI peripheral */
mbed_official 610:813dcc80987e 1231 __HAL_SPI_ENABLE(hspi);
mbed_official 610:813dcc80987e 1232 }
mbed_official 610:813dcc80987e 1233
mbed_official 610:813dcc80987e 1234 error :
mbed_official 610:813dcc80987e 1235 /* Process Unlocked */
mbed_official 610:813dcc80987e 1236 __HAL_UNLOCK(hspi);
mbed_official 610:813dcc80987e 1237 return errorcode;
mbed_official 610:813dcc80987e 1238 }
mbed_official 610:813dcc80987e 1239
mbed_official 610:813dcc80987e 1240 /**
mbed_official 610:813dcc80987e 1241 * @brief Transmit an amount of data in non-blocking mode with DMA.
mbed_official 610:813dcc80987e 1242 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 1243 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 1244 * @param pData: pointer to data buffer
mbed_official 610:813dcc80987e 1245 * @param Size: amount of data to be sent
mbed_official 610:813dcc80987e 1246 * @retval HAL status
mbed_official 610:813dcc80987e 1247 */
mbed_official 610:813dcc80987e 1248 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
mbed_official 610:813dcc80987e 1249 {
mbed_official 610:813dcc80987e 1250 HAL_StatusTypeDef errorcode = HAL_OK;
mbed_official 610:813dcc80987e 1251 assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
mbed_official 610:813dcc80987e 1252
mbed_official 610:813dcc80987e 1253 /* Process Locked */
mbed_official 610:813dcc80987e 1254 __HAL_LOCK(hspi);
mbed_official 610:813dcc80987e 1255
mbed_official 610:813dcc80987e 1256 if(hspi->State != HAL_SPI_STATE_READY)
mbed_official 610:813dcc80987e 1257 {
mbed_official 610:813dcc80987e 1258 errorcode = HAL_BUSY;
mbed_official 610:813dcc80987e 1259 goto error;
mbed_official 610:813dcc80987e 1260 }
mbed_official 610:813dcc80987e 1261
mbed_official 610:813dcc80987e 1262 if((pData == NULL) || (Size == 0))
mbed_official 610:813dcc80987e 1263 {
mbed_official 610:813dcc80987e 1264 errorcode = HAL_ERROR;
mbed_official 610:813dcc80987e 1265 goto error;
mbed_official 610:813dcc80987e 1266 }
mbed_official 610:813dcc80987e 1267
mbed_official 610:813dcc80987e 1268 hspi->State = HAL_SPI_STATE_BUSY_TX;
mbed_official 610:813dcc80987e 1269 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
mbed_official 610:813dcc80987e 1270 hspi->pTxBuffPtr = pData;
mbed_official 610:813dcc80987e 1271 hspi->TxXferSize = Size;
mbed_official 610:813dcc80987e 1272 hspi->TxXferCount = Size;
mbed_official 610:813dcc80987e 1273 hspi->pRxBuffPtr = (uint8_t *)NULL;
mbed_official 610:813dcc80987e 1274 hspi->RxXferSize = 0;
mbed_official 610:813dcc80987e 1275 hspi->RxXferCount = 0;
mbed_official 610:813dcc80987e 1276
mbed_official 610:813dcc80987e 1277 /* Configure communication direction : 1Line */
mbed_official 610:813dcc80987e 1278 if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
mbed_official 610:813dcc80987e 1279 {
mbed_official 610:813dcc80987e 1280 SPI_1LINE_TX(hspi);
mbed_official 610:813dcc80987e 1281 }
mbed_official 610:813dcc80987e 1282
mbed_official 610:813dcc80987e 1283 /* Reset CRC Calculation */
mbed_official 610:813dcc80987e 1284 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
mbed_official 610:813dcc80987e 1285 {
mbed_official 610:813dcc80987e 1286 SPI_RESET_CRC(hspi);
mbed_official 610:813dcc80987e 1287 }
mbed_official 610:813dcc80987e 1288
mbed_official 610:813dcc80987e 1289 /* Set the SPI TxDMA Half transfer complete callback */
mbed_official 610:813dcc80987e 1290 hspi->hdmatx->XferHalfCpltCallback = SPI_DMAHalfTransmitCplt;
mbed_official 610:813dcc80987e 1291
mbed_official 610:813dcc80987e 1292 /* Set the SPI TxDMA transfer complete callback */
mbed_official 610:813dcc80987e 1293 hspi->hdmatx->XferCpltCallback = SPI_DMATransmitCplt;
mbed_official 610:813dcc80987e 1294
mbed_official 610:813dcc80987e 1295 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 1296 hspi->hdmatx->XferErrorCallback = SPI_DMAError;
mbed_official 610:813dcc80987e 1297
mbed_official 610:813dcc80987e 1298 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX);
mbed_official 610:813dcc80987e 1299 /* packing mode is enabled only if the DMA setting is HALWORD */
mbed_official 610:813dcc80987e 1300 if((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->hdmatx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD))
mbed_official 610:813dcc80987e 1301 {
mbed_official 610:813dcc80987e 1302 /* Check the even/odd of the data size + crc if enabled */
mbed_official 610:813dcc80987e 1303 if((hspi->TxXferCount & 0x1) == 0)
mbed_official 610:813dcc80987e 1304 {
mbed_official 610:813dcc80987e 1305 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX);
mbed_official 610:813dcc80987e 1306 hspi->TxXferCount = (hspi->TxXferCount >> 1);
mbed_official 610:813dcc80987e 1307 }
mbed_official 610:813dcc80987e 1308 else
mbed_official 610:813dcc80987e 1309 {
mbed_official 610:813dcc80987e 1310 SET_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX);
mbed_official 610:813dcc80987e 1311 hspi->TxXferCount = (hspi->TxXferCount >> 1) + 1;
mbed_official 610:813dcc80987e 1312 }
mbed_official 610:813dcc80987e 1313 }
mbed_official 610:813dcc80987e 1314
mbed_official 610:813dcc80987e 1315 /* Enable the Tx DMA channel */
mbed_official 610:813dcc80987e 1316 HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
mbed_official 610:813dcc80987e 1317
mbed_official 610:813dcc80987e 1318 /* Check if the SPI is already enabled */
mbed_official 610:813dcc80987e 1319 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
mbed_official 610:813dcc80987e 1320 {
mbed_official 610:813dcc80987e 1321 /* Enable SPI peripheral */
mbed_official 610:813dcc80987e 1322 __HAL_SPI_ENABLE(hspi);
mbed_official 610:813dcc80987e 1323 }
mbed_official 610:813dcc80987e 1324
mbed_official 610:813dcc80987e 1325 /* Enable Tx DMA Request */
mbed_official 610:813dcc80987e 1326 SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
mbed_official 610:813dcc80987e 1327
mbed_official 610:813dcc80987e 1328 error :
mbed_official 610:813dcc80987e 1329 /* Process Unlocked */
mbed_official 610:813dcc80987e 1330 __HAL_UNLOCK(hspi);
mbed_official 610:813dcc80987e 1331 return errorcode;
mbed_official 610:813dcc80987e 1332 }
mbed_official 610:813dcc80987e 1333
mbed_official 610:813dcc80987e 1334 /**
mbed_official 610:813dcc80987e 1335 * @brief Receive an amount of data in non-blocking mode with DMA.
mbed_official 610:813dcc80987e 1336 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 1337 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 1338 * @param pData: pointer to data buffer
mbed_official 610:813dcc80987e 1339 * @note When the CRC feature is enabled the pData Length must be Size + 1.
mbed_official 610:813dcc80987e 1340 * @param Size: amount of data to be sent
mbed_official 610:813dcc80987e 1341 * @retval HAL status
mbed_official 610:813dcc80987e 1342 */
mbed_official 610:813dcc80987e 1343 HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
mbed_official 610:813dcc80987e 1344 {
mbed_official 610:813dcc80987e 1345 HAL_StatusTypeDef errorcode = HAL_OK;
mbed_official 610:813dcc80987e 1346
mbed_official 610:813dcc80987e 1347 /* Process Locked */
mbed_official 610:813dcc80987e 1348 __HAL_LOCK(hspi);
mbed_official 610:813dcc80987e 1349
mbed_official 610:813dcc80987e 1350 if(hspi->State != HAL_SPI_STATE_READY)
mbed_official 610:813dcc80987e 1351 {
mbed_official 610:813dcc80987e 1352 errorcode = HAL_BUSY;
mbed_official 610:813dcc80987e 1353 goto error;
mbed_official 610:813dcc80987e 1354 }
mbed_official 610:813dcc80987e 1355
mbed_official 610:813dcc80987e 1356 if((pData == NULL) || (Size == 0))
mbed_official 610:813dcc80987e 1357 {
mbed_official 610:813dcc80987e 1358 errorcode = HAL_ERROR;
mbed_official 610:813dcc80987e 1359 goto error;
mbed_official 610:813dcc80987e 1360 }
mbed_official 610:813dcc80987e 1361
mbed_official 610:813dcc80987e 1362 hspi->State = HAL_SPI_STATE_BUSY_RX;
mbed_official 610:813dcc80987e 1363 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
mbed_official 610:813dcc80987e 1364 hspi->pRxBuffPtr = pData;
mbed_official 610:813dcc80987e 1365 hspi->RxXferSize = Size;
mbed_official 610:813dcc80987e 1366 hspi->RxXferCount = Size;
mbed_official 610:813dcc80987e 1367 hspi->pTxBuffPtr = (uint8_t *)NULL;
mbed_official 610:813dcc80987e 1368 hspi->TxXferSize = 0;
mbed_official 610:813dcc80987e 1369 hspi->TxXferCount = 0;
mbed_official 610:813dcc80987e 1370
mbed_official 610:813dcc80987e 1371 if((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
mbed_official 610:813dcc80987e 1372 {
mbed_official 610:813dcc80987e 1373 /* Process Unlocked */
mbed_official 610:813dcc80987e 1374 __HAL_UNLOCK(hspi);
mbed_official 610:813dcc80987e 1375 /* the receive process is not supported in 2Lines direction master mode */
mbed_official 610:813dcc80987e 1376 /* in this case we call the TransmitReceive process */
mbed_official 610:813dcc80987e 1377 return HAL_SPI_TransmitReceive_DMA(hspi,pData,pData,Size);
mbed_official 610:813dcc80987e 1378 }
mbed_official 610:813dcc80987e 1379
mbed_official 610:813dcc80987e 1380 /* Configure communication direction : 1Line */
mbed_official 610:813dcc80987e 1381 if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
mbed_official 610:813dcc80987e 1382 {
mbed_official 610:813dcc80987e 1383 SPI_1LINE_RX(hspi);
mbed_official 610:813dcc80987e 1384 }
mbed_official 610:813dcc80987e 1385
mbed_official 610:813dcc80987e 1386 /* Reset CRC Calculation */
mbed_official 610:813dcc80987e 1387 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
mbed_official 610:813dcc80987e 1388 {
mbed_official 610:813dcc80987e 1389 SPI_RESET_CRC(hspi);
mbed_official 610:813dcc80987e 1390 }
mbed_official 610:813dcc80987e 1391
mbed_official 610:813dcc80987e 1392 /* packing mode management is enabled by the DMA settings */
mbed_official 610:813dcc80987e 1393 if((hspi->Init.DataSize <= SPI_DATASIZE_8BIT) && (hspi->hdmarx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD))
mbed_official 610:813dcc80987e 1394 {
mbed_official 610:813dcc80987e 1395 /* Restriction the DMA data received is not allowed in this mode */
mbed_official 610:813dcc80987e 1396 errorcode = HAL_ERROR;
mbed_official 610:813dcc80987e 1397 goto error;
mbed_official 610:813dcc80987e 1398 }
mbed_official 610:813dcc80987e 1399
mbed_official 610:813dcc80987e 1400 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMARX);
mbed_official 610:813dcc80987e 1401 if( hspi->Init.DataSize > SPI_DATASIZE_8BIT)
mbed_official 610:813dcc80987e 1402 {
mbed_official 610:813dcc80987e 1403 /* set fiforxthresold according the reception data length: 16bit */
mbed_official 610:813dcc80987e 1404 CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
mbed_official 610:813dcc80987e 1405 }
mbed_official 610:813dcc80987e 1406 else
mbed_official 610:813dcc80987e 1407 {
mbed_official 610:813dcc80987e 1408 /* set fiforxthresold according the reception data length: 8bit */
mbed_official 610:813dcc80987e 1409 SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
mbed_official 610:813dcc80987e 1410 }
mbed_official 610:813dcc80987e 1411
mbed_official 610:813dcc80987e 1412 /* Set the SPI RxDMA Half transfer complete callback */
mbed_official 610:813dcc80987e 1413 hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
mbed_official 610:813dcc80987e 1414
mbed_official 610:813dcc80987e 1415 /* Set the SPI Rx DMA transfer complete callback */
mbed_official 610:813dcc80987e 1416 hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
mbed_official 610:813dcc80987e 1417
mbed_official 610:813dcc80987e 1418 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 1419 hspi->hdmarx->XferErrorCallback = SPI_DMAError;
mbed_official 610:813dcc80987e 1420
mbed_official 610:813dcc80987e 1421 /* Enable Rx DMA Request */
mbed_official 610:813dcc80987e 1422 SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
mbed_official 610:813dcc80987e 1423
mbed_official 610:813dcc80987e 1424 /* Enable the Rx DMA channel */
mbed_official 610:813dcc80987e 1425 HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
mbed_official 610:813dcc80987e 1426
mbed_official 610:813dcc80987e 1427 /* Check if the SPI is already enabled */
mbed_official 610:813dcc80987e 1428 if((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
mbed_official 610:813dcc80987e 1429 {
mbed_official 610:813dcc80987e 1430 /* Enable SPI peripheral */
mbed_official 610:813dcc80987e 1431 __HAL_SPI_ENABLE(hspi);
mbed_official 610:813dcc80987e 1432 }
mbed_official 610:813dcc80987e 1433
mbed_official 610:813dcc80987e 1434 error:
mbed_official 610:813dcc80987e 1435 /* Process Unlocked */
mbed_official 610:813dcc80987e 1436 __HAL_UNLOCK(hspi);
mbed_official 610:813dcc80987e 1437 return errorcode;
mbed_official 610:813dcc80987e 1438 }
mbed_official 610:813dcc80987e 1439
mbed_official 610:813dcc80987e 1440 /**
mbed_official 610:813dcc80987e 1441 * @brief Transmit and Receive an amount of data in non-blocking mode with DMA.
mbed_official 610:813dcc80987e 1442 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 1443 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 1444 * @param pTxData: pointer to transmission data buffer
mbed_official 610:813dcc80987e 1445 * @param pRxData: pointer to reception data buffer
mbed_official 610:813dcc80987e 1446 * @note When the CRC feature is enabled the pRxData Length must be Size + 1
mbed_official 610:813dcc80987e 1447 * @param Size: amount of data to be sent
mbed_official 610:813dcc80987e 1448 * @retval HAL status
mbed_official 610:813dcc80987e 1449 */
mbed_official 610:813dcc80987e 1450 HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
mbed_official 610:813dcc80987e 1451 {
mbed_official 610:813dcc80987e 1452 HAL_StatusTypeDef errorcode = HAL_OK;
mbed_official 610:813dcc80987e 1453 assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
mbed_official 610:813dcc80987e 1454
mbed_official 610:813dcc80987e 1455 /* Process locked */
mbed_official 610:813dcc80987e 1456 __HAL_LOCK(hspi);
mbed_official 610:813dcc80987e 1457
mbed_official 610:813dcc80987e 1458 if(!((hspi->State == HAL_SPI_STATE_READY) ||
mbed_official 610:813dcc80987e 1459 ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->State == HAL_SPI_STATE_BUSY_RX))))
mbed_official 610:813dcc80987e 1460 {
mbed_official 610:813dcc80987e 1461 errorcode = HAL_BUSY;
mbed_official 610:813dcc80987e 1462 goto error;
mbed_official 610:813dcc80987e 1463 }
mbed_official 610:813dcc80987e 1464
mbed_official 610:813dcc80987e 1465 if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
mbed_official 610:813dcc80987e 1466 {
mbed_official 610:813dcc80987e 1467 errorcode = HAL_ERROR;
mbed_official 610:813dcc80987e 1468 goto error;
mbed_official 610:813dcc80987e 1469 }
mbed_official 610:813dcc80987e 1470
mbed_official 610:813dcc80987e 1471 /* check if the transmit Receive function is not called by a receive master */
mbed_official 610:813dcc80987e 1472 if(hspi->State != HAL_SPI_STATE_BUSY_RX)
mbed_official 610:813dcc80987e 1473 {
mbed_official 610:813dcc80987e 1474 hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
mbed_official 610:813dcc80987e 1475 }
mbed_official 610:813dcc80987e 1476
mbed_official 610:813dcc80987e 1477 hspi->ErrorCode = HAL_SPI_ERROR_NONE;
mbed_official 610:813dcc80987e 1478 hspi->pTxBuffPtr = (uint8_t *)pTxData;
mbed_official 610:813dcc80987e 1479 hspi->TxXferSize = Size;
mbed_official 610:813dcc80987e 1480 hspi->TxXferCount = Size;
mbed_official 610:813dcc80987e 1481 hspi->pRxBuffPtr = (uint8_t *)pRxData;
mbed_official 610:813dcc80987e 1482 hspi->RxXferSize = Size;
mbed_official 610:813dcc80987e 1483 hspi->RxXferCount = Size;
mbed_official 610:813dcc80987e 1484
mbed_official 610:813dcc80987e 1485 /* Reset CRC Calculation + increase the rxsize */
mbed_official 610:813dcc80987e 1486 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
mbed_official 610:813dcc80987e 1487 {
mbed_official 610:813dcc80987e 1488 SPI_RESET_CRC(hspi);
mbed_official 610:813dcc80987e 1489 }
mbed_official 610:813dcc80987e 1490
mbed_official 610:813dcc80987e 1491 /* Reset the threshold bit */
mbed_official 610:813dcc80987e 1492 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX | SPI_CR2_LDMARX);
mbed_official 610:813dcc80987e 1493
mbed_official 610:813dcc80987e 1494 /* the packing mode management is enabled by the DMA settings according the spi data size */
mbed_official 610:813dcc80987e 1495 if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
mbed_official 610:813dcc80987e 1496 {
mbed_official 610:813dcc80987e 1497 /* set fiforxthreshold according the reception data length: 16bit */
mbed_official 610:813dcc80987e 1498 CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
mbed_official 610:813dcc80987e 1499 }
mbed_official 610:813dcc80987e 1500 else
mbed_official 610:813dcc80987e 1501 {
mbed_official 610:813dcc80987e 1502 /* set fiforxthresold according the reception data length: 8bit */
mbed_official 610:813dcc80987e 1503 SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
mbed_official 610:813dcc80987e 1504
mbed_official 610:813dcc80987e 1505 if(hspi->hdmatx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD)
mbed_official 610:813dcc80987e 1506 {
mbed_official 610:813dcc80987e 1507 if((hspi->TxXferSize & 0x1) == 0x0)
mbed_official 610:813dcc80987e 1508 {
mbed_official 610:813dcc80987e 1509 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX);
mbed_official 610:813dcc80987e 1510 hspi->TxXferCount = hspi->TxXferCount >> 1;
mbed_official 610:813dcc80987e 1511 }
mbed_official 610:813dcc80987e 1512 else
mbed_official 610:813dcc80987e 1513 {
mbed_official 610:813dcc80987e 1514 SET_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX);
mbed_official 610:813dcc80987e 1515 hspi->TxXferCount = (hspi->TxXferCount >> 1) + 1;
mbed_official 610:813dcc80987e 1516 }
mbed_official 610:813dcc80987e 1517 }
mbed_official 610:813dcc80987e 1518
mbed_official 610:813dcc80987e 1519 if(hspi->hdmarx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD)
mbed_official 610:813dcc80987e 1520 {
mbed_official 610:813dcc80987e 1521 /* set fiforxthresold according the reception data length: 16bit */
mbed_official 610:813dcc80987e 1522 CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
mbed_official 610:813dcc80987e 1523
mbed_official 610:813dcc80987e 1524 if((hspi->RxXferCount & 0x1) == 0x0 )
mbed_official 610:813dcc80987e 1525 {
mbed_official 610:813dcc80987e 1526 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMARX);
mbed_official 610:813dcc80987e 1527 hspi->RxXferCount = hspi->RxXferCount >> 1;
mbed_official 610:813dcc80987e 1528 }
mbed_official 610:813dcc80987e 1529 else
mbed_official 610:813dcc80987e 1530 {
mbed_official 610:813dcc80987e 1531 SET_BIT(hspi->Instance->CR2, SPI_CR2_LDMARX);
mbed_official 610:813dcc80987e 1532 hspi->RxXferCount = (hspi->RxXferCount >> 1) + 1;
mbed_official 610:813dcc80987e 1533 }
mbed_official 610:813dcc80987e 1534 }
mbed_official 610:813dcc80987e 1535 }
mbed_official 610:813dcc80987e 1536
mbed_official 610:813dcc80987e 1537 /* Set the SPI Rx DMA transfer complete callback if the transfer request is a
mbed_official 610:813dcc80987e 1538 reception request (RXNE) */
mbed_official 610:813dcc80987e 1539 if(hspi->State == HAL_SPI_STATE_BUSY_RX)
mbed_official 610:813dcc80987e 1540 {
mbed_official 610:813dcc80987e 1541 /* Set the SPI Rx DMA Half transfer complete callback */
mbed_official 610:813dcc80987e 1542 hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
mbed_official 610:813dcc80987e 1543 hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
mbed_official 610:813dcc80987e 1544 }
mbed_official 610:813dcc80987e 1545 else
mbed_official 610:813dcc80987e 1546 {
mbed_official 610:813dcc80987e 1547 /* Set the SPI Rx DMA Half transfer complete callback */
mbed_official 610:813dcc80987e 1548 hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfTransmitReceiveCplt;
mbed_official 610:813dcc80987e 1549 hspi->hdmarx->XferCpltCallback = SPI_DMATransmitReceiveCplt;
mbed_official 610:813dcc80987e 1550 }
mbed_official 610:813dcc80987e 1551
mbed_official 610:813dcc80987e 1552 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 1553 hspi->hdmarx->XferErrorCallback = SPI_DMAError;
mbed_official 610:813dcc80987e 1554
mbed_official 610:813dcc80987e 1555 /* Enable Rx DMA Request */
mbed_official 610:813dcc80987e 1556 SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
mbed_official 610:813dcc80987e 1557
mbed_official 610:813dcc80987e 1558 /* Enable the Rx DMA channel */
mbed_official 610:813dcc80987e 1559 HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t) hspi->pRxBuffPtr, hspi->RxXferCount);
mbed_official 610:813dcc80987e 1560
mbed_official 610:813dcc80987e 1561 /* Set the SPI Tx DMA transfer complete callback as NULL because the communication closing
mbed_official 610:813dcc80987e 1562 is performed in DMA reception complete callback */
mbed_official 610:813dcc80987e 1563 hspi->hdmatx->XferHalfCpltCallback = NULL;
mbed_official 610:813dcc80987e 1564 hspi->hdmatx->XferCpltCallback = NULL;
mbed_official 610:813dcc80987e 1565
mbed_official 610:813dcc80987e 1566 /* Set the DMA error callback */
mbed_official 610:813dcc80987e 1567 hspi->hdmatx->XferErrorCallback = SPI_DMAError;
mbed_official 610:813dcc80987e 1568
mbed_official 610:813dcc80987e 1569 /* Enable the Tx DMA channel */
mbed_official 610:813dcc80987e 1570 HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
mbed_official 610:813dcc80987e 1571
mbed_official 610:813dcc80987e 1572 /* Check if the SPI is already enabled */
mbed_official 610:813dcc80987e 1573 if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
mbed_official 610:813dcc80987e 1574 {
mbed_official 610:813dcc80987e 1575 /* Enable SPI peripheral */
mbed_official 610:813dcc80987e 1576 __HAL_SPI_ENABLE(hspi);
mbed_official 610:813dcc80987e 1577 }
mbed_official 610:813dcc80987e 1578
mbed_official 610:813dcc80987e 1579 /* Enable Tx DMA Request */
mbed_official 610:813dcc80987e 1580 SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
mbed_official 610:813dcc80987e 1581
mbed_official 610:813dcc80987e 1582 error :
mbed_official 610:813dcc80987e 1583 /* Process Unlocked */
mbed_official 610:813dcc80987e 1584 __HAL_UNLOCK(hspi);
mbed_official 610:813dcc80987e 1585 return errorcode;
mbed_official 610:813dcc80987e 1586 }
mbed_official 610:813dcc80987e 1587
mbed_official 610:813dcc80987e 1588 /**
mbed_official 610:813dcc80987e 1589 * @brief Pause the DMA Transfer.
mbed_official 610:813dcc80987e 1590 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 1591 * the configuration information for the specified SPI module.
mbed_official 610:813dcc80987e 1592 * @retval HAL status
mbed_official 610:813dcc80987e 1593 */
mbed_official 610:813dcc80987e 1594 HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi)
mbed_official 610:813dcc80987e 1595 {
mbed_official 610:813dcc80987e 1596 /* Process Locked */
mbed_official 610:813dcc80987e 1597 __HAL_LOCK(hspi);
mbed_official 610:813dcc80987e 1598
mbed_official 610:813dcc80987e 1599 /* Disable the SPI DMA Tx & Rx requests */
mbed_official 610:813dcc80987e 1600 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);
mbed_official 610:813dcc80987e 1601
mbed_official 610:813dcc80987e 1602 /* Process Unlocked */
mbed_official 610:813dcc80987e 1603 __HAL_UNLOCK(hspi);
mbed_official 610:813dcc80987e 1604
mbed_official 610:813dcc80987e 1605 return HAL_OK;
mbed_official 610:813dcc80987e 1606 }
mbed_official 610:813dcc80987e 1607
mbed_official 610:813dcc80987e 1608 /**
mbed_official 610:813dcc80987e 1609 * @brief Resume the DMA Transfer.
mbed_official 610:813dcc80987e 1610 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 1611 * the configuration information for the specified SPI module.
mbed_official 610:813dcc80987e 1612 * @retval HAL status
mbed_official 610:813dcc80987e 1613 */
mbed_official 610:813dcc80987e 1614 HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi)
mbed_official 610:813dcc80987e 1615 {
mbed_official 610:813dcc80987e 1616 /* Process Locked */
mbed_official 610:813dcc80987e 1617 __HAL_LOCK(hspi);
mbed_official 610:813dcc80987e 1618
mbed_official 610:813dcc80987e 1619 /* Enable the SPI DMA Tx & Rx requests */
mbed_official 610:813dcc80987e 1620 SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);
mbed_official 610:813dcc80987e 1621
mbed_official 610:813dcc80987e 1622 /* Process Unlocked */
mbed_official 610:813dcc80987e 1623 __HAL_UNLOCK(hspi);
mbed_official 610:813dcc80987e 1624
mbed_official 610:813dcc80987e 1625 return HAL_OK;
mbed_official 610:813dcc80987e 1626 }
mbed_official 610:813dcc80987e 1627
mbed_official 610:813dcc80987e 1628 /**
mbed_official 610:813dcc80987e 1629 * @brief Stop the DMA Transfer.
mbed_official 610:813dcc80987e 1630 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 1631 * the configuration information for the specified SPI module.
mbed_official 610:813dcc80987e 1632 * @retval HAL status
mbed_official 610:813dcc80987e 1633 */
mbed_official 610:813dcc80987e 1634 HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi)
mbed_official 610:813dcc80987e 1635 {
mbed_official 610:813dcc80987e 1636 /* The Lock is not implemented on this API to allow the user application
mbed_official 610:813dcc80987e 1637 to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback():
mbed_official 610:813dcc80987e 1638 when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
mbed_official 610:813dcc80987e 1639 and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback()
mbed_official 610:813dcc80987e 1640 */
mbed_official 610:813dcc80987e 1641
mbed_official 610:813dcc80987e 1642 /* Abort the SPI DMA tx channel */
mbed_official 610:813dcc80987e 1643 if(hspi->hdmatx != NULL)
mbed_official 610:813dcc80987e 1644 {
mbed_official 610:813dcc80987e 1645 HAL_DMA_Abort(hspi->hdmatx);
mbed_official 610:813dcc80987e 1646 }
mbed_official 610:813dcc80987e 1647 /* Abort the SPI DMA rx channel */
mbed_official 610:813dcc80987e 1648 if(hspi->hdmarx != NULL)
mbed_official 610:813dcc80987e 1649 {
mbed_official 610:813dcc80987e 1650 HAL_DMA_Abort(hspi->hdmarx);
mbed_official 610:813dcc80987e 1651 }
mbed_official 610:813dcc80987e 1652
mbed_official 610:813dcc80987e 1653 /* Disable the SPI DMA Tx & Rx requests */
mbed_official 610:813dcc80987e 1654 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);
mbed_official 610:813dcc80987e 1655 hspi->State = HAL_SPI_STATE_READY;
mbed_official 610:813dcc80987e 1656 return HAL_OK;
mbed_official 610:813dcc80987e 1657 }
mbed_official 610:813dcc80987e 1658
mbed_official 610:813dcc80987e 1659 /**
mbed_official 610:813dcc80987e 1660 * @brief Handle SPI interrupt request.
mbed_official 610:813dcc80987e 1661 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 1662 * the configuration information for the specified SPI module.
mbed_official 610:813dcc80987e 1663 * @retval None
mbed_official 610:813dcc80987e 1664 */
mbed_official 610:813dcc80987e 1665 void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi)
mbed_official 610:813dcc80987e 1666 {
mbed_official 610:813dcc80987e 1667 uint32_t itsource = hspi->Instance->CR2;
mbed_official 610:813dcc80987e 1668 uint32_t itflag = hspi->Instance->SR;
mbed_official 610:813dcc80987e 1669
mbed_official 610:813dcc80987e 1670 /* SPI in mode Receiver ----------------------------------------------------*/
mbed_official 610:813dcc80987e 1671 if(((itflag & SPI_FLAG_OVR) == RESET) &&
mbed_official 610:813dcc80987e 1672 ((itflag & SPI_FLAG_RXNE) != RESET) && ((itsource & SPI_IT_RXNE) != RESET))
mbed_official 610:813dcc80987e 1673 {
mbed_official 610:813dcc80987e 1674 hspi->RxISR(hspi);
mbed_official 610:813dcc80987e 1675 return;
mbed_official 610:813dcc80987e 1676 }
mbed_official 610:813dcc80987e 1677
mbed_official 610:813dcc80987e 1678 /* SPI in mode Transmitter ---------------------------------------------------*/
mbed_official 610:813dcc80987e 1679 if(((itflag & SPI_FLAG_TXE) != RESET) && ((itsource & SPI_IT_TXE) != RESET))
mbed_official 610:813dcc80987e 1680 {
mbed_official 610:813dcc80987e 1681 hspi->TxISR(hspi);
mbed_official 610:813dcc80987e 1682 return;
mbed_official 610:813dcc80987e 1683 }
mbed_official 610:813dcc80987e 1684
mbed_official 610:813dcc80987e 1685 /* SPI in Error Treatment ---------------------------------------------------*/
mbed_official 610:813dcc80987e 1686 if((itflag & (SPI_FLAG_MODF | SPI_FLAG_OVR | SPI_FLAG_FRE)) != RESET)
mbed_official 610:813dcc80987e 1687 {
mbed_official 610:813dcc80987e 1688 /* SPI Overrun error interrupt occurred -------------------------------------*/
mbed_official 610:813dcc80987e 1689 if((itflag & SPI_FLAG_OVR) != RESET)
mbed_official 610:813dcc80987e 1690 {
mbed_official 610:813dcc80987e 1691 if(hspi->State != HAL_SPI_STATE_BUSY_TX)
mbed_official 610:813dcc80987e 1692 {
mbed_official 610:813dcc80987e 1693 hspi->ErrorCode |= HAL_SPI_ERROR_OVR;
mbed_official 610:813dcc80987e 1694 __HAL_SPI_CLEAR_OVRFLAG(hspi);
mbed_official 610:813dcc80987e 1695 }
mbed_official 610:813dcc80987e 1696 else
mbed_official 610:813dcc80987e 1697 {
mbed_official 610:813dcc80987e 1698 return;
mbed_official 610:813dcc80987e 1699 }
mbed_official 610:813dcc80987e 1700 }
mbed_official 610:813dcc80987e 1701
mbed_official 610:813dcc80987e 1702 /* SPI Mode Fault error interrupt occurred -------------------------------------*/
mbed_official 610:813dcc80987e 1703 if((itflag & SPI_FLAG_MODF) != RESET)
mbed_official 610:813dcc80987e 1704 {
mbed_official 610:813dcc80987e 1705 hspi->ErrorCode |= HAL_SPI_ERROR_MODF;
mbed_official 610:813dcc80987e 1706 __HAL_SPI_CLEAR_MODFFLAG(hspi);
mbed_official 610:813dcc80987e 1707 }
mbed_official 610:813dcc80987e 1708
mbed_official 610:813dcc80987e 1709 /* SPI Frame error interrupt occurred ----------------------------------------*/
mbed_official 610:813dcc80987e 1710 if((itflag & SPI_FLAG_FRE) != RESET)
mbed_official 610:813dcc80987e 1711 {
mbed_official 610:813dcc80987e 1712 hspi->ErrorCode |= HAL_SPI_ERROR_FRE;
mbed_official 610:813dcc80987e 1713 __HAL_SPI_CLEAR_FREFLAG(hspi);
mbed_official 610:813dcc80987e 1714 }
mbed_official 610:813dcc80987e 1715
mbed_official 610:813dcc80987e 1716 __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE | SPI_IT_TXE | SPI_IT_ERR);
mbed_official 610:813dcc80987e 1717 hspi->State = HAL_SPI_STATE_READY;
mbed_official 610:813dcc80987e 1718 HAL_SPI_ErrorCallback(hspi);
mbed_official 610:813dcc80987e 1719 return;
mbed_official 610:813dcc80987e 1720 }
mbed_official 610:813dcc80987e 1721 }
mbed_official 610:813dcc80987e 1722
mbed_official 610:813dcc80987e 1723 /**
mbed_official 610:813dcc80987e 1724 * @brief Tx Transfer completed callback.
mbed_official 610:813dcc80987e 1725 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 1726 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 1727 * @retval None
mbed_official 610:813dcc80987e 1728 */
mbed_official 610:813dcc80987e 1729 __weak void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi)
mbed_official 610:813dcc80987e 1730 {
mbed_official 610:813dcc80987e 1731 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 1732 the HAL_SPI_TxCpltCallback should be implemented in the user file
mbed_official 610:813dcc80987e 1733 */
mbed_official 610:813dcc80987e 1734 }
mbed_official 610:813dcc80987e 1735
mbed_official 610:813dcc80987e 1736 /**
mbed_official 610:813dcc80987e 1737 * @brief Rx Transfer completed callback.
mbed_official 610:813dcc80987e 1738 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 1739 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 1740 * @retval None
mbed_official 610:813dcc80987e 1741 */
mbed_official 610:813dcc80987e 1742 __weak void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi)
mbed_official 610:813dcc80987e 1743 {
mbed_official 610:813dcc80987e 1744 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 1745 the HAL_SPI_RxCpltCallback should be implemented in the user file
mbed_official 610:813dcc80987e 1746 */
mbed_official 610:813dcc80987e 1747 }
mbed_official 610:813dcc80987e 1748
mbed_official 610:813dcc80987e 1749 /**
mbed_official 610:813dcc80987e 1750 * @brief Tx and Rx Transfer completed callback.
mbed_official 610:813dcc80987e 1751 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 1752 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 1753 * @retval None
mbed_official 610:813dcc80987e 1754 */
mbed_official 610:813dcc80987e 1755 __weak void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi)
mbed_official 610:813dcc80987e 1756 {
mbed_official 610:813dcc80987e 1757 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 1758 the HAL_SPI_TxRxCpltCallback should be implemented in the user file
mbed_official 610:813dcc80987e 1759 */
mbed_official 610:813dcc80987e 1760 }
mbed_official 610:813dcc80987e 1761
mbed_official 610:813dcc80987e 1762 /**
mbed_official 610:813dcc80987e 1763 * @brief Tx Half Transfer completed callback.
mbed_official 610:813dcc80987e 1764 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 1765 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 1766 * @retval None
mbed_official 610:813dcc80987e 1767 */
mbed_official 610:813dcc80987e 1768 __weak void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi)
mbed_official 610:813dcc80987e 1769 {
mbed_official 610:813dcc80987e 1770 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 1771 the HAL_SPI_TxHalfCpltCallback should be implemented in the user file
mbed_official 610:813dcc80987e 1772 */
mbed_official 610:813dcc80987e 1773 }
mbed_official 610:813dcc80987e 1774
mbed_official 610:813dcc80987e 1775 /**
mbed_official 610:813dcc80987e 1776 * @brief Rx Half Transfer completed callback.
mbed_official 610:813dcc80987e 1777 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 1778 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 1779 * @retval None
mbed_official 610:813dcc80987e 1780 */
mbed_official 610:813dcc80987e 1781 __weak void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi)
mbed_official 610:813dcc80987e 1782 {
mbed_official 610:813dcc80987e 1783 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 1784 the HAL_SPI_RxHalfCpltCallback() should be implemented in the user file
mbed_official 610:813dcc80987e 1785 */
mbed_official 610:813dcc80987e 1786 }
mbed_official 610:813dcc80987e 1787
mbed_official 610:813dcc80987e 1788 /**
mbed_official 610:813dcc80987e 1789 * @brief Tx and Rx Half Transfer callback.
mbed_official 610:813dcc80987e 1790 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 1791 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 1792 * @retval None
mbed_official 610:813dcc80987e 1793 */
mbed_official 610:813dcc80987e 1794 __weak void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi)
mbed_official 610:813dcc80987e 1795 {
mbed_official 610:813dcc80987e 1796 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 1797 the HAL_SPI_TxRxHalfCpltCallback() should be implemented in the user file
mbed_official 610:813dcc80987e 1798 */
mbed_official 610:813dcc80987e 1799 }
mbed_official 610:813dcc80987e 1800
mbed_official 610:813dcc80987e 1801 /**
mbed_official 610:813dcc80987e 1802 * @brief SPI error callback.
mbed_official 610:813dcc80987e 1803 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 1804 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 1805 * @retval None
mbed_official 610:813dcc80987e 1806 */
mbed_official 610:813dcc80987e 1807 __weak void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi)
mbed_official 610:813dcc80987e 1808 {
mbed_official 610:813dcc80987e 1809 /* NOTE : This function should not be modified, when the callback is needed,
mbed_official 610:813dcc80987e 1810 the HAL_SPI_ErrorCallback should be implemented in the user file
mbed_official 610:813dcc80987e 1811 */
mbed_official 610:813dcc80987e 1812 /* NOTE : The ErrorCode parameter in the hspi handle is updated by the SPI processes
mbed_official 610:813dcc80987e 1813 and user can use HAL_SPI_GetError() API to check the latest error occurred
mbed_official 610:813dcc80987e 1814 */
mbed_official 610:813dcc80987e 1815 }
mbed_official 610:813dcc80987e 1816
mbed_official 610:813dcc80987e 1817 /**
mbed_official 610:813dcc80987e 1818 * @}
mbed_official 610:813dcc80987e 1819 */
mbed_official 610:813dcc80987e 1820
mbed_official 610:813dcc80987e 1821 /** @defgroup SPI_Exported_Functions_Group3 Peripheral State and Errors functions
mbed_official 610:813dcc80987e 1822 * @brief SPI control functions
mbed_official 610:813dcc80987e 1823 *
mbed_official 610:813dcc80987e 1824 @verbatim
mbed_official 610:813dcc80987e 1825 ===============================================================================
mbed_official 610:813dcc80987e 1826 ##### Peripheral State and Errors functions #####
mbed_official 610:813dcc80987e 1827 ===============================================================================
mbed_official 610:813dcc80987e 1828 [..]
mbed_official 610:813dcc80987e 1829 This subsection provides a set of functions allowing to control the SPI.
mbed_official 610:813dcc80987e 1830 (+) HAL_SPI_GetState() API can be helpful to check in run-time the state of the SPI peripheral
mbed_official 610:813dcc80987e 1831 (+) HAL_SPI_GetError() check in run-time Errors occurring during communication
mbed_official 610:813dcc80987e 1832 @endverbatim
mbed_official 610:813dcc80987e 1833 * @{
mbed_official 610:813dcc80987e 1834 */
mbed_official 610:813dcc80987e 1835
mbed_official 610:813dcc80987e 1836 /**
mbed_official 610:813dcc80987e 1837 * @brief Return the SPI handle state.
mbed_official 610:813dcc80987e 1838 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 1839 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 1840 * @retval SPI state
mbed_official 610:813dcc80987e 1841 */
mbed_official 610:813dcc80987e 1842 HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi)
mbed_official 610:813dcc80987e 1843 {
mbed_official 610:813dcc80987e 1844 /* Return SPI handle state */
mbed_official 610:813dcc80987e 1845 return hspi->State;
mbed_official 610:813dcc80987e 1846 }
mbed_official 610:813dcc80987e 1847
mbed_official 610:813dcc80987e 1848 /**
mbed_official 610:813dcc80987e 1849 * @brief Return the SPI error code.
mbed_official 610:813dcc80987e 1850 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 1851 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 1852 * @retval SPI error code in bitmap format
mbed_official 610:813dcc80987e 1853 */
mbed_official 610:813dcc80987e 1854 uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi)
mbed_official 610:813dcc80987e 1855 {
mbed_official 610:813dcc80987e 1856 return hspi->ErrorCode;
mbed_official 610:813dcc80987e 1857 }
mbed_official 610:813dcc80987e 1858
mbed_official 610:813dcc80987e 1859 /**
mbed_official 610:813dcc80987e 1860 * @}
mbed_official 610:813dcc80987e 1861 */
mbed_official 610:813dcc80987e 1862
mbed_official 610:813dcc80987e 1863
mbed_official 610:813dcc80987e 1864 /**
mbed_official 610:813dcc80987e 1865 * @}
mbed_official 610:813dcc80987e 1866 */
mbed_official 610:813dcc80987e 1867
mbed_official 610:813dcc80987e 1868 /** @addtogroup SPI_Private_Functions
mbed_official 610:813dcc80987e 1869 * @brief Private functions
mbed_official 610:813dcc80987e 1870 * @{
mbed_official 610:813dcc80987e 1871 */
mbed_official 610:813dcc80987e 1872
mbed_official 610:813dcc80987e 1873 /**
mbed_official 610:813dcc80987e 1874 * @brief DMA SPI transmit process complete callback.
mbed_official 610:813dcc80987e 1875 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 1876 * the configuration information for the specified DMA module.
mbed_official 610:813dcc80987e 1877 * @retval None
mbed_official 610:813dcc80987e 1878 */
mbed_official 610:813dcc80987e 1879 static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma)
mbed_official 610:813dcc80987e 1880 {
mbed_official 610:813dcc80987e 1881 SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 610:813dcc80987e 1882
mbed_official 610:813dcc80987e 1883 if((hdma->Instance->CCR & DMA_CCR_CIRC) != DMA_CCR_CIRC)
mbed_official 610:813dcc80987e 1884 {
mbed_official 610:813dcc80987e 1885 /* Disable Tx DMA Request */
mbed_official 610:813dcc80987e 1886 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
mbed_official 610:813dcc80987e 1887
mbed_official 610:813dcc80987e 1888 /* Check the end of the transaction */
mbed_official 610:813dcc80987e 1889 if(SPI_EndRxTxTransaction(hspi,SPI_DEFAULT_TIMEOUT) != HAL_OK)
mbed_official 610:813dcc80987e 1890 {
mbed_official 610:813dcc80987e 1891 hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
mbed_official 610:813dcc80987e 1892 }
mbed_official 610:813dcc80987e 1893
mbed_official 610:813dcc80987e 1894 /* Clear overrun flag in 2 Lines communication mode because received data is not read */
mbed_official 610:813dcc80987e 1895 if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
mbed_official 610:813dcc80987e 1896 {
mbed_official 610:813dcc80987e 1897 __HAL_SPI_CLEAR_OVRFLAG(hspi);
mbed_official 610:813dcc80987e 1898 }
mbed_official 610:813dcc80987e 1899
mbed_official 610:813dcc80987e 1900 hspi->TxXferCount = 0;
mbed_official 610:813dcc80987e 1901 hspi->State = HAL_SPI_STATE_READY;
mbed_official 610:813dcc80987e 1902
mbed_official 610:813dcc80987e 1903 if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
mbed_official 610:813dcc80987e 1904 {
mbed_official 610:813dcc80987e 1905 HAL_SPI_ErrorCallback(hspi);
mbed_official 610:813dcc80987e 1906 return;
mbed_official 610:813dcc80987e 1907 }
mbed_official 610:813dcc80987e 1908 }
mbed_official 610:813dcc80987e 1909 HAL_SPI_TxCpltCallback(hspi);
mbed_official 610:813dcc80987e 1910 }
mbed_official 610:813dcc80987e 1911
mbed_official 610:813dcc80987e 1912 /**
mbed_official 610:813dcc80987e 1913 * @brief DMA SPI receive process complete callback.
mbed_official 610:813dcc80987e 1914 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 1915 * the configuration information for the specified DMA module.
mbed_official 610:813dcc80987e 1916 * @retval None
mbed_official 610:813dcc80987e 1917 */
mbed_official 610:813dcc80987e 1918 static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
mbed_official 610:813dcc80987e 1919 {
mbed_official 610:813dcc80987e 1920 SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 610:813dcc80987e 1921
mbed_official 610:813dcc80987e 1922 if((hdma->Instance->CCR & DMA_CCR_CIRC) != DMA_CCR_CIRC)
mbed_official 610:813dcc80987e 1923 {
mbed_official 610:813dcc80987e 1924 __IO uint16_t tmpreg;
mbed_official 610:813dcc80987e 1925
mbed_official 610:813dcc80987e 1926 /* CRC handling */
mbed_official 610:813dcc80987e 1927 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
mbed_official 610:813dcc80987e 1928 {
mbed_official 610:813dcc80987e 1929 /* Wait until TXE flag */
mbed_official 610:813dcc80987e 1930 if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, SPI_DEFAULT_TIMEOUT) != HAL_OK)
mbed_official 610:813dcc80987e 1931 {
mbed_official 610:813dcc80987e 1932 /* Error on the CRC reception */
mbed_official 610:813dcc80987e 1933 hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
mbed_official 610:813dcc80987e 1934 }
mbed_official 610:813dcc80987e 1935 if(hspi->Init.DataSize > SPI_DATASIZE_8BIT)
mbed_official 610:813dcc80987e 1936 {
mbed_official 610:813dcc80987e 1937 tmpreg = hspi->Instance->DR;
mbed_official 610:813dcc80987e 1938 UNUSED(tmpreg); /* To avoid GCC warning */
mbed_official 610:813dcc80987e 1939 }
mbed_official 610:813dcc80987e 1940 else
mbed_official 610:813dcc80987e 1941 {
mbed_official 610:813dcc80987e 1942 tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
mbed_official 610:813dcc80987e 1943 UNUSED(tmpreg); /* To avoid GCC warning */
mbed_official 610:813dcc80987e 1944
mbed_official 610:813dcc80987e 1945 if(hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT)
mbed_official 610:813dcc80987e 1946 {
mbed_official 610:813dcc80987e 1947 if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, SPI_DEFAULT_TIMEOUT) != HAL_OK)
mbed_official 610:813dcc80987e 1948 {
mbed_official 610:813dcc80987e 1949 /* Error on the CRC reception */
mbed_official 610:813dcc80987e 1950 hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
mbed_official 610:813dcc80987e 1951 }
mbed_official 610:813dcc80987e 1952 tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
mbed_official 610:813dcc80987e 1953 UNUSED(tmpreg); /* To avoid GCC warning */
mbed_official 610:813dcc80987e 1954 }
mbed_official 610:813dcc80987e 1955 }
mbed_official 610:813dcc80987e 1956 }
mbed_official 610:813dcc80987e 1957
mbed_official 610:813dcc80987e 1958 /* Disable Rx/Tx DMA Request (done by default to handle the case master rx direction 2 lines) */
mbed_official 610:813dcc80987e 1959 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);
mbed_official 610:813dcc80987e 1960
mbed_official 610:813dcc80987e 1961 /* Check the end of the transaction */
mbed_official 610:813dcc80987e 1962 if(SPI_EndRxTransaction(hspi,SPI_DEFAULT_TIMEOUT)!=HAL_OK)
mbed_official 610:813dcc80987e 1963 {
mbed_official 610:813dcc80987e 1964 hspi->ErrorCode|= HAL_SPI_ERROR_FLAG;
mbed_official 610:813dcc80987e 1965 }
mbed_official 610:813dcc80987e 1966
mbed_official 610:813dcc80987e 1967 hspi->RxXferCount = 0;
mbed_official 610:813dcc80987e 1968 hspi->State = HAL_SPI_STATE_READY;
mbed_official 610:813dcc80987e 1969
mbed_official 610:813dcc80987e 1970 /* Check if CRC error occurred */
mbed_official 610:813dcc80987e 1971 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
mbed_official 610:813dcc80987e 1972 {
mbed_official 610:813dcc80987e 1973 hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
mbed_official 610:813dcc80987e 1974 __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
mbed_official 610:813dcc80987e 1975 }
mbed_official 610:813dcc80987e 1976
mbed_official 610:813dcc80987e 1977 if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
mbed_official 610:813dcc80987e 1978 {
mbed_official 610:813dcc80987e 1979 HAL_SPI_ErrorCallback(hspi);
mbed_official 610:813dcc80987e 1980 return;
mbed_official 610:813dcc80987e 1981 }
mbed_official 610:813dcc80987e 1982 }
mbed_official 610:813dcc80987e 1983 HAL_SPI_RxCpltCallback(hspi);
mbed_official 610:813dcc80987e 1984 }
mbed_official 610:813dcc80987e 1985
mbed_official 610:813dcc80987e 1986 /**
mbed_official 610:813dcc80987e 1987 * @brief DMA SPI transmit receive process complete callback.
mbed_official 610:813dcc80987e 1988 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 1989 * the configuration information for the specified DMA module.
mbed_official 610:813dcc80987e 1990 * @retval None
mbed_official 610:813dcc80987e 1991 */
mbed_official 610:813dcc80987e 1992 static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma)
mbed_official 610:813dcc80987e 1993 {
mbed_official 610:813dcc80987e 1994 SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 610:813dcc80987e 1995
mbed_official 610:813dcc80987e 1996 if((hdma->Instance->CCR & DMA_CCR_CIRC) != DMA_CCR_CIRC)
mbed_official 610:813dcc80987e 1997 {
mbed_official 610:813dcc80987e 1998 __IO int16_t tmpreg;
mbed_official 610:813dcc80987e 1999 /* CRC handling */
mbed_official 610:813dcc80987e 2000 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
mbed_official 610:813dcc80987e 2001 {
mbed_official 610:813dcc80987e 2002 if((hspi->Init.DataSize == SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_8BIT))
mbed_official 610:813dcc80987e 2003 {
mbed_official 610:813dcc80987e 2004 if(SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_QUARTER_FULL, SPI_DEFAULT_TIMEOUT) != HAL_OK)
mbed_official 610:813dcc80987e 2005 {
mbed_official 610:813dcc80987e 2006 /* Error on the CRC reception */
mbed_official 610:813dcc80987e 2007 hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
mbed_official 610:813dcc80987e 2008 }
mbed_official 610:813dcc80987e 2009 tmpreg = *(__IO uint8_t *)&hspi->Instance->DR;
mbed_official 610:813dcc80987e 2010 UNUSED(tmpreg); /* To avoid GCC warning */
mbed_official 610:813dcc80987e 2011 }
mbed_official 610:813dcc80987e 2012 else
mbed_official 610:813dcc80987e 2013 {
mbed_official 610:813dcc80987e 2014 if(SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_HALF_FULL, SPI_DEFAULT_TIMEOUT) != HAL_OK)
mbed_official 610:813dcc80987e 2015 {
mbed_official 610:813dcc80987e 2016 /* Error on the CRC reception */
mbed_official 610:813dcc80987e 2017 hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
mbed_official 610:813dcc80987e 2018 }
mbed_official 610:813dcc80987e 2019 tmpreg = hspi->Instance->DR;
mbed_official 610:813dcc80987e 2020 UNUSED(tmpreg); /* To avoid GCC warning */
mbed_official 610:813dcc80987e 2021 }
mbed_official 610:813dcc80987e 2022 }
mbed_official 610:813dcc80987e 2023
mbed_official 610:813dcc80987e 2024 /* Check the end of the transaction */
mbed_official 610:813dcc80987e 2025 if(SPI_EndRxTxTransaction(hspi,SPI_DEFAULT_TIMEOUT) != HAL_OK)
mbed_official 610:813dcc80987e 2026 {
mbed_official 610:813dcc80987e 2027 hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
mbed_official 610:813dcc80987e 2028 }
mbed_official 610:813dcc80987e 2029
mbed_official 610:813dcc80987e 2030 /* Disable Rx/Tx DMA Request */
mbed_official 610:813dcc80987e 2031 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);
mbed_official 610:813dcc80987e 2032
mbed_official 610:813dcc80987e 2033 hspi->TxXferCount = 0;
mbed_official 610:813dcc80987e 2034 hspi->RxXferCount = 0;
mbed_official 610:813dcc80987e 2035 hspi->State = HAL_SPI_STATE_READY;
mbed_official 610:813dcc80987e 2036
mbed_official 610:813dcc80987e 2037 /* Check if CRC error occurred */
mbed_official 610:813dcc80987e 2038 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
mbed_official 610:813dcc80987e 2039 {
mbed_official 610:813dcc80987e 2040 hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
mbed_official 610:813dcc80987e 2041 __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
mbed_official 610:813dcc80987e 2042 }
mbed_official 610:813dcc80987e 2043
mbed_official 610:813dcc80987e 2044 if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
mbed_official 610:813dcc80987e 2045 {
mbed_official 610:813dcc80987e 2046 HAL_SPI_ErrorCallback(hspi);
mbed_official 610:813dcc80987e 2047 return;
mbed_official 610:813dcc80987e 2048 }
mbed_official 610:813dcc80987e 2049 }
mbed_official 610:813dcc80987e 2050 HAL_SPI_TxRxCpltCallback(hspi);
mbed_official 610:813dcc80987e 2051 }
mbed_official 610:813dcc80987e 2052
mbed_official 610:813dcc80987e 2053 /**
mbed_official 610:813dcc80987e 2054 * @brief DMA SPI half transmit process complete callback.
mbed_official 610:813dcc80987e 2055 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 2056 * the configuration information for the specified DMA module.
mbed_official 610:813dcc80987e 2057 * @retval None
mbed_official 610:813dcc80987e 2058 */
mbed_official 610:813dcc80987e 2059 static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma)
mbed_official 610:813dcc80987e 2060 {
mbed_official 610:813dcc80987e 2061 SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 610:813dcc80987e 2062
mbed_official 610:813dcc80987e 2063 HAL_SPI_TxHalfCpltCallback(hspi);
mbed_official 610:813dcc80987e 2064 }
mbed_official 610:813dcc80987e 2065
mbed_official 610:813dcc80987e 2066 /**
mbed_official 610:813dcc80987e 2067 * @brief DMA SPI half receive process complete callback.
mbed_official 610:813dcc80987e 2068 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 2069 * the configuration information for the specified DMA module.
mbed_official 610:813dcc80987e 2070 * @retval None
mbed_official 610:813dcc80987e 2071 */
mbed_official 610:813dcc80987e 2072 static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma)
mbed_official 610:813dcc80987e 2073 {
mbed_official 610:813dcc80987e 2074 SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 610:813dcc80987e 2075
mbed_official 610:813dcc80987e 2076 HAL_SPI_RxHalfCpltCallback(hspi);
mbed_official 610:813dcc80987e 2077 }
mbed_official 610:813dcc80987e 2078
mbed_official 610:813dcc80987e 2079 /**
mbed_official 610:813dcc80987e 2080 * @brief DMA SPI half transmit receive process complete callback.
mbed_official 610:813dcc80987e 2081 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 2082 * the configuration information for the specified DMA module.
mbed_official 610:813dcc80987e 2083 * @retval None
mbed_official 610:813dcc80987e 2084 */
mbed_official 610:813dcc80987e 2085 static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma)
mbed_official 610:813dcc80987e 2086 {
mbed_official 610:813dcc80987e 2087 SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 610:813dcc80987e 2088
mbed_official 610:813dcc80987e 2089 HAL_SPI_TxRxHalfCpltCallback(hspi);
mbed_official 610:813dcc80987e 2090 }
mbed_official 610:813dcc80987e 2091
mbed_official 610:813dcc80987e 2092 /**
mbed_official 610:813dcc80987e 2093 * @brief DMA SPI communication error callback.
mbed_official 610:813dcc80987e 2094 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 2095 * the configuration information for the specified DMA module.
mbed_official 610:813dcc80987e 2096 * @retval None
mbed_official 610:813dcc80987e 2097 */
mbed_official 610:813dcc80987e 2098 static void SPI_DMAError(DMA_HandleTypeDef *hdma)
mbed_official 610:813dcc80987e 2099 {
mbed_official 610:813dcc80987e 2100 SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 610:813dcc80987e 2101
mbed_official 610:813dcc80987e 2102 /* Stop the disable DMA transfer on SPI side */
mbed_official 610:813dcc80987e 2103 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);
mbed_official 610:813dcc80987e 2104
mbed_official 610:813dcc80987e 2105 hspi->ErrorCode|= HAL_SPI_ERROR_DMA;
mbed_official 610:813dcc80987e 2106 hspi->State = HAL_SPI_STATE_READY;
mbed_official 610:813dcc80987e 2107 HAL_SPI_ErrorCallback(hspi);
mbed_official 610:813dcc80987e 2108 }
mbed_official 610:813dcc80987e 2109
mbed_official 610:813dcc80987e 2110 /**
mbed_official 610:813dcc80987e 2111 * @brief Rx 8-bit handler for Transmit and Receive in Interrupt mode.
mbed_official 610:813dcc80987e 2112 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 2113 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 2114 * @retval None
mbed_official 610:813dcc80987e 2115 */
mbed_official 610:813dcc80987e 2116 static void SPI_2linesRxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
mbed_official 610:813dcc80987e 2117 {
mbed_official 610:813dcc80987e 2118 /* Receive data in packing mode */
mbed_official 610:813dcc80987e 2119 if(hspi->RxXferCount > 1)
mbed_official 610:813dcc80987e 2120 {
mbed_official 610:813dcc80987e 2121 *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
mbed_official 610:813dcc80987e 2122 hspi->pRxBuffPtr += sizeof(uint16_t);
mbed_official 610:813dcc80987e 2123 hspi->RxXferCount -= 2;
mbed_official 610:813dcc80987e 2124 if(hspi->RxXferCount == 1)
mbed_official 610:813dcc80987e 2125 {
mbed_official 610:813dcc80987e 2126 /* set fiforxthresold according the reception data length: 8bit */
mbed_official 610:813dcc80987e 2127 SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
mbed_official 610:813dcc80987e 2128 }
mbed_official 610:813dcc80987e 2129 }
mbed_official 610:813dcc80987e 2130 /* Receive data in 8 Bit mode */
mbed_official 610:813dcc80987e 2131 else
mbed_official 610:813dcc80987e 2132 {
mbed_official 610:813dcc80987e 2133 *hspi->pRxBuffPtr++ = *((__IO uint8_t *)&hspi->Instance->DR);
mbed_official 610:813dcc80987e 2134 hspi->RxXferCount--;
mbed_official 610:813dcc80987e 2135 }
mbed_official 610:813dcc80987e 2136
mbed_official 610:813dcc80987e 2137 /* check end of the reception */
mbed_official 610:813dcc80987e 2138 if(hspi->RxXferCount == 0)
mbed_official 610:813dcc80987e 2139 {
mbed_official 610:813dcc80987e 2140 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
mbed_official 610:813dcc80987e 2141 {
mbed_official 610:813dcc80987e 2142 hspi->RxISR = SPI_2linesRxISR_8BITCRC;
mbed_official 610:813dcc80987e 2143 return;
mbed_official 610:813dcc80987e 2144 }
mbed_official 610:813dcc80987e 2145
mbed_official 610:813dcc80987e 2146 /* Disable RXNE interrupt */
mbed_official 610:813dcc80987e 2147 __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE);
mbed_official 610:813dcc80987e 2148
mbed_official 610:813dcc80987e 2149 if(hspi->TxXferCount == 0)
mbed_official 610:813dcc80987e 2150 {
mbed_official 610:813dcc80987e 2151 SPI_CloseRxTx_ISR(hspi);
mbed_official 610:813dcc80987e 2152 }
mbed_official 610:813dcc80987e 2153 }
mbed_official 610:813dcc80987e 2154 }
mbed_official 610:813dcc80987e 2155
mbed_official 610:813dcc80987e 2156 /**
mbed_official 610:813dcc80987e 2157 * @brief Rx 8-bit handler for Transmit and Receive in Interrupt mode.
mbed_official 610:813dcc80987e 2158 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 2159 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 2160 * @retval None
mbed_official 610:813dcc80987e 2161 */
mbed_official 610:813dcc80987e 2162 static void SPI_2linesRxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi)
mbed_official 610:813dcc80987e 2163 {
mbed_official 610:813dcc80987e 2164 __IO uint8_t tmpreg = *((__IO uint8_t *)&hspi->Instance->DR);
mbed_official 610:813dcc80987e 2165 UNUSED(tmpreg); /* To avoid GCC warning */
mbed_official 610:813dcc80987e 2166
mbed_official 610:813dcc80987e 2167 hspi->CRCSize--;
mbed_official 610:813dcc80987e 2168
mbed_official 610:813dcc80987e 2169 /* check end of the reception */
mbed_official 610:813dcc80987e 2170 if(hspi->CRCSize == 0)
mbed_official 610:813dcc80987e 2171 {
mbed_official 610:813dcc80987e 2172 /* Disable RXNE interrupt */
mbed_official 610:813dcc80987e 2173 __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE);
mbed_official 610:813dcc80987e 2174
mbed_official 610:813dcc80987e 2175 if(hspi->TxXferCount == 0)
mbed_official 610:813dcc80987e 2176 {
mbed_official 610:813dcc80987e 2177 SPI_CloseRxTx_ISR(hspi);
mbed_official 610:813dcc80987e 2178 }
mbed_official 610:813dcc80987e 2179 }
mbed_official 610:813dcc80987e 2180 }
mbed_official 610:813dcc80987e 2181
mbed_official 610:813dcc80987e 2182 /**
mbed_official 610:813dcc80987e 2183 * @brief Tx 8-bit handler for Transmit and Receive in Interrupt mode.
mbed_official 610:813dcc80987e 2184 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 2185 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 2186 * @retval None
mbed_official 610:813dcc80987e 2187 */
mbed_official 610:813dcc80987e 2188 static void SPI_2linesTxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
mbed_official 610:813dcc80987e 2189 {
mbed_official 610:813dcc80987e 2190 /* Transmit data in packing Bit mode */
mbed_official 610:813dcc80987e 2191 if(hspi->TxXferCount >= 2)
mbed_official 610:813dcc80987e 2192 {
mbed_official 610:813dcc80987e 2193 hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
mbed_official 610:813dcc80987e 2194 hspi->pTxBuffPtr += sizeof(uint16_t);
mbed_official 610:813dcc80987e 2195 hspi->TxXferCount -= 2;
mbed_official 610:813dcc80987e 2196 }
mbed_official 610:813dcc80987e 2197 /* Transmit data in 8 Bit mode */
mbed_official 610:813dcc80987e 2198 else
mbed_official 610:813dcc80987e 2199 {
mbed_official 610:813dcc80987e 2200 *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr++);
mbed_official 610:813dcc80987e 2201 hspi->TxXferCount--;
mbed_official 610:813dcc80987e 2202 }
mbed_official 610:813dcc80987e 2203
mbed_official 610:813dcc80987e 2204 /* check the end of the transmission */
mbed_official 610:813dcc80987e 2205 if(hspi->TxXferCount == 0)
mbed_official 610:813dcc80987e 2206 {
mbed_official 610:813dcc80987e 2207 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
mbed_official 610:813dcc80987e 2208 {
mbed_official 610:813dcc80987e 2209 hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
mbed_official 610:813dcc80987e 2210 }
mbed_official 610:813dcc80987e 2211 /* Disable TXE interrupt */
mbed_official 610:813dcc80987e 2212 __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE);
mbed_official 610:813dcc80987e 2213
mbed_official 610:813dcc80987e 2214 if(hspi->RxXferCount == 0)
mbed_official 610:813dcc80987e 2215 {
mbed_official 610:813dcc80987e 2216 SPI_CloseRxTx_ISR(hspi);
mbed_official 610:813dcc80987e 2217 }
mbed_official 610:813dcc80987e 2218 }
mbed_official 610:813dcc80987e 2219 }
mbed_official 610:813dcc80987e 2220
mbed_official 610:813dcc80987e 2221 /**
mbed_official 610:813dcc80987e 2222 * @brief Rx 16-bit handler for Transmit and Receive in Interrupt mode.
mbed_official 610:813dcc80987e 2223 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 2224 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 2225 * @retval None
mbed_official 610:813dcc80987e 2226 */
mbed_official 610:813dcc80987e 2227 static void SPI_2linesRxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
mbed_official 610:813dcc80987e 2228 {
mbed_official 610:813dcc80987e 2229 /* Receive data in 16 Bit mode */
mbed_official 610:813dcc80987e 2230 *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
mbed_official 610:813dcc80987e 2231 hspi->pRxBuffPtr += sizeof(uint16_t);
mbed_official 610:813dcc80987e 2232 hspi->RxXferCount--;
mbed_official 610:813dcc80987e 2233
mbed_official 610:813dcc80987e 2234 if(hspi->RxXferCount == 0)
mbed_official 610:813dcc80987e 2235 {
mbed_official 610:813dcc80987e 2236 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
mbed_official 610:813dcc80987e 2237 {
mbed_official 610:813dcc80987e 2238 hspi->RxISR = SPI_2linesRxISR_16BITCRC;
mbed_official 610:813dcc80987e 2239 return;
mbed_official 610:813dcc80987e 2240 }
mbed_official 610:813dcc80987e 2241
mbed_official 610:813dcc80987e 2242 /* Disable RXNE interrupt */
mbed_official 610:813dcc80987e 2243 __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE);
mbed_official 610:813dcc80987e 2244
mbed_official 610:813dcc80987e 2245 if(hspi->TxXferCount == 0)
mbed_official 610:813dcc80987e 2246 {
mbed_official 610:813dcc80987e 2247 SPI_CloseRxTx_ISR(hspi);
mbed_official 610:813dcc80987e 2248 }
mbed_official 610:813dcc80987e 2249 }
mbed_official 610:813dcc80987e 2250 }
mbed_official 610:813dcc80987e 2251
mbed_official 610:813dcc80987e 2252 /**
mbed_official 610:813dcc80987e 2253 * @brief Manage the CRC 16-bit receive for Transmit and Receive in Interrupt mode.
mbed_official 610:813dcc80987e 2254 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 2255 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 2256 * @retval None
mbed_official 610:813dcc80987e 2257 */
mbed_official 610:813dcc80987e 2258 static void SPI_2linesRxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi)
mbed_official 610:813dcc80987e 2259 {
mbed_official 610:813dcc80987e 2260 /* Receive data in 16 Bit mode */
mbed_official 610:813dcc80987e 2261 __IO uint16_t tmpreg = hspi->Instance->DR;
mbed_official 610:813dcc80987e 2262 UNUSED(tmpreg); /* To avoid GCC warning */
mbed_official 610:813dcc80987e 2263
mbed_official 610:813dcc80987e 2264 /* Disable RXNE interrupt */
mbed_official 610:813dcc80987e 2265 __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE);
mbed_official 610:813dcc80987e 2266
mbed_official 610:813dcc80987e 2267 SPI_CloseRxTx_ISR(hspi);
mbed_official 610:813dcc80987e 2268 }
mbed_official 610:813dcc80987e 2269
mbed_official 610:813dcc80987e 2270 /**
mbed_official 610:813dcc80987e 2271 * @brief Tx 16-bit handler for Transmit and Receive in Interrupt mode.
mbed_official 610:813dcc80987e 2272 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 2273 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 2274 * @retval None
mbed_official 610:813dcc80987e 2275 */
mbed_official 610:813dcc80987e 2276 static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
mbed_official 610:813dcc80987e 2277 {
mbed_official 610:813dcc80987e 2278 /* Transmit data in 16 Bit mode */
mbed_official 610:813dcc80987e 2279 hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
mbed_official 610:813dcc80987e 2280 hspi->pTxBuffPtr += sizeof(uint16_t);
mbed_official 610:813dcc80987e 2281 hspi->TxXferCount--;
mbed_official 610:813dcc80987e 2282
mbed_official 610:813dcc80987e 2283 /* Enable CRC Transmission */
mbed_official 610:813dcc80987e 2284 if(hspi->TxXferCount == 0)
mbed_official 610:813dcc80987e 2285 {
mbed_official 610:813dcc80987e 2286 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
mbed_official 610:813dcc80987e 2287 {
mbed_official 610:813dcc80987e 2288 hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
mbed_official 610:813dcc80987e 2289 }
mbed_official 610:813dcc80987e 2290 /* Disable TXE interrupt */
mbed_official 610:813dcc80987e 2291 __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE);
mbed_official 610:813dcc80987e 2292
mbed_official 610:813dcc80987e 2293 if(hspi->RxXferCount == 0)
mbed_official 610:813dcc80987e 2294 {
mbed_official 610:813dcc80987e 2295 SPI_CloseRxTx_ISR(hspi);
mbed_official 610:813dcc80987e 2296 }
mbed_official 610:813dcc80987e 2297 }
mbed_official 610:813dcc80987e 2298 }
mbed_official 610:813dcc80987e 2299
mbed_official 610:813dcc80987e 2300 /**
mbed_official 610:813dcc80987e 2301 * @brief Manage the CRC 8-bit receive in Interrupt context.
mbed_official 610:813dcc80987e 2302 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 2303 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 2304 * @retval None
mbed_official 610:813dcc80987e 2305 */
mbed_official 610:813dcc80987e 2306 static void SPI_RxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi)
mbed_official 610:813dcc80987e 2307 {
mbed_official 610:813dcc80987e 2308 __IO uint8_t tmpreg = *((uint8_t*)&hspi->Instance->DR);
mbed_official 610:813dcc80987e 2309 UNUSED(tmpreg); /* To avoid GCC warning */
mbed_official 610:813dcc80987e 2310
mbed_official 610:813dcc80987e 2311 hspi->CRCSize--;
mbed_official 610:813dcc80987e 2312
mbed_official 610:813dcc80987e 2313 if(hspi->CRCSize == 0)
mbed_official 610:813dcc80987e 2314 {
mbed_official 610:813dcc80987e 2315 SPI_CloseRx_ISR(hspi);
mbed_official 610:813dcc80987e 2316 }
mbed_official 610:813dcc80987e 2317 }
mbed_official 610:813dcc80987e 2318
mbed_official 610:813dcc80987e 2319 /**
mbed_official 610:813dcc80987e 2320 * @brief Manage the receive 8-bit in Interrupt context.
mbed_official 610:813dcc80987e 2321 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 2322 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 2323 * @retval None
mbed_official 610:813dcc80987e 2324 */
mbed_official 610:813dcc80987e 2325 static void SPI_RxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
mbed_official 610:813dcc80987e 2326 {
mbed_official 610:813dcc80987e 2327 *hspi->pRxBuffPtr++ = (*(__IO uint8_t *)&hspi->Instance->DR);
mbed_official 610:813dcc80987e 2328 hspi->RxXferCount--;
mbed_official 610:813dcc80987e 2329
mbed_official 610:813dcc80987e 2330 /* Enable CRC Transmission */
mbed_official 610:813dcc80987e 2331 if((hspi->RxXferCount == 1) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
mbed_official 610:813dcc80987e 2332 {
mbed_official 610:813dcc80987e 2333 hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
mbed_official 610:813dcc80987e 2334 }
mbed_official 610:813dcc80987e 2335
mbed_official 610:813dcc80987e 2336 if(hspi->RxXferCount == 0)
mbed_official 610:813dcc80987e 2337 {
mbed_official 610:813dcc80987e 2338 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
mbed_official 610:813dcc80987e 2339 {
mbed_official 610:813dcc80987e 2340 hspi->RxISR = SPI_RxISR_8BITCRC;
mbed_official 610:813dcc80987e 2341 return;
mbed_official 610:813dcc80987e 2342 }
mbed_official 610:813dcc80987e 2343 SPI_CloseRx_ISR(hspi);
mbed_official 610:813dcc80987e 2344 }
mbed_official 610:813dcc80987e 2345 }
mbed_official 610:813dcc80987e 2346
mbed_official 610:813dcc80987e 2347 /**
mbed_official 610:813dcc80987e 2348 * @brief Manage the CRC 16-bit receive in Interrupt context.
mbed_official 610:813dcc80987e 2349 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 2350 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 2351 * @retval None
mbed_official 610:813dcc80987e 2352 */
mbed_official 610:813dcc80987e 2353 static void SPI_RxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi)
mbed_official 610:813dcc80987e 2354 {
mbed_official 610:813dcc80987e 2355 __IO uint16_t tmpreg;
mbed_official 610:813dcc80987e 2356
mbed_official 610:813dcc80987e 2357 tmpreg = hspi->Instance->DR;
mbed_official 610:813dcc80987e 2358 UNUSED(tmpreg); /* To avoid GCC warning */
mbed_official 610:813dcc80987e 2359
mbed_official 610:813dcc80987e 2360 /* Disable RXNE and ERR interrupt */
mbed_official 610:813dcc80987e 2361 __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
mbed_official 610:813dcc80987e 2362
mbed_official 610:813dcc80987e 2363 SPI_CloseRx_ISR(hspi);
mbed_official 610:813dcc80987e 2364 }
mbed_official 610:813dcc80987e 2365
mbed_official 610:813dcc80987e 2366 /**
mbed_official 610:813dcc80987e 2367 * @brief Manage the 16-bit receive in Interrupt context.
mbed_official 610:813dcc80987e 2368 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 2369 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 2370 * @retval None
mbed_official 610:813dcc80987e 2371 */
mbed_official 610:813dcc80987e 2372 static void SPI_RxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
mbed_official 610:813dcc80987e 2373 {
mbed_official 610:813dcc80987e 2374 *((uint16_t *)hspi->pRxBuffPtr) = hspi->Instance->DR;
mbed_official 610:813dcc80987e 2375 hspi->pRxBuffPtr += sizeof(uint16_t);
mbed_official 610:813dcc80987e 2376 hspi->RxXferCount--;
mbed_official 610:813dcc80987e 2377
mbed_official 610:813dcc80987e 2378 /* Enable CRC Transmission */
mbed_official 610:813dcc80987e 2379 if((hspi->RxXferCount == 1) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
mbed_official 610:813dcc80987e 2380 {
mbed_official 610:813dcc80987e 2381 hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
mbed_official 610:813dcc80987e 2382 }
mbed_official 610:813dcc80987e 2383
mbed_official 610:813dcc80987e 2384 if(hspi->RxXferCount == 0)
mbed_official 610:813dcc80987e 2385 {
mbed_official 610:813dcc80987e 2386 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
mbed_official 610:813dcc80987e 2387 {
mbed_official 610:813dcc80987e 2388 hspi->RxISR = SPI_RxISR_16BITCRC;
mbed_official 610:813dcc80987e 2389 return;
mbed_official 610:813dcc80987e 2390 }
mbed_official 610:813dcc80987e 2391 SPI_CloseRx_ISR(hspi);
mbed_official 610:813dcc80987e 2392 }
mbed_official 610:813dcc80987e 2393 }
mbed_official 610:813dcc80987e 2394
mbed_official 610:813dcc80987e 2395 /**
mbed_official 610:813dcc80987e 2396 * @brief Handle the data 8-bit transmit in Interrupt mode.
mbed_official 610:813dcc80987e 2397 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 2398 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 2399 * @retval None
mbed_official 610:813dcc80987e 2400 */
mbed_official 610:813dcc80987e 2401 static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
mbed_official 610:813dcc80987e 2402 {
mbed_official 610:813dcc80987e 2403 *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr++);
mbed_official 610:813dcc80987e 2404 hspi->TxXferCount--;
mbed_official 610:813dcc80987e 2405
mbed_official 610:813dcc80987e 2406 if(hspi->TxXferCount == 0)
mbed_official 610:813dcc80987e 2407 {
mbed_official 610:813dcc80987e 2408 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
mbed_official 610:813dcc80987e 2409 {
mbed_official 610:813dcc80987e 2410 /* Enable CRC Transmission */
mbed_official 610:813dcc80987e 2411 hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
mbed_official 610:813dcc80987e 2412 }
mbed_official 610:813dcc80987e 2413
mbed_official 610:813dcc80987e 2414 SPI_CloseTx_ISR(hspi);
mbed_official 610:813dcc80987e 2415 }
mbed_official 610:813dcc80987e 2416 }
mbed_official 610:813dcc80987e 2417
mbed_official 610:813dcc80987e 2418 /**
mbed_official 610:813dcc80987e 2419 * @brief Handle the data 16-bit transmit in Interrupt mode.
mbed_official 610:813dcc80987e 2420 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 2421 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 2422 * @retval None
mbed_official 610:813dcc80987e 2423 */
mbed_official 610:813dcc80987e 2424 static void SPI_TxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
mbed_official 610:813dcc80987e 2425 {
mbed_official 610:813dcc80987e 2426 /* Transmit data in 16 Bit mode */
mbed_official 610:813dcc80987e 2427 hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
mbed_official 610:813dcc80987e 2428 hspi->pTxBuffPtr += sizeof(uint16_t);
mbed_official 610:813dcc80987e 2429 hspi->TxXferCount--;
mbed_official 610:813dcc80987e 2430
mbed_official 610:813dcc80987e 2431 if(hspi->TxXferCount == 0)
mbed_official 610:813dcc80987e 2432 {
mbed_official 610:813dcc80987e 2433 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
mbed_official 610:813dcc80987e 2434 {
mbed_official 610:813dcc80987e 2435 /* Enable CRC Transmission */
mbed_official 610:813dcc80987e 2436 hspi->Instance->CR1 |= SPI_CR1_CRCNEXT;
mbed_official 610:813dcc80987e 2437 }
mbed_official 610:813dcc80987e 2438 SPI_CloseTx_ISR(hspi);
mbed_official 610:813dcc80987e 2439 }
mbed_official 610:813dcc80987e 2440 }
mbed_official 610:813dcc80987e 2441
mbed_official 610:813dcc80987e 2442 /**
mbed_official 610:813dcc80987e 2443 * @brief Handle SPI Communication Timeout.
mbed_official 610:813dcc80987e 2444 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 2445 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 2446 * @param Flag : SPI flag to check
mbed_official 610:813dcc80987e 2447 * @param State : flag state to check
mbed_official 610:813dcc80987e 2448 * @param Timeout : Timeout duration
mbed_official 610:813dcc80987e 2449 * @retval HAL status
mbed_official 610:813dcc80987e 2450 */
mbed_official 610:813dcc80987e 2451 static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, uint32_t State, uint32_t Timeout)
mbed_official 610:813dcc80987e 2452 {
mbed_official 610:813dcc80987e 2453 uint32_t tickstart = HAL_GetTick();
mbed_official 610:813dcc80987e 2454
mbed_official 610:813dcc80987e 2455 while((hspi->Instance->SR & Flag) != State)
mbed_official 610:813dcc80987e 2456 {
mbed_official 610:813dcc80987e 2457 if(Timeout != HAL_MAX_DELAY)
mbed_official 610:813dcc80987e 2458 {
mbed_official 610:813dcc80987e 2459 if((Timeout == 0) || ((HAL_GetTick()-tickstart) >= Timeout))
mbed_official 610:813dcc80987e 2460 {
mbed_official 610:813dcc80987e 2461 /* Disable the SPI and reset the CRC: the CRC value should be cleared
mbed_official 610:813dcc80987e 2462 on both master and slave sides in order to resynchronize the master
mbed_official 610:813dcc80987e 2463 and slave for their respective CRC calculation */
mbed_official 610:813dcc80987e 2464
mbed_official 610:813dcc80987e 2465 /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
mbed_official 610:813dcc80987e 2466 __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
mbed_official 610:813dcc80987e 2467
mbed_official 610:813dcc80987e 2468 if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
mbed_official 610:813dcc80987e 2469 {
mbed_official 610:813dcc80987e 2470 /* Disable SPI peripheral */
mbed_official 610:813dcc80987e 2471 __HAL_SPI_DISABLE(hspi);
mbed_official 610:813dcc80987e 2472 }
mbed_official 610:813dcc80987e 2473
mbed_official 610:813dcc80987e 2474 /* Reset CRC Calculation */
mbed_official 610:813dcc80987e 2475 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
mbed_official 610:813dcc80987e 2476 {
mbed_official 610:813dcc80987e 2477 SPI_RESET_CRC(hspi);
mbed_official 610:813dcc80987e 2478 }
mbed_official 610:813dcc80987e 2479
mbed_official 610:813dcc80987e 2480 hspi->State= HAL_SPI_STATE_READY;
mbed_official 610:813dcc80987e 2481
mbed_official 610:813dcc80987e 2482 /* Process Unlocked */
mbed_official 610:813dcc80987e 2483 __HAL_UNLOCK(hspi);
mbed_official 610:813dcc80987e 2484
mbed_official 610:813dcc80987e 2485 return HAL_TIMEOUT;
mbed_official 610:813dcc80987e 2486 }
mbed_official 610:813dcc80987e 2487 }
mbed_official 610:813dcc80987e 2488 }
mbed_official 610:813dcc80987e 2489
mbed_official 610:813dcc80987e 2490 return HAL_OK;
mbed_official 610:813dcc80987e 2491 }
mbed_official 610:813dcc80987e 2492
mbed_official 610:813dcc80987e 2493 /**
mbed_official 610:813dcc80987e 2494 * @brief Handle SPI FIFO Communication Timeout.
mbed_official 610:813dcc80987e 2495 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 2496 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 2497 * @param Fifo : Fifo to check
mbed_official 610:813dcc80987e 2498 * @param State : Fifo state to check
mbed_official 610:813dcc80987e 2499 * @param Timeout : Timeout duration
mbed_official 610:813dcc80987e 2500 * @retval HAL status
mbed_official 610:813dcc80987e 2501 */
mbed_official 610:813dcc80987e 2502 static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Fifo, uint32_t State, uint32_t Timeout)
mbed_official 610:813dcc80987e 2503 {
mbed_official 610:813dcc80987e 2504 __IO uint8_t tmpreg;
mbed_official 610:813dcc80987e 2505 uint32_t tickstart = HAL_GetTick();
mbed_official 610:813dcc80987e 2506
mbed_official 610:813dcc80987e 2507 while((hspi->Instance->SR & Fifo) != State)
mbed_official 610:813dcc80987e 2508 {
mbed_official 610:813dcc80987e 2509 if((Fifo == SPI_SR_FRLVL) && (State == SPI_FRLVL_EMPTY))
mbed_official 610:813dcc80987e 2510 {
mbed_official 610:813dcc80987e 2511 tmpreg = *((__IO uint8_t*)&hspi->Instance->DR);
mbed_official 610:813dcc80987e 2512 UNUSED(tmpreg); /* To avoid GCC warning */
mbed_official 610:813dcc80987e 2513 }
mbed_official 610:813dcc80987e 2514
mbed_official 610:813dcc80987e 2515 if(Timeout != HAL_MAX_DELAY)
mbed_official 610:813dcc80987e 2516 {
mbed_official 610:813dcc80987e 2517 if((Timeout == 0) || ((HAL_GetTick()-tickstart) >= Timeout))
mbed_official 610:813dcc80987e 2518 {
mbed_official 610:813dcc80987e 2519 /* Disable the SPI and reset the CRC: the CRC value should be cleared
mbed_official 610:813dcc80987e 2520 on both master and slave sides in order to resynchronize the master
mbed_official 610:813dcc80987e 2521 and slave for their respective CRC calculation */
mbed_official 610:813dcc80987e 2522
mbed_official 610:813dcc80987e 2523 /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
mbed_official 610:813dcc80987e 2524 __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
mbed_official 610:813dcc80987e 2525
mbed_official 610:813dcc80987e 2526 if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
mbed_official 610:813dcc80987e 2527 {
mbed_official 610:813dcc80987e 2528 /* Disable SPI peripheral */
mbed_official 610:813dcc80987e 2529 __HAL_SPI_DISABLE(hspi);
mbed_official 610:813dcc80987e 2530 }
mbed_official 610:813dcc80987e 2531
mbed_official 610:813dcc80987e 2532 /* Reset CRC Calculation */
mbed_official 610:813dcc80987e 2533 if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
mbed_official 610:813dcc80987e 2534 {
mbed_official 610:813dcc80987e 2535 SPI_RESET_CRC(hspi);
mbed_official 610:813dcc80987e 2536 }
mbed_official 610:813dcc80987e 2537
mbed_official 610:813dcc80987e 2538 hspi->State = HAL_SPI_STATE_READY;
mbed_official 610:813dcc80987e 2539
mbed_official 610:813dcc80987e 2540 /* Process Unlocked */
mbed_official 610:813dcc80987e 2541 __HAL_UNLOCK(hspi);
mbed_official 610:813dcc80987e 2542
mbed_official 610:813dcc80987e 2543 return HAL_TIMEOUT;
mbed_official 610:813dcc80987e 2544 }
mbed_official 610:813dcc80987e 2545 }
mbed_official 610:813dcc80987e 2546 }
mbed_official 610:813dcc80987e 2547
mbed_official 610:813dcc80987e 2548 return HAL_OK;
mbed_official 610:813dcc80987e 2549 }
mbed_official 610:813dcc80987e 2550
mbed_official 610:813dcc80987e 2551 /**
mbed_official 610:813dcc80987e 2552 * @brief Handle the check of the RX transaction complete.
mbed_official 610:813dcc80987e 2553 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 2554 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 2555 * @param Timeout : Timeout duration
mbed_official 610:813dcc80987e 2556 * @retval None
mbed_official 610:813dcc80987e 2557 */
mbed_official 610:813dcc80987e 2558 static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout)
mbed_official 610:813dcc80987e 2559 {
mbed_official 610:813dcc80987e 2560 if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
mbed_official 610:813dcc80987e 2561 {
mbed_official 610:813dcc80987e 2562 /* Disable SPI peripheral */
mbed_official 610:813dcc80987e 2563 __HAL_SPI_DISABLE(hspi);
mbed_official 610:813dcc80987e 2564 }
mbed_official 610:813dcc80987e 2565
mbed_official 610:813dcc80987e 2566 /* Control the BSY flag */
mbed_official 610:813dcc80987e 2567 if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout) != HAL_OK)
mbed_official 610:813dcc80987e 2568 {
mbed_official 610:813dcc80987e 2569 hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
mbed_official 610:813dcc80987e 2570 return HAL_TIMEOUT;
mbed_official 610:813dcc80987e 2571 }
mbed_official 610:813dcc80987e 2572
mbed_official 610:813dcc80987e 2573 if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
mbed_official 610:813dcc80987e 2574 {
mbed_official 610:813dcc80987e 2575 /* Empty the FRLVL fifo */
mbed_official 610:813dcc80987e 2576 if(SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, Timeout) != HAL_OK)
mbed_official 610:813dcc80987e 2577 {
mbed_official 610:813dcc80987e 2578 hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
mbed_official 610:813dcc80987e 2579 return HAL_TIMEOUT;
mbed_official 610:813dcc80987e 2580 }
mbed_official 610:813dcc80987e 2581 }
mbed_official 610:813dcc80987e 2582 return HAL_OK;
mbed_official 610:813dcc80987e 2583 }
mbed_official 610:813dcc80987e 2584
mbed_official 610:813dcc80987e 2585 /**
mbed_official 610:813dcc80987e 2586 * @brief Handle the check of the RXTX or TX transaction complete.
mbed_official 610:813dcc80987e 2587 * @param hspi: SPI handle
mbed_official 610:813dcc80987e 2588 * @param Timeout : Timeout duration
mbed_official 610:813dcc80987e 2589 */
mbed_official 610:813dcc80987e 2590 static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout)
mbed_official 610:813dcc80987e 2591 {
mbed_official 610:813dcc80987e 2592 /* Control if the TX fifo is empty */
mbed_official 610:813dcc80987e 2593 if(SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FTLVL, SPI_FTLVL_EMPTY, Timeout) != HAL_OK)
mbed_official 610:813dcc80987e 2594 {
mbed_official 610:813dcc80987e 2595 hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
mbed_official 610:813dcc80987e 2596 return HAL_TIMEOUT;
mbed_official 610:813dcc80987e 2597 }
mbed_official 610:813dcc80987e 2598 /* Control the BSY flag */
mbed_official 610:813dcc80987e 2599 if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout) != HAL_OK)
mbed_official 610:813dcc80987e 2600 {
mbed_official 610:813dcc80987e 2601 hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
mbed_official 610:813dcc80987e 2602 return HAL_TIMEOUT;
mbed_official 610:813dcc80987e 2603 }
mbed_official 610:813dcc80987e 2604 return HAL_OK;
mbed_official 610:813dcc80987e 2605 }
mbed_official 610:813dcc80987e 2606
mbed_official 610:813dcc80987e 2607 /**
mbed_official 610:813dcc80987e 2608 * @brief Handle the end of the RXTX transaction.
mbed_official 610:813dcc80987e 2609 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 2610 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 2611 * @retval None
mbed_official 610:813dcc80987e 2612 */
mbed_official 610:813dcc80987e 2613 static void SPI_CloseRxTx_ISR(SPI_HandleTypeDef *hspi)
mbed_official 610:813dcc80987e 2614 {
mbed_official 610:813dcc80987e 2615 /* Disable ERR interrupt */
mbed_official 610:813dcc80987e 2616 __HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR);
mbed_official 610:813dcc80987e 2617
mbed_official 610:813dcc80987e 2618 /* Check the end of the transaction */
mbed_official 610:813dcc80987e 2619 if(SPI_EndRxTxTransaction(hspi,SPI_DEFAULT_TIMEOUT)!=HAL_OK)
mbed_official 610:813dcc80987e 2620 {
mbed_official 610:813dcc80987e 2621 hspi->ErrorCode|= HAL_SPI_ERROR_FLAG;
mbed_official 610:813dcc80987e 2622 }
mbed_official 610:813dcc80987e 2623
mbed_official 610:813dcc80987e 2624 /* Check if CRC error occurred */
mbed_official 610:813dcc80987e 2625 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
mbed_official 610:813dcc80987e 2626 {
mbed_official 610:813dcc80987e 2627 hspi->State = HAL_SPI_STATE_READY;
mbed_official 610:813dcc80987e 2628 hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
mbed_official 610:813dcc80987e 2629 __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
mbed_official 610:813dcc80987e 2630 HAL_SPI_ErrorCallback(hspi);
mbed_official 610:813dcc80987e 2631 }
mbed_official 610:813dcc80987e 2632 else
mbed_official 610:813dcc80987e 2633 {
mbed_official 610:813dcc80987e 2634 if(hspi->ErrorCode == HAL_SPI_ERROR_NONE)
mbed_official 610:813dcc80987e 2635 {
mbed_official 610:813dcc80987e 2636 if(hspi->State == HAL_SPI_STATE_BUSY_RX)
mbed_official 610:813dcc80987e 2637 {
mbed_official 610:813dcc80987e 2638 hspi->State = HAL_SPI_STATE_READY;
mbed_official 610:813dcc80987e 2639 HAL_SPI_RxCpltCallback(hspi);
mbed_official 610:813dcc80987e 2640 }
mbed_official 610:813dcc80987e 2641 else
mbed_official 610:813dcc80987e 2642 {
mbed_official 610:813dcc80987e 2643 hspi->State = HAL_SPI_STATE_READY;
mbed_official 610:813dcc80987e 2644 HAL_SPI_TxRxCpltCallback(hspi);
mbed_official 610:813dcc80987e 2645 }
mbed_official 610:813dcc80987e 2646 }
mbed_official 610:813dcc80987e 2647 else
mbed_official 610:813dcc80987e 2648 {
mbed_official 610:813dcc80987e 2649 hspi->State = HAL_SPI_STATE_READY;
mbed_official 610:813dcc80987e 2650 HAL_SPI_ErrorCallback(hspi);
mbed_official 610:813dcc80987e 2651 }
mbed_official 610:813dcc80987e 2652 }
mbed_official 610:813dcc80987e 2653 }
mbed_official 610:813dcc80987e 2654
mbed_official 610:813dcc80987e 2655 /**
mbed_official 610:813dcc80987e 2656 * @brief Handle the end of the RX transaction.
mbed_official 610:813dcc80987e 2657 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 2658 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 2659 * @retval None
mbed_official 610:813dcc80987e 2660 */
mbed_official 610:813dcc80987e 2661 static void SPI_CloseRx_ISR(SPI_HandleTypeDef *hspi)
mbed_official 610:813dcc80987e 2662 {
mbed_official 610:813dcc80987e 2663 /* Disable RXNE and ERR interrupt */
mbed_official 610:813dcc80987e 2664 __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
mbed_official 610:813dcc80987e 2665
mbed_official 610:813dcc80987e 2666 /* Check the end of the transaction */
mbed_official 610:813dcc80987e 2667 if(SPI_EndRxTransaction(hspi,SPI_DEFAULT_TIMEOUT)!=HAL_OK)
mbed_official 610:813dcc80987e 2668 {
mbed_official 610:813dcc80987e 2669 hspi->ErrorCode|= HAL_SPI_ERROR_FLAG;
mbed_official 610:813dcc80987e 2670 }
mbed_official 610:813dcc80987e 2671 hspi->State = HAL_SPI_STATE_READY;
mbed_official 610:813dcc80987e 2672
mbed_official 610:813dcc80987e 2673 /* Check if CRC error occurred */
mbed_official 610:813dcc80987e 2674 if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
mbed_official 610:813dcc80987e 2675 {
mbed_official 610:813dcc80987e 2676 hspi->ErrorCode|= HAL_SPI_ERROR_CRC;
mbed_official 610:813dcc80987e 2677 __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
mbed_official 610:813dcc80987e 2678 HAL_SPI_ErrorCallback(hspi);
mbed_official 610:813dcc80987e 2679 }
mbed_official 610:813dcc80987e 2680 else
mbed_official 610:813dcc80987e 2681 {
mbed_official 610:813dcc80987e 2682 if(hspi->ErrorCode == HAL_SPI_ERROR_NONE)
mbed_official 610:813dcc80987e 2683 {
mbed_official 610:813dcc80987e 2684 HAL_SPI_RxCpltCallback(hspi);
mbed_official 610:813dcc80987e 2685 }
mbed_official 610:813dcc80987e 2686 else
mbed_official 610:813dcc80987e 2687 {
mbed_official 610:813dcc80987e 2688 HAL_SPI_ErrorCallback(hspi);
mbed_official 610:813dcc80987e 2689 }
mbed_official 610:813dcc80987e 2690 }
mbed_official 610:813dcc80987e 2691 }
mbed_official 610:813dcc80987e 2692
mbed_official 610:813dcc80987e 2693 /**
mbed_official 610:813dcc80987e 2694 * @brief Handle the end of the TX transaction.
mbed_official 610:813dcc80987e 2695 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official 610:813dcc80987e 2696 * the configuration information for SPI module.
mbed_official 610:813dcc80987e 2697 * @retval None
mbed_official 610:813dcc80987e 2698 */
mbed_official 610:813dcc80987e 2699 static void SPI_CloseTx_ISR(SPI_HandleTypeDef *hspi)
mbed_official 610:813dcc80987e 2700 {
mbed_official 610:813dcc80987e 2701 /* Disable TXE and ERR interrupt */
mbed_official 610:813dcc80987e 2702 __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));
mbed_official 610:813dcc80987e 2703
mbed_official 610:813dcc80987e 2704 /* Check the end of the transaction */
mbed_official 610:813dcc80987e 2705 if(SPI_EndRxTxTransaction(hspi,SPI_DEFAULT_TIMEOUT)!=HAL_OK)
mbed_official 610:813dcc80987e 2706 {
mbed_official 610:813dcc80987e 2707 hspi->ErrorCode|= HAL_SPI_ERROR_FLAG;
mbed_official 610:813dcc80987e 2708 }
mbed_official 610:813dcc80987e 2709
mbed_official 610:813dcc80987e 2710 /* Clear overrun flag in 2 Lines communication mode because received is not read */
mbed_official 610:813dcc80987e 2711 if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
mbed_official 610:813dcc80987e 2712 {
mbed_official 610:813dcc80987e 2713 __HAL_SPI_CLEAR_OVRFLAG(hspi);
mbed_official 610:813dcc80987e 2714 }
mbed_official 610:813dcc80987e 2715
mbed_official 610:813dcc80987e 2716 hspi->State = HAL_SPI_STATE_READY;
mbed_official 610:813dcc80987e 2717 if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
mbed_official 610:813dcc80987e 2718 {
mbed_official 610:813dcc80987e 2719 HAL_SPI_ErrorCallback(hspi);
mbed_official 610:813dcc80987e 2720 }
mbed_official 610:813dcc80987e 2721 else
mbed_official 610:813dcc80987e 2722 {
mbed_official 610:813dcc80987e 2723 HAL_SPI_TxCpltCallback(hspi);
mbed_official 610:813dcc80987e 2724 }
mbed_official 610:813dcc80987e 2725 }
mbed_official 610:813dcc80987e 2726
mbed_official 610:813dcc80987e 2727 /**
mbed_official 610:813dcc80987e 2728 * @}
mbed_official 610:813dcc80987e 2729 */
mbed_official 610:813dcc80987e 2730
mbed_official 610:813dcc80987e 2731 #endif /* HAL_SPI_MODULE_ENABLED */
mbed_official 610:813dcc80987e 2732
mbed_official 610:813dcc80987e 2733 /**
mbed_official 610:813dcc80987e 2734 * @}
mbed_official 610:813dcc80987e 2735 */
mbed_official 610:813dcc80987e 2736
mbed_official 610:813dcc80987e 2737 /**
mbed_official 610:813dcc80987e 2738 * @}
mbed_official 610:813dcc80987e 2739 */
mbed_official 610:813dcc80987e 2740
mbed_official 610:813dcc80987e 2741 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/