mbed library sources
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targets/cmsis/TARGET_STM/TARGET_STM32L4/stm32l4xx_hal_adc.c@637:ed69428d4850, 2015-12-22 (annotated)
- Committer:
- jaerts
- Date:
- Tue Dec 22 13:22:16 2015 +0000
- Revision:
- 637:ed69428d4850
- Parent:
- 610:813dcc80987e
Add very shady LPC1768 CAN Filter implementation
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 610:813dcc80987e | 1 | /** |
mbed_official | 610:813dcc80987e | 2 | ****************************************************************************** |
mbed_official | 610:813dcc80987e | 3 | * @file stm32l4xx_hal_adc.c |
mbed_official | 610:813dcc80987e | 4 | * @author MCD Application conversion |
mbed_official | 610:813dcc80987e | 5 | * @version V1.0.0 |
mbed_official | 610:813dcc80987e | 6 | * @date 26-June-2015 |
mbed_official | 610:813dcc80987e | 7 | * @brief This file provides firmware functions to manage the following |
mbed_official | 610:813dcc80987e | 8 | * functionalities of the Analog to Digital Convertor (ADC) |
mbed_official | 610:813dcc80987e | 9 | * peripheral: |
mbed_official | 610:813dcc80987e | 10 | * + Initialization and de-initialization functions |
mbed_official | 610:813dcc80987e | 11 | * ++ Configuration of ADC |
mbed_official | 610:813dcc80987e | 12 | * + Operation functions |
mbed_official | 610:813dcc80987e | 13 | * ++ Start, stop, get result of regular conversions of regular |
mbed_official | 610:813dcc80987e | 14 | * using 3 possible modes: polling, interruption or DMA. |
mbed_official | 610:813dcc80987e | 15 | * + Control functions |
mbed_official | 610:813dcc80987e | 16 | * ++ Analog Watchdog configuration |
mbed_official | 610:813dcc80987e | 17 | * ++ Channels configuration on regular group |
mbed_official | 610:813dcc80987e | 18 | * + State functions |
mbed_official | 610:813dcc80987e | 19 | * ++ ADC state machine management |
mbed_official | 610:813dcc80987e | 20 | * ++ Interrupts and flags management |
mbed_official | 610:813dcc80987e | 21 | * |
mbed_official | 610:813dcc80987e | 22 | @verbatim |
mbed_official | 610:813dcc80987e | 23 | ============================================================================== |
mbed_official | 610:813dcc80987e | 24 | ##### ADC specific features ##### |
mbed_official | 610:813dcc80987e | 25 | ============================================================================== |
mbed_official | 610:813dcc80987e | 26 | [..] |
mbed_official | 610:813dcc80987e | 27 | (#) 12-bit, 10-bit, 8-bit or 6-bit configurable resolution. |
mbed_official | 610:813dcc80987e | 28 | |
mbed_official | 610:813dcc80987e | 29 | (#) Interrupt generation at the end of regular conversion and in case of |
mbed_official | 610:813dcc80987e | 30 | analog watchdog and overrun events. |
mbed_official | 610:813dcc80987e | 31 | |
mbed_official | 610:813dcc80987e | 32 | (#) Single and continuous conversion modes. |
mbed_official | 610:813dcc80987e | 33 | |
mbed_official | 610:813dcc80987e | 34 | (#) Scan mode for automatic conversion of channel 0 to channel 'n'. |
mbed_official | 610:813dcc80987e | 35 | |
mbed_official | 610:813dcc80987e | 36 | (#) Data alignment with in-built data coherency. |
mbed_official | 610:813dcc80987e | 37 | |
mbed_official | 610:813dcc80987e | 38 | (#) Channel-wise programmable sampling time. |
mbed_official | 610:813dcc80987e | 39 | |
mbed_official | 610:813dcc80987e | 40 | (#) External trigger (timer or EXTI) with configurable polarity for |
mbed_official | 610:813dcc80987e | 41 | regular groups. |
mbed_official | 610:813dcc80987e | 42 | |
mbed_official | 610:813dcc80987e | 43 | (#) DMA request generation for transfer of regular group converted data. |
mbed_official | 610:813dcc80987e | 44 | |
mbed_official | 610:813dcc80987e | 45 | (#) Configurable delay between conversions in Dual interleaved mode. |
mbed_official | 610:813dcc80987e | 46 | |
mbed_official | 610:813dcc80987e | 47 | (#) ADC channels selectable single/differential input. |
mbed_official | 610:813dcc80987e | 48 | |
mbed_official | 610:813dcc80987e | 49 | (#) ADC offset on regular groups. |
mbed_official | 610:813dcc80987e | 50 | |
mbed_official | 610:813dcc80987e | 51 | (#) ADC supply requirements: 1.62 V to 3.6 V. |
mbed_official | 610:813dcc80987e | 52 | |
mbed_official | 610:813dcc80987e | 53 | (#) ADC input range: from Vref_ (connected to Vssa) to Vref+ (connected to |
mbed_official | 610:813dcc80987e | 54 | Vdda or to an external voltage reference). |
mbed_official | 610:813dcc80987e | 55 | |
mbed_official | 610:813dcc80987e | 56 | |
mbed_official | 610:813dcc80987e | 57 | |
mbed_official | 610:813dcc80987e | 58 | ##### How to use this driver ##### |
mbed_official | 610:813dcc80987e | 59 | ============================================================================== |
mbed_official | 610:813dcc80987e | 60 | [..] |
mbed_official | 610:813dcc80987e | 61 | |
mbed_official | 610:813dcc80987e | 62 | (#) Enable the ADC interface |
mbed_official | 610:813dcc80987e | 63 | As prerequisite, in HAL_ADC_MspInit(), ADC clock source must be |
mbed_official | 610:813dcc80987e | 64 | configured at RCC top level. |
mbed_official | 610:813dcc80987e | 65 | |
mbed_official | 610:813dcc80987e | 66 | Two different clock sources are available: |
mbed_official | 610:813dcc80987e | 67 | (++) - the ADC clock can be a specific clock source, coming from the system |
mbed_official | 610:813dcc80987e | 68 | clock, the PLLSAI1 or the PLLSAI2 running up to 80MHz. |
mbed_official | 610:813dcc80987e | 69 | (++) - or the ADC clock can be derived from the AHB clock of the ADC bus |
mbed_official | 610:813dcc80987e | 70 | interface, divided by a programmable factor |
mbed_official | 610:813dcc80987e | 71 | |
mbed_official | 610:813dcc80987e | 72 | |
mbed_official | 610:813dcc80987e | 73 | (++) For example, in case of PLLSAI2: |
mbed_official | 610:813dcc80987e | 74 | (+++) __HAL_RCC_ADC_CLK_ENABLE(); |
mbed_official | 610:813dcc80987e | 75 | (+++) HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit); |
mbed_official | 610:813dcc80987e | 76 | (+++) where |
mbed_official | 610:813dcc80987e | 77 | (+++) PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC |
mbed_official | 610:813dcc80987e | 78 | (+++) PeriphClkInit.AdcClockSelection = RCC_ADCCLKSOURCE_PLLSAI2 |
mbed_official | 610:813dcc80987e | 79 | |
mbed_official | 610:813dcc80987e | 80 | |
mbed_official | 610:813dcc80987e | 81 | (#) ADC pins configuration |
mbed_official | 610:813dcc80987e | 82 | (++) Enable the clock for the ADC GPIOs using the following function: |
mbed_official | 610:813dcc80987e | 83 | __HAL_RCC_GPIOx_CLK_ENABLE(); |
mbed_official | 610:813dcc80987e | 84 | (++) Configure these ADC pins in analog mode using HAL_GPIO_Init(); |
mbed_official | 610:813dcc80987e | 85 | |
mbed_official | 610:813dcc80987e | 86 | (#) Configure the ADC parameters (conversion resolution, data alignment, |
mbed_official | 610:813dcc80987e | 87 | continuous mode, ...) using the HAL_ADC_Init() function. |
mbed_official | 610:813dcc80987e | 88 | |
mbed_official | 610:813dcc80987e | 89 | (#) Optionally, perform an automatic ADC calibration to improve the |
mbed_official | 610:813dcc80987e | 90 | conversion accuracy using function HAL_ADCEx_Calibration_Start(). |
mbed_official | 610:813dcc80987e | 91 | |
mbed_official | 610:813dcc80987e | 92 | (#) Activate the ADC peripheral using one of the start functions: |
mbed_official | 610:813dcc80987e | 93 | HAL_ADC_Start(), HAL_ADC_Start_IT(), HAL_ADC_Start_DMA(), |
mbed_official | 610:813dcc80987e | 94 | HAL_ADCEx_InjectedStart(), HAL_ADCEx_InjectedStart_IT() or |
mbed_official | 610:813dcc80987e | 95 | HAL_ADCEx_MultiModeStart_DMA(). |
mbed_official | 610:813dcc80987e | 96 | |
mbed_official | 610:813dcc80987e | 97 | *** Channels to regular group configuration *** |
mbed_official | 610:813dcc80987e | 98 | ============================================ |
mbed_official | 610:813dcc80987e | 99 | [..] |
mbed_official | 610:813dcc80987e | 100 | (+) To configure the ADC regular group features, use |
mbed_official | 610:813dcc80987e | 101 | HAL_ADC_Init() and HAL_ADC_ConfigChannel() functions. |
mbed_official | 610:813dcc80987e | 102 | (+) To activate the continuous mode, use the HAL_ADC_Init() function. |
mbed_official | 610:813dcc80987e | 103 | (+) To read the ADC converted values, use the HAL_ADC_GetValue() function. |
mbed_official | 610:813dcc80987e | 104 | |
mbed_official | 610:813dcc80987e | 105 | *** DMA for regular configuration *** |
mbed_official | 610:813dcc80987e | 106 | ============================================================= |
mbed_official | 610:813dcc80987e | 107 | [..] |
mbed_official | 610:813dcc80987e | 108 | (+) To enable the DMA mode for regular group, use the |
mbed_official | 610:813dcc80987e | 109 | HAL_ADC_Start_DMA() function. |
mbed_official | 610:813dcc80987e | 110 | (+) To enable the generation of DMA requests continuously at the end of |
mbed_official | 610:813dcc80987e | 111 | the last DMA transfer, resort to DMAContinuousRequests parameter of |
mbed_official | 610:813dcc80987e | 112 | ADC handle initialization structure. |
mbed_official | 610:813dcc80987e | 113 | |
mbed_official | 610:813dcc80987e | 114 | |
mbed_official | 610:813dcc80987e | 115 | |
mbed_official | 610:813dcc80987e | 116 | @endverbatim |
mbed_official | 610:813dcc80987e | 117 | ****************************************************************************** |
mbed_official | 610:813dcc80987e | 118 | * @attention |
mbed_official | 610:813dcc80987e | 119 | * |
mbed_official | 610:813dcc80987e | 120 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
mbed_official | 610:813dcc80987e | 121 | * |
mbed_official | 610:813dcc80987e | 122 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 610:813dcc80987e | 123 | * are permitted provided that the following conditions are met: |
mbed_official | 610:813dcc80987e | 124 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 610:813dcc80987e | 125 | * this list of conditions and the following disclaimer. |
mbed_official | 610:813dcc80987e | 126 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 610:813dcc80987e | 127 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 610:813dcc80987e | 128 | * and/or other materials provided with the distribution. |
mbed_official | 610:813dcc80987e | 129 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 610:813dcc80987e | 130 | * may be used to endorse or promote products derived from this software |
mbed_official | 610:813dcc80987e | 131 | * without specific prior written permission. |
mbed_official | 610:813dcc80987e | 132 | * |
mbed_official | 610:813dcc80987e | 133 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 610:813dcc80987e | 134 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 610:813dcc80987e | 135 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 610:813dcc80987e | 136 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 610:813dcc80987e | 137 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 610:813dcc80987e | 138 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 610:813dcc80987e | 139 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 610:813dcc80987e | 140 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 610:813dcc80987e | 141 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 610:813dcc80987e | 142 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 610:813dcc80987e | 143 | * |
mbed_official | 610:813dcc80987e | 144 | ****************************************************************************** |
mbed_official | 610:813dcc80987e | 145 | */ |
mbed_official | 610:813dcc80987e | 146 | |
mbed_official | 610:813dcc80987e | 147 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 610:813dcc80987e | 148 | #include "stm32l4xx_hal.h" |
mbed_official | 610:813dcc80987e | 149 | |
mbed_official | 610:813dcc80987e | 150 | /** @addtogroup STM32L4xx_HAL_Driver |
mbed_official | 610:813dcc80987e | 151 | * @{ |
mbed_official | 610:813dcc80987e | 152 | */ |
mbed_official | 610:813dcc80987e | 153 | |
mbed_official | 610:813dcc80987e | 154 | /** @defgroup ADC ADC |
mbed_official | 610:813dcc80987e | 155 | * @brief ADC HAL module driver |
mbed_official | 610:813dcc80987e | 156 | * @{ |
mbed_official | 610:813dcc80987e | 157 | */ |
mbed_official | 610:813dcc80987e | 158 | |
mbed_official | 610:813dcc80987e | 159 | #ifdef HAL_ADC_MODULE_ENABLED |
mbed_official | 610:813dcc80987e | 160 | |
mbed_official | 610:813dcc80987e | 161 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 610:813dcc80987e | 162 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 610:813dcc80987e | 163 | |
mbed_official | 610:813dcc80987e | 164 | /** @defgroup ADC_Private_Constants ADC Private Constants |
mbed_official | 610:813dcc80987e | 165 | * @{ |
mbed_official | 610:813dcc80987e | 166 | */ |
mbed_official | 610:813dcc80987e | 167 | |
mbed_official | 610:813dcc80987e | 168 | #define ADC_CFGR_FIELDS_1 ((uint32_t)(ADC_CFGR_RES | ADC_CFGR_ALIGN |\ |
mbed_official | 610:813dcc80987e | 169 | ADC_CFGR_CONT | ADC_CFGR_OVRMOD |\ |
mbed_official | 610:813dcc80987e | 170 | ADC_CFGR_DISCEN | ADC_CFGR_DISCNUM |\ |
mbed_official | 610:813dcc80987e | 171 | ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL)) /*!< ADC_CFGR fields of parameters that can be updated |
mbed_official | 610:813dcc80987e | 172 | when no regular conversion is on-going */ |
mbed_official | 610:813dcc80987e | 173 | |
mbed_official | 610:813dcc80987e | 174 | #define ADC_CFGR_FIELDS_2 ((uint32_t)(ADC_CFGR_DMACFG | ADC_CFGR_AUTDLY)) /*!< ADC_CFGR fields of parameters that can be updated when no conversion |
mbed_official | 610:813dcc80987e | 175 | (neither regular nor injected) is on-going */ |
mbed_official | 610:813dcc80987e | 176 | |
mbed_official | 610:813dcc80987e | 177 | #define ADC_CFGR2_FIELDS ((uint32_t)(ADC_CFGR2_ROVSE | ADC_CFGR2_OVSR |\ |
mbed_official | 610:813dcc80987e | 178 | ADC_CFGR2_OVSS | ADC_CFGR2_TROVS |\ |
mbed_official | 610:813dcc80987e | 179 | ADC_CFGR2_ROVSM)) /*!< ADC_CFGR2 fields of parameters that can be updated when no conversion |
mbed_official | 610:813dcc80987e | 180 | (neither regular nor injected) is on-going */ |
mbed_official | 610:813dcc80987e | 181 | |
mbed_official | 610:813dcc80987e | 182 | #define ADC_CFGR_WD_FIELDS ((uint32_t)(ADC_CFGR_AWD1SGL | ADC_CFGR_JAWD1EN | \ |
mbed_official | 610:813dcc80987e | 183 | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1CH)) /*!< ADC_CFGR fields of Analog Watchdog parameters that can be updated when no |
mbed_official | 610:813dcc80987e | 184 | conversion (neither regular nor injected) is on-going */ |
mbed_official | 610:813dcc80987e | 185 | |
mbed_official | 610:813dcc80987e | 186 | #define ADC_OFR_FIELDS ((uint32_t)(ADC_OFR1_OFFSET1 | ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1_EN)) /*!< ADC_OFR fields of parameters that can be updated when no conversion |
mbed_official | 610:813dcc80987e | 187 | (neither regular nor injected) is on-going */ |
mbed_official | 610:813dcc80987e | 188 | |
mbed_official | 610:813dcc80987e | 189 | |
mbed_official | 610:813dcc80987e | 190 | |
mbed_official | 610:813dcc80987e | 191 | /* Delay to wait before setting ADEN once ADCAL has been reset |
mbed_official | 610:813dcc80987e | 192 | must be at least 4 ADC clock cycles. |
mbed_official | 610:813dcc80987e | 193 | Assuming lowest ADC clock (140 KHz according to DS), this |
mbed_official | 610:813dcc80987e | 194 | 4 ADC clock cycles duration is equal to |
mbed_official | 610:813dcc80987e | 195 | 4 / 140,000 = 0.028 ms. |
mbed_official | 610:813dcc80987e | 196 | ADC_ENABLE_TIMEOUT set to 2 is a margin large enough to ensure |
mbed_official | 610:813dcc80987e | 197 | the 4 ADC clock cycles have elapsed while waiting for ADRDY |
mbed_official | 610:813dcc80987e | 198 | to become 1 */ |
mbed_official | 610:813dcc80987e | 199 | #define ADC_ENABLE_TIMEOUT ((uint32_t) 2) /*!< ADC enable time-out value */ |
mbed_official | 610:813dcc80987e | 200 | #define ADC_DISABLE_TIMEOUT ((uint32_t) 2) /*!< ADC disable time-out value */ |
mbed_official | 610:813dcc80987e | 201 | |
mbed_official | 610:813dcc80987e | 202 | |
mbed_official | 610:813dcc80987e | 203 | |
mbed_official | 610:813dcc80987e | 204 | /* Delay for ADC voltage regulator startup time */ |
mbed_official | 610:813dcc80987e | 205 | /* Maximum delay is 10 microseconds */ |
mbed_official | 610:813dcc80987e | 206 | /* (refer device RM, parameter Tadcvreg_stup). */ |
mbed_official | 610:813dcc80987e | 207 | #define ADC_STAB_DELAY_US ((uint32_t) 10) /*!< ADC voltage regulator startup time */ |
mbed_official | 610:813dcc80987e | 208 | |
mbed_official | 610:813dcc80987e | 209 | |
mbed_official | 610:813dcc80987e | 210 | /* Timeout to wait for current conversion on going to be completed. */ |
mbed_official | 610:813dcc80987e | 211 | /* Timeout fixed to worst case, for 1 channel. */ |
mbed_official | 610:813dcc80987e | 212 | /* - maximum sampling time (640.5 adc_clk) */ |
mbed_official | 610:813dcc80987e | 213 | /* - ADC resolution (Tsar 12 bits= 12.5 adc_clk) */ |
mbed_official | 610:813dcc80987e | 214 | /* - ADC clock with prescaler 256 */ |
mbed_official | 610:813dcc80987e | 215 | /* 653 * 256 = 167168 clock cycles max */ |
mbed_official | 610:813dcc80987e | 216 | /* Unit: cycles of CPU clock. */ |
mbed_official | 610:813dcc80987e | 217 | #define ADC_CONVERSION_TIME_MAX_CPU_CYCLES ((uint32_t) 167168) /*!< ADC conversion completion time-out value */ |
mbed_official | 610:813dcc80987e | 218 | |
mbed_official | 610:813dcc80987e | 219 | |
mbed_official | 610:813dcc80987e | 220 | |
mbed_official | 610:813dcc80987e | 221 | |
mbed_official | 610:813dcc80987e | 222 | /** |
mbed_official | 610:813dcc80987e | 223 | * @} |
mbed_official | 610:813dcc80987e | 224 | */ |
mbed_official | 610:813dcc80987e | 225 | |
mbed_official | 610:813dcc80987e | 226 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 610:813dcc80987e | 227 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 610:813dcc80987e | 228 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 610:813dcc80987e | 229 | /* Exported functions --------------------------------------------------------*/ |
mbed_official | 610:813dcc80987e | 230 | |
mbed_official | 610:813dcc80987e | 231 | /** @defgroup ADC_Exported_Functions ADC Exported Functions |
mbed_official | 610:813dcc80987e | 232 | * @{ |
mbed_official | 610:813dcc80987e | 233 | */ |
mbed_official | 610:813dcc80987e | 234 | |
mbed_official | 610:813dcc80987e | 235 | /** @defgroup ADC_Exported_Functions_Group1 Initialization and de-initialization functions |
mbed_official | 610:813dcc80987e | 236 | * @brief Initialization and Configuration functions |
mbed_official | 610:813dcc80987e | 237 | * |
mbed_official | 610:813dcc80987e | 238 | @verbatim |
mbed_official | 610:813dcc80987e | 239 | =============================================================================== |
mbed_official | 610:813dcc80987e | 240 | ##### Initialization and de-initialization functions ##### |
mbed_official | 610:813dcc80987e | 241 | =============================================================================== |
mbed_official | 610:813dcc80987e | 242 | [..] This section provides functions allowing to: |
mbed_official | 610:813dcc80987e | 243 | (+) Initialize and configure the ADC. |
mbed_official | 610:813dcc80987e | 244 | (+) De-initialize the ADC. |
mbed_official | 610:813dcc80987e | 245 | |
mbed_official | 610:813dcc80987e | 246 | @endverbatim |
mbed_official | 610:813dcc80987e | 247 | * @{ |
mbed_official | 610:813dcc80987e | 248 | */ |
mbed_official | 610:813dcc80987e | 249 | |
mbed_official | 610:813dcc80987e | 250 | /** |
mbed_official | 610:813dcc80987e | 251 | * @brief Initialize the ADC peripheral and regular group according to |
mbed_official | 610:813dcc80987e | 252 | * parameters specified in structure "ADC_InitTypeDef". |
mbed_official | 610:813dcc80987e | 253 | * @note As prerequisite, ADC clock must be configured at RCC top level |
mbed_official | 610:813dcc80987e | 254 | * depending on possible clock sources: System/PLLSAI1/PLLSAI2 clocks |
mbed_official | 610:813dcc80987e | 255 | * or AHB clock. |
mbed_official | 610:813dcc80987e | 256 | * @note Possibility to update parameters on the fly: |
mbed_official | 610:813dcc80987e | 257 | * this function initializes the ADC MSP (HAL_ADC_MspInit()) only when |
mbed_official | 610:813dcc80987e | 258 | * coming from ADC state reset. Following calls to this function can |
mbed_official | 610:813dcc80987e | 259 | * be used to reconfigure some parameters of ADC_InitTypeDef |
mbed_official | 610:813dcc80987e | 260 | * structure on the fly, without modifying MSP configuration. If ADC |
mbed_official | 610:813dcc80987e | 261 | * MSP has to be modified again, HAL_ADC_DeInit() must be called |
mbed_official | 610:813dcc80987e | 262 | * before HAL_ADC_Init(). |
mbed_official | 610:813dcc80987e | 263 | * The setting of these parameters is conditioned by ADC state. |
mbed_official | 610:813dcc80987e | 264 | * For parameters constraints, see comments of structure |
mbed_official | 610:813dcc80987e | 265 | * "ADC_InitTypeDef". |
mbed_official | 610:813dcc80987e | 266 | * @note This function configures the ADC within 2 scopes: scope of entire |
mbed_official | 610:813dcc80987e | 267 | * ADC and scope of regular group. For parameters details, see comments |
mbed_official | 610:813dcc80987e | 268 | * of structure "ADC_InitTypeDef". |
mbed_official | 610:813dcc80987e | 269 | * @note Parameters related to common ADC registers (ADC clock mode) are set |
mbed_official | 610:813dcc80987e | 270 | * only if all ADCs are disabled. |
mbed_official | 610:813dcc80987e | 271 | * If this is not the case, these common parameters setting are |
mbed_official | 610:813dcc80987e | 272 | * bypassed without error reporting: it can be the intended behaviour in |
mbed_official | 610:813dcc80987e | 273 | * case of update of a parameter of ADC_InitTypeDef on the fly, |
mbed_official | 610:813dcc80987e | 274 | * without disabling the other ADCs. |
mbed_official | 610:813dcc80987e | 275 | * @param hadc: ADC handle |
mbed_official | 610:813dcc80987e | 276 | * @retval HAL status |
mbed_official | 610:813dcc80987e | 277 | */ |
mbed_official | 610:813dcc80987e | 278 | HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) |
mbed_official | 610:813dcc80987e | 279 | { |
mbed_official | 610:813dcc80987e | 280 | HAL_StatusTypeDef tmp_status = HAL_OK; |
mbed_official | 610:813dcc80987e | 281 | |
mbed_official | 610:813dcc80987e | 282 | ADC_Common_TypeDef *tmpADC_Common; |
mbed_official | 610:813dcc80987e | 283 | uint32_t tmpCFGR = 0; |
mbed_official | 610:813dcc80987e | 284 | uint32_t wait_loop_index = 0; |
mbed_official | 610:813dcc80987e | 285 | |
mbed_official | 610:813dcc80987e | 286 | /* Check ADC handle */ |
mbed_official | 610:813dcc80987e | 287 | if(hadc == NULL) |
mbed_official | 610:813dcc80987e | 288 | { |
mbed_official | 610:813dcc80987e | 289 | return HAL_ERROR; |
mbed_official | 610:813dcc80987e | 290 | } |
mbed_official | 610:813dcc80987e | 291 | |
mbed_official | 610:813dcc80987e | 292 | /* Check the parameters */ |
mbed_official | 610:813dcc80987e | 293 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 610:813dcc80987e | 294 | assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler)); |
mbed_official | 610:813dcc80987e | 295 | assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution)); |
mbed_official | 610:813dcc80987e | 296 | assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign)); |
mbed_official | 610:813dcc80987e | 297 | assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode)); |
mbed_official | 610:813dcc80987e | 298 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); |
mbed_official | 610:813dcc80987e | 299 | assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); |
mbed_official | 610:813dcc80987e | 300 | assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv)); |
mbed_official | 610:813dcc80987e | 301 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests)); |
mbed_official | 610:813dcc80987e | 302 | assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection)); |
mbed_official | 610:813dcc80987e | 303 | assert_param(IS_ADC_OVERRUN(hadc->Init.Overrun)); |
mbed_official | 610:813dcc80987e | 304 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoWait)); |
mbed_official | 610:813dcc80987e | 305 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.OversamplingMode)); |
mbed_official | 610:813dcc80987e | 306 | |
mbed_official | 610:813dcc80987e | 307 | if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE) |
mbed_official | 610:813dcc80987e | 308 | { |
mbed_official | 610:813dcc80987e | 309 | assert_param(IS_ADC_REGULAR_NB_CONV(hadc->Init.NbrOfConversion)); |
mbed_official | 610:813dcc80987e | 310 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode)); |
mbed_official | 610:813dcc80987e | 311 | |
mbed_official | 610:813dcc80987e | 312 | if (hadc->Init.DiscontinuousConvMode == ENABLE) |
mbed_official | 610:813dcc80987e | 313 | { |
mbed_official | 610:813dcc80987e | 314 | assert_param(IS_ADC_REGULAR_DISCONT_NUMBER(hadc->Init.NbrOfDiscConversion)); |
mbed_official | 610:813dcc80987e | 315 | } |
mbed_official | 610:813dcc80987e | 316 | } |
mbed_official | 610:813dcc80987e | 317 | |
mbed_official | 610:813dcc80987e | 318 | |
mbed_official | 610:813dcc80987e | 319 | /* DISCEN and CONT bits can't be set at the same time */ |
mbed_official | 610:813dcc80987e | 320 | assert_param(!((hadc->Init.DiscontinuousConvMode == ENABLE) && (hadc->Init.ContinuousConvMode == ENABLE))); |
mbed_official | 610:813dcc80987e | 321 | |
mbed_official | 610:813dcc80987e | 322 | |
mbed_official | 610:813dcc80987e | 323 | /* Actions performed only if ADC is coming from state reset: */ |
mbed_official | 610:813dcc80987e | 324 | /* - Initialization of ADC MSP */ |
mbed_official | 610:813dcc80987e | 325 | if (hadc->State == HAL_ADC_STATE_RESET) |
mbed_official | 610:813dcc80987e | 326 | { |
mbed_official | 610:813dcc80987e | 327 | /* Init the low level hardware */ |
mbed_official | 610:813dcc80987e | 328 | HAL_ADC_MspInit(hadc); |
mbed_official | 610:813dcc80987e | 329 | |
mbed_official | 610:813dcc80987e | 330 | /* Set ADC error code to none */ |
mbed_official | 610:813dcc80987e | 331 | ADC_CLEAR_ERRORCODE(hadc); |
mbed_official | 610:813dcc80987e | 332 | |
mbed_official | 610:813dcc80987e | 333 | /* Initialize Lock */ |
mbed_official | 610:813dcc80987e | 334 | hadc->Lock = HAL_UNLOCKED; |
mbed_official | 610:813dcc80987e | 335 | } |
mbed_official | 610:813dcc80987e | 336 | |
mbed_official | 610:813dcc80987e | 337 | |
mbed_official | 610:813dcc80987e | 338 | /* - Exit from deep-power-down mode and ADC voltage regulator enable */ |
mbed_official | 610:813dcc80987e | 339 | /* Exit deep power down mode if still in that state */ |
mbed_official | 610:813dcc80987e | 340 | if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_DEEPPWD)) |
mbed_official | 610:813dcc80987e | 341 | { |
mbed_official | 610:813dcc80987e | 342 | /* Exit deep power down mode */ |
mbed_official | 610:813dcc80987e | 343 | CLEAR_BIT(hadc->Instance->CR, ADC_CR_DEEPPWD); |
mbed_official | 610:813dcc80987e | 344 | |
mbed_official | 610:813dcc80987e | 345 | /* System was in deep power down mode, calibration must |
mbed_official | 610:813dcc80987e | 346 | be relaunched or a previously saved calibration factor |
mbed_official | 610:813dcc80987e | 347 | re-applied once the ADC voltage regulator is enabled */ |
mbed_official | 610:813dcc80987e | 348 | } |
mbed_official | 610:813dcc80987e | 349 | |
mbed_official | 610:813dcc80987e | 350 | |
mbed_official | 610:813dcc80987e | 351 | if (HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADVREGEN)) |
mbed_official | 610:813dcc80987e | 352 | { |
mbed_official | 610:813dcc80987e | 353 | /* Enable ADC internal voltage regulator then |
mbed_official | 610:813dcc80987e | 354 | wait for start-up time */ |
mbed_official | 610:813dcc80987e | 355 | SET_BIT(hadc->Instance->CR, ADC_CR_ADVREGEN); |
mbed_official | 610:813dcc80987e | 356 | wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000)); |
mbed_official | 610:813dcc80987e | 357 | while(wait_loop_index != 0) |
mbed_official | 610:813dcc80987e | 358 | { |
mbed_official | 610:813dcc80987e | 359 | wait_loop_index--; |
mbed_official | 610:813dcc80987e | 360 | } |
mbed_official | 610:813dcc80987e | 361 | } |
mbed_official | 610:813dcc80987e | 362 | |
mbed_official | 610:813dcc80987e | 363 | |
mbed_official | 610:813dcc80987e | 364 | |
mbed_official | 610:813dcc80987e | 365 | |
mbed_official | 610:813dcc80987e | 366 | /* Verification that ADC voltage regulator is correctly enabled, whether */ |
mbed_official | 610:813dcc80987e | 367 | /* or not ADC is coming from state reset (if any potential problem of */ |
mbed_official | 610:813dcc80987e | 368 | /* clocking, voltage regulator would not be enabled). */ |
mbed_official | 610:813dcc80987e | 369 | if (HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADVREGEN)) |
mbed_official | 610:813dcc80987e | 370 | { |
mbed_official | 610:813dcc80987e | 371 | /* Update ADC state machine to error */ |
mbed_official | 610:813dcc80987e | 372 | SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); |
mbed_official | 610:813dcc80987e | 373 | |
mbed_official | 610:813dcc80987e | 374 | /* Set ADC error code to ADC IP internal error */ |
mbed_official | 610:813dcc80987e | 375 | SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); |
mbed_official | 610:813dcc80987e | 376 | |
mbed_official | 610:813dcc80987e | 377 | tmp_status = HAL_ERROR; |
mbed_official | 610:813dcc80987e | 378 | } |
mbed_official | 610:813dcc80987e | 379 | |
mbed_official | 610:813dcc80987e | 380 | |
mbed_official | 610:813dcc80987e | 381 | /* Configuration of ADC parameters if previous preliminary actions are */ |
mbed_official | 610:813dcc80987e | 382 | /* correctly completed and if there is no conversion on going on regular */ |
mbed_official | 610:813dcc80987e | 383 | /* group (ADC may already be enabled at this point if HAL_ADC_Init() is */ |
mbed_official | 610:813dcc80987e | 384 | /* called to update a parameter on the fly). */ |
mbed_official | 610:813dcc80987e | 385 | if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) && |
mbed_official | 610:813dcc80987e | 386 | (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) ) |
mbed_official | 610:813dcc80987e | 387 | { |
mbed_official | 610:813dcc80987e | 388 | |
mbed_official | 610:813dcc80987e | 389 | /* Initialize the ADC state */ |
mbed_official | 610:813dcc80987e | 390 | SET_BIT(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL); |
mbed_official | 610:813dcc80987e | 391 | |
mbed_official | 610:813dcc80987e | 392 | /* Configuration of common ADC parameters */ |
mbed_official | 610:813dcc80987e | 393 | |
mbed_official | 610:813dcc80987e | 394 | /* Pointer to the common control register */ |
mbed_official | 610:813dcc80987e | 395 | tmpADC_Common = ADC_COMMON_REGISTER(hadc); |
mbed_official | 610:813dcc80987e | 396 | |
mbed_official | 610:813dcc80987e | 397 | |
mbed_official | 610:813dcc80987e | 398 | /* Parameters update conditioned to ADC state: */ |
mbed_official | 610:813dcc80987e | 399 | /* Parameters that can be updated only when ADC is disabled: */ |
mbed_official | 610:813dcc80987e | 400 | /* - clock configuration */ |
mbed_official | 610:813dcc80987e | 401 | if ((ADC_IS_ENABLE(hadc) == RESET) && |
mbed_official | 610:813dcc80987e | 402 | (ADC_ANY_OTHER_ENABLED(hadc) == RESET) ) |
mbed_official | 610:813dcc80987e | 403 | { |
mbed_official | 610:813dcc80987e | 404 | /* Reset configuration of ADC common register CCR: */ |
mbed_official | 610:813dcc80987e | 405 | /* */ |
mbed_official | 610:813dcc80987e | 406 | /* - ADC clock mode and ACC prescaler (CKMODE and PRESC bits)are set */ |
mbed_official | 610:813dcc80987e | 407 | /* according to adc->Init.ClockPrescaler. It selects the clock */ |
mbed_official | 610:813dcc80987e | 408 | /* source and sets the clock division factor. */ |
mbed_official | 610:813dcc80987e | 409 | /* */ |
mbed_official | 610:813dcc80987e | 410 | /* Some parameters of this register are not reset, since they are set */ |
mbed_official | 610:813dcc80987e | 411 | /* by other functions and must be kept in case of usage of this */ |
mbed_official | 610:813dcc80987e | 412 | /* function on the fly (update of a parameter of ADC_InitTypeDef */ |
mbed_official | 610:813dcc80987e | 413 | /* without needing to reconfigure all other ADC groups/channels */ |
mbed_official | 610:813dcc80987e | 414 | /* parameters): */ |
mbed_official | 610:813dcc80987e | 415 | /* - multimode related parameters: MDMA, DMACFG, DELAY, DUAL (set */ |
mbed_official | 610:813dcc80987e | 416 | /* into HAL_ADCEx_MultiModeConfigChannel() ) */ |
mbed_official | 610:813dcc80987e | 417 | /* - internal measurement paths: Vbat, temperature sensor, Vref */ |
mbed_official | 610:813dcc80987e | 418 | /* (set into HAL_ADC_ConfigChannel() or */ |
mbed_official | 610:813dcc80987e | 419 | /* HAL_ADCEx_InjectedConfigChannel() ) */ |
mbed_official | 610:813dcc80987e | 420 | |
mbed_official | 610:813dcc80987e | 421 | MODIFY_REG(tmpADC_Common->CCR, ADC_CCR_PRESC|ADC_CCR_CKMODE, hadc->Init.ClockPrescaler); |
mbed_official | 610:813dcc80987e | 422 | } |
mbed_official | 610:813dcc80987e | 423 | |
mbed_official | 610:813dcc80987e | 424 | |
mbed_official | 610:813dcc80987e | 425 | /* Configuration of ADC: */ |
mbed_official | 610:813dcc80987e | 426 | /* - resolution Init.Resolution */ |
mbed_official | 610:813dcc80987e | 427 | /* - data alignment Init.DataAlign */ |
mbed_official | 610:813dcc80987e | 428 | /* - external trigger to start conversion Init.ExternalTrigConv */ |
mbed_official | 610:813dcc80987e | 429 | /* - external trigger polarity Init.ExternalTrigConvEdge */ |
mbed_official | 610:813dcc80987e | 430 | /* - continuous conversion mode Init.ContinuousConvMode */ |
mbed_official | 610:813dcc80987e | 431 | /* - overrun Init.Overrun */ |
mbed_official | 610:813dcc80987e | 432 | /* - discontinuous mode Init.DiscontinuousConvMode */ |
mbed_official | 610:813dcc80987e | 433 | /* - discontinuous mode channel count Init.NbrOfDiscConversion */ |
mbed_official | 610:813dcc80987e | 434 | tmpCFGR = ( ADC_CFGR_CONTINUOUS(hadc->Init.ContinuousConvMode) | |
mbed_official | 610:813dcc80987e | 435 | hadc->Init.Overrun | |
mbed_official | 610:813dcc80987e | 436 | hadc->Init.DataAlign | |
mbed_official | 610:813dcc80987e | 437 | hadc->Init.Resolution | |
mbed_official | 610:813dcc80987e | 438 | ADC_CFGR_REG_DISCONTINUOUS(hadc->Init.DiscontinuousConvMode) | |
mbed_official | 610:813dcc80987e | 439 | ADC_CFGR_DISCONTINUOUS_NUM(hadc->Init.NbrOfDiscConversion) ); |
mbed_official | 610:813dcc80987e | 440 | |
mbed_official | 610:813dcc80987e | 441 | /* Enable external trigger if trigger selection is different of software */ |
mbed_official | 610:813dcc80987e | 442 | /* start. */ |
mbed_official | 610:813dcc80987e | 443 | /* - external trigger to start conversion Init.ExternalTrigConv */ |
mbed_official | 610:813dcc80987e | 444 | /* - external trigger polarity Init.ExternalTrigConvEdge */ |
mbed_official | 610:813dcc80987e | 445 | /* Note: parameter ExternalTrigConvEdge set to "trigger edge none" is */ |
mbed_official | 610:813dcc80987e | 446 | /* equivalent to software start. */ |
mbed_official | 610:813dcc80987e | 447 | if ((hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START) |
mbed_official | 610:813dcc80987e | 448 | && (hadc->Init.ExternalTrigConvEdge != ADC_EXTERNALTRIGCONVEDGE_NONE)) |
mbed_official | 610:813dcc80987e | 449 | { |
mbed_official | 610:813dcc80987e | 450 | tmpCFGR |= ( hadc->Init.ExternalTrigConv | hadc->Init.ExternalTrigConvEdge); |
mbed_official | 610:813dcc80987e | 451 | } |
mbed_official | 610:813dcc80987e | 452 | |
mbed_official | 610:813dcc80987e | 453 | /* Update Configuration Register CFGR */ |
mbed_official | 610:813dcc80987e | 454 | MODIFY_REG(hadc->Instance->CFGR, ADC_CFGR_FIELDS_1, tmpCFGR); |
mbed_official | 610:813dcc80987e | 455 | |
mbed_official | 610:813dcc80987e | 456 | |
mbed_official | 610:813dcc80987e | 457 | /* Parameters update conditioned to ADC state: */ |
mbed_official | 610:813dcc80987e | 458 | /* Parameters that can be updated when ADC is disabled or enabled without */ |
mbed_official | 610:813dcc80987e | 459 | /* conversion on going on regular and injected groups: */ |
mbed_official | 610:813dcc80987e | 460 | /* - DMA continuous request Init.DMAContinuousRequests */ |
mbed_official | 610:813dcc80987e | 461 | /* - LowPowerAutoWait feature Init.LowPowerAutoWait */ |
mbed_official | 610:813dcc80987e | 462 | /* - Oversampling parameters Init.Oversampling */ |
mbed_official | 610:813dcc80987e | 463 | if (ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET) |
mbed_official | 610:813dcc80987e | 464 | { |
mbed_official | 610:813dcc80987e | 465 | tmpCFGR = ( ADC_CFGR_AUTOWAIT(hadc->Init.LowPowerAutoWait) | |
mbed_official | 610:813dcc80987e | 466 | ADC_CFGR_DMACONTREQ(hadc->Init.DMAContinuousRequests) ); |
mbed_official | 610:813dcc80987e | 467 | |
mbed_official | 610:813dcc80987e | 468 | MODIFY_REG(hadc->Instance->CFGR, ADC_CFGR_FIELDS_2, tmpCFGR); |
mbed_official | 610:813dcc80987e | 469 | |
mbed_official | 610:813dcc80987e | 470 | |
mbed_official | 610:813dcc80987e | 471 | if (hadc->Init.OversamplingMode == ENABLE) |
mbed_official | 610:813dcc80987e | 472 | { |
mbed_official | 610:813dcc80987e | 473 | assert_param(IS_ADC_OVERSAMPLING_RATIO(hadc->Init.Oversampling.Ratio)); |
mbed_official | 610:813dcc80987e | 474 | assert_param(IS_ADC_RIGHT_BIT_SHIFT(hadc->Init.Oversampling.RightBitShift)); |
mbed_official | 610:813dcc80987e | 475 | assert_param(IS_ADC_TRIGGERED_OVERSAMPLING_MODE(hadc->Init.Oversampling.TriggeredMode)); |
mbed_official | 610:813dcc80987e | 476 | assert_param(IS_ADC_REGOVERSAMPLING_MODE(hadc->Init.Oversampling.OversamplingStopReset)); |
mbed_official | 610:813dcc80987e | 477 | |
mbed_official | 610:813dcc80987e | 478 | if ((hadc->Init.ExternalTrigConv == ADC_SOFTWARE_START) |
mbed_official | 610:813dcc80987e | 479 | || (hadc->Init.ExternalTrigConvEdge == ADC_EXTERNALTRIGCONVEDGE_NONE)) |
mbed_official | 610:813dcc80987e | 480 | { |
mbed_official | 610:813dcc80987e | 481 | /* Multi trigger is not applicable to software-triggered conversions */ |
mbed_official | 610:813dcc80987e | 482 | assert_param((hadc->Init.Oversampling.TriggeredMode == ADC_TRIGGEREDMODE_SINGLE_TRIGGER)); |
mbed_official | 610:813dcc80987e | 483 | } |
mbed_official | 610:813dcc80987e | 484 | |
mbed_official | 610:813dcc80987e | 485 | |
mbed_official | 610:813dcc80987e | 486 | /* Configuration of Oversampler: */ |
mbed_official | 610:813dcc80987e | 487 | /* - Oversampling Ratio */ |
mbed_official | 610:813dcc80987e | 488 | /* - Right bit shift */ |
mbed_official | 610:813dcc80987e | 489 | /* - Triggered mode */ |
mbed_official | 610:813dcc80987e | 490 | /* - Oversampling mode (continued/resumed) */ |
mbed_official | 610:813dcc80987e | 491 | MODIFY_REG(hadc->Instance->CFGR2, ADC_CFGR2_FIELDS, |
mbed_official | 610:813dcc80987e | 492 | ADC_CFGR2_ROVSE | |
mbed_official | 610:813dcc80987e | 493 | hadc->Init.Oversampling.Ratio | |
mbed_official | 610:813dcc80987e | 494 | hadc->Init.Oversampling.RightBitShift | |
mbed_official | 610:813dcc80987e | 495 | hadc->Init.Oversampling.TriggeredMode | |
mbed_official | 610:813dcc80987e | 496 | hadc->Init.Oversampling.OversamplingStopReset); |
mbed_official | 610:813dcc80987e | 497 | } |
mbed_official | 610:813dcc80987e | 498 | else |
mbed_official | 610:813dcc80987e | 499 | { |
mbed_official | 610:813dcc80987e | 500 | /* Disable Regular OverSampling */ |
mbed_official | 610:813dcc80987e | 501 | CLEAR_BIT( hadc->Instance->CFGR2, ADC_CFGR2_ROVSE); |
mbed_official | 610:813dcc80987e | 502 | } |
mbed_official | 610:813dcc80987e | 503 | |
mbed_official | 610:813dcc80987e | 504 | |
mbed_official | 610:813dcc80987e | 505 | } /* if (ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET) */ |
mbed_official | 610:813dcc80987e | 506 | |
mbed_official | 610:813dcc80987e | 507 | |
mbed_official | 610:813dcc80987e | 508 | |
mbed_official | 610:813dcc80987e | 509 | |
mbed_official | 610:813dcc80987e | 510 | /* Configuration of regular group sequencer: */ |
mbed_official | 610:813dcc80987e | 511 | /* - if scan mode is disabled, regular channels sequence length is set to */ |
mbed_official | 610:813dcc80987e | 512 | /* 0x00: 1 channel converted (channel on regular rank 1) */ |
mbed_official | 610:813dcc80987e | 513 | /* Parameter "NbrOfConversion" is discarded. */ |
mbed_official | 610:813dcc80987e | 514 | /* Note: Scan mode is not present by hardware on this device, but */ |
mbed_official | 610:813dcc80987e | 515 | /* emulated by software for alignment over all STM32 devices. */ |
mbed_official | 610:813dcc80987e | 516 | /* - if scan mode is enabled, regular channels sequence length is set to */ |
mbed_official | 610:813dcc80987e | 517 | /* parameter "NbrOfConversion" */ |
mbed_official | 610:813dcc80987e | 518 | |
mbed_official | 610:813dcc80987e | 519 | if (hadc->Init.ScanConvMode == ADC_SCAN_ENABLE) |
mbed_official | 610:813dcc80987e | 520 | { |
mbed_official | 610:813dcc80987e | 521 | /* Set number of ranks in regular group sequencer */ |
mbed_official | 610:813dcc80987e | 522 | MODIFY_REG(hadc->Instance->SQR1, ADC_SQR1_L, (hadc->Init.NbrOfConversion - (uint8_t)1)); |
mbed_official | 610:813dcc80987e | 523 | } |
mbed_official | 610:813dcc80987e | 524 | else |
mbed_official | 610:813dcc80987e | 525 | { |
mbed_official | 610:813dcc80987e | 526 | CLEAR_BIT(hadc->Instance->SQR1, ADC_SQR1_L); |
mbed_official | 610:813dcc80987e | 527 | } |
mbed_official | 610:813dcc80987e | 528 | |
mbed_official | 610:813dcc80987e | 529 | |
mbed_official | 610:813dcc80987e | 530 | /* Initialize the ADC state */ |
mbed_official | 610:813dcc80987e | 531 | /* Clear HAL_ADC_STATE_BUSY_INTERNAL bit, set HAL_ADC_STATE_READY bit */ |
mbed_official | 610:813dcc80987e | 532 | ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_READY); |
mbed_official | 610:813dcc80987e | 533 | } |
mbed_official | 610:813dcc80987e | 534 | else |
mbed_official | 610:813dcc80987e | 535 | { |
mbed_official | 610:813dcc80987e | 536 | /* Update ADC state machine to error */ |
mbed_official | 610:813dcc80987e | 537 | SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); |
mbed_official | 610:813dcc80987e | 538 | |
mbed_official | 610:813dcc80987e | 539 | tmp_status = HAL_ERROR; |
mbed_official | 610:813dcc80987e | 540 | } /* if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) && (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) ) */ |
mbed_official | 610:813dcc80987e | 541 | |
mbed_official | 610:813dcc80987e | 542 | |
mbed_official | 610:813dcc80987e | 543 | /* Return function status */ |
mbed_official | 610:813dcc80987e | 544 | return tmp_status; |
mbed_official | 610:813dcc80987e | 545 | |
mbed_official | 610:813dcc80987e | 546 | } |
mbed_official | 610:813dcc80987e | 547 | |
mbed_official | 610:813dcc80987e | 548 | /** |
mbed_official | 610:813dcc80987e | 549 | * @brief Deinitialize the ADC peripheral registers to their default reset |
mbed_official | 610:813dcc80987e | 550 | * values, with deinitialization of the ADC MSP. |
mbed_official | 610:813dcc80987e | 551 | * @note Keep in mind that all ADCs use the same clock: disabling |
mbed_official | 610:813dcc80987e | 552 | * the clock will reset all ADCs. |
mbed_official | 610:813dcc80987e | 553 | * @note By default, HAL_ADC_DeInit() sets DEEPPWD: this saves more power by |
mbed_official | 610:813dcc80987e | 554 | * reducing the leakage currents and is particularly interesting before |
mbed_official | 610:813dcc80987e | 555 | * entering STOP 1 or STOP 2 modes. |
mbed_official | 610:813dcc80987e | 556 | * @param hadc: ADC handle |
mbed_official | 610:813dcc80987e | 557 | * @retval HAL status |
mbed_official | 610:813dcc80987e | 558 | */ |
mbed_official | 610:813dcc80987e | 559 | HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc) |
mbed_official | 610:813dcc80987e | 560 | { |
mbed_official | 610:813dcc80987e | 561 | ADC_Common_TypeDef *tmpADC_Common; |
mbed_official | 610:813dcc80987e | 562 | |
mbed_official | 610:813dcc80987e | 563 | /* Check ADC handle */ |
mbed_official | 610:813dcc80987e | 564 | if(hadc == NULL) |
mbed_official | 610:813dcc80987e | 565 | { |
mbed_official | 610:813dcc80987e | 566 | return HAL_ERROR; |
mbed_official | 610:813dcc80987e | 567 | } |
mbed_official | 610:813dcc80987e | 568 | |
mbed_official | 610:813dcc80987e | 569 | /* Check the parameters */ |
mbed_official | 610:813dcc80987e | 570 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 610:813dcc80987e | 571 | |
mbed_official | 610:813dcc80987e | 572 | /* Change ADC state */ |
mbed_official | 610:813dcc80987e | 573 | SET_BIT(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL); |
mbed_official | 610:813dcc80987e | 574 | |
mbed_official | 610:813dcc80987e | 575 | /* Stop potential conversion on going, on regular and injected groups */ |
mbed_official | 610:813dcc80987e | 576 | /* No check on ADC_ConversionStop() return status, if the conversion |
mbed_official | 610:813dcc80987e | 577 | stop failed, it is up to HAL_ADC_MspDeInit() to reset the ADC IP */ |
mbed_official | 610:813dcc80987e | 578 | ADC_ConversionStop(hadc, ADC_REGULAR_INJECTED_GROUP); |
mbed_official | 610:813dcc80987e | 579 | |
mbed_official | 610:813dcc80987e | 580 | |
mbed_official | 610:813dcc80987e | 581 | /* Disable ADC peripheral if conversions are effectively stopped */ |
mbed_official | 610:813dcc80987e | 582 | /* Flush register JSQR: reset the queue sequencer when injected */ |
mbed_official | 610:813dcc80987e | 583 | /* queue sequencer is enabled and ADC disabled. */ |
mbed_official | 610:813dcc80987e | 584 | /* The software and hardware triggers of the injected sequence are both */ |
mbed_official | 610:813dcc80987e | 585 | /* internally disabled just after the completion of the last valid */ |
mbed_official | 610:813dcc80987e | 586 | /* injected sequence. */ |
mbed_official | 610:813dcc80987e | 587 | SET_BIT(hadc->Instance->CFGR, ADC_CFGR_JQM); |
mbed_official | 610:813dcc80987e | 588 | |
mbed_official | 610:813dcc80987e | 589 | /* Disable the ADC peripheral */ |
mbed_official | 610:813dcc80987e | 590 | /* No check on ADC_Disable() return status, if the ADC disabling process |
mbed_official | 610:813dcc80987e | 591 | failed, it is up to HAL_ADC_MspDeInit() to reset the ADC IP */ |
mbed_official | 610:813dcc80987e | 592 | ADC_Disable(hadc); |
mbed_official | 610:813dcc80987e | 593 | |
mbed_official | 610:813dcc80987e | 594 | |
mbed_official | 610:813dcc80987e | 595 | /* ========== Reset ADC registers ========== */ |
mbed_official | 610:813dcc80987e | 596 | /* Reset register IER */ |
mbed_official | 610:813dcc80987e | 597 | __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_AWD3 | ADC_IT_AWD2 | ADC_IT_AWD1 | |
mbed_official | 610:813dcc80987e | 598 | ADC_IT_JQOVF | ADC_IT_OVR | |
mbed_official | 610:813dcc80987e | 599 | ADC_IT_JEOS | ADC_IT_JEOC | |
mbed_official | 610:813dcc80987e | 600 | ADC_IT_EOS | ADC_IT_EOC | |
mbed_official | 610:813dcc80987e | 601 | ADC_IT_EOSMP | ADC_IT_RDY ) ); |
mbed_official | 610:813dcc80987e | 602 | |
mbed_official | 610:813dcc80987e | 603 | /* Reset register ISR */ |
mbed_official | 610:813dcc80987e | 604 | __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_AWD3 | ADC_FLAG_AWD2 | ADC_FLAG_AWD1 | |
mbed_official | 610:813dcc80987e | 605 | ADC_FLAG_JQOVF | ADC_FLAG_OVR | |
mbed_official | 610:813dcc80987e | 606 | ADC_FLAG_JEOS | ADC_FLAG_JEOC | |
mbed_official | 610:813dcc80987e | 607 | ADC_FLAG_EOS | ADC_FLAG_EOC | |
mbed_official | 610:813dcc80987e | 608 | ADC_FLAG_EOSMP | ADC_FLAG_RDY ) ); |
mbed_official | 610:813dcc80987e | 609 | |
mbed_official | 610:813dcc80987e | 610 | /* Reset register CR */ |
mbed_official | 610:813dcc80987e | 611 | /* Bits ADC_CR_JADSTP, ADC_CR_ADSTP, ADC_CR_JADSTART, ADC_CR_ADSTART, |
mbed_official | 610:813dcc80987e | 612 | ADC_CR_ADCAL, ADC_CR_ADDIS and ADC_CR_ADEN are in access mode "read-set": |
mbed_official | 610:813dcc80987e | 613 | no direct reset applicable. |
mbed_official | 610:813dcc80987e | 614 | Update CR register to reset value where doable by software */ |
mbed_official | 610:813dcc80987e | 615 | CLEAR_BIT(hadc->Instance->CR, ADC_CR_ADVREGEN | ADC_CR_ADCALDIF); |
mbed_official | 610:813dcc80987e | 616 | SET_BIT(hadc->Instance->CR, ADC_CR_DEEPPWD); |
mbed_official | 610:813dcc80987e | 617 | |
mbed_official | 610:813dcc80987e | 618 | /* Reset register CFGR */ |
mbed_official | 610:813dcc80987e | 619 | CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_AWD1CH | ADC_CFGR_JAUTO | ADC_CFGR_JAWD1EN | |
mbed_official | 610:813dcc80987e | 620 | ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL | ADC_CFGR_JQM | |
mbed_official | 610:813dcc80987e | 621 | ADC_CFGR_JDISCEN | ADC_CFGR_DISCNUM | ADC_CFGR_DISCEN | |
mbed_official | 610:813dcc80987e | 622 | ADC_CFGR_AUTDLY | ADC_CFGR_CONT | ADC_CFGR_OVRMOD | |
mbed_official | 610:813dcc80987e | 623 | ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | ADC_CFGR_ALIGN | |
mbed_official | 610:813dcc80987e | 624 | ADC_CFGR_RES | ADC_CFGR_DMACFG | ADC_CFGR_DMAEN ); |
mbed_official | 610:813dcc80987e | 625 | SET_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS); |
mbed_official | 610:813dcc80987e | 626 | |
mbed_official | 610:813dcc80987e | 627 | /* Reset register CFGR2 */ |
mbed_official | 610:813dcc80987e | 628 | CLEAR_BIT(hadc->Instance->CFGR2, ADC_CFGR2_ROVSM | ADC_CFGR2_TROVS | ADC_CFGR2_OVSS | |
mbed_official | 610:813dcc80987e | 629 | ADC_CFGR2_OVSR | ADC_CFGR2_JOVSE | ADC_CFGR2_ROVSE ); |
mbed_official | 610:813dcc80987e | 630 | |
mbed_official | 610:813dcc80987e | 631 | /* Reset register SMPR1 */ |
mbed_official | 610:813dcc80987e | 632 | CLEAR_BIT(hadc->Instance->SMPR1, ADC_SMPR1_SMP9 | ADC_SMPR1_SMP8 | ADC_SMPR1_SMP7 | |
mbed_official | 610:813dcc80987e | 633 | ADC_SMPR1_SMP6 | ADC_SMPR1_SMP5 | ADC_SMPR1_SMP4 | |
mbed_official | 610:813dcc80987e | 634 | ADC_SMPR1_SMP3 | ADC_SMPR1_SMP2 | ADC_SMPR1_SMP1 | |
mbed_official | 610:813dcc80987e | 635 | ADC_SMPR1_SMP0 ); |
mbed_official | 610:813dcc80987e | 636 | |
mbed_official | 610:813dcc80987e | 637 | /* Reset register SMPR2 */ |
mbed_official | 610:813dcc80987e | 638 | CLEAR_BIT(hadc->Instance->SMPR2, ADC_SMPR2_SMP18 | ADC_SMPR2_SMP17 | ADC_SMPR2_SMP16 | |
mbed_official | 610:813dcc80987e | 639 | ADC_SMPR2_SMP15 | ADC_SMPR2_SMP14 | ADC_SMPR2_SMP13 | |
mbed_official | 610:813dcc80987e | 640 | ADC_SMPR2_SMP12 | ADC_SMPR2_SMP11 | ADC_SMPR2_SMP10 ); |
mbed_official | 610:813dcc80987e | 641 | |
mbed_official | 610:813dcc80987e | 642 | /* Reset register TR1 */ |
mbed_official | 610:813dcc80987e | 643 | CLEAR_BIT(hadc->Instance->TR1, ADC_TR1_HT1 | ADC_TR1_LT1); |
mbed_official | 610:813dcc80987e | 644 | |
mbed_official | 610:813dcc80987e | 645 | /* Reset register TR2 */ |
mbed_official | 610:813dcc80987e | 646 | CLEAR_BIT(hadc->Instance->TR2, ADC_TR2_HT2 | ADC_TR2_LT2); |
mbed_official | 610:813dcc80987e | 647 | |
mbed_official | 610:813dcc80987e | 648 | /* Reset register TR3 */ |
mbed_official | 610:813dcc80987e | 649 | CLEAR_BIT(hadc->Instance->TR3, ADC_TR3_HT3 | ADC_TR3_LT3); |
mbed_official | 610:813dcc80987e | 650 | |
mbed_official | 610:813dcc80987e | 651 | /* Reset register SQR1 */ |
mbed_official | 610:813dcc80987e | 652 | CLEAR_BIT(hadc->Instance->SQR1, ADC_SQR1_SQ4 | ADC_SQR1_SQ3 | ADC_SQR1_SQ2 | |
mbed_official | 610:813dcc80987e | 653 | ADC_SQR1_SQ1 | ADC_SQR1_L); |
mbed_official | 610:813dcc80987e | 654 | |
mbed_official | 610:813dcc80987e | 655 | /* Reset register SQR2 */ |
mbed_official | 610:813dcc80987e | 656 | CLEAR_BIT(hadc->Instance->SQR2, ADC_SQR2_SQ9 | ADC_SQR2_SQ8 | ADC_SQR2_SQ7 | |
mbed_official | 610:813dcc80987e | 657 | ADC_SQR2_SQ6 | ADC_SQR2_SQ5); |
mbed_official | 610:813dcc80987e | 658 | |
mbed_official | 610:813dcc80987e | 659 | /* Reset register SQR3 */ |
mbed_official | 610:813dcc80987e | 660 | CLEAR_BIT(hadc->Instance->SQR3, ADC_SQR3_SQ14 | ADC_SQR3_SQ13 | ADC_SQR3_SQ12 | |
mbed_official | 610:813dcc80987e | 661 | ADC_SQR3_SQ11 | ADC_SQR3_SQ10); |
mbed_official | 610:813dcc80987e | 662 | |
mbed_official | 610:813dcc80987e | 663 | /* Reset register SQR4 */ |
mbed_official | 610:813dcc80987e | 664 | CLEAR_BIT(hadc->Instance->SQR4, ADC_SQR4_SQ16 | ADC_SQR4_SQ15); |
mbed_official | 610:813dcc80987e | 665 | |
mbed_official | 610:813dcc80987e | 666 | /* Register JSQR was reset when the ADC was disabled */ |
mbed_official | 610:813dcc80987e | 667 | |
mbed_official | 610:813dcc80987e | 668 | /* Reset register DR */ |
mbed_official | 610:813dcc80987e | 669 | /* bits in access mode read only, no direct reset applicable*/ |
mbed_official | 610:813dcc80987e | 670 | |
mbed_official | 610:813dcc80987e | 671 | /* Reset register OFR1 */ |
mbed_official | 610:813dcc80987e | 672 | CLEAR_BIT(hadc->Instance->OFR1, ADC_OFR1_OFFSET1_EN | ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1); |
mbed_official | 610:813dcc80987e | 673 | /* Reset register OFR2 */ |
mbed_official | 610:813dcc80987e | 674 | CLEAR_BIT(hadc->Instance->OFR2, ADC_OFR2_OFFSET2_EN | ADC_OFR2_OFFSET2_CH | ADC_OFR2_OFFSET2); |
mbed_official | 610:813dcc80987e | 675 | /* Reset register OFR3 */ |
mbed_official | 610:813dcc80987e | 676 | CLEAR_BIT(hadc->Instance->OFR3, ADC_OFR3_OFFSET3_EN | ADC_OFR3_OFFSET3_CH | ADC_OFR3_OFFSET3); |
mbed_official | 610:813dcc80987e | 677 | /* Reset register OFR4 */ |
mbed_official | 610:813dcc80987e | 678 | CLEAR_BIT(hadc->Instance->OFR4, ADC_OFR4_OFFSET4_EN | ADC_OFR4_OFFSET4_CH | ADC_OFR4_OFFSET4); |
mbed_official | 610:813dcc80987e | 679 | |
mbed_official | 610:813dcc80987e | 680 | /* Reset registers JDR1, JDR2, JDR3, JDR4 */ |
mbed_official | 610:813dcc80987e | 681 | /* bits in access mode read only, no direct reset applicable*/ |
mbed_official | 610:813dcc80987e | 682 | |
mbed_official | 610:813dcc80987e | 683 | /* Reset register AWD2CR */ |
mbed_official | 610:813dcc80987e | 684 | CLEAR_BIT(hadc->Instance->AWD2CR, ADC_AWD2CR_AWD2CH); |
mbed_official | 610:813dcc80987e | 685 | |
mbed_official | 610:813dcc80987e | 686 | /* Reset register AWD3CR */ |
mbed_official | 610:813dcc80987e | 687 | CLEAR_BIT(hadc->Instance->AWD3CR, ADC_AWD3CR_AWD3CH); |
mbed_official | 610:813dcc80987e | 688 | |
mbed_official | 610:813dcc80987e | 689 | /* Reset register DIFSEL */ |
mbed_official | 610:813dcc80987e | 690 | CLEAR_BIT(hadc->Instance->DIFSEL, ADC_DIFSEL_DIFSEL); |
mbed_official | 610:813dcc80987e | 691 | |
mbed_official | 610:813dcc80987e | 692 | /* Reset register CALFACT */ |
mbed_official | 610:813dcc80987e | 693 | CLEAR_BIT(hadc->Instance->CALFACT, ADC_CALFACT_CALFACT_D | ADC_CALFACT_CALFACT_S); |
mbed_official | 610:813dcc80987e | 694 | |
mbed_official | 610:813dcc80987e | 695 | |
mbed_official | 610:813dcc80987e | 696 | |
mbed_official | 610:813dcc80987e | 697 | |
mbed_official | 610:813dcc80987e | 698 | |
mbed_official | 610:813dcc80987e | 699 | |
mbed_official | 610:813dcc80987e | 700 | /* ========== Reset common ADC registers ========== */ |
mbed_official | 610:813dcc80987e | 701 | |
mbed_official | 610:813dcc80987e | 702 | /* Software is allowed to change common parameters only when all the other |
mbed_official | 610:813dcc80987e | 703 | ADCs are disabled. */ |
mbed_official | 610:813dcc80987e | 704 | if ((ADC_IS_ENABLE(hadc) == RESET) && |
mbed_official | 610:813dcc80987e | 705 | (ADC_ANY_OTHER_ENABLED(hadc) == RESET) ) |
mbed_official | 610:813dcc80987e | 706 | { |
mbed_official | 610:813dcc80987e | 707 | /* Reset configuration of ADC common register CCR: |
mbed_official | 610:813dcc80987e | 708 | - clock mode: CKMODE, PRESCEN |
mbed_official | 610:813dcc80987e | 709 | - multimode related parameters: MDMA, DMACFG, DELAY, DUAL (set into |
mbed_official | 610:813dcc80987e | 710 | HAL_ADCEx_MultiModeConfigChannel() ) |
mbed_official | 610:813dcc80987e | 711 | - internal measurement paths: Vbat, temperature sensor, Vref (set into |
mbed_official | 610:813dcc80987e | 712 | HAL_ADC_ConfigChannel() or HAL_ADCEx_InjectedConfigChannel() ) |
mbed_official | 610:813dcc80987e | 713 | */ |
mbed_official | 610:813dcc80987e | 714 | tmpADC_Common = ADC_COMMON_REGISTER(hadc); |
mbed_official | 610:813dcc80987e | 715 | |
mbed_official | 610:813dcc80987e | 716 | CLEAR_BIT(tmpADC_Common->CCR, ADC_CCR_CKMODE | |
mbed_official | 610:813dcc80987e | 717 | ADC_CCR_PRESC | |
mbed_official | 610:813dcc80987e | 718 | ADC_CCR_VBATEN | |
mbed_official | 610:813dcc80987e | 719 | ADC_CCR_TSEN | |
mbed_official | 610:813dcc80987e | 720 | ADC_CCR_VREFEN | |
mbed_official | 610:813dcc80987e | 721 | ADC_CCR_MDMA | |
mbed_official | 610:813dcc80987e | 722 | ADC_CCR_DMACFG | |
mbed_official | 610:813dcc80987e | 723 | ADC_CCR_DELAY | |
mbed_official | 610:813dcc80987e | 724 | ADC_CCR_DUAL ); |
mbed_official | 610:813dcc80987e | 725 | |
mbed_official | 610:813dcc80987e | 726 | } |
mbed_official | 610:813dcc80987e | 727 | |
mbed_official | 610:813dcc80987e | 728 | /* DeInit the low level hardware. |
mbed_official | 610:813dcc80987e | 729 | |
mbed_official | 610:813dcc80987e | 730 | For example: |
mbed_official | 610:813dcc80987e | 731 | __HAL_RCC_ADC_FORCE_RESET(); |
mbed_official | 610:813dcc80987e | 732 | __HAL_RCC_ADC_RELEASE_RESET(); |
mbed_official | 610:813dcc80987e | 733 | __HAL_RCC_ADC_CLK_DISABLE(); |
mbed_official | 610:813dcc80987e | 734 | |
mbed_official | 610:813dcc80987e | 735 | Keep in mind that all ADCs use the same clock: disabling |
mbed_official | 610:813dcc80987e | 736 | the clock will reset all ADCs. |
mbed_official | 610:813dcc80987e | 737 | |
mbed_official | 610:813dcc80987e | 738 | */ |
mbed_official | 610:813dcc80987e | 739 | HAL_ADC_MspDeInit(hadc); |
mbed_official | 610:813dcc80987e | 740 | |
mbed_official | 610:813dcc80987e | 741 | /* Set ADC error code to none */ |
mbed_official | 610:813dcc80987e | 742 | ADC_CLEAR_ERRORCODE(hadc); |
mbed_official | 610:813dcc80987e | 743 | |
mbed_official | 610:813dcc80987e | 744 | /* Reset injected channel configuration parameters */ |
mbed_official | 610:813dcc80987e | 745 | hadc->InjectionConfig.ContextQueue = 0; |
mbed_official | 610:813dcc80987e | 746 | hadc->InjectionConfig.ChannelCount = 0; |
mbed_official | 610:813dcc80987e | 747 | |
mbed_official | 610:813dcc80987e | 748 | /* Change ADC state */ |
mbed_official | 610:813dcc80987e | 749 | hadc->State = HAL_ADC_STATE_RESET; |
mbed_official | 610:813dcc80987e | 750 | |
mbed_official | 610:813dcc80987e | 751 | /* Process unlocked */ |
mbed_official | 610:813dcc80987e | 752 | __HAL_UNLOCK(hadc); |
mbed_official | 610:813dcc80987e | 753 | |
mbed_official | 610:813dcc80987e | 754 | |
mbed_official | 610:813dcc80987e | 755 | /* Return function status */ |
mbed_official | 610:813dcc80987e | 756 | return HAL_OK; |
mbed_official | 610:813dcc80987e | 757 | |
mbed_official | 610:813dcc80987e | 758 | } |
mbed_official | 610:813dcc80987e | 759 | |
mbed_official | 610:813dcc80987e | 760 | /** |
mbed_official | 610:813dcc80987e | 761 | * @brief Initialize the ADC MSP. |
mbed_official | 610:813dcc80987e | 762 | * @param hadc: ADC handle |
mbed_official | 610:813dcc80987e | 763 | * @retval None |
mbed_official | 610:813dcc80987e | 764 | */ |
mbed_official | 610:813dcc80987e | 765 | __weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) |
mbed_official | 610:813dcc80987e | 766 | { |
mbed_official | 610:813dcc80987e | 767 | /* NOTE : This function should not be modified. When the callback is needed, |
mbed_official | 610:813dcc80987e | 768 | function HAL_ADC_MspInit must be implemented in the user file. |
mbed_official | 610:813dcc80987e | 769 | */ |
mbed_official | 610:813dcc80987e | 770 | } |
mbed_official | 610:813dcc80987e | 771 | |
mbed_official | 610:813dcc80987e | 772 | /** |
mbed_official | 610:813dcc80987e | 773 | * @brief DeInitialize the ADC MSP. |
mbed_official | 610:813dcc80987e | 774 | * @param hadc: ADC handle |
mbed_official | 610:813dcc80987e | 775 | * @note All ADCs use the same clock: disabling the clock will reset all ADCs. |
mbed_official | 610:813dcc80987e | 776 | * @retval None |
mbed_official | 610:813dcc80987e | 777 | */ |
mbed_official | 610:813dcc80987e | 778 | __weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) |
mbed_official | 610:813dcc80987e | 779 | { |
mbed_official | 610:813dcc80987e | 780 | /* NOTE : This function should not be modified. When the callback is needed, |
mbed_official | 610:813dcc80987e | 781 | function HAL_ADC_MspDeInit must be implemented in the user file. |
mbed_official | 610:813dcc80987e | 782 | */ |
mbed_official | 610:813dcc80987e | 783 | } |
mbed_official | 610:813dcc80987e | 784 | |
mbed_official | 610:813dcc80987e | 785 | /** |
mbed_official | 610:813dcc80987e | 786 | * @} |
mbed_official | 610:813dcc80987e | 787 | */ |
mbed_official | 610:813dcc80987e | 788 | |
mbed_official | 610:813dcc80987e | 789 | /** @defgroup ADC_Exported_Functions_Group2 Input and Output operation functions |
mbed_official | 610:813dcc80987e | 790 | * @brief IO operation functions |
mbed_official | 610:813dcc80987e | 791 | * |
mbed_official | 610:813dcc80987e | 792 | @verbatim |
mbed_official | 610:813dcc80987e | 793 | =============================================================================== |
mbed_official | 610:813dcc80987e | 794 | ##### IO operation functions ##### |
mbed_official | 610:813dcc80987e | 795 | =============================================================================== |
mbed_official | 610:813dcc80987e | 796 | [..] This section provides functions allowing to: |
mbed_official | 610:813dcc80987e | 797 | (+) Start conversion of regular group. |
mbed_official | 610:813dcc80987e | 798 | (+) Stop conversion of regular group. |
mbed_official | 610:813dcc80987e | 799 | (+) Poll for conversion complete on regular group. |
mbed_official | 610:813dcc80987e | 800 | (+) Poll for conversion event. |
mbed_official | 610:813dcc80987e | 801 | (+) Get result of regular channel conversion. |
mbed_official | 610:813dcc80987e | 802 | (+) Start conversion of regular group and enable interruptions. |
mbed_official | 610:813dcc80987e | 803 | (+) Stop conversion of regular group and disable interruptions. |
mbed_official | 610:813dcc80987e | 804 | (+) Handle ADC interrupt request |
mbed_official | 610:813dcc80987e | 805 | (+) Start conversion of regular group and enable DMA transfer. |
mbed_official | 610:813dcc80987e | 806 | (+) Stop conversion of regular group and disable ADC DMA transfer. |
mbed_official | 610:813dcc80987e | 807 | |
mbed_official | 610:813dcc80987e | 808 | @endverbatim |
mbed_official | 610:813dcc80987e | 809 | * @{ |
mbed_official | 610:813dcc80987e | 810 | */ |
mbed_official | 610:813dcc80987e | 811 | |
mbed_official | 610:813dcc80987e | 812 | /** |
mbed_official | 610:813dcc80987e | 813 | * @brief Enable ADC, start conversion of regular group. |
mbed_official | 610:813dcc80987e | 814 | * @note Interruptions enabled in this function: None. |
mbed_official | 610:813dcc80987e | 815 | * @note Case of multimode enabled: |
mbed_official | 610:813dcc80987e | 816 | * if ADC is Slave, ADC is enabled but conversion is not started, |
mbed_official | 610:813dcc80987e | 817 | * if ADC is master, ADC is enabled and multimode conversion is started. |
mbed_official | 610:813dcc80987e | 818 | * @param hadc: ADC handle |
mbed_official | 610:813dcc80987e | 819 | * @retval HAL status |
mbed_official | 610:813dcc80987e | 820 | */ |
mbed_official | 610:813dcc80987e | 821 | HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc) |
mbed_official | 610:813dcc80987e | 822 | { |
mbed_official | 610:813dcc80987e | 823 | ADC_TypeDef *tmpADC_Master; |
mbed_official | 610:813dcc80987e | 824 | HAL_StatusTypeDef tmp_status = HAL_OK; |
mbed_official | 610:813dcc80987e | 825 | |
mbed_official | 610:813dcc80987e | 826 | /* Check the parameters */ |
mbed_official | 610:813dcc80987e | 827 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 610:813dcc80987e | 828 | |
mbed_official | 610:813dcc80987e | 829 | |
mbed_official | 610:813dcc80987e | 830 | /* if a regular conversion is already on-going (i.e. ADSTART is set), |
mbed_official | 610:813dcc80987e | 831 | don't restart the conversion. */ |
mbed_official | 610:813dcc80987e | 832 | if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc)) |
mbed_official | 610:813dcc80987e | 833 | { |
mbed_official | 610:813dcc80987e | 834 | return HAL_BUSY; |
mbed_official | 610:813dcc80987e | 835 | } |
mbed_official | 610:813dcc80987e | 836 | else |
mbed_official | 610:813dcc80987e | 837 | { |
mbed_official | 610:813dcc80987e | 838 | /* Process locked */ |
mbed_official | 610:813dcc80987e | 839 | __HAL_LOCK(hadc); |
mbed_official | 610:813dcc80987e | 840 | |
mbed_official | 610:813dcc80987e | 841 | /* Enable the ADC peripheral */ |
mbed_official | 610:813dcc80987e | 842 | tmp_status = ADC_Enable(hadc); |
mbed_official | 610:813dcc80987e | 843 | |
mbed_official | 610:813dcc80987e | 844 | /* Start conversion if ADC is effectively enabled */ |
mbed_official | 610:813dcc80987e | 845 | if (tmp_status == HAL_OK) |
mbed_official | 610:813dcc80987e | 846 | { |
mbed_official | 610:813dcc80987e | 847 | /* State machine update: Check if an injected conversion is ongoing */ |
mbed_official | 610:813dcc80987e | 848 | if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY)) |
mbed_official | 610:813dcc80987e | 849 | { |
mbed_official | 610:813dcc80987e | 850 | /* Reset ADC error code fields related to regular conversions only */ |
mbed_official | 610:813dcc80987e | 851 | CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR|HAL_ADC_ERROR_DMA)); |
mbed_official | 610:813dcc80987e | 852 | } |
mbed_official | 610:813dcc80987e | 853 | else |
mbed_official | 610:813dcc80987e | 854 | { |
mbed_official | 610:813dcc80987e | 855 | /* Set ADC error code to none */ |
mbed_official | 610:813dcc80987e | 856 | ADC_CLEAR_ERRORCODE(hadc); |
mbed_official | 610:813dcc80987e | 857 | } |
mbed_official | 610:813dcc80987e | 858 | /* Clear HAL_ADC_STATE_READY and regular conversion results bits, set HAL_ADC_STATE_REG_BUSY bit */ |
mbed_official | 610:813dcc80987e | 859 | ADC_STATE_CLR_SET(hadc->State, (HAL_ADC_STATE_READY|HAL_ADC_STATE_REG_EOC|HAL_ADC_STATE_REG_OVR|HAL_ADC_STATE_REG_EOSMP), HAL_ADC_STATE_REG_BUSY); |
mbed_official | 610:813dcc80987e | 860 | |
mbed_official | 610:813dcc80987e | 861 | /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit |
mbed_official | 610:813dcc80987e | 862 | - by default if ADC is Master or Independent |
mbed_official | 610:813dcc80987e | 863 | - if MultiMode setting is set to independent mode (no dual regular or injected conversions are configured) */ |
mbed_official | 610:813dcc80987e | 864 | if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)) |
mbed_official | 610:813dcc80987e | 865 | { |
mbed_official | 610:813dcc80987e | 866 | CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); |
mbed_official | 610:813dcc80987e | 867 | } |
mbed_official | 610:813dcc80987e | 868 | |
mbed_official | 610:813dcc80987e | 869 | /* Clear regular group conversion flag and overrun flag */ |
mbed_official | 610:813dcc80987e | 870 | /* (To ensure of no unknown state from potential previous ADC operations) */ |
mbed_official | 610:813dcc80987e | 871 | __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); |
mbed_official | 610:813dcc80987e | 872 | |
mbed_official | 610:813dcc80987e | 873 | /* Enable conversion of regular group. */ |
mbed_official | 610:813dcc80987e | 874 | /* If software start has been selected, conversion starts immediately. */ |
mbed_official | 610:813dcc80987e | 875 | /* If external trigger has been selected, conversion starts at next */ |
mbed_official | 610:813dcc80987e | 876 | /* trigger event. */ |
mbed_official | 610:813dcc80987e | 877 | /* Case of multimode enabled: */ |
mbed_official | 610:813dcc80987e | 878 | /* - if ADC is slave and dual regular conversions are enabled, ADC is */ |
mbed_official | 610:813dcc80987e | 879 | /* enabled only (conversion is not started), */ |
mbed_official | 610:813dcc80987e | 880 | /* - if ADC is master, ADC is enabled and conversion is started. */ |
mbed_official | 610:813dcc80987e | 881 | if (ADC_INDEPENDENT_OR_NONMULTIMODEREGULAR_SLAVE(hadc)) |
mbed_official | 610:813dcc80987e | 882 | { |
mbed_official | 610:813dcc80987e | 883 | /* Set HAL_ADC_STATE_INJ_BUSY bit and reset HAL_ADC_STATE_INJ_EOC bit if JAUTO is set */ |
mbed_official | 610:813dcc80987e | 884 | if (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO) != RESET) |
mbed_official | 610:813dcc80987e | 885 | { |
mbed_official | 610:813dcc80987e | 886 | ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); |
mbed_official | 610:813dcc80987e | 887 | } |
mbed_official | 610:813dcc80987e | 888 | /* Process unlocked */ |
mbed_official | 610:813dcc80987e | 889 | __HAL_UNLOCK(hadc); |
mbed_official | 610:813dcc80987e | 890 | /* Start ADC */ |
mbed_official | 610:813dcc80987e | 891 | SET_BIT(hadc->Instance->CR, ADC_CR_ADSTART); |
mbed_official | 610:813dcc80987e | 892 | } |
mbed_official | 610:813dcc80987e | 893 | else |
mbed_official | 610:813dcc80987e | 894 | { |
mbed_official | 610:813dcc80987e | 895 | SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); |
mbed_official | 610:813dcc80987e | 896 | /* if Master ADC JAUTO bit is set, update Slave State in setting |
mbed_official | 610:813dcc80987e | 897 | HAL_ADC_STATE_INJ_BUSY bit and in resetting HAL_ADC_STATE_INJ_EOC bit */ |
mbed_official | 610:813dcc80987e | 898 | tmpADC_Master = ADC_MASTER_REGISTER(hadc); |
mbed_official | 610:813dcc80987e | 899 | if (READ_BIT(tmpADC_Master->CFGR, ADC_CFGR_JAUTO) != RESET) |
mbed_official | 610:813dcc80987e | 900 | { |
mbed_official | 610:813dcc80987e | 901 | ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); |
mbed_official | 610:813dcc80987e | 902 | |
mbed_official | 610:813dcc80987e | 903 | } /* if (READ_BIT(tmpADC_Master->CFGR, ADC_CFGR_JAUTO) != RESET) */ |
mbed_official | 610:813dcc80987e | 904 | /* Process unlocked */ |
mbed_official | 610:813dcc80987e | 905 | __HAL_UNLOCK(hadc); |
mbed_official | 610:813dcc80987e | 906 | } /* if (ADC_INDEPENDENT_OR_NONMULTIMODEREGULAR_SLAVE(hadc)) */ |
mbed_official | 610:813dcc80987e | 907 | } |
mbed_official | 610:813dcc80987e | 908 | |
mbed_official | 610:813dcc80987e | 909 | /* Return function status */ |
mbed_official | 610:813dcc80987e | 910 | return tmp_status; |
mbed_official | 610:813dcc80987e | 911 | } |
mbed_official | 610:813dcc80987e | 912 | } |
mbed_official | 610:813dcc80987e | 913 | |
mbed_official | 610:813dcc80987e | 914 | /** |
mbed_official | 610:813dcc80987e | 915 | * @brief Stop ADC conversion of regular and injected groups, disable ADC peripheral. |
mbed_official | 610:813dcc80987e | 916 | * @param hadc: ADC handle |
mbed_official | 610:813dcc80987e | 917 | * @retval HAL status. |
mbed_official | 610:813dcc80987e | 918 | */ |
mbed_official | 610:813dcc80987e | 919 | HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc) |
mbed_official | 610:813dcc80987e | 920 | { |
mbed_official | 610:813dcc80987e | 921 | HAL_StatusTypeDef tmp_status = HAL_OK; |
mbed_official | 610:813dcc80987e | 922 | |
mbed_official | 610:813dcc80987e | 923 | /* Check the parameters */ |
mbed_official | 610:813dcc80987e | 924 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 610:813dcc80987e | 925 | |
mbed_official | 610:813dcc80987e | 926 | /* Process locked */ |
mbed_official | 610:813dcc80987e | 927 | __HAL_LOCK(hadc); |
mbed_official | 610:813dcc80987e | 928 | |
mbed_official | 610:813dcc80987e | 929 | /* 1. Stop potential regular and injected on-going conversions */ |
mbed_official | 610:813dcc80987e | 930 | tmp_status = ADC_ConversionStop(hadc, ADC_REGULAR_INJECTED_GROUP); |
mbed_official | 610:813dcc80987e | 931 | |
mbed_official | 610:813dcc80987e | 932 | /* Disable ADC peripheral if conversions are effectively stopped */ |
mbed_official | 610:813dcc80987e | 933 | if (tmp_status == HAL_OK) |
mbed_official | 610:813dcc80987e | 934 | { |
mbed_official | 610:813dcc80987e | 935 | /* 2. Disable the ADC peripheral */ |
mbed_official | 610:813dcc80987e | 936 | tmp_status = ADC_Disable(hadc); |
mbed_official | 610:813dcc80987e | 937 | |
mbed_official | 610:813dcc80987e | 938 | /* Check if ADC is effectively disabled */ |
mbed_official | 610:813dcc80987e | 939 | if (tmp_status == HAL_OK) |
mbed_official | 610:813dcc80987e | 940 | { |
mbed_official | 610:813dcc80987e | 941 | /* Change ADC state */ |
mbed_official | 610:813dcc80987e | 942 | /* Clear HAL_ADC_STATE_REG_BUSY and HAL_ADC_STATE_INJ_BUSY bits, set HAL_ADC_STATE_READY bit */ |
mbed_official | 610:813dcc80987e | 943 | ADC_STATE_CLR_SET(hadc->State, (HAL_ADC_STATE_REG_BUSY|HAL_ADC_STATE_INJ_BUSY), HAL_ADC_STATE_READY); |
mbed_official | 610:813dcc80987e | 944 | } |
mbed_official | 610:813dcc80987e | 945 | } |
mbed_official | 610:813dcc80987e | 946 | |
mbed_official | 610:813dcc80987e | 947 | /* Process unlocked */ |
mbed_official | 610:813dcc80987e | 948 | __HAL_UNLOCK(hadc); |
mbed_official | 610:813dcc80987e | 949 | |
mbed_official | 610:813dcc80987e | 950 | /* Return function status */ |
mbed_official | 610:813dcc80987e | 951 | return tmp_status; |
mbed_official | 610:813dcc80987e | 952 | } |
mbed_official | 610:813dcc80987e | 953 | |
mbed_official | 610:813dcc80987e | 954 | |
mbed_official | 610:813dcc80987e | 955 | |
mbed_official | 610:813dcc80987e | 956 | /** |
mbed_official | 610:813dcc80987e | 957 | * @brief Wait for regular group conversion to be completed. |
mbed_official | 610:813dcc80987e | 958 | * @param hadc: ADC handle |
mbed_official | 610:813dcc80987e | 959 | * @param Timeout: Timeout value in millisecond. |
mbed_official | 610:813dcc80987e | 960 | * @note Depending on hadc->Init.EOCSelection, EOS or EOC is |
mbed_official | 610:813dcc80987e | 961 | * checked and cleared depending on AUTDLY bit status. |
mbed_official | 610:813dcc80987e | 962 | * @note HAL_ADC_PollForConversion() returns HAL_ERROR if EOC is polled in a |
mbed_official | 610:813dcc80987e | 963 | * DMA-managed conversions configuration: indeed, EOC is immediately |
mbed_official | 610:813dcc80987e | 964 | * reset by the DMA reading the DR register when the converted data is |
mbed_official | 610:813dcc80987e | 965 | * available. Therefore, EOC is set for a too short period to be |
mbed_official | 610:813dcc80987e | 966 | * reliably polled. |
mbed_official | 610:813dcc80987e | 967 | * @retval HAL status |
mbed_official | 610:813dcc80987e | 968 | */ |
mbed_official | 610:813dcc80987e | 969 | HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout) |
mbed_official | 610:813dcc80987e | 970 | { |
mbed_official | 610:813dcc80987e | 971 | uint32_t tickstart; |
mbed_official | 610:813dcc80987e | 972 | uint32_t tmp_Flag_End = 0x00; |
mbed_official | 610:813dcc80987e | 973 | ADC_Common_TypeDef *tmpADC_Common; |
mbed_official | 610:813dcc80987e | 974 | ADC_TypeDef *tmpADC_Master; |
mbed_official | 610:813dcc80987e | 975 | uint32_t tmp_cfgr = 0x00; |
mbed_official | 610:813dcc80987e | 976 | uint32_t tmp_eos_raised = 0x01; /* by default, assume that EOS is set, |
mbed_official | 610:813dcc80987e | 977 | tmp_eos_raised will be corrected |
mbed_official | 610:813dcc80987e | 978 | accordingly during API execution */ |
mbed_official | 610:813dcc80987e | 979 | |
mbed_official | 610:813dcc80987e | 980 | /* Check the parameters */ |
mbed_official | 610:813dcc80987e | 981 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 610:813dcc80987e | 982 | |
mbed_official | 610:813dcc80987e | 983 | /* If end of sequence selected */ |
mbed_official | 610:813dcc80987e | 984 | if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV) |
mbed_official | 610:813dcc80987e | 985 | { |
mbed_official | 610:813dcc80987e | 986 | tmp_Flag_End = ADC_FLAG_EOS; |
mbed_official | 610:813dcc80987e | 987 | } |
mbed_official | 610:813dcc80987e | 988 | else /* end of conversion selected */ |
mbed_official | 610:813dcc80987e | 989 | { |
mbed_official | 610:813dcc80987e | 990 | /* Check that the ADC is not in a DMA-based configuration. Otherwise, |
mbed_official | 610:813dcc80987e | 991 | returns an error. */ |
mbed_official | 610:813dcc80987e | 992 | |
mbed_official | 610:813dcc80987e | 993 | /* Check whether dual regular conversions are disabled or unavailable. */ |
mbed_official | 610:813dcc80987e | 994 | if (ADC_IS_DUAL_REGULAR_CONVERSION_ENABLE(hadc) == RESET) |
mbed_official | 610:813dcc80987e | 995 | { |
mbed_official | 610:813dcc80987e | 996 | /* Check DMAEN bit in handle ADC CFGR register */ |
mbed_official | 610:813dcc80987e | 997 | if (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_DMAEN) != RESET) |
mbed_official | 610:813dcc80987e | 998 | { |
mbed_official | 610:813dcc80987e | 999 | SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); |
mbed_official | 610:813dcc80987e | 1000 | return HAL_ERROR; |
mbed_official | 610:813dcc80987e | 1001 | } |
mbed_official | 610:813dcc80987e | 1002 | } |
mbed_official | 610:813dcc80987e | 1003 | else |
mbed_official | 610:813dcc80987e | 1004 | { |
mbed_official | 610:813dcc80987e | 1005 | /* Else need to check Common register CCR MDMA bit field. */ |
mbed_official | 610:813dcc80987e | 1006 | /* Set pointer to the common control register */ |
mbed_official | 610:813dcc80987e | 1007 | tmpADC_Common = ADC_COMMON_REGISTER(hadc); |
mbed_official | 610:813dcc80987e | 1008 | if ((READ_BIT(tmpADC_Common->CCR, ADC_CCR_MDMA) == ADC_DMAACCESSMODE_12_10_BITS) |
mbed_official | 610:813dcc80987e | 1009 | || (READ_BIT(tmpADC_Common->CCR, ADC_CCR_MDMA) == ADC_DMAACCESSMODE_8_6_BITS)) |
mbed_official | 610:813dcc80987e | 1010 | { |
mbed_official | 610:813dcc80987e | 1011 | SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); |
mbed_official | 610:813dcc80987e | 1012 | return HAL_ERROR; |
mbed_official | 610:813dcc80987e | 1013 | } |
mbed_official | 610:813dcc80987e | 1014 | } |
mbed_official | 610:813dcc80987e | 1015 | |
mbed_official | 610:813dcc80987e | 1016 | /* no DMA transfer detected, polling ADC_FLAG_EOC is possible */ |
mbed_official | 610:813dcc80987e | 1017 | tmp_Flag_End = ADC_FLAG_EOC; |
mbed_official | 610:813dcc80987e | 1018 | } |
mbed_official | 610:813dcc80987e | 1019 | |
mbed_official | 610:813dcc80987e | 1020 | /* Get timeout */ |
mbed_official | 610:813dcc80987e | 1021 | tickstart = HAL_GetTick(); |
mbed_official | 610:813dcc80987e | 1022 | |
mbed_official | 610:813dcc80987e | 1023 | /* Wait until End of Conversion or Sequence flag is raised */ |
mbed_official | 610:813dcc80987e | 1024 | while (HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_End)) |
mbed_official | 610:813dcc80987e | 1025 | { |
mbed_official | 610:813dcc80987e | 1026 | /* Check if timeout is disabled (set to infinite wait) */ |
mbed_official | 610:813dcc80987e | 1027 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 610:813dcc80987e | 1028 | { |
mbed_official | 610:813dcc80987e | 1029 | if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) |
mbed_official | 610:813dcc80987e | 1030 | { |
mbed_official | 610:813dcc80987e | 1031 | SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT); |
mbed_official | 610:813dcc80987e | 1032 | return HAL_TIMEOUT; |
mbed_official | 610:813dcc80987e | 1033 | } |
mbed_official | 610:813dcc80987e | 1034 | } |
mbed_official | 610:813dcc80987e | 1035 | } |
mbed_official | 610:813dcc80987e | 1036 | |
mbed_official | 610:813dcc80987e | 1037 | /* Next, to clear the polled flag as well as to update the handle State, |
mbed_official | 610:813dcc80987e | 1038 | EOS is checked and the relevant configuration register is retrieved. */ |
mbed_official | 610:813dcc80987e | 1039 | /* 1. Check whether or not EOS is set */ |
mbed_official | 610:813dcc80987e | 1040 | if (HAL_IS_BIT_CLR(hadc->Instance->ISR, ADC_FLAG_EOS)) |
mbed_official | 610:813dcc80987e | 1041 | { |
mbed_official | 610:813dcc80987e | 1042 | tmp_eos_raised = 0; |
mbed_official | 610:813dcc80987e | 1043 | } |
mbed_official | 610:813dcc80987e | 1044 | /* 2. Check whether or not hadc is the handle of a Slave ADC with dual |
mbed_official | 610:813dcc80987e | 1045 | regular conversions enabled. */ |
mbed_official | 610:813dcc80987e | 1046 | if (ADC_INDEPENDENT_OR_NONMULTIMODEREGULAR_SLAVE(hadc)) |
mbed_official | 610:813dcc80987e | 1047 | { |
mbed_official | 610:813dcc80987e | 1048 | /* Retrieve handle ADC CFGR register */ |
mbed_official | 610:813dcc80987e | 1049 | tmp_cfgr = READ_REG(hadc->Instance->CFGR); |
mbed_official | 610:813dcc80987e | 1050 | } |
mbed_official | 610:813dcc80987e | 1051 | else |
mbed_official | 610:813dcc80987e | 1052 | { |
mbed_official | 610:813dcc80987e | 1053 | /* Retrieve Master ADC CFGR register */ |
mbed_official | 610:813dcc80987e | 1054 | tmpADC_Master = ADC_MASTER_REGISTER(hadc); |
mbed_official | 610:813dcc80987e | 1055 | tmp_cfgr = READ_REG(tmpADC_Master->CFGR); |
mbed_official | 610:813dcc80987e | 1056 | } |
mbed_official | 610:813dcc80987e | 1057 | |
mbed_official | 610:813dcc80987e | 1058 | /* Clear polled flag */ |
mbed_official | 610:813dcc80987e | 1059 | if (tmp_Flag_End == ADC_FLAG_EOS) |
mbed_official | 610:813dcc80987e | 1060 | { |
mbed_official | 610:813dcc80987e | 1061 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOS); |
mbed_official | 610:813dcc80987e | 1062 | } |
mbed_official | 610:813dcc80987e | 1063 | else |
mbed_official | 610:813dcc80987e | 1064 | { |
mbed_official | 610:813dcc80987e | 1065 | |
mbed_official | 610:813dcc80987e | 1066 | /* Clear end of conversion EOC flag of regular group if low power feature */ |
mbed_official | 610:813dcc80987e | 1067 | /* "LowPowerAutoWait " is disabled, to not interfere with this feature */ |
mbed_official | 610:813dcc80987e | 1068 | /* until data register is read using function HAL_ADC_GetValue(). */ |
mbed_official | 610:813dcc80987e | 1069 | /* For regular groups, no new conversion will start before EOC is cleared.*/ |
mbed_official | 610:813dcc80987e | 1070 | /* Note that 1. reading DR clears EOC. */ |
mbed_official | 610:813dcc80987e | 1071 | /* 2. in MultiMode with dual regular conversions enabled, */ |
mbed_official | 610:813dcc80987e | 1072 | /* Master AUTDLY bit must be checked */ |
mbed_official | 610:813dcc80987e | 1073 | if (READ_BIT (tmp_cfgr, ADC_CFGR_AUTDLY) == RESET) |
mbed_official | 610:813dcc80987e | 1074 | { |
mbed_official | 610:813dcc80987e | 1075 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC); |
mbed_official | 610:813dcc80987e | 1076 | } |
mbed_official | 610:813dcc80987e | 1077 | } |
mbed_official | 610:813dcc80987e | 1078 | |
mbed_official | 610:813dcc80987e | 1079 | |
mbed_official | 610:813dcc80987e | 1080 | /* Update ADC state machine */ |
mbed_official | 610:813dcc80987e | 1081 | SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); |
mbed_official | 610:813dcc80987e | 1082 | /* If 1. EOS is set |
mbed_official | 610:813dcc80987e | 1083 | 2. conversions are software-triggered |
mbed_official | 610:813dcc80987e | 1084 | 3. CONT bit is reset (that of handle ADC or Master ADC if applicable) |
mbed_official | 610:813dcc80987e | 1085 | Then regular conversions are over and HAL_ADC_STATE_REG_BUSY can be reset. |
mbed_official | 610:813dcc80987e | 1086 | 4. additionally, if no injected conversions are on-going, HAL_ADC_STATE_READY |
mbed_official | 610:813dcc80987e | 1087 | can be set */ |
mbed_official | 610:813dcc80987e | 1088 | if ((tmp_eos_raised) |
mbed_official | 610:813dcc80987e | 1089 | && (ADC_IS_SOFTWARE_START_REGULAR(hadc)) |
mbed_official | 610:813dcc80987e | 1090 | && (READ_BIT (tmp_cfgr, ADC_CFGR_CONT) == RESET)) |
mbed_official | 610:813dcc80987e | 1091 | { |
mbed_official | 610:813dcc80987e | 1092 | CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); |
mbed_official | 610:813dcc80987e | 1093 | /* If no injected conversion on-going, set HAL_ADC_STATE_READY bit */ |
mbed_official | 610:813dcc80987e | 1094 | if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY)) |
mbed_official | 610:813dcc80987e | 1095 | { |
mbed_official | 610:813dcc80987e | 1096 | SET_BIT(hadc->State, HAL_ADC_STATE_READY); |
mbed_official | 610:813dcc80987e | 1097 | } |
mbed_official | 610:813dcc80987e | 1098 | } |
mbed_official | 610:813dcc80987e | 1099 | |
mbed_official | 610:813dcc80987e | 1100 | |
mbed_official | 610:813dcc80987e | 1101 | /* Return API HAL status */ |
mbed_official | 610:813dcc80987e | 1102 | return HAL_OK; |
mbed_official | 610:813dcc80987e | 1103 | } |
mbed_official | 610:813dcc80987e | 1104 | |
mbed_official | 610:813dcc80987e | 1105 | /** |
mbed_official | 610:813dcc80987e | 1106 | * @brief Poll for ADC event. |
mbed_official | 610:813dcc80987e | 1107 | * @param hadc: ADC handle |
mbed_official | 610:813dcc80987e | 1108 | * @param EventType: the ADC event type. |
mbed_official | 610:813dcc80987e | 1109 | * This parameter can be one of the following values: |
mbed_official | 610:813dcc80987e | 1110 | * @arg ADC_EOSMP_EVENT: ADC End of Sampling event |
mbed_official | 610:813dcc80987e | 1111 | * @arg ADC_AWD_EVENT: ADC Analog watchdog 1 event |
mbed_official | 610:813dcc80987e | 1112 | * @arg ADC_AWD2_EVENT: ADC Analog watchdog 2 event |
mbed_official | 610:813dcc80987e | 1113 | * @arg ADC_AWD3_EVENT: ADC Analog watchdog 3 event |
mbed_official | 610:813dcc80987e | 1114 | * @arg ADC_OVR_EVENT: ADC Overrun event |
mbed_official | 610:813dcc80987e | 1115 | * @arg ADC_JQOVF_EVENT: ADC Injected context queue overflow event |
mbed_official | 610:813dcc80987e | 1116 | * @param Timeout: Timeout value in millisecond. |
mbed_official | 610:813dcc80987e | 1117 | * @note The relevant flag is cleared if found to be set, except for ADC_FLAG_OVR. |
mbed_official | 610:813dcc80987e | 1118 | * Indeed, the latter is reset only if hadc->Init.Overrun field is set |
mbed_official | 610:813dcc80987e | 1119 | * to ADC_OVR_DATA_OVERWRITTEN. Otherwise, DR may be potentially overwritten |
mbed_official | 610:813dcc80987e | 1120 | * by a new converted data as soon as OVR is cleared. |
mbed_official | 610:813dcc80987e | 1121 | * To reset OVR flag once the preserved data is retrieved, the user can resort |
mbed_official | 610:813dcc80987e | 1122 | * to macro __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); |
mbed_official | 610:813dcc80987e | 1123 | * @retval HAL status |
mbed_official | 610:813dcc80987e | 1124 | */ |
mbed_official | 610:813dcc80987e | 1125 | HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout) |
mbed_official | 610:813dcc80987e | 1126 | { |
mbed_official | 610:813dcc80987e | 1127 | uint32_t tickstart; |
mbed_official | 610:813dcc80987e | 1128 | |
mbed_official | 610:813dcc80987e | 1129 | /* Check the parameters */ |
mbed_official | 610:813dcc80987e | 1130 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 610:813dcc80987e | 1131 | assert_param(IS_ADC_EVENT_TYPE(EventType)); |
mbed_official | 610:813dcc80987e | 1132 | |
mbed_official | 610:813dcc80987e | 1133 | tickstart = HAL_GetTick(); |
mbed_official | 610:813dcc80987e | 1134 | |
mbed_official | 610:813dcc80987e | 1135 | /* Check selected event flag */ |
mbed_official | 610:813dcc80987e | 1136 | while(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET) |
mbed_official | 610:813dcc80987e | 1137 | { |
mbed_official | 610:813dcc80987e | 1138 | /* Check if timeout is disabled (set to infinite wait) */ |
mbed_official | 610:813dcc80987e | 1139 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 610:813dcc80987e | 1140 | { |
mbed_official | 610:813dcc80987e | 1141 | if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) |
mbed_official | 610:813dcc80987e | 1142 | { |
mbed_official | 610:813dcc80987e | 1143 | /* Update ADC state machine to timeout */ |
mbed_official | 610:813dcc80987e | 1144 | SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT); |
mbed_official | 610:813dcc80987e | 1145 | |
mbed_official | 610:813dcc80987e | 1146 | /* Process unlocked */ |
mbed_official | 610:813dcc80987e | 1147 | __HAL_UNLOCK(hadc); |
mbed_official | 610:813dcc80987e | 1148 | |
mbed_official | 610:813dcc80987e | 1149 | return HAL_TIMEOUT; |
mbed_official | 610:813dcc80987e | 1150 | } |
mbed_official | 610:813dcc80987e | 1151 | } |
mbed_official | 610:813dcc80987e | 1152 | } |
mbed_official | 610:813dcc80987e | 1153 | |
mbed_official | 610:813dcc80987e | 1154 | |
mbed_official | 610:813dcc80987e | 1155 | switch(EventType) |
mbed_official | 610:813dcc80987e | 1156 | { |
mbed_official | 610:813dcc80987e | 1157 | /* End Of Sampling event */ |
mbed_official | 610:813dcc80987e | 1158 | case ADC_EOSMP_EVENT: |
mbed_official | 610:813dcc80987e | 1159 | /* Change ADC state */ |
mbed_official | 610:813dcc80987e | 1160 | SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOSMP); |
mbed_official | 610:813dcc80987e | 1161 | |
mbed_official | 610:813dcc80987e | 1162 | /* Clear the End Of Sampling flag */ |
mbed_official | 610:813dcc80987e | 1163 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOSMP); |
mbed_official | 610:813dcc80987e | 1164 | |
mbed_official | 610:813dcc80987e | 1165 | break; |
mbed_official | 610:813dcc80987e | 1166 | |
mbed_official | 610:813dcc80987e | 1167 | /* Analog watchdog (level out of window) event */ |
mbed_official | 610:813dcc80987e | 1168 | /* Note: In case of several analog watchdog enabled, if needed to know */ |
mbed_official | 610:813dcc80987e | 1169 | /* which one triggered and on which ADCx, test ADC state of Analog Watchdog */ |
mbed_official | 610:813dcc80987e | 1170 | /* flags HAL_ADC_STATE_AWD/2/3 function. */ |
mbed_official | 610:813dcc80987e | 1171 | /* For example: "if (HAL_ADC_GetState(hadc1) == HAL_ADC_STATE_AWD) " */ |
mbed_official | 610:813dcc80987e | 1172 | /* "if (HAL_ADC_GetState(hadc1) == HAL_ADC_STATE_AWD2)" */ |
mbed_official | 610:813dcc80987e | 1173 | /* "if (HAL_ADC_GetState(hadc1) == HAL_ADC_STATE_AWD3)" */ |
mbed_official | 610:813dcc80987e | 1174 | case ADC_AWD_EVENT: |
mbed_official | 610:813dcc80987e | 1175 | /* Change ADC state */ |
mbed_official | 610:813dcc80987e | 1176 | SET_BIT(hadc->State, HAL_ADC_STATE_AWD1); |
mbed_official | 610:813dcc80987e | 1177 | |
mbed_official | 610:813dcc80987e | 1178 | /* Clear ADC analog watchdog flag */ |
mbed_official | 610:813dcc80987e | 1179 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD1); |
mbed_official | 610:813dcc80987e | 1180 | |
mbed_official | 610:813dcc80987e | 1181 | break; |
mbed_official | 610:813dcc80987e | 1182 | |
mbed_official | 610:813dcc80987e | 1183 | /* Check analog watchdog 2 flag */ |
mbed_official | 610:813dcc80987e | 1184 | case ADC_AWD2_EVENT: |
mbed_official | 610:813dcc80987e | 1185 | /* Change ADC state */ |
mbed_official | 610:813dcc80987e | 1186 | SET_BIT(hadc->State, HAL_ADC_STATE_AWD2); |
mbed_official | 610:813dcc80987e | 1187 | |
mbed_official | 610:813dcc80987e | 1188 | /* Clear ADC analog watchdog flag */ |
mbed_official | 610:813dcc80987e | 1189 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD2); |
mbed_official | 610:813dcc80987e | 1190 | |
mbed_official | 610:813dcc80987e | 1191 | break; |
mbed_official | 610:813dcc80987e | 1192 | |
mbed_official | 610:813dcc80987e | 1193 | /* Check analog watchdog 3 flag */ |
mbed_official | 610:813dcc80987e | 1194 | case ADC_AWD3_EVENT: |
mbed_official | 610:813dcc80987e | 1195 | /* Change ADC state */ |
mbed_official | 610:813dcc80987e | 1196 | SET_BIT(hadc->State, HAL_ADC_STATE_AWD3); |
mbed_official | 610:813dcc80987e | 1197 | |
mbed_official | 610:813dcc80987e | 1198 | /* Clear ADC analog watchdog flag */ |
mbed_official | 610:813dcc80987e | 1199 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD3); |
mbed_official | 610:813dcc80987e | 1200 | |
mbed_official | 610:813dcc80987e | 1201 | break; |
mbed_official | 610:813dcc80987e | 1202 | |
mbed_official | 610:813dcc80987e | 1203 | /* Injected context queue overflow event */ |
mbed_official | 610:813dcc80987e | 1204 | case ADC_JQOVF_EVENT: |
mbed_official | 610:813dcc80987e | 1205 | /* Change ADC state */ |
mbed_official | 610:813dcc80987e | 1206 | SET_BIT(hadc->State, HAL_ADC_STATE_INJ_JQOVF); |
mbed_official | 610:813dcc80987e | 1207 | |
mbed_official | 610:813dcc80987e | 1208 | /* Set ADC error code to Injected context queue overflow */ |
mbed_official | 610:813dcc80987e | 1209 | SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_JQOVF); |
mbed_official | 610:813dcc80987e | 1210 | |
mbed_official | 610:813dcc80987e | 1211 | /* Clear ADC Injected context queue overflow flag */ |
mbed_official | 610:813dcc80987e | 1212 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JQOVF); |
mbed_official | 610:813dcc80987e | 1213 | |
mbed_official | 610:813dcc80987e | 1214 | break; |
mbed_official | 610:813dcc80987e | 1215 | |
mbed_official | 610:813dcc80987e | 1216 | /* Overrun event */ |
mbed_official | 610:813dcc80987e | 1217 | default: /* Case ADC_OVR_EVENT */ |
mbed_official | 610:813dcc80987e | 1218 | /* If overrun is set to overwrite previous data, overrun event is not */ |
mbed_official | 610:813dcc80987e | 1219 | /* considered as an error. */ |
mbed_official | 610:813dcc80987e | 1220 | /* (cf ref manual "Managing conversions without using the DMA and without */ |
mbed_official | 610:813dcc80987e | 1221 | /* overrun ") */ |
mbed_official | 610:813dcc80987e | 1222 | if (hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED) |
mbed_official | 610:813dcc80987e | 1223 | { |
mbed_official | 610:813dcc80987e | 1224 | /* Change ADC state */ |
mbed_official | 610:813dcc80987e | 1225 | SET_BIT(hadc->State, HAL_ADC_STATE_REG_OVR); |
mbed_official | 610:813dcc80987e | 1226 | |
mbed_official | 610:813dcc80987e | 1227 | /* Set ADC error code to overrun */ |
mbed_official | 610:813dcc80987e | 1228 | SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR); |
mbed_official | 610:813dcc80987e | 1229 | } |
mbed_official | 610:813dcc80987e | 1230 | else |
mbed_official | 610:813dcc80987e | 1231 | { |
mbed_official | 610:813dcc80987e | 1232 | /* Clear ADC Overrun flag only if Overrun is set to ADC_OVR_DATA_OVERWRITTEN |
mbed_official | 610:813dcc80987e | 1233 | otherwise, DR is potentially overwritten by new converted data as soon |
mbed_official | 610:813dcc80987e | 1234 | as OVR is cleared. */ |
mbed_official | 610:813dcc80987e | 1235 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); |
mbed_official | 610:813dcc80987e | 1236 | } |
mbed_official | 610:813dcc80987e | 1237 | break; |
mbed_official | 610:813dcc80987e | 1238 | } |
mbed_official | 610:813dcc80987e | 1239 | |
mbed_official | 610:813dcc80987e | 1240 | /* Return API HAL status */ |
mbed_official | 610:813dcc80987e | 1241 | return HAL_OK; |
mbed_official | 610:813dcc80987e | 1242 | } |
mbed_official | 610:813dcc80987e | 1243 | |
mbed_official | 610:813dcc80987e | 1244 | |
mbed_official | 610:813dcc80987e | 1245 | /** |
mbed_official | 610:813dcc80987e | 1246 | * @brief Enable ADC, start conversion of regular group with interruption. |
mbed_official | 610:813dcc80987e | 1247 | * @note Interruptions enabled in this function according to initialization |
mbed_official | 610:813dcc80987e | 1248 | * setting : EOC (end of conversion), EOS (end of sequence), |
mbed_official | 610:813dcc80987e | 1249 | * OVR overrun. |
mbed_official | 610:813dcc80987e | 1250 | * Each of these interruptions has its dedicated callback function. |
mbed_official | 610:813dcc80987e | 1251 | * @note Case of multimode enabled: |
mbed_official | 610:813dcc80987e | 1252 | * HAL_ADC_Start_IT() must be called for ADC Slave first, then for |
mbed_official | 610:813dcc80987e | 1253 | * ADC Master. |
mbed_official | 610:813dcc80987e | 1254 | * For ADC Slave, ADC is enabled only (conversion is not started). |
mbed_official | 610:813dcc80987e | 1255 | * For ADC Master, ADC is enabled and multimode conversion is started. |
mbed_official | 610:813dcc80987e | 1256 | * @note To guarantee a proper reset of all interruptions once all the needed |
mbed_official | 610:813dcc80987e | 1257 | * conversions are obtained, HAL_ADC_Stop_IT() must be called to ensure |
mbed_official | 610:813dcc80987e | 1258 | * a correct stop of the IT-based conversions. |
mbed_official | 610:813dcc80987e | 1259 | * @note By default, HAL_ADC_Start_IT() doesn't enable the End Of Sampling |
mbed_official | 610:813dcc80987e | 1260 | * interruption. If required (e.g. in case of oversampling with trigger |
mbed_official | 610:813dcc80987e | 1261 | * mode), the user must |
mbed_official | 610:813dcc80987e | 1262 | * 1. first clear the EOSMP flag if set with macro __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOSMP) |
mbed_official | 610:813dcc80987e | 1263 | * 2. then enable the EOSMP interrupt with macro __HAL_ADC_ENABLE_IT(hadc, ADC_IT_EOSMP) |
mbed_official | 610:813dcc80987e | 1264 | * before calling HAL_ADC_Start_IT(). |
mbed_official | 610:813dcc80987e | 1265 | * @param hadc: ADC handle |
mbed_official | 610:813dcc80987e | 1266 | * @retval HAL status |
mbed_official | 610:813dcc80987e | 1267 | */ |
mbed_official | 610:813dcc80987e | 1268 | HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc) |
mbed_official | 610:813dcc80987e | 1269 | { |
mbed_official | 610:813dcc80987e | 1270 | HAL_StatusTypeDef tmp_status = HAL_OK; |
mbed_official | 610:813dcc80987e | 1271 | ADC_TypeDef *tmpADC_Master; |
mbed_official | 610:813dcc80987e | 1272 | |
mbed_official | 610:813dcc80987e | 1273 | /* Check the parameters */ |
mbed_official | 610:813dcc80987e | 1274 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 610:813dcc80987e | 1275 | |
mbed_official | 610:813dcc80987e | 1276 | /* if a regular conversion is already on-going (i.e. ADSTART is set), |
mbed_official | 610:813dcc80987e | 1277 | don't restart the conversion. */ |
mbed_official | 610:813dcc80987e | 1278 | if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc)) |
mbed_official | 610:813dcc80987e | 1279 | { |
mbed_official | 610:813dcc80987e | 1280 | return HAL_BUSY; |
mbed_official | 610:813dcc80987e | 1281 | } |
mbed_official | 610:813dcc80987e | 1282 | else |
mbed_official | 610:813dcc80987e | 1283 | { |
mbed_official | 610:813dcc80987e | 1284 | /* Process locked */ |
mbed_official | 610:813dcc80987e | 1285 | __HAL_LOCK(hadc); |
mbed_official | 610:813dcc80987e | 1286 | |
mbed_official | 610:813dcc80987e | 1287 | /* Enable the ADC peripheral */ |
mbed_official | 610:813dcc80987e | 1288 | tmp_status = ADC_Enable(hadc); |
mbed_official | 610:813dcc80987e | 1289 | |
mbed_official | 610:813dcc80987e | 1290 | /* Start conversion if ADC is effectively enabled */ |
mbed_official | 610:813dcc80987e | 1291 | if (tmp_status == HAL_OK) |
mbed_official | 610:813dcc80987e | 1292 | { |
mbed_official | 610:813dcc80987e | 1293 | /* State machine update: Check if an injected conversion is ongoing */ |
mbed_official | 610:813dcc80987e | 1294 | if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY)) |
mbed_official | 610:813dcc80987e | 1295 | { |
mbed_official | 610:813dcc80987e | 1296 | /* Reset ADC error code fields related to regular conversions only */ |
mbed_official | 610:813dcc80987e | 1297 | CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR|HAL_ADC_ERROR_DMA)); |
mbed_official | 610:813dcc80987e | 1298 | } |
mbed_official | 610:813dcc80987e | 1299 | else |
mbed_official | 610:813dcc80987e | 1300 | { |
mbed_official | 610:813dcc80987e | 1301 | /* Set ADC error code to none */ |
mbed_official | 610:813dcc80987e | 1302 | ADC_CLEAR_ERRORCODE(hadc); |
mbed_official | 610:813dcc80987e | 1303 | } |
mbed_official | 610:813dcc80987e | 1304 | /* Clear HAL_ADC_STATE_READY and regular conversion results bits, set HAL_ADC_STATE_REG_BUSY bit */ |
mbed_official | 610:813dcc80987e | 1305 | ADC_STATE_CLR_SET(hadc->State, (HAL_ADC_STATE_READY|HAL_ADC_STATE_REG_EOC|HAL_ADC_STATE_REG_OVR|HAL_ADC_STATE_REG_EOSMP), HAL_ADC_STATE_REG_BUSY); |
mbed_official | 610:813dcc80987e | 1306 | |
mbed_official | 610:813dcc80987e | 1307 | /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit |
mbed_official | 610:813dcc80987e | 1308 | - by default if ADC is Master or Independent |
mbed_official | 610:813dcc80987e | 1309 | - if MultiMode setting is set to independent mode (no dual regular or injected conversions are configured) */ |
mbed_official | 610:813dcc80987e | 1310 | if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)) |
mbed_official | 610:813dcc80987e | 1311 | { |
mbed_official | 610:813dcc80987e | 1312 | CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); |
mbed_official | 610:813dcc80987e | 1313 | } |
mbed_official | 610:813dcc80987e | 1314 | |
mbed_official | 610:813dcc80987e | 1315 | /* Clear regular group conversion flag and overrun flag */ |
mbed_official | 610:813dcc80987e | 1316 | /* (To ensure of no unknown state from potential previous ADC operations) */ |
mbed_official | 610:813dcc80987e | 1317 | __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); |
mbed_official | 610:813dcc80987e | 1318 | |
mbed_official | 610:813dcc80987e | 1319 | /* By default, disable all interruptions before enabling the desired ones */ |
mbed_official | 610:813dcc80987e | 1320 | __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR)); |
mbed_official | 610:813dcc80987e | 1321 | |
mbed_official | 610:813dcc80987e | 1322 | /* Enable required interruptions */ |
mbed_official | 610:813dcc80987e | 1323 | switch(hadc->Init.EOCSelection) |
mbed_official | 610:813dcc80987e | 1324 | { |
mbed_official | 610:813dcc80987e | 1325 | case ADC_EOC_SEQ_CONV: |
mbed_official | 610:813dcc80987e | 1326 | __HAL_ADC_ENABLE_IT(hadc, ADC_IT_EOS); |
mbed_official | 610:813dcc80987e | 1327 | break; |
mbed_official | 610:813dcc80987e | 1328 | /* case ADC_EOC_SINGLE_CONV */ |
mbed_official | 610:813dcc80987e | 1329 | default: |
mbed_official | 610:813dcc80987e | 1330 | __HAL_ADC_ENABLE_IT(hadc, ADC_IT_EOC); |
mbed_official | 610:813dcc80987e | 1331 | break; |
mbed_official | 610:813dcc80987e | 1332 | } |
mbed_official | 610:813dcc80987e | 1333 | |
mbed_official | 610:813dcc80987e | 1334 | /* If hadc->Init.Overrun is set to ADC_OVR_DATA_PRESERVED, only then is |
mbed_official | 610:813dcc80987e | 1335 | ADC_IT_OVR enabled; otherwise data overwrite is considered as normal |
mbed_official | 610:813dcc80987e | 1336 | behavior and no CPU time is lost for a non-processed interruption */ |
mbed_official | 610:813dcc80987e | 1337 | if (hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED) |
mbed_official | 610:813dcc80987e | 1338 | { |
mbed_official | 610:813dcc80987e | 1339 | __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR); |
mbed_official | 610:813dcc80987e | 1340 | } |
mbed_official | 610:813dcc80987e | 1341 | |
mbed_official | 610:813dcc80987e | 1342 | /* Enable conversion of regular group. */ |
mbed_official | 610:813dcc80987e | 1343 | /* If software start has been selected, conversion starts immediately. */ |
mbed_official | 610:813dcc80987e | 1344 | /* If external trigger has been selected, conversion starts at next */ |
mbed_official | 610:813dcc80987e | 1345 | /* trigger event. */ |
mbed_official | 610:813dcc80987e | 1346 | /* Case of multimode enabled: */ |
mbed_official | 610:813dcc80987e | 1347 | /* - if ADC is slave and dual regular conversions are enabled, ADC is */ |
mbed_official | 610:813dcc80987e | 1348 | /* enabled only (conversion is not started), */ |
mbed_official | 610:813dcc80987e | 1349 | /* - if ADC is master, ADC is enabled and conversion is started. */ |
mbed_official | 610:813dcc80987e | 1350 | if (ADC_INDEPENDENT_OR_NONMULTIMODEREGULAR_SLAVE(hadc) ) |
mbed_official | 610:813dcc80987e | 1351 | { |
mbed_official | 610:813dcc80987e | 1352 | /* Set HAL_ADC_STATE_INJ_BUSY and reset HAL_ADC_STATE_INJ_EOC if JAUTO is set */ |
mbed_official | 610:813dcc80987e | 1353 | if (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO) != RESET) |
mbed_official | 610:813dcc80987e | 1354 | { |
mbed_official | 610:813dcc80987e | 1355 | ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); |
mbed_official | 610:813dcc80987e | 1356 | |
mbed_official | 610:813dcc80987e | 1357 | /* Enable as well injected interruptions in case |
mbed_official | 610:813dcc80987e | 1358 | HAL_ADCEx_InjectedStart_IT() has not been called beforehand. This |
mbed_official | 610:813dcc80987e | 1359 | allows to start regular and injected conversions when JAUTO is |
mbed_official | 610:813dcc80987e | 1360 | set with a single call to HAL_ADC_Start_IT() */ |
mbed_official | 610:813dcc80987e | 1361 | switch(hadc->Init.EOCSelection) |
mbed_official | 610:813dcc80987e | 1362 | { |
mbed_official | 610:813dcc80987e | 1363 | case ADC_EOC_SEQ_CONV: |
mbed_official | 610:813dcc80987e | 1364 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC); |
mbed_official | 610:813dcc80987e | 1365 | __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOS); |
mbed_official | 610:813dcc80987e | 1366 | break; |
mbed_official | 610:813dcc80987e | 1367 | /* case ADC_EOC_SINGLE_CONV */ |
mbed_official | 610:813dcc80987e | 1368 | default: |
mbed_official | 610:813dcc80987e | 1369 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOS); |
mbed_official | 610:813dcc80987e | 1370 | __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC); |
mbed_official | 610:813dcc80987e | 1371 | break; |
mbed_official | 610:813dcc80987e | 1372 | } |
mbed_official | 610:813dcc80987e | 1373 | } /* if (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO) != RESET) */ |
mbed_official | 610:813dcc80987e | 1374 | /* Process unlocked */ |
mbed_official | 610:813dcc80987e | 1375 | __HAL_UNLOCK(hadc); |
mbed_official | 610:813dcc80987e | 1376 | /* Start ADC */ |
mbed_official | 610:813dcc80987e | 1377 | SET_BIT(hadc->Instance->CR, ADC_CR_ADSTART); |
mbed_official | 610:813dcc80987e | 1378 | } |
mbed_official | 610:813dcc80987e | 1379 | else |
mbed_official | 610:813dcc80987e | 1380 | { |
mbed_official | 610:813dcc80987e | 1381 | /* hadc is the handle of a Slave ADC with dual regular conversions |
mbed_official | 610:813dcc80987e | 1382 | enabled. Therefore, ADC_CR_ADSTART is NOT set */ |
mbed_official | 610:813dcc80987e | 1383 | SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); |
mbed_official | 610:813dcc80987e | 1384 | /* if Master ADC JAUTO bit is set, Slave injected interruptions |
mbed_official | 610:813dcc80987e | 1385 | are enabled nevertheless (for same reason as above) */ |
mbed_official | 610:813dcc80987e | 1386 | tmpADC_Master = ADC_MASTER_REGISTER(hadc); |
mbed_official | 610:813dcc80987e | 1387 | if (READ_BIT(tmpADC_Master->CFGR, ADC_CFGR_JAUTO) != RESET) |
mbed_official | 610:813dcc80987e | 1388 | { |
mbed_official | 610:813dcc80987e | 1389 | /* First, update Slave State in setting HAL_ADC_STATE_INJ_BUSY bit |
mbed_official | 610:813dcc80987e | 1390 | and in resetting HAL_ADC_STATE_INJ_EOC bit */ |
mbed_official | 610:813dcc80987e | 1391 | ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); |
mbed_official | 610:813dcc80987e | 1392 | /* Next, set Slave injected interruptions */ |
mbed_official | 610:813dcc80987e | 1393 | switch(hadc->Init.EOCSelection) |
mbed_official | 610:813dcc80987e | 1394 | { |
mbed_official | 610:813dcc80987e | 1395 | case ADC_EOC_SEQ_CONV: |
mbed_official | 610:813dcc80987e | 1396 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC); |
mbed_official | 610:813dcc80987e | 1397 | __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOS); |
mbed_official | 610:813dcc80987e | 1398 | break; |
mbed_official | 610:813dcc80987e | 1399 | /* case ADC_EOC_SINGLE_CONV */ |
mbed_official | 610:813dcc80987e | 1400 | default: |
mbed_official | 610:813dcc80987e | 1401 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOS); |
mbed_official | 610:813dcc80987e | 1402 | __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC); |
mbed_official | 610:813dcc80987e | 1403 | break; |
mbed_official | 610:813dcc80987e | 1404 | } |
mbed_official | 610:813dcc80987e | 1405 | } /* if (READ_BIT(tmpADC_Master->CFGR, ADC_CFGR_JAUTO) != RESET) */ |
mbed_official | 610:813dcc80987e | 1406 | /* Process unlocked */ |
mbed_official | 610:813dcc80987e | 1407 | __HAL_UNLOCK(hadc); |
mbed_official | 610:813dcc80987e | 1408 | } /* if (ADC_INDEPENDENT_OR_NONMULTIMODEREGULAR_SLAVE(hadc) ) */ |
mbed_official | 610:813dcc80987e | 1409 | } /* if (tmp_status == HAL_OK) */ |
mbed_official | 610:813dcc80987e | 1410 | else |
mbed_official | 610:813dcc80987e | 1411 | { |
mbed_official | 610:813dcc80987e | 1412 | /* Process unlocked */ |
mbed_official | 610:813dcc80987e | 1413 | __HAL_UNLOCK(hadc); |
mbed_official | 610:813dcc80987e | 1414 | } |
mbed_official | 610:813dcc80987e | 1415 | |
mbed_official | 610:813dcc80987e | 1416 | /* Return function status */ |
mbed_official | 610:813dcc80987e | 1417 | return tmp_status; |
mbed_official | 610:813dcc80987e | 1418 | |
mbed_official | 610:813dcc80987e | 1419 | } |
mbed_official | 610:813dcc80987e | 1420 | } |
mbed_official | 610:813dcc80987e | 1421 | |
mbed_official | 610:813dcc80987e | 1422 | |
mbed_official | 610:813dcc80987e | 1423 | |
mbed_official | 610:813dcc80987e | 1424 | /** |
mbed_official | 610:813dcc80987e | 1425 | * @brief Stop ADC conversion of regular groups when interruptions are enabled. |
mbed_official | 610:813dcc80987e | 1426 | * @note Stop as well injected conversions and disable ADC peripheral. |
mbed_official | 610:813dcc80987e | 1427 | * @param hadc: ADC handle |
mbed_official | 610:813dcc80987e | 1428 | * @retval HAL status. |
mbed_official | 610:813dcc80987e | 1429 | */ |
mbed_official | 610:813dcc80987e | 1430 | HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc) |
mbed_official | 610:813dcc80987e | 1431 | { |
mbed_official | 610:813dcc80987e | 1432 | HAL_StatusTypeDef tmp_status = HAL_OK; |
mbed_official | 610:813dcc80987e | 1433 | |
mbed_official | 610:813dcc80987e | 1434 | /* Check the parameters */ |
mbed_official | 610:813dcc80987e | 1435 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 610:813dcc80987e | 1436 | |
mbed_official | 610:813dcc80987e | 1437 | /* Process locked */ |
mbed_official | 610:813dcc80987e | 1438 | __HAL_LOCK(hadc); |
mbed_official | 610:813dcc80987e | 1439 | |
mbed_official | 610:813dcc80987e | 1440 | /* 1. Stop potential regular and injected on-going conversions */ |
mbed_official | 610:813dcc80987e | 1441 | tmp_status = ADC_ConversionStop(hadc, ADC_REGULAR_INJECTED_GROUP); |
mbed_official | 610:813dcc80987e | 1442 | |
mbed_official | 610:813dcc80987e | 1443 | /* Disable ADC peripheral if conversions are effectively stopped */ |
mbed_official | 610:813dcc80987e | 1444 | if (tmp_status == HAL_OK) |
mbed_official | 610:813dcc80987e | 1445 | { |
mbed_official | 610:813dcc80987e | 1446 | /* Disable all interrupts */ |
mbed_official | 610:813dcc80987e | 1447 | __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR)); |
mbed_official | 610:813dcc80987e | 1448 | |
mbed_official | 610:813dcc80987e | 1449 | /* 2. Disable the ADC peripheral */ |
mbed_official | 610:813dcc80987e | 1450 | tmp_status = ADC_Disable(hadc); |
mbed_official | 610:813dcc80987e | 1451 | |
mbed_official | 610:813dcc80987e | 1452 | /* Check if ADC is effectively disabled */ |
mbed_official | 610:813dcc80987e | 1453 | if (tmp_status == HAL_OK) |
mbed_official | 610:813dcc80987e | 1454 | { |
mbed_official | 610:813dcc80987e | 1455 | /* Change ADC state */ |
mbed_official | 610:813dcc80987e | 1456 | /* Clear HAL_ADC_STATE_REG_BUSY and HAL_ADC_STATE_INJ_BUSY bits, set HAL_ADC_STATE_READY bit */ |
mbed_official | 610:813dcc80987e | 1457 | ADC_STATE_CLR_SET(hadc->State, (HAL_ADC_STATE_REG_BUSY|HAL_ADC_STATE_INJ_BUSY), HAL_ADC_STATE_READY); |
mbed_official | 610:813dcc80987e | 1458 | } |
mbed_official | 610:813dcc80987e | 1459 | } |
mbed_official | 610:813dcc80987e | 1460 | |
mbed_official | 610:813dcc80987e | 1461 | /* Process unlocked */ |
mbed_official | 610:813dcc80987e | 1462 | __HAL_UNLOCK(hadc); |
mbed_official | 610:813dcc80987e | 1463 | |
mbed_official | 610:813dcc80987e | 1464 | /* Return function status */ |
mbed_official | 610:813dcc80987e | 1465 | return tmp_status; |
mbed_official | 610:813dcc80987e | 1466 | } |
mbed_official | 610:813dcc80987e | 1467 | |
mbed_official | 610:813dcc80987e | 1468 | |
mbed_official | 610:813dcc80987e | 1469 | /** |
mbed_official | 610:813dcc80987e | 1470 | * @brief Enable ADC, start conversion of regular group and transfer result through DMA. |
mbed_official | 610:813dcc80987e | 1471 | * @note Interruptions enabled in this function: |
mbed_official | 610:813dcc80987e | 1472 | * overrun (if applicable), DMA half transfer, DMA transfer complete. |
mbed_official | 610:813dcc80987e | 1473 | * Each of these interruptions has its dedicated callback function. |
mbed_official | 610:813dcc80987e | 1474 | * @note Case of multimode enabled: HAL_ADC_Start_DMA() is for single-ADC |
mbed_official | 610:813dcc80987e | 1475 | * mode only. For multimode, use the dedicated HAL_ADCEx_MultiModeStart_DMA() function. |
mbed_official | 610:813dcc80987e | 1476 | * @param hadc: ADC handle |
mbed_official | 610:813dcc80987e | 1477 | * @param pData: Destination Buffer address. |
mbed_official | 610:813dcc80987e | 1478 | * @param Length: Length of data to be transferred from ADC peripheral to memory (in bytes) |
mbed_official | 610:813dcc80987e | 1479 | * @retval None |
mbed_official | 610:813dcc80987e | 1480 | */ |
mbed_official | 610:813dcc80987e | 1481 | HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length) |
mbed_official | 610:813dcc80987e | 1482 | { |
mbed_official | 610:813dcc80987e | 1483 | HAL_StatusTypeDef tmp_status = HAL_OK; |
mbed_official | 610:813dcc80987e | 1484 | |
mbed_official | 610:813dcc80987e | 1485 | /* Check the parameters */ |
mbed_official | 610:813dcc80987e | 1486 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 610:813dcc80987e | 1487 | |
mbed_official | 610:813dcc80987e | 1488 | if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc)) |
mbed_official | 610:813dcc80987e | 1489 | { |
mbed_official | 610:813dcc80987e | 1490 | return HAL_BUSY; |
mbed_official | 610:813dcc80987e | 1491 | } |
mbed_official | 610:813dcc80987e | 1492 | else |
mbed_official | 610:813dcc80987e | 1493 | { |
mbed_official | 610:813dcc80987e | 1494 | |
mbed_official | 610:813dcc80987e | 1495 | /* Process locked */ |
mbed_official | 610:813dcc80987e | 1496 | __HAL_LOCK(hadc); |
mbed_official | 610:813dcc80987e | 1497 | |
mbed_official | 610:813dcc80987e | 1498 | /* Ensure that dual regular conversions are not enabled or unavailable. */ |
mbed_official | 610:813dcc80987e | 1499 | /* Otherwise, dedicated API HAL_ADCEx_MultiModeStart_DMA() must be used. */ |
mbed_official | 610:813dcc80987e | 1500 | if (ADC_IS_DUAL_REGULAR_CONVERSION_ENABLE(hadc) == RESET) |
mbed_official | 610:813dcc80987e | 1501 | { |
mbed_official | 610:813dcc80987e | 1502 | /* Enable the ADC peripheral */ |
mbed_official | 610:813dcc80987e | 1503 | tmp_status = ADC_Enable(hadc); |
mbed_official | 610:813dcc80987e | 1504 | |
mbed_official | 610:813dcc80987e | 1505 | /* Start conversion if ADC is effectively enabled */ |
mbed_official | 610:813dcc80987e | 1506 | if (tmp_status == HAL_OK) |
mbed_official | 610:813dcc80987e | 1507 | { |
mbed_official | 610:813dcc80987e | 1508 | /* State machine update: Check if an injected conversion is ongoing */ |
mbed_official | 610:813dcc80987e | 1509 | if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY)) |
mbed_official | 610:813dcc80987e | 1510 | { |
mbed_official | 610:813dcc80987e | 1511 | /* Reset ADC error code fields related to regular conversions only */ |
mbed_official | 610:813dcc80987e | 1512 | CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR|HAL_ADC_ERROR_DMA)); |
mbed_official | 610:813dcc80987e | 1513 | } |
mbed_official | 610:813dcc80987e | 1514 | else |
mbed_official | 610:813dcc80987e | 1515 | { |
mbed_official | 610:813dcc80987e | 1516 | /* Set ADC error code to none */ |
mbed_official | 610:813dcc80987e | 1517 | ADC_CLEAR_ERRORCODE(hadc); |
mbed_official | 610:813dcc80987e | 1518 | } |
mbed_official | 610:813dcc80987e | 1519 | /* Clear HAL_ADC_STATE_READY and regular conversion results bits, set HAL_ADC_STATE_REG_BUSY bit */ |
mbed_official | 610:813dcc80987e | 1520 | ADC_STATE_CLR_SET(hadc->State, (HAL_ADC_STATE_READY|HAL_ADC_STATE_REG_EOC|HAL_ADC_STATE_REG_OVR|HAL_ADC_STATE_REG_EOSMP), HAL_ADC_STATE_REG_BUSY); |
mbed_official | 610:813dcc80987e | 1521 | |
mbed_official | 610:813dcc80987e | 1522 | /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit |
mbed_official | 610:813dcc80987e | 1523 | - by default if ADC is Master or Independent |
mbed_official | 610:813dcc80987e | 1524 | - if MultiMode setting is set to independent mode (no dual regular or injected conversions are configured) */ |
mbed_official | 610:813dcc80987e | 1525 | if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)) |
mbed_official | 610:813dcc80987e | 1526 | { |
mbed_official | 610:813dcc80987e | 1527 | CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); |
mbed_official | 610:813dcc80987e | 1528 | } |
mbed_official | 610:813dcc80987e | 1529 | |
mbed_official | 610:813dcc80987e | 1530 | /* Set the DMA transfer complete callback */ |
mbed_official | 610:813dcc80987e | 1531 | hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt; |
mbed_official | 610:813dcc80987e | 1532 | |
mbed_official | 610:813dcc80987e | 1533 | /* Set the DMA half transfer complete callback */ |
mbed_official | 610:813dcc80987e | 1534 | hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt; |
mbed_official | 610:813dcc80987e | 1535 | |
mbed_official | 610:813dcc80987e | 1536 | /* Set the DMA error callback */ |
mbed_official | 610:813dcc80987e | 1537 | hadc->DMA_Handle->XferErrorCallback = ADC_DMAError; |
mbed_official | 610:813dcc80987e | 1538 | |
mbed_official | 610:813dcc80987e | 1539 | |
mbed_official | 610:813dcc80987e | 1540 | /* Manage ADC and DMA start: ADC overrun interruption, DMA start, */ |
mbed_official | 610:813dcc80987e | 1541 | /* ADC start (in case of SW start): */ |
mbed_official | 610:813dcc80987e | 1542 | |
mbed_official | 610:813dcc80987e | 1543 | /* Clear regular group conversion flag and overrun flag */ |
mbed_official | 610:813dcc80987e | 1544 | /* (To ensure of no unknown state from potential previous ADC */ |
mbed_official | 610:813dcc80987e | 1545 | /* operations) */ |
mbed_official | 610:813dcc80987e | 1546 | __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); |
mbed_official | 610:813dcc80987e | 1547 | |
mbed_official | 610:813dcc80987e | 1548 | /* With DMA, overrun event is always considered as an error even if |
mbed_official | 610:813dcc80987e | 1549 | hadc->Init.Overrun is set to ADC_OVR_DATA_OVERWRITTEN. Therefore, |
mbed_official | 610:813dcc80987e | 1550 | ADC_IT_OVR is enabled. */ |
mbed_official | 610:813dcc80987e | 1551 | __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR); |
mbed_official | 610:813dcc80987e | 1552 | |
mbed_official | 610:813dcc80987e | 1553 | |
mbed_official | 610:813dcc80987e | 1554 | /* Enable ADC DMA mode */ |
mbed_official | 610:813dcc80987e | 1555 | SET_BIT(hadc->Instance->CFGR, ADC_CFGR_DMAEN); |
mbed_official | 610:813dcc80987e | 1556 | |
mbed_official | 610:813dcc80987e | 1557 | /* Start the DMA channel */ |
mbed_official | 610:813dcc80987e | 1558 | HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length); |
mbed_official | 610:813dcc80987e | 1559 | |
mbed_official | 610:813dcc80987e | 1560 | /* Enable conversion of regular group. */ |
mbed_official | 610:813dcc80987e | 1561 | /* Process unlocked */ |
mbed_official | 610:813dcc80987e | 1562 | __HAL_UNLOCK(hadc); |
mbed_official | 610:813dcc80987e | 1563 | /* If software start has been selected, conversion starts immediately. */ |
mbed_official | 610:813dcc80987e | 1564 | /* If external trigger has been selected, conversion will start at next */ |
mbed_official | 610:813dcc80987e | 1565 | /* trigger event. */ |
mbed_official | 610:813dcc80987e | 1566 | SET_BIT(hadc->Instance->CR, ADC_CR_ADSTART); |
mbed_official | 610:813dcc80987e | 1567 | |
mbed_official | 610:813dcc80987e | 1568 | } |
mbed_official | 610:813dcc80987e | 1569 | else |
mbed_official | 610:813dcc80987e | 1570 | { |
mbed_official | 610:813dcc80987e | 1571 | /* Process unlocked */ |
mbed_official | 610:813dcc80987e | 1572 | __HAL_UNLOCK(hadc); |
mbed_official | 610:813dcc80987e | 1573 | } /* if (tmp_status == HAL_OK) */ |
mbed_official | 610:813dcc80987e | 1574 | } |
mbed_official | 610:813dcc80987e | 1575 | else |
mbed_official | 610:813dcc80987e | 1576 | { |
mbed_official | 610:813dcc80987e | 1577 | tmp_status = HAL_ERROR; |
mbed_official | 610:813dcc80987e | 1578 | /* Process unlocked */ |
mbed_official | 610:813dcc80987e | 1579 | __HAL_UNLOCK(hadc); |
mbed_official | 610:813dcc80987e | 1580 | } /* if (ADC_IS_DUAL_REGULAR_CONVERSION_ENABLE(hadc) == RESET) */ |
mbed_official | 610:813dcc80987e | 1581 | |
mbed_official | 610:813dcc80987e | 1582 | |
mbed_official | 610:813dcc80987e | 1583 | |
mbed_official | 610:813dcc80987e | 1584 | /* Return function status */ |
mbed_official | 610:813dcc80987e | 1585 | return tmp_status; |
mbed_official | 610:813dcc80987e | 1586 | } /* if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc)) */ |
mbed_official | 610:813dcc80987e | 1587 | } |
mbed_official | 610:813dcc80987e | 1588 | |
mbed_official | 610:813dcc80987e | 1589 | |
mbed_official | 610:813dcc80987e | 1590 | /** |
mbed_official | 610:813dcc80987e | 1591 | * @brief Stop ADC conversion of regular groups and disable ADC DMA transfer. |
mbed_official | 610:813dcc80987e | 1592 | * @note Stop as well injected conversions and disable ADC peripheral. |
mbed_official | 610:813dcc80987e | 1593 | * @note Case of multimode enabled: HAL_ADC_Stop_DMA() function is |
mbed_official | 610:813dcc80987e | 1594 | * dedicated to single-ADC mode only. For multimode, use the |
mbed_official | 610:813dcc80987e | 1595 | * dedicated HAL_ADCEx_MultiModeStop_DMA() API. |
mbed_official | 610:813dcc80987e | 1596 | * @param hadc: ADC handle |
mbed_official | 610:813dcc80987e | 1597 | * @retval HAL status. |
mbed_official | 610:813dcc80987e | 1598 | */ |
mbed_official | 610:813dcc80987e | 1599 | HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc) |
mbed_official | 610:813dcc80987e | 1600 | { |
mbed_official | 610:813dcc80987e | 1601 | HAL_StatusTypeDef tmp_status = HAL_OK; |
mbed_official | 610:813dcc80987e | 1602 | |
mbed_official | 610:813dcc80987e | 1603 | /* Check the parameters */ |
mbed_official | 610:813dcc80987e | 1604 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 610:813dcc80987e | 1605 | |
mbed_official | 610:813dcc80987e | 1606 | /* Process locked */ |
mbed_official | 610:813dcc80987e | 1607 | __HAL_LOCK(hadc); |
mbed_official | 610:813dcc80987e | 1608 | |
mbed_official | 610:813dcc80987e | 1609 | /* 1. Stop potential regular conversion on going */ |
mbed_official | 610:813dcc80987e | 1610 | tmp_status = ADC_ConversionStop(hadc, ADC_REGULAR_INJECTED_GROUP); |
mbed_official | 610:813dcc80987e | 1611 | |
mbed_official | 610:813dcc80987e | 1612 | /* Disable ADC peripheral if conversions are effectively stopped */ |
mbed_official | 610:813dcc80987e | 1613 | if (tmp_status == HAL_OK) |
mbed_official | 610:813dcc80987e | 1614 | { |
mbed_official | 610:813dcc80987e | 1615 | /* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */ |
mbed_official | 610:813dcc80987e | 1616 | CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_DMAEN); |
mbed_official | 610:813dcc80987e | 1617 | |
mbed_official | 610:813dcc80987e | 1618 | /* Disable the DMA channel (in case of DMA in circular mode or stop while */ |
mbed_official | 610:813dcc80987e | 1619 | /* while DMA transfer is on going) */ |
mbed_official | 610:813dcc80987e | 1620 | tmp_status = HAL_DMA_Abort(hadc->DMA_Handle); |
mbed_official | 610:813dcc80987e | 1621 | |
mbed_official | 610:813dcc80987e | 1622 | /* Check if DMA channel effectively disabled */ |
mbed_official | 610:813dcc80987e | 1623 | if (tmp_status != HAL_OK) |
mbed_official | 610:813dcc80987e | 1624 | { |
mbed_official | 610:813dcc80987e | 1625 | /* Update ADC state machine to error */ |
mbed_official | 610:813dcc80987e | 1626 | SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); |
mbed_official | 610:813dcc80987e | 1627 | } |
mbed_official | 610:813dcc80987e | 1628 | |
mbed_official | 610:813dcc80987e | 1629 | /* Disable ADC overrun interrupt */ |
mbed_official | 610:813dcc80987e | 1630 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR); |
mbed_official | 610:813dcc80987e | 1631 | |
mbed_official | 610:813dcc80987e | 1632 | /* 2. Disable the ADC peripheral */ |
mbed_official | 610:813dcc80987e | 1633 | /* Update "tmp_status" only if DMA channel disabling passed, to keep in */ |
mbed_official | 610:813dcc80987e | 1634 | /* memory a potential failing status. */ |
mbed_official | 610:813dcc80987e | 1635 | if (tmp_status == HAL_OK) |
mbed_official | 610:813dcc80987e | 1636 | { |
mbed_official | 610:813dcc80987e | 1637 | tmp_status = ADC_Disable(hadc); |
mbed_official | 610:813dcc80987e | 1638 | } |
mbed_official | 610:813dcc80987e | 1639 | else |
mbed_official | 610:813dcc80987e | 1640 | { |
mbed_official | 610:813dcc80987e | 1641 | ADC_Disable(hadc); |
mbed_official | 610:813dcc80987e | 1642 | } |
mbed_official | 610:813dcc80987e | 1643 | |
mbed_official | 610:813dcc80987e | 1644 | /* Check if ADC is effectively disabled */ |
mbed_official | 610:813dcc80987e | 1645 | if (tmp_status == HAL_OK) |
mbed_official | 610:813dcc80987e | 1646 | { |
mbed_official | 610:813dcc80987e | 1647 | /* Change ADC state */ |
mbed_official | 610:813dcc80987e | 1648 | /* Clear HAL_ADC_STATE_REG_BUSY and HAL_ADC_STATE_INJ_BUSY bits, set HAL_ADC_STATE_READY bit */ |
mbed_official | 610:813dcc80987e | 1649 | ADC_STATE_CLR_SET(hadc->State, (HAL_ADC_STATE_REG_BUSY|HAL_ADC_STATE_INJ_BUSY), HAL_ADC_STATE_READY); |
mbed_official | 610:813dcc80987e | 1650 | } |
mbed_official | 610:813dcc80987e | 1651 | |
mbed_official | 610:813dcc80987e | 1652 | } |
mbed_official | 610:813dcc80987e | 1653 | |
mbed_official | 610:813dcc80987e | 1654 | /* Process unlocked */ |
mbed_official | 610:813dcc80987e | 1655 | __HAL_UNLOCK(hadc); |
mbed_official | 610:813dcc80987e | 1656 | |
mbed_official | 610:813dcc80987e | 1657 | /* Return function status */ |
mbed_official | 610:813dcc80987e | 1658 | return tmp_status; |
mbed_official | 610:813dcc80987e | 1659 | } |
mbed_official | 610:813dcc80987e | 1660 | |
mbed_official | 610:813dcc80987e | 1661 | |
mbed_official | 610:813dcc80987e | 1662 | /** |
mbed_official | 610:813dcc80987e | 1663 | * @brief Get ADC regular group conversion result. |
mbed_official | 610:813dcc80987e | 1664 | * @param hadc: ADC handle |
mbed_official | 610:813dcc80987e | 1665 | * @note Reading DR register automatically clears EOC flag. To reset EOS flag, |
mbed_official | 610:813dcc80987e | 1666 | * the user must resort to the macro |
mbed_official | 610:813dcc80987e | 1667 | * __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOS) |
mbed_official | 610:813dcc80987e | 1668 | * @retval Converted value |
mbed_official | 610:813dcc80987e | 1669 | */ |
mbed_official | 610:813dcc80987e | 1670 | uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc) |
mbed_official | 610:813dcc80987e | 1671 | { |
mbed_official | 610:813dcc80987e | 1672 | /* Check the parameters */ |
mbed_official | 610:813dcc80987e | 1673 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 610:813dcc80987e | 1674 | |
mbed_official | 610:813dcc80987e | 1675 | /* Return ADC converted value */ |
mbed_official | 610:813dcc80987e | 1676 | return hadc->Instance->DR; |
mbed_official | 610:813dcc80987e | 1677 | } |
mbed_official | 610:813dcc80987e | 1678 | |
mbed_official | 610:813dcc80987e | 1679 | |
mbed_official | 610:813dcc80987e | 1680 | /** |
mbed_official | 610:813dcc80987e | 1681 | * @brief Handle ADC interrupt request. |
mbed_official | 610:813dcc80987e | 1682 | * @param hadc: ADC handle |
mbed_official | 610:813dcc80987e | 1683 | * @retval None |
mbed_official | 610:813dcc80987e | 1684 | */ |
mbed_official | 610:813dcc80987e | 1685 | void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc) |
mbed_official | 610:813dcc80987e | 1686 | { |
mbed_official | 610:813dcc80987e | 1687 | uint32_t overrun_error = 0; /* flag set if overrun occurrence has to be considered as an error */ |
mbed_official | 610:813dcc80987e | 1688 | ADC_TypeDef *tmpADC_Master; |
mbed_official | 610:813dcc80987e | 1689 | uint32_t tmp_isr = hadc->Instance->ISR; |
mbed_official | 610:813dcc80987e | 1690 | uint32_t tmp_ier = hadc->Instance->IER; |
mbed_official | 610:813dcc80987e | 1691 | uint32_t tmp_cfgr = 0x0; |
mbed_official | 610:813dcc80987e | 1692 | uint32_t tmp_cfgr_jqm = 0x0; |
mbed_official | 610:813dcc80987e | 1693 | |
mbed_official | 610:813dcc80987e | 1694 | |
mbed_official | 610:813dcc80987e | 1695 | /* Check the parameters */ |
mbed_official | 610:813dcc80987e | 1696 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 610:813dcc80987e | 1697 | assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection)); |
mbed_official | 610:813dcc80987e | 1698 | |
mbed_official | 610:813dcc80987e | 1699 | |
mbed_official | 610:813dcc80987e | 1700 | /* ====== Check End of Sampling flag for regular group ===== */ |
mbed_official | 610:813dcc80987e | 1701 | if (((tmp_isr & ADC_FLAG_EOSMP) == ADC_FLAG_EOSMP) && ((tmp_ier & ADC_IT_EOSMP) == ADC_IT_EOSMP)) |
mbed_official | 610:813dcc80987e | 1702 | { |
mbed_official | 610:813dcc80987e | 1703 | /* Update state machine on end of sampling status if not in error state */ |
mbed_official | 610:813dcc80987e | 1704 | if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL)) |
mbed_official | 610:813dcc80987e | 1705 | { |
mbed_official | 610:813dcc80987e | 1706 | /* Change ADC state */ |
mbed_official | 610:813dcc80987e | 1707 | SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOSMP); |
mbed_official | 610:813dcc80987e | 1708 | } |
mbed_official | 610:813dcc80987e | 1709 | |
mbed_official | 610:813dcc80987e | 1710 | /* End Of Sampling callback */ |
mbed_official | 610:813dcc80987e | 1711 | HAL_ADCEx_EndOfSamplingCallback(hadc); |
mbed_official | 610:813dcc80987e | 1712 | |
mbed_official | 610:813dcc80987e | 1713 | /* Clear regular group conversion flag */ |
mbed_official | 610:813dcc80987e | 1714 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOSMP ); |
mbed_official | 610:813dcc80987e | 1715 | } |
mbed_official | 610:813dcc80987e | 1716 | |
mbed_official | 610:813dcc80987e | 1717 | /* ====== Check End of Conversion or Sequence flags for regular group ===== */ |
mbed_official | 610:813dcc80987e | 1718 | if( (((tmp_isr & ADC_FLAG_EOC) == ADC_FLAG_EOC) && ((tmp_ier & ADC_IT_EOC) == ADC_IT_EOC)) || |
mbed_official | 610:813dcc80987e | 1719 | (((tmp_isr & ADC_FLAG_EOS) == ADC_FLAG_EOS) && ((tmp_ier & ADC_IT_EOS) == ADC_IT_EOS)) ) |
mbed_official | 610:813dcc80987e | 1720 | { |
mbed_official | 610:813dcc80987e | 1721 | /* Update state machine on conversion status if not in error state */ |
mbed_official | 610:813dcc80987e | 1722 | if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL)) |
mbed_official | 610:813dcc80987e | 1723 | { |
mbed_official | 610:813dcc80987e | 1724 | /* Change ADC state */ |
mbed_official | 610:813dcc80987e | 1725 | SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); |
mbed_official | 610:813dcc80987e | 1726 | } |
mbed_official | 610:813dcc80987e | 1727 | |
mbed_official | 610:813dcc80987e | 1728 | /* Disable interruption if no further conversion upcoming by regular */ |
mbed_official | 610:813dcc80987e | 1729 | /* external trigger or by continuous mode, */ |
mbed_official | 610:813dcc80987e | 1730 | /* and if scan sequence if completed. */ |
mbed_official | 610:813dcc80987e | 1731 | if(ADC_IS_SOFTWARE_START_REGULAR(hadc)) |
mbed_official | 610:813dcc80987e | 1732 | { |
mbed_official | 610:813dcc80987e | 1733 | if (ADC_INDEPENDENT_OR_NONMULTIMODEREGULAR_SLAVE(hadc)) |
mbed_official | 610:813dcc80987e | 1734 | { |
mbed_official | 610:813dcc80987e | 1735 | /* check CONT bit directly in handle ADC CFGR register */ |
mbed_official | 610:813dcc80987e | 1736 | tmp_cfgr = READ_REG(hadc->Instance->CFGR); |
mbed_official | 610:813dcc80987e | 1737 | } |
mbed_official | 610:813dcc80987e | 1738 | else |
mbed_official | 610:813dcc80987e | 1739 | { |
mbed_official | 610:813dcc80987e | 1740 | /* else need to check Master ADC CONT bit */ |
mbed_official | 610:813dcc80987e | 1741 | tmpADC_Master = ADC_MASTER_REGISTER(hadc); |
mbed_official | 610:813dcc80987e | 1742 | tmp_cfgr = READ_REG(tmpADC_Master->CFGR); |
mbed_official | 610:813dcc80987e | 1743 | } |
mbed_official | 610:813dcc80987e | 1744 | |
mbed_official | 610:813dcc80987e | 1745 | /* Carry on if continuous mode is disabled */ |
mbed_official | 610:813dcc80987e | 1746 | if (READ_BIT (tmp_cfgr, ADC_CFGR_CONT) != ADC_CFGR_CONT) |
mbed_official | 610:813dcc80987e | 1747 | { |
mbed_official | 610:813dcc80987e | 1748 | /* If End of Sequence is reached, disable interrupts */ |
mbed_official | 610:813dcc80987e | 1749 | if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) ) |
mbed_official | 610:813dcc80987e | 1750 | { |
mbed_official | 610:813dcc80987e | 1751 | /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */ |
mbed_official | 610:813dcc80987e | 1752 | /* ADSTART==0 (no conversion on going) */ |
mbed_official | 610:813dcc80987e | 1753 | if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) |
mbed_official | 610:813dcc80987e | 1754 | { |
mbed_official | 610:813dcc80987e | 1755 | /* Disable ADC end of sequence conversion interrupt */ |
mbed_official | 610:813dcc80987e | 1756 | /* Note: if Overrun interrupt was enabled with EOC or EOS interrupt */ |
mbed_official | 610:813dcc80987e | 1757 | /* in HAL_Start_IT(), it isn't disabled here because it can be used */ |
mbed_official | 610:813dcc80987e | 1758 | /* by overrun IRQ process below. */ |
mbed_official | 610:813dcc80987e | 1759 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS); |
mbed_official | 610:813dcc80987e | 1760 | /* Clear HAL_ADC_STATE_REG_BUSY bit */ |
mbed_official | 610:813dcc80987e | 1761 | CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); |
mbed_official | 610:813dcc80987e | 1762 | /* If no injected conversion on-going, set HAL_ADC_STATE_READY bit */ |
mbed_official | 610:813dcc80987e | 1763 | if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY)) |
mbed_official | 610:813dcc80987e | 1764 | { |
mbed_official | 610:813dcc80987e | 1765 | SET_BIT(hadc->State, HAL_ADC_STATE_READY); |
mbed_official | 610:813dcc80987e | 1766 | } |
mbed_official | 610:813dcc80987e | 1767 | } |
mbed_official | 610:813dcc80987e | 1768 | else |
mbed_official | 610:813dcc80987e | 1769 | { |
mbed_official | 610:813dcc80987e | 1770 | /* Change ADC state to error state */ |
mbed_official | 610:813dcc80987e | 1771 | SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); |
mbed_official | 610:813dcc80987e | 1772 | |
mbed_official | 610:813dcc80987e | 1773 | /* Set ADC error code to ADC IP internal error */ |
mbed_official | 610:813dcc80987e | 1774 | SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); |
mbed_official | 610:813dcc80987e | 1775 | } |
mbed_official | 610:813dcc80987e | 1776 | } |
mbed_official | 610:813dcc80987e | 1777 | } /* if (READ_BIT (tmp_cfgr, ADC_CFGR_CONT) != ADC_CFGR_CONT) */ |
mbed_official | 610:813dcc80987e | 1778 | } /* if(ADC_IS_SOFTWARE_START_REGULAR(hadc) */ |
mbed_official | 610:813dcc80987e | 1779 | |
mbed_official | 610:813dcc80987e | 1780 | /* Conversion complete callback */ |
mbed_official | 610:813dcc80987e | 1781 | /* Note: HAL_ADC_ConvCpltCallback can resort to |
mbed_official | 610:813dcc80987e | 1782 | if( __HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_EOS)) or |
mbed_official | 610:813dcc80987e | 1783 | if( __HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_EOC)) to determine whether |
mbed_official | 610:813dcc80987e | 1784 | interruption has been triggered by end of conversion or end of |
mbed_official | 610:813dcc80987e | 1785 | sequence. */ |
mbed_official | 610:813dcc80987e | 1786 | HAL_ADC_ConvCpltCallback(hadc); |
mbed_official | 610:813dcc80987e | 1787 | |
mbed_official | 610:813dcc80987e | 1788 | |
mbed_official | 610:813dcc80987e | 1789 | /* Clear regular group conversion flag */ |
mbed_official | 610:813dcc80987e | 1790 | __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS) ); |
mbed_official | 610:813dcc80987e | 1791 | } |
mbed_official | 610:813dcc80987e | 1792 | |
mbed_official | 610:813dcc80987e | 1793 | |
mbed_official | 610:813dcc80987e | 1794 | /* ========== Check End of Conversion flag for injected group ========== */ |
mbed_official | 610:813dcc80987e | 1795 | if( (((tmp_isr & ADC_FLAG_JEOC) == ADC_FLAG_JEOC) && ((tmp_ier & ADC_IT_JEOC) == ADC_IT_JEOC)) || |
mbed_official | 610:813dcc80987e | 1796 | (((tmp_isr & ADC_FLAG_JEOS) == ADC_FLAG_JEOS) && ((tmp_ier & ADC_IT_JEOS) == ADC_IT_JEOS)) ) |
mbed_official | 610:813dcc80987e | 1797 | { |
mbed_official | 610:813dcc80987e | 1798 | /* Update state machine on conversion status if not in error state */ |
mbed_official | 610:813dcc80987e | 1799 | if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL)) |
mbed_official | 610:813dcc80987e | 1800 | { |
mbed_official | 610:813dcc80987e | 1801 | /* Change ADC state */ |
mbed_official | 610:813dcc80987e | 1802 | SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC); |
mbed_official | 610:813dcc80987e | 1803 | } |
mbed_official | 610:813dcc80987e | 1804 | |
mbed_official | 610:813dcc80987e | 1805 | |
mbed_official | 610:813dcc80987e | 1806 | /* Check whether interruptions can be disabled only if |
mbed_official | 610:813dcc80987e | 1807 | - injected conversions are software-triggered when injected queue management is disabled |
mbed_official | 610:813dcc80987e | 1808 | OR |
mbed_official | 610:813dcc80987e | 1809 | - auto-injection is enabled, continuous mode is disabled (CONT = 0) |
mbed_official | 610:813dcc80987e | 1810 | and regular conversions are software-triggered */ |
mbed_official | 610:813dcc80987e | 1811 | /* If End of Sequence is reached, disable interrupts */ |
mbed_official | 610:813dcc80987e | 1812 | if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOS)) |
mbed_official | 610:813dcc80987e | 1813 | { |
mbed_official | 610:813dcc80987e | 1814 | |
mbed_official | 610:813dcc80987e | 1815 | /* First, retrieve proper registers to check */ |
mbed_official | 610:813dcc80987e | 1816 | /* 1a. Are injected conversions that of a dual Slave ? */ |
mbed_official | 610:813dcc80987e | 1817 | if (ADC_INDEPENDENT_OR_NONMULTIMODEINJECTED_SLAVE(hadc)) |
mbed_official | 610:813dcc80987e | 1818 | { |
mbed_official | 610:813dcc80987e | 1819 | /* hadc is not the handle of a Slave ADC with dual injected conversions enabled: |
mbed_official | 610:813dcc80987e | 1820 | check JQM bit directly in ADC CFGR register */ |
mbed_official | 610:813dcc80987e | 1821 | tmp_cfgr_jqm = READ_REG(hadc->Instance->CFGR); |
mbed_official | 610:813dcc80987e | 1822 | } |
mbed_official | 610:813dcc80987e | 1823 | else |
mbed_official | 610:813dcc80987e | 1824 | { |
mbed_official | 610:813dcc80987e | 1825 | /* hadc is the handle of a Slave ADC with dual injected conversions enabled: |
mbed_official | 610:813dcc80987e | 1826 | need to check JQM bit of Master ADC CFGR register */ |
mbed_official | 610:813dcc80987e | 1827 | tmpADC_Master = ADC_MASTER_REGISTER(hadc); |
mbed_official | 610:813dcc80987e | 1828 | tmp_cfgr_jqm = READ_REG(tmpADC_Master->CFGR); |
mbed_official | 610:813dcc80987e | 1829 | } |
mbed_official | 610:813dcc80987e | 1830 | /* 1b. Is hadc the handle of a Slave ADC with regular conversions enabled? */ |
mbed_official | 610:813dcc80987e | 1831 | if (ADC_INDEPENDENT_OR_NONMULTIMODEREGULAR_SLAVE(hadc)) |
mbed_official | 610:813dcc80987e | 1832 | { |
mbed_official | 610:813dcc80987e | 1833 | /* hadc is not the handle of a Slave ADC with dual regular conversions enabled: |
mbed_official | 610:813dcc80987e | 1834 | check JAUTO and CONT bits directly in ADC CFGR register */ |
mbed_official | 610:813dcc80987e | 1835 | tmp_cfgr = READ_REG(hadc->Instance->CFGR); |
mbed_official | 610:813dcc80987e | 1836 | } |
mbed_official | 610:813dcc80987e | 1837 | else |
mbed_official | 610:813dcc80987e | 1838 | { |
mbed_official | 610:813dcc80987e | 1839 | /* hadc is not the handle of a Slave ADC with dual regular conversions enabled: |
mbed_official | 610:813dcc80987e | 1840 | check JAUTO and CONT bits of Master ADC CFGR register */ |
mbed_official | 610:813dcc80987e | 1841 | tmpADC_Master = ADC_MASTER_REGISTER(hadc); |
mbed_official | 610:813dcc80987e | 1842 | tmp_cfgr = READ_REG(tmpADC_Master->CFGR); |
mbed_official | 610:813dcc80987e | 1843 | } |
mbed_official | 610:813dcc80987e | 1844 | |
mbed_official | 610:813dcc80987e | 1845 | /* Secondly, check whether JEOC and JEOS interruptions can be disabled */ |
mbed_official | 610:813dcc80987e | 1846 | if ((ADC_IS_SOFTWARE_START_INJECTED(hadc) && (READ_BIT(tmp_cfgr_jqm, ADC_CFGR_JQM) != ADC_CFGR_JQM)) |
mbed_official | 610:813dcc80987e | 1847 | && (!((READ_BIT(tmp_cfgr, (ADC_CFGR_JAUTO|ADC_CFGR_CONT)) == (ADC_CFGR_JAUTO|ADC_CFGR_CONT)) && |
mbed_official | 610:813dcc80987e | 1848 | (ADC_IS_SOFTWARE_START_REGULAR(hadc)))) ) |
mbed_official | 610:813dcc80987e | 1849 | { |
mbed_official | 610:813dcc80987e | 1850 | /* Allowed to modify bits ADC_IT_JEOC/ADC_IT_JEOS only if bit */ |
mbed_official | 610:813dcc80987e | 1851 | /* JADSTART==0 (no conversion on going) */ |
mbed_official | 610:813dcc80987e | 1852 | if (ADC_IS_CONVERSION_ONGOING_INJECTED(hadc) == RESET) |
mbed_official | 610:813dcc80987e | 1853 | { |
mbed_official | 610:813dcc80987e | 1854 | /* Disable ADC end of sequence conversion interrupt */ |
mbed_official | 610:813dcc80987e | 1855 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC | ADC_IT_JEOS); |
mbed_official | 610:813dcc80987e | 1856 | /* Clear HAL_ADC_STATE_INJ_BUSY bit */ |
mbed_official | 610:813dcc80987e | 1857 | CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY); |
mbed_official | 610:813dcc80987e | 1858 | /* If no regular conversion on-going, set HAL_ADC_STATE_READY bit */ |
mbed_official | 610:813dcc80987e | 1859 | if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY)) |
mbed_official | 610:813dcc80987e | 1860 | { |
mbed_official | 610:813dcc80987e | 1861 | SET_BIT(hadc->State, HAL_ADC_STATE_READY); |
mbed_official | 610:813dcc80987e | 1862 | } |
mbed_official | 610:813dcc80987e | 1863 | } |
mbed_official | 610:813dcc80987e | 1864 | else |
mbed_official | 610:813dcc80987e | 1865 | { |
mbed_official | 610:813dcc80987e | 1866 | /* Change ADC state to error state */ |
mbed_official | 610:813dcc80987e | 1867 | SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); |
mbed_official | 610:813dcc80987e | 1868 | |
mbed_official | 610:813dcc80987e | 1869 | /* Set ADC error code to ADC IP internal error */ |
mbed_official | 610:813dcc80987e | 1870 | SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); |
mbed_official | 610:813dcc80987e | 1871 | } |
mbed_official | 610:813dcc80987e | 1872 | } |
mbed_official | 610:813dcc80987e | 1873 | } /* if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOS)) */ |
mbed_official | 610:813dcc80987e | 1874 | |
mbed_official | 610:813dcc80987e | 1875 | /* Injected Conversion complete callback */ |
mbed_official | 610:813dcc80987e | 1876 | /* Note: HAL_ADCEx_InjectedConvCpltCallback can resort to |
mbed_official | 610:813dcc80987e | 1877 | if( __HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_JEOS)) or |
mbed_official | 610:813dcc80987e | 1878 | if( __HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_JEOC)) to determine whether |
mbed_official | 610:813dcc80987e | 1879 | interruption has been triggered by end of conversion or end of |
mbed_official | 610:813dcc80987e | 1880 | sequence. */ |
mbed_official | 610:813dcc80987e | 1881 | HAL_ADCEx_InjectedConvCpltCallback(hadc); |
mbed_official | 610:813dcc80987e | 1882 | |
mbed_official | 610:813dcc80987e | 1883 | /* Clear injected group conversion flag */ |
mbed_official | 610:813dcc80987e | 1884 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC | ADC_FLAG_JEOS); |
mbed_official | 610:813dcc80987e | 1885 | } |
mbed_official | 610:813dcc80987e | 1886 | |
mbed_official | 610:813dcc80987e | 1887 | |
mbed_official | 610:813dcc80987e | 1888 | /* ========== Check Analog watchdog flags =================================================== */ |
mbed_official | 610:813dcc80987e | 1889 | |
mbed_official | 610:813dcc80987e | 1890 | /* ========== Check Analog watchdog 1 flags ========== */ |
mbed_official | 610:813dcc80987e | 1891 | if (((tmp_isr & ADC_FLAG_AWD1) == ADC_FLAG_AWD1) && ((tmp_ier & ADC_IT_AWD1) == ADC_IT_AWD1)) |
mbed_official | 610:813dcc80987e | 1892 | { |
mbed_official | 610:813dcc80987e | 1893 | /* Change ADC state */ |
mbed_official | 610:813dcc80987e | 1894 | SET_BIT(hadc->State, HAL_ADC_STATE_AWD1); |
mbed_official | 610:813dcc80987e | 1895 | |
mbed_official | 610:813dcc80987e | 1896 | /* Level out of window 1 callback */ |
mbed_official | 610:813dcc80987e | 1897 | HAL_ADC_LevelOutOfWindowCallback(hadc); |
mbed_official | 610:813dcc80987e | 1898 | /* Clear ADC Analog watchdog flag */ |
mbed_official | 610:813dcc80987e | 1899 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD1); |
mbed_official | 610:813dcc80987e | 1900 | } |
mbed_official | 610:813dcc80987e | 1901 | |
mbed_official | 610:813dcc80987e | 1902 | /* ========== Check Analog watchdog 2 flags ========== */ |
mbed_official | 610:813dcc80987e | 1903 | if (((tmp_isr & ADC_FLAG_AWD2) == ADC_FLAG_AWD2) && ((tmp_ier & ADC_IT_AWD2) == ADC_IT_AWD2)) |
mbed_official | 610:813dcc80987e | 1904 | { |
mbed_official | 610:813dcc80987e | 1905 | /* Change ADC state */ |
mbed_official | 610:813dcc80987e | 1906 | SET_BIT(hadc->State, HAL_ADC_STATE_AWD2); |
mbed_official | 610:813dcc80987e | 1907 | |
mbed_official | 610:813dcc80987e | 1908 | /* Level out of window 2 callback */ |
mbed_official | 610:813dcc80987e | 1909 | HAL_ADCEx_LevelOutOfWindow2Callback(hadc); |
mbed_official | 610:813dcc80987e | 1910 | /* Clear ADC Analog watchdog flag */ |
mbed_official | 610:813dcc80987e | 1911 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD2); |
mbed_official | 610:813dcc80987e | 1912 | } |
mbed_official | 610:813dcc80987e | 1913 | |
mbed_official | 610:813dcc80987e | 1914 | /* ========== Check Analog watchdog 3 flags ========== */ |
mbed_official | 610:813dcc80987e | 1915 | if (((tmp_isr & ADC_FLAG_AWD3) == ADC_FLAG_AWD3) && ((tmp_ier & ADC_IT_AWD3) == ADC_IT_AWD3)) |
mbed_official | 610:813dcc80987e | 1916 | { |
mbed_official | 610:813dcc80987e | 1917 | /* Change ADC state */ |
mbed_official | 610:813dcc80987e | 1918 | SET_BIT(hadc->State, HAL_ADC_STATE_AWD3); |
mbed_official | 610:813dcc80987e | 1919 | |
mbed_official | 610:813dcc80987e | 1920 | /* Level out of window 3 callback */ |
mbed_official | 610:813dcc80987e | 1921 | HAL_ADCEx_LevelOutOfWindow3Callback(hadc); |
mbed_official | 610:813dcc80987e | 1922 | /* Clear ADC Analog watchdog flag */ |
mbed_official | 610:813dcc80987e | 1923 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD3); |
mbed_official | 610:813dcc80987e | 1924 | } |
mbed_official | 610:813dcc80987e | 1925 | |
mbed_official | 610:813dcc80987e | 1926 | |
mbed_official | 610:813dcc80987e | 1927 | /* ========== Check Overrun flag ========== */ |
mbed_official | 610:813dcc80987e | 1928 | if (((tmp_isr & ADC_FLAG_OVR) == ADC_FLAG_OVR) && ((tmp_ier & ADC_IT_OVR) == ADC_IT_OVR)) |
mbed_official | 610:813dcc80987e | 1929 | { |
mbed_official | 610:813dcc80987e | 1930 | /* If overrun is set to overwrite previous data (default setting), */ |
mbed_official | 610:813dcc80987e | 1931 | /* overrun event is not considered as an error. */ |
mbed_official | 610:813dcc80987e | 1932 | /* (cf ref manual "Managing conversions without using the DMA and without */ |
mbed_official | 610:813dcc80987e | 1933 | /* overrun ") */ |
mbed_official | 610:813dcc80987e | 1934 | /* Exception for usage with DMA overrun event always considered as an */ |
mbed_official | 610:813dcc80987e | 1935 | /* error. */ |
mbed_official | 610:813dcc80987e | 1936 | |
mbed_official | 610:813dcc80987e | 1937 | if (hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED) |
mbed_official | 610:813dcc80987e | 1938 | { |
mbed_official | 610:813dcc80987e | 1939 | overrun_error = 1; |
mbed_official | 610:813dcc80987e | 1940 | } |
mbed_official | 610:813dcc80987e | 1941 | else |
mbed_official | 610:813dcc80987e | 1942 | { |
mbed_official | 610:813dcc80987e | 1943 | /* check DMA configuration, depending on multimode set or not, |
mbed_official | 610:813dcc80987e | 1944 | or whether or not multimode feature is available */ |
mbed_official | 610:813dcc80987e | 1945 | if (ADC_IS_DUAL_CONVERSION_ENABLE(hadc) == RESET) |
mbed_official | 610:813dcc80987e | 1946 | { |
mbed_official | 610:813dcc80987e | 1947 | /* Multimode not set or ADC independent */ |
mbed_official | 610:813dcc80987e | 1948 | if (HAL_IS_BIT_SET(hadc->Instance->CFGR, ADC_CFGR_DMAEN)) |
mbed_official | 610:813dcc80987e | 1949 | { |
mbed_official | 610:813dcc80987e | 1950 | overrun_error = 1; |
mbed_official | 610:813dcc80987e | 1951 | } |
mbed_official | 610:813dcc80987e | 1952 | } |
mbed_official | 610:813dcc80987e | 1953 | else |
mbed_official | 610:813dcc80987e | 1954 | { |
mbed_official | 610:813dcc80987e | 1955 | /* Multimode (when feature is available) is enabled, |
mbed_official | 610:813dcc80987e | 1956 | Common Control Register MDMA bits must be checked. */ |
mbed_official | 610:813dcc80987e | 1957 | if (ADC_MULTIMODE_DMA_ENABLED()) |
mbed_official | 610:813dcc80987e | 1958 | { |
mbed_official | 610:813dcc80987e | 1959 | overrun_error = 1; |
mbed_official | 610:813dcc80987e | 1960 | } |
mbed_official | 610:813dcc80987e | 1961 | } |
mbed_official | 610:813dcc80987e | 1962 | } |
mbed_official | 610:813dcc80987e | 1963 | |
mbed_official | 610:813dcc80987e | 1964 | if (overrun_error == 1) |
mbed_official | 610:813dcc80987e | 1965 | { |
mbed_official | 610:813dcc80987e | 1966 | /* Change ADC state to error state */ |
mbed_official | 610:813dcc80987e | 1967 | SET_BIT(hadc->State, HAL_ADC_STATE_REG_OVR); |
mbed_official | 610:813dcc80987e | 1968 | |
mbed_official | 610:813dcc80987e | 1969 | /* Set ADC error code to overrun */ |
mbed_official | 610:813dcc80987e | 1970 | SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR); |
mbed_official | 610:813dcc80987e | 1971 | |
mbed_official | 610:813dcc80987e | 1972 | /* Error callback */ |
mbed_official | 610:813dcc80987e | 1973 | HAL_ADC_ErrorCallback(hadc); |
mbed_official | 610:813dcc80987e | 1974 | } |
mbed_official | 610:813dcc80987e | 1975 | |
mbed_official | 610:813dcc80987e | 1976 | /* Clear the Overrun flag, to be done AFTER HAL_ADC_ErrorCallback() since |
mbed_official | 610:813dcc80987e | 1977 | old data is preserved until OVR is reset */ |
mbed_official | 610:813dcc80987e | 1978 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); |
mbed_official | 610:813dcc80987e | 1979 | |
mbed_official | 610:813dcc80987e | 1980 | } |
mbed_official | 610:813dcc80987e | 1981 | |
mbed_official | 610:813dcc80987e | 1982 | |
mbed_official | 610:813dcc80987e | 1983 | /* ========== Check Injected context queue overflow flag ========== */ |
mbed_official | 610:813dcc80987e | 1984 | if (((tmp_isr & ADC_FLAG_JQOVF) == ADC_FLAG_JQOVF) && ((tmp_ier & ADC_IT_JQOVF) == ADC_IT_JQOVF)) |
mbed_official | 610:813dcc80987e | 1985 | { |
mbed_official | 610:813dcc80987e | 1986 | /* Change ADC state to overrun state */ |
mbed_official | 610:813dcc80987e | 1987 | SET_BIT(hadc->State, HAL_ADC_STATE_INJ_JQOVF); |
mbed_official | 610:813dcc80987e | 1988 | |
mbed_official | 610:813dcc80987e | 1989 | /* Set ADC error code to Injected context queue overflow */ |
mbed_official | 610:813dcc80987e | 1990 | SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_JQOVF); |
mbed_official | 610:813dcc80987e | 1991 | |
mbed_official | 610:813dcc80987e | 1992 | /* Clear the Injected context queue overflow flag */ |
mbed_official | 610:813dcc80987e | 1993 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JQOVF); |
mbed_official | 610:813dcc80987e | 1994 | |
mbed_official | 610:813dcc80987e | 1995 | /* Error callback */ |
mbed_official | 610:813dcc80987e | 1996 | HAL_ADCEx_InjectedQueueOverflowCallback(hadc); |
mbed_official | 610:813dcc80987e | 1997 | } |
mbed_official | 610:813dcc80987e | 1998 | |
mbed_official | 610:813dcc80987e | 1999 | } |
mbed_official | 610:813dcc80987e | 2000 | |
mbed_official | 610:813dcc80987e | 2001 | /** |
mbed_official | 610:813dcc80987e | 2002 | * @brief Conversion complete callback in non-blocking mode. |
mbed_official | 610:813dcc80987e | 2003 | * @param hadc: ADC handle |
mbed_official | 610:813dcc80987e | 2004 | * @retval None |
mbed_official | 610:813dcc80987e | 2005 | */ |
mbed_official | 610:813dcc80987e | 2006 | __weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) |
mbed_official | 610:813dcc80987e | 2007 | { |
mbed_official | 610:813dcc80987e | 2008 | /* NOTE : This function should not be modified. When the callback is needed, |
mbed_official | 610:813dcc80987e | 2009 | function HAL_ADC_ConvCpltCallback must be implemented in the user file. |
mbed_official | 610:813dcc80987e | 2010 | */ |
mbed_official | 610:813dcc80987e | 2011 | } |
mbed_official | 610:813dcc80987e | 2012 | |
mbed_official | 610:813dcc80987e | 2013 | /** |
mbed_official | 610:813dcc80987e | 2014 | * @brief Conversion DMA half-transfer callback in non-blocking mode. |
mbed_official | 610:813dcc80987e | 2015 | * @param hadc: ADC handle |
mbed_official | 610:813dcc80987e | 2016 | * @retval None |
mbed_official | 610:813dcc80987e | 2017 | */ |
mbed_official | 610:813dcc80987e | 2018 | __weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc) |
mbed_official | 610:813dcc80987e | 2019 | { |
mbed_official | 610:813dcc80987e | 2020 | /* NOTE : This function should not be modified. When the callback is needed, |
mbed_official | 610:813dcc80987e | 2021 | function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file. |
mbed_official | 610:813dcc80987e | 2022 | */ |
mbed_official | 610:813dcc80987e | 2023 | } |
mbed_official | 610:813dcc80987e | 2024 | |
mbed_official | 610:813dcc80987e | 2025 | /** |
mbed_official | 610:813dcc80987e | 2026 | * @brief Analog watchdog 1 callback in non-blocking mode. |
mbed_official | 610:813dcc80987e | 2027 | * @param hadc: ADC handle |
mbed_official | 610:813dcc80987e | 2028 | * @retval None |
mbed_official | 610:813dcc80987e | 2029 | */ |
mbed_official | 610:813dcc80987e | 2030 | __weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc) |
mbed_official | 610:813dcc80987e | 2031 | { |
mbed_official | 610:813dcc80987e | 2032 | /* NOTE : This function should not be modified. When the callback is needed, |
mbed_official | 610:813dcc80987e | 2033 | function HAL_ADC_LevelOutOfWindowCallback must be implemented in the user file. |
mbed_official | 610:813dcc80987e | 2034 | */ |
mbed_official | 610:813dcc80987e | 2035 | } |
mbed_official | 610:813dcc80987e | 2036 | |
mbed_official | 610:813dcc80987e | 2037 | /** |
mbed_official | 610:813dcc80987e | 2038 | * @brief ADC error callback in non-blocking mode |
mbed_official | 610:813dcc80987e | 2039 | * (ADC conversion with interruption or transfer by DMA). |
mbed_official | 610:813dcc80987e | 2040 | * @param hadc: ADC handle |
mbed_official | 610:813dcc80987e | 2041 | * @retval None |
mbed_official | 610:813dcc80987e | 2042 | */ |
mbed_official | 610:813dcc80987e | 2043 | __weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc) |
mbed_official | 610:813dcc80987e | 2044 | { |
mbed_official | 610:813dcc80987e | 2045 | /* NOTE : This function should not be modified. When the callback is needed, |
mbed_official | 610:813dcc80987e | 2046 | function HAL_ADC_ErrorCallback must be implemented in the user file. |
mbed_official | 610:813dcc80987e | 2047 | */ |
mbed_official | 610:813dcc80987e | 2048 | } |
mbed_official | 610:813dcc80987e | 2049 | |
mbed_official | 610:813dcc80987e | 2050 | /** |
mbed_official | 610:813dcc80987e | 2051 | * @} |
mbed_official | 610:813dcc80987e | 2052 | */ |
mbed_official | 610:813dcc80987e | 2053 | |
mbed_official | 610:813dcc80987e | 2054 | /** @defgroup ADC_Exported_Functions_Group3 Peripheral Control functions |
mbed_official | 610:813dcc80987e | 2055 | * @brief Peripheral Control functions |
mbed_official | 610:813dcc80987e | 2056 | * |
mbed_official | 610:813dcc80987e | 2057 | @verbatim |
mbed_official | 610:813dcc80987e | 2058 | =============================================================================== |
mbed_official | 610:813dcc80987e | 2059 | ##### Peripheral Control functions ##### |
mbed_official | 610:813dcc80987e | 2060 | =============================================================================== |
mbed_official | 610:813dcc80987e | 2061 | [..] This section provides functions allowing to: |
mbed_official | 610:813dcc80987e | 2062 | (+) Configure channels on regular group |
mbed_official | 610:813dcc80987e | 2063 | (+) Configure the analog watchdog |
mbed_official | 610:813dcc80987e | 2064 | |
mbed_official | 610:813dcc80987e | 2065 | @endverbatim |
mbed_official | 610:813dcc80987e | 2066 | * @{ |
mbed_official | 610:813dcc80987e | 2067 | */ |
mbed_official | 610:813dcc80987e | 2068 | |
mbed_official | 610:813dcc80987e | 2069 | |
mbed_official | 610:813dcc80987e | 2070 | /** |
mbed_official | 610:813dcc80987e | 2071 | * @brief Configure the selected channel to be linked to the regular group. |
mbed_official | 610:813dcc80987e | 2072 | * @note In case of usage of internal measurement channels (Vbat / VrefInt / |
mbed_official | 610:813dcc80987e | 2073 | * TempSensor), the recommended sampling time is provided by the |
mbed_official | 610:813dcc80987e | 2074 | * datasheet. |
mbed_official | 610:813dcc80987e | 2075 | * These internal paths can be disabled using function |
mbed_official | 610:813dcc80987e | 2076 | * HAL_ADC_DeInit(). |
mbed_official | 610:813dcc80987e | 2077 | * @note Possibility to update parameters on the fly: |
mbed_official | 610:813dcc80987e | 2078 | * HAL_ADC_ConfigChannel() initializes channel into regular group, |
mbed_official | 610:813dcc80987e | 2079 | * consecutive calls to this function can be used to reconfigure some |
mbed_official | 610:813dcc80987e | 2080 | * parameters of structure "ADC_ChannelConfTypeDef" on the fly, without |
mbed_official | 610:813dcc80987e | 2081 | * resetting the ADC. |
mbed_official | 610:813dcc80987e | 2082 | * The setting of these parameters is conditioned to ADC state. |
mbed_official | 610:813dcc80987e | 2083 | * For parameters constraints, see comments of structure |
mbed_official | 610:813dcc80987e | 2084 | * "ADC_ChannelConfTypeDef". |
mbed_official | 610:813dcc80987e | 2085 | * @param hadc: ADC handle |
mbed_official | 610:813dcc80987e | 2086 | * @param sConfig: Structure ADC channel for regular group. |
mbed_official | 610:813dcc80987e | 2087 | * @retval HAL status |
mbed_official | 610:813dcc80987e | 2088 | */ |
mbed_official | 610:813dcc80987e | 2089 | HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) |
mbed_official | 610:813dcc80987e | 2090 | { |
mbed_official | 610:813dcc80987e | 2091 | HAL_StatusTypeDef tmp_status = HAL_OK; |
mbed_official | 610:813dcc80987e | 2092 | |
mbed_official | 610:813dcc80987e | 2093 | ADC_Common_TypeDef *tmpADC_Common; |
mbed_official | 610:813dcc80987e | 2094 | uint32_t tmpOffsetShifted; |
mbed_official | 610:813dcc80987e | 2095 | uint32_t WaitLoopIndex = 0; |
mbed_official | 610:813dcc80987e | 2096 | |
mbed_official | 610:813dcc80987e | 2097 | /* Check the parameters */ |
mbed_official | 610:813dcc80987e | 2098 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 610:813dcc80987e | 2099 | assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank)); |
mbed_official | 610:813dcc80987e | 2100 | assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime)); |
mbed_official | 610:813dcc80987e | 2101 | assert_param(IS_ADC_SINGLE_DIFFERENTIAL(sConfig->SingleDiff)); |
mbed_official | 610:813dcc80987e | 2102 | assert_param(IS_ADC_OFFSET_NUMBER(sConfig->OffsetNumber)); |
mbed_official | 610:813dcc80987e | 2103 | assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), sConfig->Offset)); |
mbed_official | 610:813dcc80987e | 2104 | |
mbed_official | 610:813dcc80987e | 2105 | /* if ROVSE is set, the value of the OFFSETy_EN bit in ADCx_OFRy register is |
mbed_official | 610:813dcc80987e | 2106 | ignored (considered as reset) */ |
mbed_official | 610:813dcc80987e | 2107 | assert_param(!((sConfig->OffsetNumber != ADC_OFFSET_NONE) && (hadc->Init.OversamplingMode == ENABLE))); |
mbed_official | 610:813dcc80987e | 2108 | |
mbed_official | 610:813dcc80987e | 2109 | /* Verification of channel number. |
mbed_official | 610:813dcc80987e | 2110 | For ADC1 and ADC2, channels 1 to 15 are available in differential mode, |
mbed_official | 610:813dcc80987e | 2111 | channels 16 to 18 can be only used in single-ended mode. |
mbed_official | 610:813dcc80987e | 2112 | For ADC3, channels 1 to 11 are available in differential mode, |
mbed_official | 610:813dcc80987e | 2113 | channels 12 to 18 can only be used in single-ended mode. */ |
mbed_official | 610:813dcc80987e | 2114 | if (sConfig->SingleDiff != ADC_DIFFERENTIAL_ENDED) |
mbed_official | 610:813dcc80987e | 2115 | { |
mbed_official | 610:813dcc80987e | 2116 | assert_param(IS_ADC_CHANNEL(sConfig->Channel)); |
mbed_official | 610:813dcc80987e | 2117 | } |
mbed_official | 610:813dcc80987e | 2118 | else |
mbed_official | 610:813dcc80987e | 2119 | { |
mbed_official | 610:813dcc80987e | 2120 | if (hadc->Instance == ADC3) |
mbed_official | 610:813dcc80987e | 2121 | { |
mbed_official | 610:813dcc80987e | 2122 | assert_param(IS_ADC3_DIFF_CHANNEL(sConfig->Channel)); |
mbed_official | 610:813dcc80987e | 2123 | } |
mbed_official | 610:813dcc80987e | 2124 | else |
mbed_official | 610:813dcc80987e | 2125 | { |
mbed_official | 610:813dcc80987e | 2126 | assert_param(IS_ADC12_DIFF_CHANNEL(sConfig->Channel)); |
mbed_official | 610:813dcc80987e | 2127 | } |
mbed_official | 610:813dcc80987e | 2128 | } |
mbed_official | 610:813dcc80987e | 2129 | |
mbed_official | 610:813dcc80987e | 2130 | /* Process locked */ |
mbed_official | 610:813dcc80987e | 2131 | __HAL_LOCK(hadc); |
mbed_official | 610:813dcc80987e | 2132 | |
mbed_official | 610:813dcc80987e | 2133 | |
mbed_official | 610:813dcc80987e | 2134 | /* Parameters update conditioned to ADC state: */ |
mbed_official | 610:813dcc80987e | 2135 | /* Parameters that can be updated when ADC is disabled or enabled without */ |
mbed_official | 610:813dcc80987e | 2136 | /* conversion on going on regular group: */ |
mbed_official | 610:813dcc80987e | 2137 | /* - Channel number */ |
mbed_official | 610:813dcc80987e | 2138 | /* - Channel rank */ |
mbed_official | 610:813dcc80987e | 2139 | if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) |
mbed_official | 610:813dcc80987e | 2140 | { |
mbed_official | 610:813dcc80987e | 2141 | |
mbed_official | 610:813dcc80987e | 2142 | /* Regular sequence configuration */ |
mbed_official | 610:813dcc80987e | 2143 | /* Clear the old SQx bits then set the new ones for the selected rank */ |
mbed_official | 610:813dcc80987e | 2144 | /* For Rank 1 to 4 */ |
mbed_official | 610:813dcc80987e | 2145 | if (sConfig->Rank < 5) |
mbed_official | 610:813dcc80987e | 2146 | { |
mbed_official | 610:813dcc80987e | 2147 | MODIFY_REG(hadc->Instance->SQR1, |
mbed_official | 610:813dcc80987e | 2148 | ADC_SQR1_RK(ADC_SQR2_SQ5, sConfig->Rank), |
mbed_official | 610:813dcc80987e | 2149 | ADC_SQR1_RK(sConfig->Channel, sConfig->Rank)); |
mbed_official | 610:813dcc80987e | 2150 | } |
mbed_official | 610:813dcc80987e | 2151 | /* For Rank 5 to 9 */ |
mbed_official | 610:813dcc80987e | 2152 | else if (sConfig->Rank < 10) |
mbed_official | 610:813dcc80987e | 2153 | { |
mbed_official | 610:813dcc80987e | 2154 | MODIFY_REG(hadc->Instance->SQR2, |
mbed_official | 610:813dcc80987e | 2155 | ADC_SQR2_RK(ADC_SQR2_SQ5, sConfig->Rank), |
mbed_official | 610:813dcc80987e | 2156 | ADC_SQR2_RK(sConfig->Channel, sConfig->Rank)); |
mbed_official | 610:813dcc80987e | 2157 | } |
mbed_official | 610:813dcc80987e | 2158 | /* For Rank 10 to 14 */ |
mbed_official | 610:813dcc80987e | 2159 | else if (sConfig->Rank < 15) |
mbed_official | 610:813dcc80987e | 2160 | { |
mbed_official | 610:813dcc80987e | 2161 | MODIFY_REG(hadc->Instance->SQR3, |
mbed_official | 610:813dcc80987e | 2162 | ADC_SQR3_RK(ADC_SQR3_SQ10, sConfig->Rank), |
mbed_official | 610:813dcc80987e | 2163 | ADC_SQR3_RK(sConfig->Channel, sConfig->Rank)); |
mbed_official | 610:813dcc80987e | 2164 | } |
mbed_official | 610:813dcc80987e | 2165 | /* For Rank 15 to 16 */ |
mbed_official | 610:813dcc80987e | 2166 | else |
mbed_official | 610:813dcc80987e | 2167 | { |
mbed_official | 610:813dcc80987e | 2168 | MODIFY_REG(hadc->Instance->SQR4, |
mbed_official | 610:813dcc80987e | 2169 | ADC_SQR4_RK(ADC_SQR4_SQ15, sConfig->Rank), |
mbed_official | 610:813dcc80987e | 2170 | ADC_SQR4_RK(sConfig->Channel, sConfig->Rank)); |
mbed_official | 610:813dcc80987e | 2171 | } |
mbed_official | 610:813dcc80987e | 2172 | |
mbed_official | 610:813dcc80987e | 2173 | |
mbed_official | 610:813dcc80987e | 2174 | /* Parameters update conditioned to ADC state: */ |
mbed_official | 610:813dcc80987e | 2175 | /* Parameters that can be updated when ADC is disabled or enabled without */ |
mbed_official | 610:813dcc80987e | 2176 | /* conversion on going on regular group: */ |
mbed_official | 610:813dcc80987e | 2177 | /* - Channel sampling time */ |
mbed_official | 610:813dcc80987e | 2178 | /* - Channel offset */ |
mbed_official | 610:813dcc80987e | 2179 | if (ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET) |
mbed_official | 610:813dcc80987e | 2180 | { |
mbed_official | 610:813dcc80987e | 2181 | |
mbed_official | 610:813dcc80987e | 2182 | /* Channel sampling time configuration */ |
mbed_official | 610:813dcc80987e | 2183 | /* Clear the old sample time then set the new one for the selected channel */ |
mbed_official | 610:813dcc80987e | 2184 | /* For channels 10 to 18 */ |
mbed_official | 610:813dcc80987e | 2185 | if (sConfig->Channel >= ADC_CHANNEL_10) |
mbed_official | 610:813dcc80987e | 2186 | { |
mbed_official | 610:813dcc80987e | 2187 | MODIFY_REG(hadc->Instance->SMPR2, |
mbed_official | 610:813dcc80987e | 2188 | ADC_SMPR2(ADC_SMPR2_SMP10, sConfig->Channel), |
mbed_official | 610:813dcc80987e | 2189 | ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel)); |
mbed_official | 610:813dcc80987e | 2190 | } |
mbed_official | 610:813dcc80987e | 2191 | else /* For channels 0 to 9 */ |
mbed_official | 610:813dcc80987e | 2192 | { |
mbed_official | 610:813dcc80987e | 2193 | MODIFY_REG(hadc->Instance->SMPR1, |
mbed_official | 610:813dcc80987e | 2194 | ADC_SMPR1(ADC_SMPR1_SMP0, sConfig->Channel), |
mbed_official | 610:813dcc80987e | 2195 | ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel)); |
mbed_official | 610:813dcc80987e | 2196 | } |
mbed_official | 610:813dcc80987e | 2197 | |
mbed_official | 610:813dcc80987e | 2198 | |
mbed_official | 610:813dcc80987e | 2199 | /* Configure the offset: offset enable/disable, channel, offset value */ |
mbed_official | 610:813dcc80987e | 2200 | |
mbed_official | 610:813dcc80987e | 2201 | /* Shift the offset with respect to the selected ADC resolution. */ |
mbed_official | 610:813dcc80987e | 2202 | /* Offset has to be left-aligned on bit 11, the LSB (right bits) are set to 0 */ |
mbed_official | 610:813dcc80987e | 2203 | tmpOffsetShifted = ADC_OFFSET_SHIFT_RESOLUTION(hadc, sConfig->Offset); |
mbed_official | 610:813dcc80987e | 2204 | |
mbed_official | 610:813dcc80987e | 2205 | switch (sConfig->OffsetNumber) |
mbed_official | 610:813dcc80987e | 2206 | { |
mbed_official | 610:813dcc80987e | 2207 | /* Configure offset register i when applicable: */ |
mbed_official | 610:813dcc80987e | 2208 | /* - Enable offset */ |
mbed_official | 610:813dcc80987e | 2209 | /* - Set channel number */ |
mbed_official | 610:813dcc80987e | 2210 | /* - Set offset value */ |
mbed_official | 610:813dcc80987e | 2211 | case ADC_OFFSET_1: |
mbed_official | 610:813dcc80987e | 2212 | MODIFY_REG(hadc->Instance->OFR1, |
mbed_official | 610:813dcc80987e | 2213 | ADC_OFR_FIELDS, |
mbed_official | 610:813dcc80987e | 2214 | ADC_OFR1_OFFSET1_EN | ADC_OFR_CHANNEL(sConfig->Channel) | tmpOffsetShifted); |
mbed_official | 610:813dcc80987e | 2215 | break; |
mbed_official | 610:813dcc80987e | 2216 | |
mbed_official | 610:813dcc80987e | 2217 | case ADC_OFFSET_2: |
mbed_official | 610:813dcc80987e | 2218 | MODIFY_REG(hadc->Instance->OFR2, |
mbed_official | 610:813dcc80987e | 2219 | ADC_OFR_FIELDS, |
mbed_official | 610:813dcc80987e | 2220 | ADC_OFR2_OFFSET2_EN | ADC_OFR_CHANNEL(sConfig->Channel) | tmpOffsetShifted); |
mbed_official | 610:813dcc80987e | 2221 | break; |
mbed_official | 610:813dcc80987e | 2222 | |
mbed_official | 610:813dcc80987e | 2223 | case ADC_OFFSET_3: |
mbed_official | 610:813dcc80987e | 2224 | MODIFY_REG(hadc->Instance->OFR3, |
mbed_official | 610:813dcc80987e | 2225 | ADC_OFR_FIELDS, |
mbed_official | 610:813dcc80987e | 2226 | ADC_OFR3_OFFSET3_EN | ADC_OFR_CHANNEL(sConfig->Channel) | tmpOffsetShifted); |
mbed_official | 610:813dcc80987e | 2227 | break; |
mbed_official | 610:813dcc80987e | 2228 | |
mbed_official | 610:813dcc80987e | 2229 | case ADC_OFFSET_4: |
mbed_official | 610:813dcc80987e | 2230 | MODIFY_REG(hadc->Instance->OFR4, |
mbed_official | 610:813dcc80987e | 2231 | ADC_OFR_FIELDS, |
mbed_official | 610:813dcc80987e | 2232 | ADC_OFR4_OFFSET4_EN | ADC_OFR_CHANNEL(sConfig->Channel) | tmpOffsetShifted); |
mbed_official | 610:813dcc80987e | 2233 | break; |
mbed_official | 610:813dcc80987e | 2234 | |
mbed_official | 610:813dcc80987e | 2235 | /* Case ADC_OFFSET_NONE */ |
mbed_official | 610:813dcc80987e | 2236 | default : |
mbed_official | 610:813dcc80987e | 2237 | /* Scan OFR1, OFR2, OFR3, OFR4 to check if the selected channel is enabled. |
mbed_official | 610:813dcc80987e | 2238 | If this is the case, offset OFRx is disabled since |
mbed_official | 610:813dcc80987e | 2239 | sConfig->OffsetNumber = ADC_OFFSET_NONE. */ |
mbed_official | 610:813dcc80987e | 2240 | if (((hadc->Instance->OFR1) & ADC_OFR1_OFFSET1_CH) == ADC_OFR_CHANNEL(sConfig->Channel)) |
mbed_official | 610:813dcc80987e | 2241 | { |
mbed_official | 610:813dcc80987e | 2242 | CLEAR_BIT(hadc->Instance->OFR1, ADC_OFR1_OFFSET1_EN); |
mbed_official | 610:813dcc80987e | 2243 | } |
mbed_official | 610:813dcc80987e | 2244 | if (((hadc->Instance->OFR2) & ADC_OFR2_OFFSET2_CH) == ADC_OFR_CHANNEL(sConfig->Channel)) |
mbed_official | 610:813dcc80987e | 2245 | { |
mbed_official | 610:813dcc80987e | 2246 | CLEAR_BIT(hadc->Instance->OFR2, ADC_OFR2_OFFSET2_EN); |
mbed_official | 610:813dcc80987e | 2247 | } |
mbed_official | 610:813dcc80987e | 2248 | if (((hadc->Instance->OFR3) & ADC_OFR3_OFFSET3_CH) == ADC_OFR_CHANNEL(sConfig->Channel)) |
mbed_official | 610:813dcc80987e | 2249 | { |
mbed_official | 610:813dcc80987e | 2250 | CLEAR_BIT(hadc->Instance->OFR3, ADC_OFR3_OFFSET3_EN); |
mbed_official | 610:813dcc80987e | 2251 | } |
mbed_official | 610:813dcc80987e | 2252 | if (((hadc->Instance->OFR4) & ADC_OFR4_OFFSET4_CH) == ADC_OFR_CHANNEL(sConfig->Channel)) |
mbed_official | 610:813dcc80987e | 2253 | { |
mbed_official | 610:813dcc80987e | 2254 | CLEAR_BIT(hadc->Instance->OFR4, ADC_OFR4_OFFSET4_EN); |
mbed_official | 610:813dcc80987e | 2255 | } |
mbed_official | 610:813dcc80987e | 2256 | break; |
mbed_official | 610:813dcc80987e | 2257 | } /* switch (sConfig->OffsetNumber) */ |
mbed_official | 610:813dcc80987e | 2258 | |
mbed_official | 610:813dcc80987e | 2259 | } /* if (ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET) */ |
mbed_official | 610:813dcc80987e | 2260 | |
mbed_official | 610:813dcc80987e | 2261 | |
mbed_official | 610:813dcc80987e | 2262 | |
mbed_official | 610:813dcc80987e | 2263 | /* Parameters update conditioned to ADC state: */ |
mbed_official | 610:813dcc80987e | 2264 | /* Parameters that can be updated only when ADC is disabled: */ |
mbed_official | 610:813dcc80987e | 2265 | /* - Single or differential mode */ |
mbed_official | 610:813dcc80987e | 2266 | /* - Internal measurement channels: Vbat/VrefInt/TempSensor */ |
mbed_official | 610:813dcc80987e | 2267 | if (ADC_IS_ENABLE(hadc) == RESET) |
mbed_official | 610:813dcc80987e | 2268 | { |
mbed_official | 610:813dcc80987e | 2269 | /* Configuration of differential mode */ |
mbed_official | 610:813dcc80987e | 2270 | if (sConfig->SingleDiff != ADC_DIFFERENTIAL_ENDED) |
mbed_official | 610:813dcc80987e | 2271 | { |
mbed_official | 610:813dcc80987e | 2272 | /* Disable differential mode (default mode: single-ended) */ |
mbed_official | 610:813dcc80987e | 2273 | CLEAR_BIT(hadc->Instance->DIFSEL, ADC_DIFSEL_CHANNEL(sConfig->Channel)); |
mbed_official | 610:813dcc80987e | 2274 | } |
mbed_official | 610:813dcc80987e | 2275 | else |
mbed_official | 610:813dcc80987e | 2276 | { |
mbed_official | 610:813dcc80987e | 2277 | /* Enable differential mode */ |
mbed_official | 610:813dcc80987e | 2278 | SET_BIT(hadc->Instance->DIFSEL, ADC_DIFSEL_CHANNEL(sConfig->Channel)); |
mbed_official | 610:813dcc80987e | 2279 | |
mbed_official | 610:813dcc80987e | 2280 | /* Sampling time configuration of channel ADC_IN+1 (negative input) */ |
mbed_official | 610:813dcc80987e | 2281 | /* Clear the old sample time then set the new one for the selected */ |
mbed_official | 610:813dcc80987e | 2282 | /* channel. */ |
mbed_official | 610:813dcc80987e | 2283 | /* For channels 9 to 15 (ADC1, ADC2) or to 11 (ADC3), SMPR2 register |
mbed_official | 610:813dcc80987e | 2284 | must be configured */ |
mbed_official | 610:813dcc80987e | 2285 | if (sConfig->Channel >= ADC_CHANNEL_9) |
mbed_official | 610:813dcc80987e | 2286 | { |
mbed_official | 610:813dcc80987e | 2287 | MODIFY_REG(hadc->Instance->SMPR2, |
mbed_official | 610:813dcc80987e | 2288 | ADC_SMPR2(ADC_SMPR2_SMP10, sConfig->Channel +1), |
mbed_official | 610:813dcc80987e | 2289 | ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel +1)); |
mbed_official | 610:813dcc80987e | 2290 | } |
mbed_official | 610:813dcc80987e | 2291 | else /* For channels 0 to 8, SMPR1 must be configured */ |
mbed_official | 610:813dcc80987e | 2292 | { |
mbed_official | 610:813dcc80987e | 2293 | MODIFY_REG(hadc->Instance->SMPR1, |
mbed_official | 610:813dcc80987e | 2294 | ADC_SMPR1(ADC_SMPR1_SMP0, sConfig->Channel +1), |
mbed_official | 610:813dcc80987e | 2295 | ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel +1)); |
mbed_official | 610:813dcc80987e | 2296 | } |
mbed_official | 610:813dcc80987e | 2297 | } |
mbed_official | 610:813dcc80987e | 2298 | |
mbed_official | 610:813dcc80987e | 2299 | |
mbed_official | 610:813dcc80987e | 2300 | |
mbed_official | 610:813dcc80987e | 2301 | /* Management of internal measurement channels: Vbat/VrefInt/TempSensor. */ |
mbed_official | 610:813dcc80987e | 2302 | /* If internal channel selected, enable dedicated internal buffers and */ |
mbed_official | 610:813dcc80987e | 2303 | /* paths. */ |
mbed_official | 610:813dcc80987e | 2304 | /* Note: these internal measurement paths can be disabled using */ |
mbed_official | 610:813dcc80987e | 2305 | /* HAL_ADC_DeInit(). */ |
mbed_official | 610:813dcc80987e | 2306 | |
mbed_official | 610:813dcc80987e | 2307 | /* Configuration of common ADC parameters */ |
mbed_official | 610:813dcc80987e | 2308 | tmpADC_Common = ADC_COMMON_REGISTER(hadc); |
mbed_official | 610:813dcc80987e | 2309 | |
mbed_official | 610:813dcc80987e | 2310 | |
mbed_official | 610:813dcc80987e | 2311 | /* If the requested internal measurement path has already been enabled, */ |
mbed_official | 610:813dcc80987e | 2312 | /* bypass the configuration processing. */ |
mbed_official | 610:813dcc80987e | 2313 | if (( (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) && |
mbed_official | 610:813dcc80987e | 2314 | (HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_TSEN)) ) || |
mbed_official | 610:813dcc80987e | 2315 | ( (sConfig->Channel == ADC_CHANNEL_VBAT) && |
mbed_official | 610:813dcc80987e | 2316 | (HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_VBATEN)) ) || |
mbed_official | 610:813dcc80987e | 2317 | ( (sConfig->Channel == ADC_CHANNEL_VREFINT) && |
mbed_official | 610:813dcc80987e | 2318 | (HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_VREFEN))) |
mbed_official | 610:813dcc80987e | 2319 | ) |
mbed_official | 610:813dcc80987e | 2320 | { |
mbed_official | 610:813dcc80987e | 2321 | /* Configuration of common ADC parameters (continuation) */ |
mbed_official | 610:813dcc80987e | 2322 | |
mbed_official | 610:813dcc80987e | 2323 | /* Software is allowed to change common parameters only when all ADCs */ |
mbed_official | 610:813dcc80987e | 2324 | /* of the common group are disabled. */ |
mbed_official | 610:813dcc80987e | 2325 | if ((ADC_IS_ENABLE(hadc) == RESET) && |
mbed_official | 610:813dcc80987e | 2326 | (ADC_ANY_OTHER_ENABLED(hadc) == RESET) ) |
mbed_official | 610:813dcc80987e | 2327 | { |
mbed_official | 610:813dcc80987e | 2328 | /* Enable Temperature sensor measurement path (channel 17) */ |
mbed_official | 610:813dcc80987e | 2329 | /* Note: Temp. sensor internal channels available on ADC1 and ADC3 */ |
mbed_official | 610:813dcc80987e | 2330 | if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) && |
mbed_official | 610:813dcc80987e | 2331 | ((hadc->Instance == ADC1) || (hadc->Instance == ADC3))) |
mbed_official | 610:813dcc80987e | 2332 | { |
mbed_official | 610:813dcc80987e | 2333 | SET_BIT(tmpADC_Common->CCR, ADC_CCR_TSEN); |
mbed_official | 610:813dcc80987e | 2334 | |
mbed_official | 610:813dcc80987e | 2335 | /* Delay for temperature sensor stabilization time */ |
mbed_official | 610:813dcc80987e | 2336 | while(WaitLoopIndex < ADC_TEMPSENSOR_DELAY_CPU_CYCLES) |
mbed_official | 610:813dcc80987e | 2337 | { |
mbed_official | 610:813dcc80987e | 2338 | WaitLoopIndex++; |
mbed_official | 610:813dcc80987e | 2339 | } |
mbed_official | 610:813dcc80987e | 2340 | } |
mbed_official | 610:813dcc80987e | 2341 | /* If Channel 18 is selected, enable VBAT measurement path. */ |
mbed_official | 610:813dcc80987e | 2342 | /* Note: VBAT internal channels available on ADC1 and ADC3 */ |
mbed_official | 610:813dcc80987e | 2343 | else if ((sConfig->Channel == ADC_CHANNEL_VBAT) && |
mbed_official | 610:813dcc80987e | 2344 | ((hadc->Instance == ADC1) || (hadc->Instance == ADC3))) |
mbed_official | 610:813dcc80987e | 2345 | { |
mbed_official | 610:813dcc80987e | 2346 | SET_BIT(tmpADC_Common->CCR, ADC_CCR_VBATEN); |
mbed_official | 610:813dcc80987e | 2347 | } |
mbed_official | 610:813dcc80987e | 2348 | /* If Channel 0 is selected, enable VREFINT measurement path */ |
mbed_official | 610:813dcc80987e | 2349 | /* Note: VBAT internal channels available on ADC1 only */ |
mbed_official | 610:813dcc80987e | 2350 | else if ((sConfig->Channel == ADC_CHANNEL_VREFINT) && (hadc->Instance == ADC1)) |
mbed_official | 610:813dcc80987e | 2351 | { |
mbed_official | 610:813dcc80987e | 2352 | SET_BIT(tmpADC_Common->CCR, ADC_CCR_VREFEN); |
mbed_official | 610:813dcc80987e | 2353 | } |
mbed_official | 610:813dcc80987e | 2354 | } |
mbed_official | 610:813dcc80987e | 2355 | /* If the requested internal measurement path has already been */ |
mbed_official | 610:813dcc80987e | 2356 | /* enabled and other ADC of the common group are enabled, internal */ |
mbed_official | 610:813dcc80987e | 2357 | /* measurement paths cannot be enabled. */ |
mbed_official | 610:813dcc80987e | 2358 | else |
mbed_official | 610:813dcc80987e | 2359 | { |
mbed_official | 610:813dcc80987e | 2360 | /* Update ADC state machine to error */ |
mbed_official | 610:813dcc80987e | 2361 | SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); |
mbed_official | 610:813dcc80987e | 2362 | |
mbed_official | 610:813dcc80987e | 2363 | tmp_status = HAL_ERROR; |
mbed_official | 610:813dcc80987e | 2364 | } |
mbed_official | 610:813dcc80987e | 2365 | } |
mbed_official | 610:813dcc80987e | 2366 | |
mbed_official | 610:813dcc80987e | 2367 | } /* if (ADC_IS_ENABLE(hadc) == RESET) */ |
mbed_official | 610:813dcc80987e | 2368 | |
mbed_official | 610:813dcc80987e | 2369 | } /* if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) */ |
mbed_official | 610:813dcc80987e | 2370 | |
mbed_official | 610:813dcc80987e | 2371 | /* If a conversion is on going on regular group, no update on regular */ |
mbed_official | 610:813dcc80987e | 2372 | /* channel could be done on neither of the channel configuration structure */ |
mbed_official | 610:813dcc80987e | 2373 | /* parameters. */ |
mbed_official | 610:813dcc80987e | 2374 | else |
mbed_official | 610:813dcc80987e | 2375 | { |
mbed_official | 610:813dcc80987e | 2376 | /* Update ADC state machine to error */ |
mbed_official | 610:813dcc80987e | 2377 | SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); |
mbed_official | 610:813dcc80987e | 2378 | |
mbed_official | 610:813dcc80987e | 2379 | tmp_status = HAL_ERROR; |
mbed_official | 610:813dcc80987e | 2380 | } |
mbed_official | 610:813dcc80987e | 2381 | |
mbed_official | 610:813dcc80987e | 2382 | /* Process unlocked */ |
mbed_official | 610:813dcc80987e | 2383 | __HAL_UNLOCK(hadc); |
mbed_official | 610:813dcc80987e | 2384 | |
mbed_official | 610:813dcc80987e | 2385 | /* Return function status */ |
mbed_official | 610:813dcc80987e | 2386 | return tmp_status; |
mbed_official | 610:813dcc80987e | 2387 | } |
mbed_official | 610:813dcc80987e | 2388 | |
mbed_official | 610:813dcc80987e | 2389 | |
mbed_official | 610:813dcc80987e | 2390 | /** |
mbed_official | 610:813dcc80987e | 2391 | * @brief Configure the analog watchdog. |
mbed_official | 610:813dcc80987e | 2392 | * @note Possibility to update parameters on the fly: |
mbed_official | 610:813dcc80987e | 2393 | * This function initializes the selected analog watchdog, successive |
mbed_official | 610:813dcc80987e | 2394 | * calls to this function can be used to reconfigure some parameters |
mbed_official | 610:813dcc80987e | 2395 | * of structure "ADC_AnalogWDGConfTypeDef" on the fly, without resetting |
mbed_official | 610:813dcc80987e | 2396 | * the ADC, e.g. to set several channels to monitor simultaneously. |
mbed_official | 610:813dcc80987e | 2397 | * The setting of these parameters is conditioned to ADC state. |
mbed_official | 610:813dcc80987e | 2398 | * For parameters constraints, see comments of structure |
mbed_official | 610:813dcc80987e | 2399 | * "ADC_AnalogWDGConfTypeDef". |
mbed_official | 610:813dcc80987e | 2400 | * @param hadc: ADC handle |
mbed_official | 610:813dcc80987e | 2401 | * @param AnalogWDGConfig: Structure of ADC analog watchdog configuration |
mbed_official | 610:813dcc80987e | 2402 | * @retval HAL status |
mbed_official | 610:813dcc80987e | 2403 | */ |
mbed_official | 610:813dcc80987e | 2404 | HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig) |
mbed_official | 610:813dcc80987e | 2405 | { |
mbed_official | 610:813dcc80987e | 2406 | HAL_StatusTypeDef tmp_status = HAL_OK; |
mbed_official | 610:813dcc80987e | 2407 | |
mbed_official | 610:813dcc80987e | 2408 | |
mbed_official | 610:813dcc80987e | 2409 | uint32_t tmpAWDHighThresholdShifted; |
mbed_official | 610:813dcc80987e | 2410 | uint32_t tmpAWDLowThresholdShifted; |
mbed_official | 610:813dcc80987e | 2411 | |
mbed_official | 610:813dcc80987e | 2412 | uint32_t tmpADCFlagAWD2orAWD3; |
mbed_official | 610:813dcc80987e | 2413 | uint32_t tmpADCITAWD2orAWD3; |
mbed_official | 610:813dcc80987e | 2414 | |
mbed_official | 610:813dcc80987e | 2415 | /* Check the parameters */ |
mbed_official | 610:813dcc80987e | 2416 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 610:813dcc80987e | 2417 | assert_param(IS_ADC_ANALOG_WATCHDOG_NUMBER(AnalogWDGConfig->WatchdogNumber)); |
mbed_official | 610:813dcc80987e | 2418 | assert_param(IS_ADC_ANALOG_WATCHDOG_MODE(AnalogWDGConfig->WatchdogMode)); |
mbed_official | 610:813dcc80987e | 2419 | assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode)); |
mbed_official | 610:813dcc80987e | 2420 | |
mbed_official | 610:813dcc80987e | 2421 | if((AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_REG) || |
mbed_official | 610:813dcc80987e | 2422 | (AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_INJEC) || |
mbed_official | 610:813dcc80987e | 2423 | (AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_REGINJEC) ) |
mbed_official | 610:813dcc80987e | 2424 | { |
mbed_official | 610:813dcc80987e | 2425 | assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel)); |
mbed_official | 610:813dcc80987e | 2426 | } |
mbed_official | 610:813dcc80987e | 2427 | |
mbed_official | 610:813dcc80987e | 2428 | |
mbed_official | 610:813dcc80987e | 2429 | /* Verify if threshold is within the selected ADC resolution */ |
mbed_official | 610:813dcc80987e | 2430 | assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->HighThreshold)); |
mbed_official | 610:813dcc80987e | 2431 | assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->LowThreshold)); |
mbed_official | 610:813dcc80987e | 2432 | |
mbed_official | 610:813dcc80987e | 2433 | /* Process locked */ |
mbed_official | 610:813dcc80987e | 2434 | __HAL_LOCK(hadc); |
mbed_official | 610:813dcc80987e | 2435 | |
mbed_official | 610:813dcc80987e | 2436 | /* Parameters update conditioned to ADC state: */ |
mbed_official | 610:813dcc80987e | 2437 | /* Parameters that can be updated when ADC is disabled or enabled without */ |
mbed_official | 610:813dcc80987e | 2438 | /* conversion on going on regular and injected groups: */ |
mbed_official | 610:813dcc80987e | 2439 | /* - Analog watchdog channels */ |
mbed_official | 610:813dcc80987e | 2440 | /* - Analog watchdog thresholds */ |
mbed_official | 610:813dcc80987e | 2441 | if (ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET) |
mbed_official | 610:813dcc80987e | 2442 | { |
mbed_official | 610:813dcc80987e | 2443 | |
mbed_official | 610:813dcc80987e | 2444 | /* Analog watchdogs configuration */ |
mbed_official | 610:813dcc80987e | 2445 | if(AnalogWDGConfig->WatchdogNumber == ADC_ANALOGWATCHDOG_1) |
mbed_official | 610:813dcc80987e | 2446 | { |
mbed_official | 610:813dcc80987e | 2447 | /* Configuration of analog watchdog: */ |
mbed_official | 610:813dcc80987e | 2448 | /* - Set the analog watchdog enable mode: regular and/or injected */ |
mbed_official | 610:813dcc80987e | 2449 | /* groups, one or overall group of channels. */ |
mbed_official | 610:813dcc80987e | 2450 | /* - Set the Analog watchdog channel (is not used if watchdog */ |
mbed_official | 610:813dcc80987e | 2451 | /* mode "all channels": ADC_CFGR_AWD1SGL=0). */ |
mbed_official | 610:813dcc80987e | 2452 | |
mbed_official | 610:813dcc80987e | 2453 | MODIFY_REG(hadc->Instance->CFGR, ADC_CFGR_WD_FIELDS, |
mbed_official | 610:813dcc80987e | 2454 | AnalogWDGConfig->WatchdogMode | ADC_CFGR_SET_AWD1CH(AnalogWDGConfig->Channel) ); |
mbed_official | 610:813dcc80987e | 2455 | |
mbed_official | 610:813dcc80987e | 2456 | /* Shift the offset with respect to the selected ADC resolution: */ |
mbed_official | 610:813dcc80987e | 2457 | /* Thresholds have to be left-aligned on bit 11, the LSB (right bits) */ |
mbed_official | 610:813dcc80987e | 2458 | /* are set to 0 */ |
mbed_official | 610:813dcc80987e | 2459 | tmpAWDHighThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->HighThreshold); |
mbed_official | 610:813dcc80987e | 2460 | tmpAWDLowThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThreshold); |
mbed_official | 610:813dcc80987e | 2461 | |
mbed_official | 610:813dcc80987e | 2462 | /* Set the high and low thresholds */ |
mbed_official | 610:813dcc80987e | 2463 | MODIFY_REG(hadc->Instance->TR1, ADC_TR1_HT1 | ADC_TR1_LT1, |
mbed_official | 610:813dcc80987e | 2464 | ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted) | tmpAWDLowThresholdShifted ); |
mbed_official | 610:813dcc80987e | 2465 | |
mbed_official | 610:813dcc80987e | 2466 | /* Clear the ADC Analog watchdog flag (in case left enabled by */ |
mbed_official | 610:813dcc80987e | 2467 | /* previous ADC operations) to be ready to use for HAL_ADC_IRQHandler() */ |
mbed_official | 610:813dcc80987e | 2468 | /* or HAL_ADC_PollForEvent(). */ |
mbed_official | 610:813dcc80987e | 2469 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_IT_AWD1); |
mbed_official | 610:813dcc80987e | 2470 | |
mbed_official | 610:813dcc80987e | 2471 | /* Configure ADC Analog watchdog interrupt */ |
mbed_official | 610:813dcc80987e | 2472 | if(AnalogWDGConfig->ITMode == ENABLE) |
mbed_official | 610:813dcc80987e | 2473 | { |
mbed_official | 610:813dcc80987e | 2474 | /* Enable the ADC Analog watchdog interrupt */ |
mbed_official | 610:813dcc80987e | 2475 | __HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD1); |
mbed_official | 610:813dcc80987e | 2476 | } |
mbed_official | 610:813dcc80987e | 2477 | else |
mbed_official | 610:813dcc80987e | 2478 | { |
mbed_official | 610:813dcc80987e | 2479 | /* Disable the ADC Analog watchdog interrupt */ |
mbed_official | 610:813dcc80987e | 2480 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD1); |
mbed_official | 610:813dcc80987e | 2481 | } |
mbed_official | 610:813dcc80987e | 2482 | |
mbed_official | 610:813dcc80987e | 2483 | /* Update state, clear previous result related to AWD1 */ |
mbed_official | 610:813dcc80987e | 2484 | CLEAR_BIT(hadc->State, HAL_ADC_STATE_AWD1); |
mbed_official | 610:813dcc80987e | 2485 | } |
mbed_official | 610:813dcc80987e | 2486 | /* Case of ADC_ANALOGWATCHDOG_2 and ADC_ANALOGWATCHDOG_3 */ |
mbed_official | 610:813dcc80987e | 2487 | else |
mbed_official | 610:813dcc80987e | 2488 | { |
mbed_official | 610:813dcc80987e | 2489 | /* Shift the threshold with respect to the selected ADC resolution */ |
mbed_official | 610:813dcc80987e | 2490 | /* have to be left-aligned on bit 7, the LSB (right bits) are set to 0 */ |
mbed_official | 610:813dcc80987e | 2491 | tmpAWDHighThresholdShifted = ADC_AWD23THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->HighThreshold); |
mbed_official | 610:813dcc80987e | 2492 | tmpAWDLowThresholdShifted = ADC_AWD23THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThreshold); |
mbed_official | 610:813dcc80987e | 2493 | |
mbed_official | 610:813dcc80987e | 2494 | if (AnalogWDGConfig->WatchdogNumber == ADC_ANALOGWATCHDOG_2) |
mbed_official | 610:813dcc80987e | 2495 | { |
mbed_official | 610:813dcc80987e | 2496 | /* Set the Analog watchdog channel or group of channels. This also */ |
mbed_official | 610:813dcc80987e | 2497 | /* enables the watchdog. */ |
mbed_official | 610:813dcc80987e | 2498 | /* Note: Conditional register reset, because several channels can be */ |
mbed_official | 610:813dcc80987e | 2499 | /* set by successive calls of this function. */ |
mbed_official | 610:813dcc80987e | 2500 | if (AnalogWDGConfig->WatchdogMode != ADC_ANALOGWATCHDOG_NONE) |
mbed_official | 610:813dcc80987e | 2501 | { |
mbed_official | 610:813dcc80987e | 2502 | SET_BIT(hadc->Instance->AWD2CR, ADC_CFGR_SET_AWD23CR(AnalogWDGConfig->Channel)); |
mbed_official | 610:813dcc80987e | 2503 | } |
mbed_official | 610:813dcc80987e | 2504 | else |
mbed_official | 610:813dcc80987e | 2505 | { |
mbed_official | 610:813dcc80987e | 2506 | CLEAR_BIT(hadc->Instance->AWD2CR, ADC_AWD2CR_AWD2CH); |
mbed_official | 610:813dcc80987e | 2507 | } |
mbed_official | 610:813dcc80987e | 2508 | |
mbed_official | 610:813dcc80987e | 2509 | /* Set the high and low thresholds */ |
mbed_official | 610:813dcc80987e | 2510 | MODIFY_REG(hadc->Instance->TR2, ADC_TR2_HT2 | ADC_TR2_LT2, |
mbed_official | 610:813dcc80987e | 2511 | ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted) | tmpAWDLowThresholdShifted ); |
mbed_official | 610:813dcc80987e | 2512 | |
mbed_official | 610:813dcc80987e | 2513 | /* Set temporary variable to flag and IT of AWD2 or AWD3 for further */ |
mbed_official | 610:813dcc80987e | 2514 | /* settings. */ |
mbed_official | 610:813dcc80987e | 2515 | tmpADCFlagAWD2orAWD3 = ADC_FLAG_AWD2; |
mbed_official | 610:813dcc80987e | 2516 | tmpADCITAWD2orAWD3 = ADC_IT_AWD2; |
mbed_official | 610:813dcc80987e | 2517 | |
mbed_official | 610:813dcc80987e | 2518 | /* Update state, clear previous result related to AWD2 */ |
mbed_official | 610:813dcc80987e | 2519 | CLEAR_BIT(hadc->State, HAL_ADC_STATE_AWD2); |
mbed_official | 610:813dcc80987e | 2520 | } |
mbed_official | 610:813dcc80987e | 2521 | /* (AnalogWDGConfig->WatchdogNumber == ADC_ANALOGWATCHDOG_3) */ |
mbed_official | 610:813dcc80987e | 2522 | else |
mbed_official | 610:813dcc80987e | 2523 | { |
mbed_official | 610:813dcc80987e | 2524 | /* Set the Analog watchdog channel or group of channels. This also */ |
mbed_official | 610:813dcc80987e | 2525 | /* enables the watchdog. */ |
mbed_official | 610:813dcc80987e | 2526 | /* Note: Conditional register reset, because several channels can be */ |
mbed_official | 610:813dcc80987e | 2527 | /* set by successive calls of this function. */ |
mbed_official | 610:813dcc80987e | 2528 | if (AnalogWDGConfig->WatchdogMode != ADC_ANALOGWATCHDOG_NONE) |
mbed_official | 610:813dcc80987e | 2529 | { |
mbed_official | 610:813dcc80987e | 2530 | SET_BIT(hadc->Instance->AWD3CR, ADC_CFGR_SET_AWD23CR(AnalogWDGConfig->Channel)); |
mbed_official | 610:813dcc80987e | 2531 | } |
mbed_official | 610:813dcc80987e | 2532 | else |
mbed_official | 610:813dcc80987e | 2533 | { |
mbed_official | 610:813dcc80987e | 2534 | CLEAR_BIT(hadc->Instance->AWD3CR, ADC_AWD3CR_AWD3CH); |
mbed_official | 610:813dcc80987e | 2535 | } |
mbed_official | 610:813dcc80987e | 2536 | |
mbed_official | 610:813dcc80987e | 2537 | /* Set the high and low thresholds */ |
mbed_official | 610:813dcc80987e | 2538 | MODIFY_REG(hadc->Instance->TR3, ADC_TR3_HT3 | ADC_TR3_LT3, |
mbed_official | 610:813dcc80987e | 2539 | ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted) | tmpAWDLowThresholdShifted ); |
mbed_official | 610:813dcc80987e | 2540 | |
mbed_official | 610:813dcc80987e | 2541 | /* Set temporary variable to flag and IT of AWD2 or AWD3 for further */ |
mbed_official | 610:813dcc80987e | 2542 | /* settings. */ |
mbed_official | 610:813dcc80987e | 2543 | tmpADCFlagAWD2orAWD3 = ADC_FLAG_AWD3; |
mbed_official | 610:813dcc80987e | 2544 | tmpADCITAWD2orAWD3 = ADC_IT_AWD3; |
mbed_official | 610:813dcc80987e | 2545 | |
mbed_official | 610:813dcc80987e | 2546 | /* Update state, clear previous result related to AWD3 */ |
mbed_official | 610:813dcc80987e | 2547 | CLEAR_BIT(hadc->State, HAL_ADC_STATE_AWD3); |
mbed_official | 610:813dcc80987e | 2548 | } |
mbed_official | 610:813dcc80987e | 2549 | |
mbed_official | 610:813dcc80987e | 2550 | /* Clear the ADC Analog watchdog flag (in case left enabled by */ |
mbed_official | 610:813dcc80987e | 2551 | /* previous ADC operations) to be ready to use for HAL_ADC_IRQHandler() */ |
mbed_official | 610:813dcc80987e | 2552 | /* or HAL_ADC_PollForEvent(). */ |
mbed_official | 610:813dcc80987e | 2553 | __HAL_ADC_CLEAR_FLAG(hadc, tmpADCFlagAWD2orAWD3); |
mbed_official | 610:813dcc80987e | 2554 | |
mbed_official | 610:813dcc80987e | 2555 | /* Configure ADC Analog watchdog interrupt */ |
mbed_official | 610:813dcc80987e | 2556 | if(AnalogWDGConfig->ITMode == ENABLE) |
mbed_official | 610:813dcc80987e | 2557 | { |
mbed_official | 610:813dcc80987e | 2558 | __HAL_ADC_ENABLE_IT(hadc, tmpADCITAWD2orAWD3); |
mbed_official | 610:813dcc80987e | 2559 | } |
mbed_official | 610:813dcc80987e | 2560 | else |
mbed_official | 610:813dcc80987e | 2561 | { |
mbed_official | 610:813dcc80987e | 2562 | __HAL_ADC_DISABLE_IT(hadc, tmpADCITAWD2orAWD3); |
mbed_official | 610:813dcc80987e | 2563 | } |
mbed_official | 610:813dcc80987e | 2564 | } |
mbed_official | 610:813dcc80987e | 2565 | |
mbed_official | 610:813dcc80987e | 2566 | } |
mbed_official | 610:813dcc80987e | 2567 | /* If a conversion is on going on regular or injected groups, no update */ |
mbed_official | 610:813dcc80987e | 2568 | /* could be done on neither of the AWD configuration structure parameters. */ |
mbed_official | 610:813dcc80987e | 2569 | else |
mbed_official | 610:813dcc80987e | 2570 | { |
mbed_official | 610:813dcc80987e | 2571 | /* Update ADC state machine to error */ |
mbed_official | 610:813dcc80987e | 2572 | SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); |
mbed_official | 610:813dcc80987e | 2573 | |
mbed_official | 610:813dcc80987e | 2574 | tmp_status = HAL_ERROR; |
mbed_official | 610:813dcc80987e | 2575 | } |
mbed_official | 610:813dcc80987e | 2576 | |
mbed_official | 610:813dcc80987e | 2577 | |
mbed_official | 610:813dcc80987e | 2578 | /* Process unlocked */ |
mbed_official | 610:813dcc80987e | 2579 | __HAL_UNLOCK(hadc); |
mbed_official | 610:813dcc80987e | 2580 | |
mbed_official | 610:813dcc80987e | 2581 | |
mbed_official | 610:813dcc80987e | 2582 | /* Return function status */ |
mbed_official | 610:813dcc80987e | 2583 | return tmp_status; |
mbed_official | 610:813dcc80987e | 2584 | } |
mbed_official | 610:813dcc80987e | 2585 | |
mbed_official | 610:813dcc80987e | 2586 | |
mbed_official | 610:813dcc80987e | 2587 | /** |
mbed_official | 610:813dcc80987e | 2588 | * @} |
mbed_official | 610:813dcc80987e | 2589 | */ |
mbed_official | 610:813dcc80987e | 2590 | |
mbed_official | 610:813dcc80987e | 2591 | /** @defgroup ADC_Exported_Functions_Group4 Peripheral State functions |
mbed_official | 610:813dcc80987e | 2592 | * @brief ADC Peripheral State functions |
mbed_official | 610:813dcc80987e | 2593 | * |
mbed_official | 610:813dcc80987e | 2594 | @verbatim |
mbed_official | 610:813dcc80987e | 2595 | =============================================================================== |
mbed_official | 610:813dcc80987e | 2596 | ##### Peripheral state and errors functions ##### |
mbed_official | 610:813dcc80987e | 2597 | =============================================================================== |
mbed_official | 610:813dcc80987e | 2598 | [..] |
mbed_official | 610:813dcc80987e | 2599 | This subsection provides functions to get in run-time the status of the |
mbed_official | 610:813dcc80987e | 2600 | peripheral. |
mbed_official | 610:813dcc80987e | 2601 | (+) Check the ADC state |
mbed_official | 610:813dcc80987e | 2602 | (+) Check the ADC error code |
mbed_official | 610:813dcc80987e | 2603 | |
mbed_official | 610:813dcc80987e | 2604 | @endverbatim |
mbed_official | 610:813dcc80987e | 2605 | * @{ |
mbed_official | 610:813dcc80987e | 2606 | */ |
mbed_official | 610:813dcc80987e | 2607 | |
mbed_official | 610:813dcc80987e | 2608 | /** |
mbed_official | 610:813dcc80987e | 2609 | * @brief Return the ADC handle state. |
mbed_official | 610:813dcc80987e | 2610 | * @param hadc: ADC handle |
mbed_official | 610:813dcc80987e | 2611 | * @retval HAL state (uint32_t bit-map) |
mbed_official | 610:813dcc80987e | 2612 | */ |
mbed_official | 610:813dcc80987e | 2613 | uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc) |
mbed_official | 610:813dcc80987e | 2614 | { |
mbed_official | 610:813dcc80987e | 2615 | /* Check the parameters */ |
mbed_official | 610:813dcc80987e | 2616 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 610:813dcc80987e | 2617 | |
mbed_official | 610:813dcc80987e | 2618 | /* Return ADC handle state */ |
mbed_official | 610:813dcc80987e | 2619 | return hadc->State; |
mbed_official | 610:813dcc80987e | 2620 | } |
mbed_official | 610:813dcc80987e | 2621 | |
mbed_official | 610:813dcc80987e | 2622 | |
mbed_official | 610:813dcc80987e | 2623 | /** |
mbed_official | 610:813dcc80987e | 2624 | * @brief Return the ADC error code. |
mbed_official | 610:813dcc80987e | 2625 | * @param hadc: ADC handle |
mbed_official | 610:813dcc80987e | 2626 | * @retval ADC Error Code (uint32_t bit-map) |
mbed_official | 610:813dcc80987e | 2627 | */ |
mbed_official | 610:813dcc80987e | 2628 | uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc) |
mbed_official | 610:813dcc80987e | 2629 | { |
mbed_official | 610:813dcc80987e | 2630 | /* Check the parameters */ |
mbed_official | 610:813dcc80987e | 2631 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 610:813dcc80987e | 2632 | |
mbed_official | 610:813dcc80987e | 2633 | return hadc->ErrorCode; |
mbed_official | 610:813dcc80987e | 2634 | } |
mbed_official | 610:813dcc80987e | 2635 | |
mbed_official | 610:813dcc80987e | 2636 | /** |
mbed_official | 610:813dcc80987e | 2637 | * @} |
mbed_official | 610:813dcc80987e | 2638 | */ |
mbed_official | 610:813dcc80987e | 2639 | |
mbed_official | 610:813dcc80987e | 2640 | /** |
mbed_official | 610:813dcc80987e | 2641 | * @} |
mbed_official | 610:813dcc80987e | 2642 | */ |
mbed_official | 610:813dcc80987e | 2643 | |
mbed_official | 610:813dcc80987e | 2644 | |
mbed_official | 610:813dcc80987e | 2645 | |
mbed_official | 610:813dcc80987e | 2646 | /** @defgroup ADC_Private_Functions ADC Private Functions |
mbed_official | 610:813dcc80987e | 2647 | * @{ |
mbed_official | 610:813dcc80987e | 2648 | */ |
mbed_official | 610:813dcc80987e | 2649 | |
mbed_official | 610:813dcc80987e | 2650 | /** |
mbed_official | 610:813dcc80987e | 2651 | * @brief Stop ADC conversion. |
mbed_official | 610:813dcc80987e | 2652 | * @param hadc: ADC handle |
mbed_official | 610:813dcc80987e | 2653 | * @param ConversionGroup: ADC group regular and/or injected. |
mbed_official | 610:813dcc80987e | 2654 | * This parameter can be one of the following values: |
mbed_official | 610:813dcc80987e | 2655 | * @arg ADC_REGULAR_GROUP: ADC regular conversion type. |
mbed_official | 610:813dcc80987e | 2656 | * @arg ADC_INJECTED_GROUP: ADC injected conversion type. |
mbed_official | 610:813dcc80987e | 2657 | * @arg ADC_REGULAR_INJECTED_GROUP: ADC regular and injected conversion type. |
mbed_official | 610:813dcc80987e | 2658 | * @retval HAL status. |
mbed_official | 610:813dcc80987e | 2659 | */ |
mbed_official | 610:813dcc80987e | 2660 | HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc, uint32_t ConversionGroup) |
mbed_official | 610:813dcc80987e | 2661 | { |
mbed_official | 610:813dcc80987e | 2662 | uint32_t tmp_ADC_CR_ADSTART_JADSTART = 0; |
mbed_official | 610:813dcc80987e | 2663 | uint32_t tickstart = 0; |
mbed_official | 610:813dcc80987e | 2664 | uint32_t Conversion_Timeout_CPU_cycles = 0; |
mbed_official | 610:813dcc80987e | 2665 | |
mbed_official | 610:813dcc80987e | 2666 | /* Check the parameters */ |
mbed_official | 610:813dcc80987e | 2667 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
mbed_official | 610:813dcc80987e | 2668 | assert_param(IS_ADC_CONVERSION_GROUP(ConversionGroup)); |
mbed_official | 610:813dcc80987e | 2669 | |
mbed_official | 610:813dcc80987e | 2670 | /* Verification if ADC is not already stopped (on regular and injected */ |
mbed_official | 610:813dcc80987e | 2671 | /* groups) to bypass this function if not needed. */ |
mbed_official | 610:813dcc80987e | 2672 | if (ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc)) |
mbed_official | 610:813dcc80987e | 2673 | { |
mbed_official | 610:813dcc80987e | 2674 | /* Particular case of continuous auto-injection mode combined with */ |
mbed_official | 610:813dcc80987e | 2675 | /* auto-delay mode. */ |
mbed_official | 610:813dcc80987e | 2676 | /* In auto-injection mode, regular group stop ADC_CR_ADSTP is used (not */ |
mbed_official | 610:813dcc80987e | 2677 | /* injected group stop ADC_CR_JADSTP). */ |
mbed_official | 610:813dcc80987e | 2678 | /* Procedure to be followed: Wait until JEOS=1, clear JEOS, set ADSTP=1 */ |
mbed_official | 610:813dcc80987e | 2679 | /* (see reference manual). */ |
mbed_official | 610:813dcc80987e | 2680 | if ((HAL_IS_BIT_SET(hadc->Instance->CFGR, ADC_CFGR_JAUTO)) |
mbed_official | 610:813dcc80987e | 2681 | && (hadc->Init.ContinuousConvMode==ENABLE) |
mbed_official | 610:813dcc80987e | 2682 | && (hadc->Init.LowPowerAutoWait==ENABLE)) |
mbed_official | 610:813dcc80987e | 2683 | { |
mbed_official | 610:813dcc80987e | 2684 | /* Use stop of regular group */ |
mbed_official | 610:813dcc80987e | 2685 | ConversionGroup = ADC_REGULAR_GROUP; |
mbed_official | 610:813dcc80987e | 2686 | |
mbed_official | 610:813dcc80987e | 2687 | /* Wait until JEOS=1 (maximum Timeout: 4 injected conversions) */ |
mbed_official | 610:813dcc80987e | 2688 | while(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOS) == RESET) |
mbed_official | 610:813dcc80987e | 2689 | { |
mbed_official | 610:813dcc80987e | 2690 | if (Conversion_Timeout_CPU_cycles >= (ADC_CONVERSION_TIME_MAX_CPU_CYCLES *4)) |
mbed_official | 610:813dcc80987e | 2691 | { |
mbed_official | 610:813dcc80987e | 2692 | /* Update ADC state machine to error */ |
mbed_official | 610:813dcc80987e | 2693 | SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); |
mbed_official | 610:813dcc80987e | 2694 | |
mbed_official | 610:813dcc80987e | 2695 | /* Set ADC error code to ADC IP internal error */ |
mbed_official | 610:813dcc80987e | 2696 | SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); |
mbed_official | 610:813dcc80987e | 2697 | |
mbed_official | 610:813dcc80987e | 2698 | return HAL_ERROR; |
mbed_official | 610:813dcc80987e | 2699 | } |
mbed_official | 610:813dcc80987e | 2700 | Conversion_Timeout_CPU_cycles ++; |
mbed_official | 610:813dcc80987e | 2701 | } |
mbed_official | 610:813dcc80987e | 2702 | |
mbed_official | 610:813dcc80987e | 2703 | /* Clear JEOS */ |
mbed_official | 610:813dcc80987e | 2704 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOS); |
mbed_official | 610:813dcc80987e | 2705 | } |
mbed_official | 610:813dcc80987e | 2706 | |
mbed_official | 610:813dcc80987e | 2707 | /* Stop potential conversion on going on regular group */ |
mbed_official | 610:813dcc80987e | 2708 | if (ConversionGroup != ADC_INJECTED_GROUP) |
mbed_official | 610:813dcc80987e | 2709 | { |
mbed_official | 610:813dcc80987e | 2710 | /* Software is allowed to set ADSTP only when ADSTART=1 and ADDIS=0 */ |
mbed_official | 610:813dcc80987e | 2711 | if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADSTART) && |
mbed_official | 610:813dcc80987e | 2712 | HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADDIS) ) |
mbed_official | 610:813dcc80987e | 2713 | { |
mbed_official | 610:813dcc80987e | 2714 | /* Stop conversions on regular group */ |
mbed_official | 610:813dcc80987e | 2715 | SET_BIT(hadc->Instance->CR, ADC_CR_ADSTP); |
mbed_official | 610:813dcc80987e | 2716 | } |
mbed_official | 610:813dcc80987e | 2717 | } |
mbed_official | 610:813dcc80987e | 2718 | |
mbed_official | 610:813dcc80987e | 2719 | /* Stop potential conversion on going on injected group */ |
mbed_official | 610:813dcc80987e | 2720 | if (ConversionGroup != ADC_REGULAR_GROUP) |
mbed_official | 610:813dcc80987e | 2721 | { |
mbed_official | 610:813dcc80987e | 2722 | /* Software is allowed to set JADSTP only when JADSTART=1 and ADDIS=0 */ |
mbed_official | 610:813dcc80987e | 2723 | if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_JADSTART) && |
mbed_official | 610:813dcc80987e | 2724 | HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADDIS) ) |
mbed_official | 610:813dcc80987e | 2725 | { |
mbed_official | 610:813dcc80987e | 2726 | /* Stop conversions on injected group */ |
mbed_official | 610:813dcc80987e | 2727 | SET_BIT(hadc->Instance->CR, ADC_CR_JADSTP); |
mbed_official | 610:813dcc80987e | 2728 | } |
mbed_official | 610:813dcc80987e | 2729 | } |
mbed_official | 610:813dcc80987e | 2730 | |
mbed_official | 610:813dcc80987e | 2731 | /* Selection of start and stop bits with respect to the regular or injected group */ |
mbed_official | 610:813dcc80987e | 2732 | switch(ConversionGroup) |
mbed_official | 610:813dcc80987e | 2733 | { |
mbed_official | 610:813dcc80987e | 2734 | case ADC_REGULAR_INJECTED_GROUP: |
mbed_official | 610:813dcc80987e | 2735 | tmp_ADC_CR_ADSTART_JADSTART = (ADC_CR_ADSTART | ADC_CR_JADSTART); |
mbed_official | 610:813dcc80987e | 2736 | break; |
mbed_official | 610:813dcc80987e | 2737 | case ADC_INJECTED_GROUP: |
mbed_official | 610:813dcc80987e | 2738 | tmp_ADC_CR_ADSTART_JADSTART = ADC_CR_JADSTART; |
mbed_official | 610:813dcc80987e | 2739 | break; |
mbed_official | 610:813dcc80987e | 2740 | /* Case ADC_REGULAR_GROUP only*/ |
mbed_official | 610:813dcc80987e | 2741 | default: |
mbed_official | 610:813dcc80987e | 2742 | tmp_ADC_CR_ADSTART_JADSTART = ADC_CR_ADSTART; |
mbed_official | 610:813dcc80987e | 2743 | break; |
mbed_official | 610:813dcc80987e | 2744 | } |
mbed_official | 610:813dcc80987e | 2745 | |
mbed_official | 610:813dcc80987e | 2746 | /* Wait for conversion effectively stopped */ |
mbed_official | 610:813dcc80987e | 2747 | |
mbed_official | 610:813dcc80987e | 2748 | |
mbed_official | 610:813dcc80987e | 2749 | tickstart = HAL_GetTick(); |
mbed_official | 610:813dcc80987e | 2750 | |
mbed_official | 610:813dcc80987e | 2751 | while((hadc->Instance->CR & tmp_ADC_CR_ADSTART_JADSTART) != RESET) |
mbed_official | 610:813dcc80987e | 2752 | { |
mbed_official | 610:813dcc80987e | 2753 | if((HAL_GetTick()-tickstart) > ADC_STOP_CONVERSION_TIMEOUT) |
mbed_official | 610:813dcc80987e | 2754 | { |
mbed_official | 610:813dcc80987e | 2755 | /* Update ADC state machine to error */ |
mbed_official | 610:813dcc80987e | 2756 | SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); |
mbed_official | 610:813dcc80987e | 2757 | |
mbed_official | 610:813dcc80987e | 2758 | /* Set ADC error code to ADC IP internal error */ |
mbed_official | 610:813dcc80987e | 2759 | SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); |
mbed_official | 610:813dcc80987e | 2760 | |
mbed_official | 610:813dcc80987e | 2761 | return HAL_ERROR; |
mbed_official | 610:813dcc80987e | 2762 | } |
mbed_official | 610:813dcc80987e | 2763 | } |
mbed_official | 610:813dcc80987e | 2764 | |
mbed_official | 610:813dcc80987e | 2765 | } /* if (ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc)) */ |
mbed_official | 610:813dcc80987e | 2766 | |
mbed_official | 610:813dcc80987e | 2767 | /* Return HAL status */ |
mbed_official | 610:813dcc80987e | 2768 | return HAL_OK; |
mbed_official | 610:813dcc80987e | 2769 | } |
mbed_official | 610:813dcc80987e | 2770 | |
mbed_official | 610:813dcc80987e | 2771 | |
mbed_official | 610:813dcc80987e | 2772 | |
mbed_official | 610:813dcc80987e | 2773 | /** |
mbed_official | 610:813dcc80987e | 2774 | * @brief Enable the selected ADC. |
mbed_official | 610:813dcc80987e | 2775 | * @note Prerequisite condition to use this function: ADC must be disabled |
mbed_official | 610:813dcc80987e | 2776 | * and voltage regulator must be enabled (done into HAL_ADC_Init()). |
mbed_official | 610:813dcc80987e | 2777 | * @param hadc: ADC handle |
mbed_official | 610:813dcc80987e | 2778 | * @retval HAL status. |
mbed_official | 610:813dcc80987e | 2779 | */ |
mbed_official | 610:813dcc80987e | 2780 | HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc) |
mbed_official | 610:813dcc80987e | 2781 | { |
mbed_official | 610:813dcc80987e | 2782 | uint32_t tickstart = 0; |
mbed_official | 610:813dcc80987e | 2783 | |
mbed_official | 610:813dcc80987e | 2784 | /* ADC enable and wait for ADC ready (in case of ADC is disabled or */ |
mbed_official | 610:813dcc80987e | 2785 | /* enabling phase not yet completed: flag ADC ready not set yet). */ |
mbed_official | 610:813dcc80987e | 2786 | /* Timeout implemented not to be stuck if ADC cannot be enabled (possible */ |
mbed_official | 610:813dcc80987e | 2787 | /* causes: ADC clock not running, ...). */ |
mbed_official | 610:813dcc80987e | 2788 | if (ADC_IS_ENABLE(hadc) == RESET) |
mbed_official | 610:813dcc80987e | 2789 | { |
mbed_official | 610:813dcc80987e | 2790 | /* Check if conditions to enable the ADC are fulfilled */ |
mbed_official | 610:813dcc80987e | 2791 | if (ADC_ENABLING_CONDITIONS(hadc) == RESET) |
mbed_official | 610:813dcc80987e | 2792 | { |
mbed_official | 610:813dcc80987e | 2793 | /* Update ADC state machine to error */ |
mbed_official | 610:813dcc80987e | 2794 | SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); |
mbed_official | 610:813dcc80987e | 2795 | |
mbed_official | 610:813dcc80987e | 2796 | /* Set ADC error code to ADC IP internal error */ |
mbed_official | 610:813dcc80987e | 2797 | SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); |
mbed_official | 610:813dcc80987e | 2798 | |
mbed_official | 610:813dcc80987e | 2799 | return HAL_ERROR; |
mbed_official | 610:813dcc80987e | 2800 | } |
mbed_official | 610:813dcc80987e | 2801 | |
mbed_official | 610:813dcc80987e | 2802 | /* Enable the ADC peripheral */ |
mbed_official | 610:813dcc80987e | 2803 | ADC_ENABLE(hadc); |
mbed_official | 610:813dcc80987e | 2804 | |
mbed_official | 610:813dcc80987e | 2805 | |
mbed_official | 610:813dcc80987e | 2806 | /* Wait for ADC effectively enabled */ |
mbed_official | 610:813dcc80987e | 2807 | tickstart = HAL_GetTick(); |
mbed_official | 610:813dcc80987e | 2808 | |
mbed_official | 610:813dcc80987e | 2809 | while(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET) |
mbed_official | 610:813dcc80987e | 2810 | { |
mbed_official | 610:813dcc80987e | 2811 | /* If ADEN bit is set less than 4 ADC clock cycles after the ADCAL bit |
mbed_official | 610:813dcc80987e | 2812 | has been cleared (after a calibration), ADEN bit is reset by the |
mbed_official | 610:813dcc80987e | 2813 | calibration logic. |
mbed_official | 610:813dcc80987e | 2814 | The workaround is to continue setting ADEN until ADRDY is becomes 1. |
mbed_official | 610:813dcc80987e | 2815 | Additionally, ADC_ENABLE_TIMEOUT is defined to encompass this |
mbed_official | 610:813dcc80987e | 2816 | 4 ADC clock cycle duration */ |
mbed_official | 610:813dcc80987e | 2817 | ADC_ENABLE(hadc); |
mbed_official | 610:813dcc80987e | 2818 | |
mbed_official | 610:813dcc80987e | 2819 | if((HAL_GetTick()-tickstart) > ADC_ENABLE_TIMEOUT) |
mbed_official | 610:813dcc80987e | 2820 | { |
mbed_official | 610:813dcc80987e | 2821 | /* Update ADC state machine to error */ |
mbed_official | 610:813dcc80987e | 2822 | SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); |
mbed_official | 610:813dcc80987e | 2823 | |
mbed_official | 610:813dcc80987e | 2824 | /* Set ADC error code to ADC IP internal error */ |
mbed_official | 610:813dcc80987e | 2825 | SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); |
mbed_official | 610:813dcc80987e | 2826 | |
mbed_official | 610:813dcc80987e | 2827 | return HAL_ERROR; |
mbed_official | 610:813dcc80987e | 2828 | } |
mbed_official | 610:813dcc80987e | 2829 | } |
mbed_official | 610:813dcc80987e | 2830 | } |
mbed_official | 610:813dcc80987e | 2831 | |
mbed_official | 610:813dcc80987e | 2832 | /* Return HAL status */ |
mbed_official | 610:813dcc80987e | 2833 | return HAL_OK; |
mbed_official | 610:813dcc80987e | 2834 | } |
mbed_official | 610:813dcc80987e | 2835 | |
mbed_official | 610:813dcc80987e | 2836 | /** |
mbed_official | 610:813dcc80987e | 2837 | * @brief Disable the selected ADC. |
mbed_official | 610:813dcc80987e | 2838 | * @note Prerequisite condition to use this function: ADC conversions must be |
mbed_official | 610:813dcc80987e | 2839 | * stopped. |
mbed_official | 610:813dcc80987e | 2840 | * @param hadc: ADC handle |
mbed_official | 610:813dcc80987e | 2841 | * @retval HAL status. |
mbed_official | 610:813dcc80987e | 2842 | */ |
mbed_official | 610:813dcc80987e | 2843 | HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc) |
mbed_official | 610:813dcc80987e | 2844 | { |
mbed_official | 610:813dcc80987e | 2845 | uint32_t tickstart = 0; |
mbed_official | 610:813dcc80987e | 2846 | |
mbed_official | 610:813dcc80987e | 2847 | /* Verification if ADC is not already disabled: */ |
mbed_official | 610:813dcc80987e | 2848 | /* Note: forbidden to disable ADC (set bit ADC_CR_ADDIS) if ADC is already */ |
mbed_official | 610:813dcc80987e | 2849 | /* disabled. */ |
mbed_official | 610:813dcc80987e | 2850 | if (ADC_IS_ENABLE(hadc) != RESET ) |
mbed_official | 610:813dcc80987e | 2851 | { |
mbed_official | 610:813dcc80987e | 2852 | /* Check if conditions to disable the ADC are fulfilled */ |
mbed_official | 610:813dcc80987e | 2853 | if (ADC_DISABLING_CONDITIONS(hadc) != RESET) |
mbed_official | 610:813dcc80987e | 2854 | { |
mbed_official | 610:813dcc80987e | 2855 | /* Disable the ADC peripheral */ |
mbed_official | 610:813dcc80987e | 2856 | ADC_DISABLE(hadc); |
mbed_official | 610:813dcc80987e | 2857 | } |
mbed_official | 610:813dcc80987e | 2858 | else |
mbed_official | 610:813dcc80987e | 2859 | { |
mbed_official | 610:813dcc80987e | 2860 | /* Update ADC state machine to error */ |
mbed_official | 610:813dcc80987e | 2861 | SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); |
mbed_official | 610:813dcc80987e | 2862 | |
mbed_official | 610:813dcc80987e | 2863 | /* Set ADC error code to ADC IP internal error */ |
mbed_official | 610:813dcc80987e | 2864 | SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); |
mbed_official | 610:813dcc80987e | 2865 | |
mbed_official | 610:813dcc80987e | 2866 | return HAL_ERROR; |
mbed_official | 610:813dcc80987e | 2867 | } |
mbed_official | 610:813dcc80987e | 2868 | |
mbed_official | 610:813dcc80987e | 2869 | /* Wait for ADC effectively disabled */ |
mbed_official | 610:813dcc80987e | 2870 | tickstart = HAL_GetTick(); |
mbed_official | 610:813dcc80987e | 2871 | |
mbed_official | 610:813dcc80987e | 2872 | while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN)) |
mbed_official | 610:813dcc80987e | 2873 | { |
mbed_official | 610:813dcc80987e | 2874 | if((HAL_GetTick()-tickstart) > ADC_DISABLE_TIMEOUT) |
mbed_official | 610:813dcc80987e | 2875 | { |
mbed_official | 610:813dcc80987e | 2876 | /* Update ADC state machine to error */ |
mbed_official | 610:813dcc80987e | 2877 | SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); |
mbed_official | 610:813dcc80987e | 2878 | |
mbed_official | 610:813dcc80987e | 2879 | /* Set ADC error code to ADC IP internal error */ |
mbed_official | 610:813dcc80987e | 2880 | SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); |
mbed_official | 610:813dcc80987e | 2881 | |
mbed_official | 610:813dcc80987e | 2882 | return HAL_ERROR; |
mbed_official | 610:813dcc80987e | 2883 | } |
mbed_official | 610:813dcc80987e | 2884 | } |
mbed_official | 610:813dcc80987e | 2885 | } |
mbed_official | 610:813dcc80987e | 2886 | |
mbed_official | 610:813dcc80987e | 2887 | /* Return HAL status */ |
mbed_official | 610:813dcc80987e | 2888 | return HAL_OK; |
mbed_official | 610:813dcc80987e | 2889 | } |
mbed_official | 610:813dcc80987e | 2890 | |
mbed_official | 610:813dcc80987e | 2891 | |
mbed_official | 610:813dcc80987e | 2892 | /** |
mbed_official | 610:813dcc80987e | 2893 | * @brief DMA transfer complete callback. |
mbed_official | 610:813dcc80987e | 2894 | * @param hdma: pointer to DMA handle. |
mbed_official | 610:813dcc80987e | 2895 | * @retval None |
mbed_official | 610:813dcc80987e | 2896 | */ |
mbed_official | 610:813dcc80987e | 2897 | void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 610:813dcc80987e | 2898 | { |
mbed_official | 610:813dcc80987e | 2899 | /* Retrieve ADC handle corresponding to current DMA handle */ |
mbed_official | 610:813dcc80987e | 2900 | ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
mbed_official | 610:813dcc80987e | 2901 | |
mbed_official | 610:813dcc80987e | 2902 | /* Update state machine on conversion status if not in error state */ |
mbed_official | 610:813dcc80987e | 2903 | if (HAL_IS_BIT_CLR(hadc->State, (HAL_ADC_STATE_ERROR_INTERNAL|HAL_ADC_STATE_ERROR_DMA))) |
mbed_official | 610:813dcc80987e | 2904 | { |
mbed_official | 610:813dcc80987e | 2905 | /* Update ADC state machine */ |
mbed_official | 610:813dcc80987e | 2906 | SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); |
mbed_official | 610:813dcc80987e | 2907 | /* Is it the end of the regular sequence ? */ |
mbed_official | 610:813dcc80987e | 2908 | if (HAL_IS_BIT_SET(hadc->Instance->ISR, ADC_FLAG_EOS)) |
mbed_official | 610:813dcc80987e | 2909 | { |
mbed_official | 610:813dcc80987e | 2910 | /* Are conversions software-triggered ? */ |
mbed_official | 610:813dcc80987e | 2911 | if(ADC_IS_SOFTWARE_START_REGULAR(hadc)) |
mbed_official | 610:813dcc80987e | 2912 | { |
mbed_official | 610:813dcc80987e | 2913 | /* Is CONT bit set ? */ |
mbed_official | 610:813dcc80987e | 2914 | if (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_CONT) == RESET) |
mbed_official | 610:813dcc80987e | 2915 | { |
mbed_official | 610:813dcc80987e | 2916 | /* CONT bit is not set, no more conversions expected */ |
mbed_official | 610:813dcc80987e | 2917 | CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); |
mbed_official | 610:813dcc80987e | 2918 | if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY)) |
mbed_official | 610:813dcc80987e | 2919 | { |
mbed_official | 610:813dcc80987e | 2920 | SET_BIT(hadc->State, HAL_ADC_STATE_READY); |
mbed_official | 610:813dcc80987e | 2921 | } |
mbed_official | 610:813dcc80987e | 2922 | } |
mbed_official | 610:813dcc80987e | 2923 | } |
mbed_official | 610:813dcc80987e | 2924 | } |
mbed_official | 610:813dcc80987e | 2925 | else |
mbed_official | 610:813dcc80987e | 2926 | { |
mbed_official | 610:813dcc80987e | 2927 | /* DMA End of Transfer interrupt was triggered but conversions sequence |
mbed_official | 610:813dcc80987e | 2928 | is not over. If DMACFG is set to 0, conversions are stopped. */ |
mbed_official | 610:813dcc80987e | 2929 | if (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_DMACFG) == RESET) |
mbed_official | 610:813dcc80987e | 2930 | { |
mbed_official | 610:813dcc80987e | 2931 | /* DMACFG bit is not set, conversions are stopped. */ |
mbed_official | 610:813dcc80987e | 2932 | CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); |
mbed_official | 610:813dcc80987e | 2933 | if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY)) |
mbed_official | 610:813dcc80987e | 2934 | { |
mbed_official | 610:813dcc80987e | 2935 | SET_BIT(hadc->State, HAL_ADC_STATE_READY); |
mbed_official | 610:813dcc80987e | 2936 | } |
mbed_official | 610:813dcc80987e | 2937 | } |
mbed_official | 610:813dcc80987e | 2938 | } |
mbed_official | 610:813dcc80987e | 2939 | |
mbed_official | 610:813dcc80987e | 2940 | /* Conversion complete callback */ |
mbed_official | 610:813dcc80987e | 2941 | HAL_ADC_ConvCpltCallback(hadc); |
mbed_official | 610:813dcc80987e | 2942 | } |
mbed_official | 610:813dcc80987e | 2943 | else /* DMA or internal error occurred (or both) */ |
mbed_official | 610:813dcc80987e | 2944 | { |
mbed_official | 610:813dcc80987e | 2945 | /* In case of internal error, */ |
mbed_official | 610:813dcc80987e | 2946 | if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL)) |
mbed_official | 610:813dcc80987e | 2947 | { |
mbed_official | 610:813dcc80987e | 2948 | /* call Error Callback function */ |
mbed_official | 610:813dcc80987e | 2949 | HAL_ADC_ErrorCallback(hadc); |
mbed_official | 610:813dcc80987e | 2950 | } |
mbed_official | 610:813dcc80987e | 2951 | |
mbed_official | 610:813dcc80987e | 2952 | } |
mbed_official | 610:813dcc80987e | 2953 | |
mbed_official | 610:813dcc80987e | 2954 | |
mbed_official | 610:813dcc80987e | 2955 | } |
mbed_official | 610:813dcc80987e | 2956 | |
mbed_official | 610:813dcc80987e | 2957 | /** |
mbed_official | 610:813dcc80987e | 2958 | * @brief DMA half transfer complete callback. |
mbed_official | 610:813dcc80987e | 2959 | * @param hdma: pointer to DMA handle. |
mbed_official | 610:813dcc80987e | 2960 | * @retval None |
mbed_official | 610:813dcc80987e | 2961 | */ |
mbed_official | 610:813dcc80987e | 2962 | void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma) |
mbed_official | 610:813dcc80987e | 2963 | { |
mbed_official | 610:813dcc80987e | 2964 | /* Retrieve ADC handle corresponding to current DMA handle */ |
mbed_official | 610:813dcc80987e | 2965 | ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
mbed_official | 610:813dcc80987e | 2966 | |
mbed_official | 610:813dcc80987e | 2967 | /* Half conversion callback */ |
mbed_official | 610:813dcc80987e | 2968 | HAL_ADC_ConvHalfCpltCallback(hadc); |
mbed_official | 610:813dcc80987e | 2969 | } |
mbed_official | 610:813dcc80987e | 2970 | |
mbed_official | 610:813dcc80987e | 2971 | /** |
mbed_official | 610:813dcc80987e | 2972 | * @brief DMA error callback. |
mbed_official | 610:813dcc80987e | 2973 | * @param hdma: pointer to DMA handle. |
mbed_official | 610:813dcc80987e | 2974 | * @retval None |
mbed_official | 610:813dcc80987e | 2975 | */ |
mbed_official | 610:813dcc80987e | 2976 | void ADC_DMAError(DMA_HandleTypeDef *hdma) |
mbed_official | 610:813dcc80987e | 2977 | { |
mbed_official | 610:813dcc80987e | 2978 | /* Retrieve ADC handle corresponding to current DMA handle */ |
mbed_official | 610:813dcc80987e | 2979 | ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
mbed_official | 610:813dcc80987e | 2980 | |
mbed_official | 610:813dcc80987e | 2981 | /* Change ADC state */ |
mbed_official | 610:813dcc80987e | 2982 | SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); |
mbed_official | 610:813dcc80987e | 2983 | |
mbed_official | 610:813dcc80987e | 2984 | /* Set ADC error code to DMA error */ |
mbed_official | 610:813dcc80987e | 2985 | SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA); |
mbed_official | 610:813dcc80987e | 2986 | |
mbed_official | 610:813dcc80987e | 2987 | /* Error callback */ |
mbed_official | 610:813dcc80987e | 2988 | HAL_ADC_ErrorCallback(hadc); |
mbed_official | 610:813dcc80987e | 2989 | } |
mbed_official | 610:813dcc80987e | 2990 | |
mbed_official | 610:813dcc80987e | 2991 | |
mbed_official | 610:813dcc80987e | 2992 | /** |
mbed_official | 610:813dcc80987e | 2993 | * @} |
mbed_official | 610:813dcc80987e | 2994 | */ |
mbed_official | 610:813dcc80987e | 2995 | |
mbed_official | 610:813dcc80987e | 2996 | |
mbed_official | 610:813dcc80987e | 2997 | #endif /* HAL_ADC_MODULE_ENABLED */ |
mbed_official | 610:813dcc80987e | 2998 | /** |
mbed_official | 610:813dcc80987e | 2999 | * @} |
mbed_official | 610:813dcc80987e | 3000 | */ |
mbed_official | 610:813dcc80987e | 3001 | |
mbed_official | 610:813dcc80987e | 3002 | /** |
mbed_official | 610:813dcc80987e | 3003 | * @} |
mbed_official | 610:813dcc80987e | 3004 | */ |
mbed_official | 610:813dcc80987e | 3005 | |
mbed_official | 610:813dcc80987e | 3006 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |